[U-Boot] [PATCH 3/3] ARM: imx6: DHCOM i.MX6 PDK: ddr init for 32bit bus and 4GBit chips

[Marek Vasut <marex@denx.de>]

On 10/11/2018 09:09 AM, Ludwig Zenz wrote:
> Hello Marek,

Hello Ludwig,

>>> From: Ludwig Zenz <lzenz@dh-electronics.de>
>>>
>>> Support 1GIB + 2GIB DDR3 with 64bit bus width and 512MIB + 1GIB with 32bit bus width
>>>
>>> Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
>>> ---
>>>  board/dhelectronics/dh_imx6/dh_imx6_spl.c | 191 +++++++++++++++++++++++++++---
>>>  1 file changed, 173 insertions(+), 18 deletions(-)
>>>
>>> diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
>> [...]
>>
>> This patch causes memory instability on 1GiB MX6Q part.
>>
>> Can you check that and fix it ? Thanks.
> 
> Can you tell me more about the error? How do you test this? Did you run a git bisect?
> 
> We did tests in a climate chamber with this configuration (with the MX6Q and all others).
> 
> I think there is only one change that could make a difference:
> 
> static const struct mx6_ddr3_cfg dhcom_mem_ddr_2g = {
> ...
> -       .trcd           = 1312,
> +       .trcd           = 1375,
> ....

In this particular case, the board exhibited random instability. Try
running memtester in linux for a few days, maybe some board that you
have will start exhibiting this too.

-- 
Best regards,
Marek Vasut