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From: Michal Simek <monstr@monstr.eu>
To: Florian Fainelli <f.fainelli@gmail.com>,
	Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com>,
	"Andreas Färber" <afaerber@suse.de>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"Russell King" <linux@arm.linux.org.uk>,
	"Pawel Moll" <pawel.moll@arm.com>,
	"Ian Campbell" <ijc+devicetree@hellion.org.uk>,
	"Michal Simek" <michal.simek@xilinx.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Kumar Gala" <galak@codeaurora.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 3/3] ARM: zynq: DT: Add Ethernet phys
Date: Mon, 01 Sep 2014 13:26:59 +0200	[thread overview]
Message-ID: <54045803.70705@monstr.eu> (raw)
In-Reply-To: <54011E31.8060409@gmail.com>

[-- Attachment #1: Type: text/plain, Size: 3345 bytes --]

On 08/30/2014 02:43 AM, Florian Fainelli wrote:
> On 08/29/2014 04:22 PM, Jason Gunthorpe wrote:
>> On Fri, Aug 29, 2014 at 11:23:57AM -0700, Florian Fainelli wrote:
>>> On 08/29/2014 10:31 AM, Jason Gunthorpe wrote:
>>>> On Fri, Aug 29, 2014 at 08:35:36AM -0700, Sören Brinkmann wrote:
>>>>
>>>>> The compatible string is listed as optional property for PHYs. So, not
>>>>> having one is an option, I guess. But, I'd also prefer to at least keep
>>>>> the -c22 one, since I saw problems when I tried using -c45 (the Zed phy
>>>>> should support it...).
>>>>
>>>> -c45 and -c22 use a completely different MDIO protocol, Zed doesn't
>>>> have a 10GE port, so it certainly doesn't use -c45.
>>>
>>> Most recent 1GbE PHYs should also implement clause 45. It is a nice
>>> improvement if you are using lot of transactions, otherwise clause 45
>>> over clause 22 is suitable and supported by the PHY library (for EEE in
>>> particular).
>>
>> Oh, that is interesting, I haven't actually seen one of those yet..
>>
>> Hum. So that is messy, even if the Zed phy supports the C45 format,
>> the macb driver (and by my reading, the Zynq hardware) lacks the
>> capability to generate C45 frames.
> 
> We should restrict ourselves to clause 45 over clause 22 compatibility
> mode, which requires no MDIO bus driver changes.
> 
>>
>> It could be supported, but you'd have to use the GPIO bitbang MDIO
>> driver to talk to the phy.
>>
>> So... that makes the compatible string for the phy even more
>> confusing. 'Describe The HW' says it should have both c22 and c45
>> listed - however we don't have software support in Linux to negotiate
>> c22 and c45 support between the phy bus driver and attached phy :(
> 
> Right now, if you set the c45 compatible string, the MDIO bus driver and
> the PHY must support native c45 transactions to set phydev->is_c45, if
> one or the other, or neither of those work, we will fallback to c22.
> 
> The part that is not figured out properly yet is how do we want to
> handle functions (e.g: EEE) that are only accessible using c45 (native
> or in compatible mode), since the PHY library uses two pairs of
> accessors, with the native accessors not falling back to the indirect
> accessor...

ok. I have read all responses listed here and still IMHO the best resolution
is not to add any compatible string.
I agree with Florian that we can have shorten boot time when idAAAA.BBBB is used
but also we are not checking that phy can be detect.

I believe all my points in my response are still valid and we have 3 options.
1. not to add any compatible string and use autodetection
2. Add idAAAA.BBBB to shorten boot up time
3. Add c22
4. Add c22 and idAAAA.BBBB

My preference is 1. because there could be problem with MII setting
and autodetection is good proof that everything is working.
If any user wants to have short boot up time it can specify ID in DTS
and also I believe DTS will be much longer because of some IPs in PL.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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WARNING: multiple messages have this Message-ID (diff)
From: Michal Simek <monstr-pSz03upnqPeHXe+LvDLADg@public.gmane.org>
To: Florian Fainelli
	<f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Jason Gunthorpe
	<jgunthorpe-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/@public.gmane.org>
Cc: "Sören Brinkmann"
	<soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
	"Andreas Färber" <afaerber-l3A5Bk7waGM@public.gmane.org>,
	"Mark Rutland" <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"Russell King" <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
	"Pawel Moll" <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
	"Ian Campbell"
	<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
	"Michal Simek"
	<michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"Rob Herring" <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	"Kumar Gala" <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH 3/3] ARM: zynq: DT: Add Ethernet phys
Date: Mon, 01 Sep 2014 13:26:59 +0200	[thread overview]
Message-ID: <54045803.70705@monstr.eu> (raw)
In-Reply-To: <54011E31.8060409-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

[-- Attachment #1: Type: text/plain, Size: 3345 bytes --]

On 08/30/2014 02:43 AM, Florian Fainelli wrote:
> On 08/29/2014 04:22 PM, Jason Gunthorpe wrote:
>> On Fri, Aug 29, 2014 at 11:23:57AM -0700, Florian Fainelli wrote:
>>> On 08/29/2014 10:31 AM, Jason Gunthorpe wrote:
>>>> On Fri, Aug 29, 2014 at 08:35:36AM -0700, Sören Brinkmann wrote:
>>>>
>>>>> The compatible string is listed as optional property for PHYs. So, not
>>>>> having one is an option, I guess. But, I'd also prefer to at least keep
>>>>> the -c22 one, since I saw problems when I tried using -c45 (the Zed phy
>>>>> should support it...).
>>>>
>>>> -c45 and -c22 use a completely different MDIO protocol, Zed doesn't
>>>> have a 10GE port, so it certainly doesn't use -c45.
>>>
>>> Most recent 1GbE PHYs should also implement clause 45. It is a nice
>>> improvement if you are using lot of transactions, otherwise clause 45
>>> over clause 22 is suitable and supported by the PHY library (for EEE in
>>> particular).
>>
>> Oh, that is interesting, I haven't actually seen one of those yet..
>>
>> Hum. So that is messy, even if the Zed phy supports the C45 format,
>> the macb driver (and by my reading, the Zynq hardware) lacks the
>> capability to generate C45 frames.
> 
> We should restrict ourselves to clause 45 over clause 22 compatibility
> mode, which requires no MDIO bus driver changes.
> 
>>
>> It could be supported, but you'd have to use the GPIO bitbang MDIO
>> driver to talk to the phy.
>>
>> So... that makes the compatible string for the phy even more
>> confusing. 'Describe The HW' says it should have both c22 and c45
>> listed - however we don't have software support in Linux to negotiate
>> c22 and c45 support between the phy bus driver and attached phy :(
> 
> Right now, if you set the c45 compatible string, the MDIO bus driver and
> the PHY must support native c45 transactions to set phydev->is_c45, if
> one or the other, or neither of those work, we will fallback to c22.
> 
> The part that is not figured out properly yet is how do we want to
> handle functions (e.g: EEE) that are only accessible using c45 (native
> or in compatible mode), since the PHY library uses two pairs of
> accessors, with the native accessors not falling back to the indirect
> accessor...

ok. I have read all responses listed here and still IMHO the best resolution
is not to add any compatible string.
I agree with Florian that we can have shorten boot time when idAAAA.BBBB is used
but also we are not checking that phy can be detect.

I believe all my points in my response are still valid and we have 3 options.
1. not to add any compatible string and use autodetection
2. Add idAAAA.BBBB to shorten boot up time
3. Add c22
4. Add c22 and idAAAA.BBBB

My preference is 1. because there could be problem with MII setting
and autodetection is good proof that everything is working.
If any user wants to have short boot up time it can specify ID in DTS
and also I believe DTS will be much longer because of some IPs in PL.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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WARNING: multiple messages have this Message-ID (diff)
From: monstr@monstr.eu (Michal Simek)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] ARM: zynq: DT: Add Ethernet phys
Date: Mon, 01 Sep 2014 13:26:59 +0200	[thread overview]
Message-ID: <54045803.70705@monstr.eu> (raw)
In-Reply-To: <54011E31.8060409@gmail.com>

On 08/30/2014 02:43 AM, Florian Fainelli wrote:
> On 08/29/2014 04:22 PM, Jason Gunthorpe wrote:
>> On Fri, Aug 29, 2014 at 11:23:57AM -0700, Florian Fainelli wrote:
>>> On 08/29/2014 10:31 AM, Jason Gunthorpe wrote:
>>>> On Fri, Aug 29, 2014 at 08:35:36AM -0700, S?ren Brinkmann wrote:
>>>>
>>>>> The compatible string is listed as optional property for PHYs. So, not
>>>>> having one is an option, I guess. But, I'd also prefer to at least keep
>>>>> the -c22 one, since I saw problems when I tried using -c45 (the Zed phy
>>>>> should support it...).
>>>>
>>>> -c45 and -c22 use a completely different MDIO protocol, Zed doesn't
>>>> have a 10GE port, so it certainly doesn't use -c45.
>>>
>>> Most recent 1GbE PHYs should also implement clause 45. It is a nice
>>> improvement if you are using lot of transactions, otherwise clause 45
>>> over clause 22 is suitable and supported by the PHY library (for EEE in
>>> particular).
>>
>> Oh, that is interesting, I haven't actually seen one of those yet..
>>
>> Hum. So that is messy, even if the Zed phy supports the C45 format,
>> the macb driver (and by my reading, the Zynq hardware) lacks the
>> capability to generate C45 frames.
> 
> We should restrict ourselves to clause 45 over clause 22 compatibility
> mode, which requires no MDIO bus driver changes.
> 
>>
>> It could be supported, but you'd have to use the GPIO bitbang MDIO
>> driver to talk to the phy.
>>
>> So... that makes the compatible string for the phy even more
>> confusing. 'Describe The HW' says it should have both c22 and c45
>> listed - however we don't have software support in Linux to negotiate
>> c22 and c45 support between the phy bus driver and attached phy :(
> 
> Right now, if you set the c45 compatible string, the MDIO bus driver and
> the PHY must support native c45 transactions to set phydev->is_c45, if
> one or the other, or neither of those work, we will fallback to c22.
> 
> The part that is not figured out properly yet is how do we want to
> handle functions (e.g: EEE) that are only accessible using c45 (native
> or in compatible mode), since the PHY library uses two pairs of
> accessors, with the native accessors not falling back to the indirect
> accessor...

ok. I have read all responses listed here and still IMHO the best resolution
is not to add any compatible string.
I agree with Florian that we can have shorten boot time when idAAAA.BBBB is used
but also we are not checking that phy can be detect.

I believe all my points in my response are still valid and we have 3 options.
1. not to add any compatible string and use autodetection
2. Add idAAAA.BBBB to shorten boot up time
3. Add c22
4. Add c22 and idAAAA.BBBB

My preference is 1. because there could be problem with MII setting
and autodetection is good proof that everything is working.
If any user wants to have short boot up time it can specify ID in DTS
and also I believe DTS will be much longer because of some IPs in PL.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


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  reply	other threads:[~2014-09-01 11:27 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-08-20 15:56 [PATCH 1/3] ARM: zynq: DT: Fix Ethernet phy modes Soren Brinkmann
2014-08-20 15:56 ` Soren Brinkmann
2014-08-20 15:56 ` [PATCH 2/3] ARM: zynq: DT: Move size/address properties to dtsi Soren Brinkmann
2014-08-20 15:56   ` Soren Brinkmann
2014-08-20 16:00   ` Andreas Färber
2014-08-20 16:00     ` Andreas Färber
2014-08-21  8:42     ` Michal Simek
2014-08-21  8:42       ` Michal Simek
2014-08-21  8:42       ` Michal Simek
2014-08-20 15:56 ` [PATCH 3/3] ARM: zynq: DT: Add Ethernet phys Soren Brinkmann
2014-08-20 15:56   ` Soren Brinkmann
2014-08-21  8:41   ` Michal Simek
2014-08-21  8:41     ` Michal Simek
2014-08-21  8:41     ` Michal Simek
2014-08-21 11:32     ` Andreas Färber
2014-08-21 11:32       ` Andreas Färber
2014-08-21 15:49       ` Sören Brinkmann
2014-08-21 15:49         ` Sören Brinkmann
2014-08-21 15:49         ` Sören Brinkmann
2014-08-22 16:20         ` Jason Gunthorpe
2014-08-22 16:20           ` Jason Gunthorpe
2014-08-22 16:20           ` Jason Gunthorpe
2014-08-22 16:31           ` Sören Brinkmann
2014-08-22 16:31             ` Sören Brinkmann
2014-08-22 16:48             ` Jason Gunthorpe
2014-08-22 16:48               ` Jason Gunthorpe
2014-08-22 16:48               ` Jason Gunthorpe
2014-08-22 20:47         ` Florian Fainelli
2014-08-22 20:47           ` Florian Fainelli
2014-08-22 20:47           ` Florian Fainelli
2014-08-25 17:46           ` Jason Gunthorpe
2014-08-25 17:46             ` Jason Gunthorpe
2014-08-25 17:46             ` Jason Gunthorpe
2014-08-25 20:21             ` Florian Fainelli
2014-08-25 20:21               ` Florian Fainelli
2014-08-25 20:21               ` Florian Fainelli
2014-08-29 14:08               ` Michal Simek
2014-08-29 14:08                 ` Michal Simek
2014-08-29 14:08                 ` Michal Simek
2014-08-29 15:18                 ` Andreas Färber
2014-08-29 15:18                   ` Andreas Färber
2014-08-29 15:35                   ` Sören Brinkmann
2014-08-29 15:35                     ` Sören Brinkmann
2014-08-29 15:35                     ` Sören Brinkmann
2014-08-29 15:46                     ` Andreas Färber
2014-08-29 15:46                       ` Andreas Färber
2014-08-29 15:46                       ` Andreas Färber
2014-08-29 17:31                     ` Jason Gunthorpe
2014-08-29 17:31                       ` Jason Gunthorpe
2014-08-29 17:31                       ` Jason Gunthorpe
2014-08-29 18:23                       ` Florian Fainelli
2014-08-29 18:23                         ` Florian Fainelli
2014-08-29 18:23                         ` Florian Fainelli
2014-08-29 23:22                         ` Jason Gunthorpe
2014-08-29 23:22                           ` Jason Gunthorpe
2014-08-30  0:43                           ` Florian Fainelli
2014-08-30  0:43                             ` Florian Fainelli
2014-08-30  0:43                             ` Florian Fainelli
2014-09-01 11:26                             ` Michal Simek [this message]
2014-09-01 11:26                               ` Michal Simek
2014-09-01 11:26                               ` Michal Simek
2014-08-22 20:42     ` Florian Fainelli
2014-08-21  8:42 ` [PATCH 1/3] ARM: zynq: DT: Fix Ethernet phy modes Michal Simek
2014-08-21  8:42   ` Michal Simek
2014-08-21  8:42   ` Michal Simek

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