All of lore.kernel.org
 help / color / mirror / Atom feed
From: James Morse <james.morse@arm.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jonathan.Zhang@cavium.com,
	Catalin Marinas <catalin.marinas@arm.com>,
	Julien Thierry <julien.thierry@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	wangxiongfeng2@huawei.com, linux-arm-kernel@lists.infradead.org,
	Dongjiu Geng <gengdongjiu@huawei.com>,
	kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH v4 17/21] KVM: arm64: Save ESR_EL2 on guest SError
Date: Wed, 01 Nov 2017 17:42:37 +0000	[thread overview]
Message-ID: <59FA078D.6030005@arm.com> (raw)
In-Reply-To: <86efpj50nb.fsf@arm.com>

Hi Marc,

On 31/10/17 05:47, Marc Zyngier wrote:
> On Tue, Oct 31 2017 at  4:26:01 am GMT, Marc Zyngier <marc.zyngier@arm.com> wrote:
>> On Thu, Oct 19 2017 at  4:58:03 pm BST, James Morse <james.morse@arm.com> wrote:
>>> When we exit a guest due to an SError the vcpu fault info isn't updated
>>> with the ESR. Today this is only done for traps.
>>>
>>> The v8.2 RAS Extensions define ISS values for SError. Update the vcpu's
>>> fault_info with the ESR on SError so that handle_exit() can determine
>>> if this was a RAS SError and decode its severity.

>>> diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
>>> index af37658223a0..cba6d8ac105c 100644
>>> --- a/arch/arm64/kvm/hyp/switch.c
>>> +++ b/arch/arm64/kvm/hyp/switch.c
>>> @@ -230,13 +230,20 @@ static bool __hyp_text __translate_far_to_hpfar(u64 far, u64 *hpfar)
>>>  	return true;
>>>  }
>>>  
>>> +static void __hyp_text __populate_fault_info_esr(struct kvm_vcpu *vcpu)
>>> +{
>>> +	vcpu->arch.fault.esr_el2 = read_sysreg_el2(esr);
>>> +}
>>> +
>>>  static bool __hyp_text __populate_fault_info(struct kvm_vcpu *vcpu)
>>>  {
>>> -	u64 esr = read_sysreg_el2(esr);
>>> -	u8 ec = ESR_ELx_EC(esr);
>>> +	u8 ec;
>>> +	u64 esr;
>>>  	u64 hpfar, far;
>>>  
>>> -	vcpu->arch.fault.esr_el2 = esr;
>>> +	__populate_fault_info_esr(vcpu);
>>> +	esr = vcpu->arch.fault.esr_el2;
>>> +	ec = ESR_ELx_EC(esr);
>>>  
>>>  	if (ec != ESR_ELx_EC_DABT_LOW && ec != ESR_ELx_EC_IABT_LOW)
>>>  		return true;
>>> @@ -325,6 +332,8 @@ int __hyp_text __kvm_vcpu_run(struct kvm_vcpu *vcpu)
>>>  	 */
>>>  	if (exit_code == ARM_EXCEPTION_TRAP && !__populate_fault_info(vcpu))
>>>  		goto again;
>>> +	else if (ARM_EXCEPTION_CODE(exit_code) == ARM_EXCEPTION_EL1_SERROR)
>>> +		__populate_fault_info_esr(vcpu);
>>>  
>>>  	if (static_branch_unlikely(&vgic_v2_cpuif_trap) &&
>>>  	    exit_code == ARM_EXCEPTION_TRAP) {
>>
>> With this patch, the only case were we don't save ESR_EL2 is when we
>> take an interrupt. I think we should bite the bullet and make it
>> slightly more streamlined, always saving ESR_EL2.

We always read it __guest_exit, just in case we take an SError and have to put
it back.


> Otherwise, an alternative would be to write something like:
> 
> 	if (ARM_EXCEPTION_CODE(exit_code) != ARM_EXCEPTION_IRQ)
>         	vcpu->arch.fault.esr_el2 = read_sysreg_el2(esr);
> 
> which still avoids saving it, and is a lot more readable.

I'll switch to this in the next version.


Thanks,

James

WARNING: multiple messages have this Message-ID (diff)
From: james.morse@arm.com (James Morse)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 17/21] KVM: arm64: Save ESR_EL2 on guest SError
Date: Wed, 01 Nov 2017 17:42:37 +0000	[thread overview]
Message-ID: <59FA078D.6030005@arm.com> (raw)
In-Reply-To: <86efpj50nb.fsf@arm.com>

Hi Marc,

On 31/10/17 05:47, Marc Zyngier wrote:
> On Tue, Oct 31 2017 at  4:26:01 am GMT, Marc Zyngier <marc.zyngier@arm.com> wrote:
>> On Thu, Oct 19 2017 at  4:58:03 pm BST, James Morse <james.morse@arm.com> wrote:
>>> When we exit a guest due to an SError the vcpu fault info isn't updated
>>> with the ESR. Today this is only done for traps.
>>>
>>> The v8.2 RAS Extensions define ISS values for SError. Update the vcpu's
>>> fault_info with the ESR on SError so that handle_exit() can determine
>>> if this was a RAS SError and decode its severity.

>>> diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
>>> index af37658223a0..cba6d8ac105c 100644
>>> --- a/arch/arm64/kvm/hyp/switch.c
>>> +++ b/arch/arm64/kvm/hyp/switch.c
>>> @@ -230,13 +230,20 @@ static bool __hyp_text __translate_far_to_hpfar(u64 far, u64 *hpfar)
>>>  	return true;
>>>  }
>>>  
>>> +static void __hyp_text __populate_fault_info_esr(struct kvm_vcpu *vcpu)
>>> +{
>>> +	vcpu->arch.fault.esr_el2 = read_sysreg_el2(esr);
>>> +}
>>> +
>>>  static bool __hyp_text __populate_fault_info(struct kvm_vcpu *vcpu)
>>>  {
>>> -	u64 esr = read_sysreg_el2(esr);
>>> -	u8 ec = ESR_ELx_EC(esr);
>>> +	u8 ec;
>>> +	u64 esr;
>>>  	u64 hpfar, far;
>>>  
>>> -	vcpu->arch.fault.esr_el2 = esr;
>>> +	__populate_fault_info_esr(vcpu);
>>> +	esr = vcpu->arch.fault.esr_el2;
>>> +	ec = ESR_ELx_EC(esr);
>>>  
>>>  	if (ec != ESR_ELx_EC_DABT_LOW && ec != ESR_ELx_EC_IABT_LOW)
>>>  		return true;
>>> @@ -325,6 +332,8 @@ int __hyp_text __kvm_vcpu_run(struct kvm_vcpu *vcpu)
>>>  	 */
>>>  	if (exit_code == ARM_EXCEPTION_TRAP && !__populate_fault_info(vcpu))
>>>  		goto again;
>>> +	else if (ARM_EXCEPTION_CODE(exit_code) == ARM_EXCEPTION_EL1_SERROR)
>>> +		__populate_fault_info_esr(vcpu);
>>>  
>>>  	if (static_branch_unlikely(&vgic_v2_cpuif_trap) &&
>>>  	    exit_code == ARM_EXCEPTION_TRAP) {
>>
>> With this patch, the only case were we don't save ESR_EL2 is when we
>> take an interrupt. I think we should bite the bullet and make it
>> slightly more streamlined, always saving ESR_EL2.

We always read it __guest_exit, just in case we take an SError and have to put
it back.


> Otherwise, an alternative would be to write something like:
> 
> 	if (ARM_EXCEPTION_CODE(exit_code) != ARM_EXCEPTION_IRQ)
>         	vcpu->arch.fault.esr_el2 = read_sysreg_el2(esr);
> 
> which still avoids saving it, and is a lot more readable.

I'll switch to this in the next version.


Thanks,

James

  reply	other threads:[~2017-11-01 17:42 UTC|newest]

Thread overview: 160+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-19 14:57 [PATCH v4 00/21] SError rework + RAS&IESB for firmware first support James Morse
2017-10-19 14:57 ` James Morse
2017-10-19 14:57 ` [PATCH v4 01/21] arm64: explicitly mask all exceptions James Morse
2017-10-19 14:57   ` James Morse
2017-10-19 14:57 ` [PATCH v4 02/21] arm64: introduce an order for exceptions James Morse
2017-10-19 14:57   ` James Morse
2017-10-19 14:57 ` [PATCH v4 03/21] arm64: Move the async/fiq helpers to explicitly set process context flags James Morse
2017-10-19 14:57   ` James Morse
2017-10-19 14:57 ` [PATCH v4 04/21] arm64: Mask all exceptions during kernel_exit James Morse
2017-10-19 14:57   ` James Morse
2017-10-19 14:57 ` [PATCH v4 05/21] arm64: entry.S: Remove disable_dbg James Morse
2017-10-19 14:57   ` James Morse
2017-10-19 14:57 ` [PATCH v4 06/21] arm64: entry.S: convert el1_sync James Morse
2017-10-19 14:57   ` James Morse
2017-10-19 14:57 ` [PATCH v4 07/21] arm64: entry.S convert el0_sync James Morse
2017-10-19 14:57   ` James Morse
2017-10-19 14:57 ` [PATCH v4 08/21] arm64: entry.S: convert elX_irq James Morse
2017-10-19 14:57   ` James Morse
2017-10-19 14:57 ` [PATCH v4 09/21] KVM: arm/arm64: mask/unmask daif around VHE guests James Morse
2017-10-19 14:57   ` James Morse
2017-10-30  7:40   ` Christoffer Dall
2017-10-30  7:40     ` Christoffer Dall
2017-11-02 12:14     ` James Morse
2017-11-02 12:14       ` James Morse
2017-11-03 12:45       ` Christoffer Dall
2017-11-03 12:45         ` Christoffer Dall
2017-11-03 17:19         ` James Morse
2017-11-03 17:19           ` James Morse
2017-11-06 12:42           ` Christoffer Dall
2017-11-06 12:42             ` Christoffer Dall
2017-10-19 14:57 ` [PATCH v4 10/21] arm64: entry.S: move SError handling into a C function for future expansion James Morse
2017-10-19 14:57   ` James Morse
2018-01-02 21:07   ` Adam Wallis
2018-01-02 21:07     ` Adam Wallis
2018-01-03 16:00     ` James Morse
2018-01-03 16:00       ` James Morse
2017-10-19 14:57 ` [PATCH v4 11/21] arm64: cpufeature: Detect CPU RAS Extentions James Morse
2017-10-19 14:57   ` James Morse
2017-10-31 13:14   ` Will Deacon
2017-10-31 13:14     ` Will Deacon
2017-11-02 12:15     ` James Morse
2017-11-02 12:15       ` James Morse
2017-10-19 14:57 ` [PATCH v4 12/21] arm64: kernel: Survive corrected RAS errors notified by SError James Morse
2017-10-19 14:57   ` James Morse
2017-10-31 13:50   ` Will Deacon
2017-10-31 13:50     ` Will Deacon
2017-11-02 12:15     ` James Morse
2017-11-02 12:15       ` James Morse
2017-10-19 14:57 ` [PATCH v4 13/21] arm64: cpufeature: Enable IESB on exception entry/return for firmware-first James Morse
2017-10-19 14:57   ` James Morse
2017-10-31 13:56   ` Will Deacon
2017-10-31 13:56     ` Will Deacon
2017-10-19 14:58 ` [PATCH v4 14/21] arm64: kernel: Prepare for a DISR user James Morse
2017-10-19 14:58   ` James Morse
2017-10-19 14:58 ` [PATCH v4 15/21] KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2 James Morse
2017-10-19 14:58   ` James Morse
2017-10-20 16:44   ` gengdongjiu
2017-10-20 16:44     ` gengdongjiu
2017-10-23 15:26     ` James Morse
2017-10-23 15:26       ` James Morse
2017-10-24  9:53       ` gengdongjiu
2017-10-24  9:53         ` gengdongjiu
2017-10-30  7:59   ` Christoffer Dall
2017-10-30  7:59     ` Christoffer Dall
2017-10-30 10:51     ` Christoffer Dall
2017-10-30 10:51       ` Christoffer Dall
2017-10-30 15:44       ` James Morse
2017-10-30 15:44         ` James Morse
2017-10-31  5:48         ` Christoffer Dall
2017-10-31  5:48           ` Christoffer Dall
2017-10-31  6:34   ` Marc Zyngier
2017-10-31  6:34     ` Marc Zyngier
2017-10-19 14:58 ` [PATCH v4 16/21] KVM: arm64: Save/Restore guest DISR_EL1 James Morse
2017-10-19 14:58   ` James Morse
2017-10-31  4:27   ` Marc Zyngier
2017-10-31  4:27     ` Marc Zyngier
2017-10-31  5:27   ` Christoffer Dall
2017-10-31  5:27     ` Christoffer Dall
2017-10-19 14:58 ` [PATCH v4 17/21] KVM: arm64: Save ESR_EL2 on guest SError James Morse
2017-10-19 14:58   ` James Morse
2017-10-31  4:26   ` Marc Zyngier
2017-10-31  4:26     ` Marc Zyngier
2017-10-31  5:47     ` Marc Zyngier
2017-10-31  5:47       ` Marc Zyngier
2017-11-01 17:42       ` James Morse [this message]
2017-11-01 17:42         ` James Morse
2017-10-19 14:58 ` [PATCH v4 18/21] KVM: arm64: Handle RAS SErrors from EL1 on guest exit James Morse
2017-10-19 14:58   ` James Morse
2017-10-31  5:55   ` Marc Zyngier
2017-10-31  5:55     ` Marc Zyngier
2017-10-31  5:56   ` Christoffer Dall
2017-10-31  5:56     ` Christoffer Dall
2017-10-19 14:58 ` [PATCH v4 19/21] KVM: arm64: Handle RAS SErrors from EL2 " James Morse
2017-10-19 14:58   ` James Morse
2017-10-27  6:26   ` gengdongjiu
2017-10-27  6:26     ` gengdongjiu
2017-10-27 17:38     ` James Morse
2017-10-27 17:38       ` James Morse
2017-10-31  6:13   ` Marc Zyngier
2017-10-31  6:13     ` Marc Zyngier
2017-10-31  6:13   ` Christoffer Dall
2017-10-31  6:13     ` Christoffer Dall
2017-10-19 14:58 ` [PATCH v4 20/21] KVM: arm64: Take any host SError before entering the guest James Morse
2017-10-19 14:58   ` James Morse
2017-10-31  6:23   ` Christoffer Dall
2017-10-31  6:23     ` Christoffer Dall
2017-10-31 11:43     ` James Morse
2017-10-31 11:43       ` James Morse
2017-11-01  4:55       ` Christoffer Dall
2017-11-01  4:55         ` Christoffer Dall
2017-11-02 12:18         ` James Morse
2017-11-02 12:18           ` James Morse
2017-11-03 12:49           ` Christoffer Dall
2017-11-03 12:49             ` Christoffer Dall
2017-11-03 16:14             ` James Morse
2017-11-03 16:14               ` James Morse
2017-11-06 12:45               ` Christoffer Dall
2017-11-06 12:45                 ` Christoffer Dall
2017-10-19 14:58 ` [PATCH v4 21/21] KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA James Morse
2017-10-19 14:58   ` James Morse
2017-10-31  6:32   ` Christoffer Dall
2017-10-31  6:32     ` Christoffer Dall
2017-10-31  6:32   ` Marc Zyngier
2017-10-31  6:32     ` Marc Zyngier
2017-10-31  6:35 ` [PATCH v4 00/21] SError rework + RAS&IESB for firmware first support Christoffer Dall
2017-10-31  6:35   ` Christoffer Dall
2017-10-31 10:08   ` Will Deacon
2017-10-31 10:08     ` Will Deacon
2017-11-01 15:23     ` James Morse
2017-11-01 15:23       ` James Morse
2017-11-02  8:14       ` Christoffer Dall
2017-11-02  8:14         ` Christoffer Dall
2017-11-09 18:14 ` James Morse
2017-11-09 18:14   ` James Morse
2017-11-10 12:03   ` gengdongjiu
2017-11-10 12:03     ` gengdongjiu
2017-11-13 11:29   ` Christoffer Dall
2017-11-13 11:29     ` Christoffer Dall
2017-11-13 13:05     ` Peter Maydell
2017-11-13 13:05       ` Peter Maydell
2017-11-20  8:53       ` Christoffer Dall
2017-11-20  8:53         ` Christoffer Dall
2017-11-13 16:14     ` Andrew Jones
2017-11-13 16:14       ` Andrew Jones
2017-11-13 17:56       ` Peter Maydell
2017-11-13 17:56         ` Peter Maydell
2017-11-14 16:11       ` James Morse
2017-11-14 16:11         ` James Morse
2017-11-15  9:59         ` gengdongjiu
2017-11-15  9:59           ` gengdongjiu
2017-11-14 16:03     ` James Morse
2017-11-14 16:03       ` James Morse
2017-11-15  9:15       ` gengdongjiu
2017-11-15  9:15         ` gengdongjiu
2017-11-15 18:25         ` James Morse
2017-11-15 18:25           ` James Morse
2017-11-21 11:31           ` gengdongjiu
2017-11-21 11:31             ` gengdongjiu
2017-11-20  8:55       ` Christoffer Dall
2017-11-20  8:55         ` Christoffer Dall

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=59FA078D.6030005@arm.com \
    --to=james.morse@arm.com \
    --cc=Jonathan.Zhang@cavium.com \
    --cc=catalin.marinas@arm.com \
    --cc=gengdongjiu@huawei.com \
    --cc=julien.thierry@arm.com \
    --cc=kvmarm@lists.cs.columbia.edu \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=marc.zyngier@arm.com \
    --cc=wangxiongfeng2@huawei.com \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.