From: Adam Wallis <awallis@codeaurora.org> To: James Morse <james.morse@arm.com>, linux-arm-kernel@lists.infradead.org Cc: Jonathan.Zhang@cavium.com, Julien Thierry <julien.thierry@arm.com>, Marc Zyngier <marc.zyngier@arm.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will.deacon@arm.com>, Dongjiu Geng <gengdongjiu@huawei.com>, kvmarm@lists.cs.columbia.edu, Wang Xiongfeng <wangxiongfengi2@huawei.com>, wangxiongfeng2@huawei.com Subject: Re: [PATCH v4 10/21] arm64: entry.S: move SError handling into a C function for future expansion Date: Tue, 2 Jan 2018 16:07:05 -0500 [thread overview] Message-ID: <b99e7738-f8dd-26bf-a050-f970c2f8d03b@codeaurora.org> (raw) In-Reply-To: <20171019145807.23251-11-james.morse@arm.com> James On 10/19/2017 10:57 AM, James Morse wrote: [..] > kernel_ventry el1_fiq_invalid // FIQ EL1h > - kernel_ventry el1_error_invalid // Error EL1h > + kernel_ventry el1_error // Error EL1h > > kernel_ventry el0_sync // Synchronous 64-bit EL0 > kernel_ventry el0_irq // IRQ 64-bit EL0 > kernel_ventry el0_fiq_invalid // FIQ 64-bit EL0 > - kernel_ventry el0_error_invalid // Error 64-bit EL0 > + kernel_ventry el0_error // Error 64-bit EL0 > > #ifdef CONFIG_COMPAT > kernel_ventry el0_sync_compat // Synchronous 32-bit EL0 > kernel_ventry el0_irq_compat // IRQ 32-bit EL0 > kernel_ventry el0_fiq_invalid_compat // FIQ 32-bit EL0 > - kernel_ventry el0_error_invalid_compat // Error 32-bit EL0 > + kernel_ventry el0_error_compat // Error 32-bit EL0 > #else > kernel_ventry el0_sync_invalid // Synchronous 32-bit EL0 > kernel_ventry el0_irq_invalid // IRQ 32-bit EL0 > @@ -455,10 +455,6 @@ ENDPROC(el0_error_invalid) > el0_fiq_invalid_compat: > inv_entry 0, BAD_FIQ, 32 > ENDPROC(el0_fiq_invalid_compat) > - > -el0_error_invalid_compat: > - inv_entry 0, BAD_ERROR, 32 > -ENDPROC(el0_error_invalid_compat) > #endif Perhaps I missed something quite obvious, but is there any reason to not also remove el1_error_invalid, since SError handling now jumps to el1_error? > el1_sync_invalid: > @@ -663,6 +659,10 @@ el0_svc_compat: > el0_irq_compat: > kernel_entry 0, 32 > b el0_irq_naked > + > +el0_error_compat: > + kernel_entry 0, 32 > + b el0_error_naked > #endif > > el0_da: > @@ -780,6 +780,28 @@ el0_irq_naked: > b ret_to_user > ENDPROC(el0_irq) > > +el1_error: > + kernel_entry 1 > + mrs x1, esr_el1 > + enable_dbg > + mov x0, sp > + bl do_serror > + kernel_exit 1 > +ENDPROC(el1_error) > + > +el0_error: > + kernel_entry 0 > +el0_error_naked: > + mrs x1, esr_el1 > + enable_dbg > + mov x0, sp > + bl do_serror > + enable_daif > + ct_user_exit > + b ret_to_user > +ENDPROC(el0_error) [..] Thanks Adam -- Adam Wallis Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
WARNING: multiple messages have this Message-ID (diff)
From: awallis@codeaurora.org (Adam Wallis) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 10/21] arm64: entry.S: move SError handling into a C function for future expansion Date: Tue, 2 Jan 2018 16:07:05 -0500 [thread overview] Message-ID: <b99e7738-f8dd-26bf-a050-f970c2f8d03b@codeaurora.org> (raw) In-Reply-To: <20171019145807.23251-11-james.morse@arm.com> James On 10/19/2017 10:57 AM, James Morse wrote: [..] > kernel_ventry el1_fiq_invalid // FIQ EL1h > - kernel_ventry el1_error_invalid // Error EL1h > + kernel_ventry el1_error // Error EL1h > > kernel_ventry el0_sync // Synchronous 64-bit EL0 > kernel_ventry el0_irq // IRQ 64-bit EL0 > kernel_ventry el0_fiq_invalid // FIQ 64-bit EL0 > - kernel_ventry el0_error_invalid // Error 64-bit EL0 > + kernel_ventry el0_error // Error 64-bit EL0 > > #ifdef CONFIG_COMPAT > kernel_ventry el0_sync_compat // Synchronous 32-bit EL0 > kernel_ventry el0_irq_compat // IRQ 32-bit EL0 > kernel_ventry el0_fiq_invalid_compat // FIQ 32-bit EL0 > - kernel_ventry el0_error_invalid_compat // Error 32-bit EL0 > + kernel_ventry el0_error_compat // Error 32-bit EL0 > #else > kernel_ventry el0_sync_invalid // Synchronous 32-bit EL0 > kernel_ventry el0_irq_invalid // IRQ 32-bit EL0 > @@ -455,10 +455,6 @@ ENDPROC(el0_error_invalid) > el0_fiq_invalid_compat: > inv_entry 0, BAD_FIQ, 32 > ENDPROC(el0_fiq_invalid_compat) > - > -el0_error_invalid_compat: > - inv_entry 0, BAD_ERROR, 32 > -ENDPROC(el0_error_invalid_compat) > #endif Perhaps I missed something quite obvious, but is there any reason to not also remove el1_error_invalid, since SError handling now jumps to el1_error? > el1_sync_invalid: > @@ -663,6 +659,10 @@ el0_svc_compat: > el0_irq_compat: > kernel_entry 0, 32 > b el0_irq_naked > + > +el0_error_compat: > + kernel_entry 0, 32 > + b el0_error_naked > #endif > > el0_da: > @@ -780,6 +780,28 @@ el0_irq_naked: > b ret_to_user > ENDPROC(el0_irq) > > +el1_error: > + kernel_entry 1 > + mrs x1, esr_el1 > + enable_dbg > + mov x0, sp > + bl do_serror > + kernel_exit 1 > +ENDPROC(el1_error) > + > +el0_error: > + kernel_entry 0 > +el0_error_naked: > + mrs x1, esr_el1 > + enable_dbg > + mov x0, sp > + bl do_serror > + enable_daif > + ct_user_exit > + b ret_to_user > +ENDPROC(el0_error) [..] Thanks Adam -- Adam Wallis Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2018-01-02 21:02 UTC|newest] Thread overview: 160+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-10-19 14:57 [PATCH v4 00/21] SError rework + RAS&IESB for firmware first support James Morse 2017-10-19 14:57 ` James Morse 2017-10-19 14:57 ` [PATCH v4 01/21] arm64: explicitly mask all exceptions James Morse 2017-10-19 14:57 ` James Morse 2017-10-19 14:57 ` [PATCH v4 02/21] arm64: introduce an order for exceptions James Morse 2017-10-19 14:57 ` James Morse 2017-10-19 14:57 ` [PATCH v4 03/21] arm64: Move the async/fiq helpers to explicitly set process context flags James Morse 2017-10-19 14:57 ` James Morse 2017-10-19 14:57 ` [PATCH v4 04/21] arm64: Mask all exceptions during kernel_exit James Morse 2017-10-19 14:57 ` James Morse 2017-10-19 14:57 ` [PATCH v4 05/21] arm64: entry.S: Remove disable_dbg James Morse 2017-10-19 14:57 ` James Morse 2017-10-19 14:57 ` [PATCH v4 06/21] arm64: entry.S: convert el1_sync James Morse 2017-10-19 14:57 ` James Morse 2017-10-19 14:57 ` [PATCH v4 07/21] arm64: entry.S convert el0_sync James Morse 2017-10-19 14:57 ` James Morse 2017-10-19 14:57 ` [PATCH v4 08/21] arm64: entry.S: convert elX_irq James Morse 2017-10-19 14:57 ` James Morse 2017-10-19 14:57 ` [PATCH v4 09/21] KVM: arm/arm64: mask/unmask daif around VHE guests James Morse 2017-10-19 14:57 ` James Morse 2017-10-30 7:40 ` Christoffer Dall 2017-10-30 7:40 ` Christoffer Dall 2017-11-02 12:14 ` James Morse 2017-11-02 12:14 ` James Morse 2017-11-03 12:45 ` Christoffer Dall 2017-11-03 12:45 ` Christoffer Dall 2017-11-03 17:19 ` James Morse 2017-11-03 17:19 ` James Morse 2017-11-06 12:42 ` Christoffer Dall 2017-11-06 12:42 ` Christoffer Dall 2017-10-19 14:57 ` [PATCH v4 10/21] arm64: entry.S: move SError handling into a C function for future expansion James Morse 2017-10-19 14:57 ` James Morse 2018-01-02 21:07 ` Adam Wallis [this message] 2018-01-02 21:07 ` Adam Wallis 2018-01-03 16:00 ` James Morse 2018-01-03 16:00 ` James Morse 2017-10-19 14:57 ` [PATCH v4 11/21] arm64: cpufeature: Detect CPU RAS Extentions James Morse 2017-10-19 14:57 ` James Morse 2017-10-31 13:14 ` Will Deacon 2017-10-31 13:14 ` Will Deacon 2017-11-02 12:15 ` James Morse 2017-11-02 12:15 ` James Morse 2017-10-19 14:57 ` [PATCH v4 12/21] arm64: kernel: Survive corrected RAS errors notified by SError James Morse 2017-10-19 14:57 ` James Morse 2017-10-31 13:50 ` Will Deacon 2017-10-31 13:50 ` Will Deacon 2017-11-02 12:15 ` James Morse 2017-11-02 12:15 ` James Morse 2017-10-19 14:57 ` [PATCH v4 13/21] arm64: cpufeature: Enable IESB on exception entry/return for firmware-first James Morse 2017-10-19 14:57 ` James Morse 2017-10-31 13:56 ` Will Deacon 2017-10-31 13:56 ` Will Deacon 2017-10-19 14:58 ` [PATCH v4 14/21] arm64: kernel: Prepare for a DISR user James Morse 2017-10-19 14:58 ` James Morse 2017-10-19 14:58 ` [PATCH v4 15/21] KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2 James Morse 2017-10-19 14:58 ` James Morse 2017-10-20 16:44 ` gengdongjiu 2017-10-20 16:44 ` gengdongjiu 2017-10-23 15:26 ` James Morse 2017-10-23 15:26 ` James Morse 2017-10-24 9:53 ` gengdongjiu 2017-10-24 9:53 ` gengdongjiu 2017-10-30 7:59 ` Christoffer Dall 2017-10-30 7:59 ` Christoffer Dall 2017-10-30 10:51 ` Christoffer Dall 2017-10-30 10:51 ` Christoffer Dall 2017-10-30 15:44 ` James Morse 2017-10-30 15:44 ` James Morse 2017-10-31 5:48 ` Christoffer Dall 2017-10-31 5:48 ` Christoffer Dall 2017-10-31 6:34 ` Marc Zyngier 2017-10-31 6:34 ` Marc Zyngier 2017-10-19 14:58 ` [PATCH v4 16/21] KVM: arm64: Save/Restore guest DISR_EL1 James Morse 2017-10-19 14:58 ` James Morse 2017-10-31 4:27 ` Marc Zyngier 2017-10-31 4:27 ` Marc Zyngier 2017-10-31 5:27 ` Christoffer Dall 2017-10-31 5:27 ` Christoffer Dall 2017-10-19 14:58 ` [PATCH v4 17/21] KVM: arm64: Save ESR_EL2 on guest SError James Morse 2017-10-19 14:58 ` James Morse 2017-10-31 4:26 ` Marc Zyngier 2017-10-31 4:26 ` Marc Zyngier 2017-10-31 5:47 ` Marc Zyngier 2017-10-31 5:47 ` Marc Zyngier 2017-11-01 17:42 ` James Morse 2017-11-01 17:42 ` James Morse 2017-10-19 14:58 ` [PATCH v4 18/21] KVM: arm64: Handle RAS SErrors from EL1 on guest exit James Morse 2017-10-19 14:58 ` James Morse 2017-10-31 5:55 ` Marc Zyngier 2017-10-31 5:55 ` Marc Zyngier 2017-10-31 5:56 ` Christoffer Dall 2017-10-31 5:56 ` Christoffer Dall 2017-10-19 14:58 ` [PATCH v4 19/21] KVM: arm64: Handle RAS SErrors from EL2 " James Morse 2017-10-19 14:58 ` James Morse 2017-10-27 6:26 ` gengdongjiu 2017-10-27 6:26 ` gengdongjiu 2017-10-27 17:38 ` James Morse 2017-10-27 17:38 ` James Morse 2017-10-31 6:13 ` Marc Zyngier 2017-10-31 6:13 ` Marc Zyngier 2017-10-31 6:13 ` Christoffer Dall 2017-10-31 6:13 ` Christoffer Dall 2017-10-19 14:58 ` [PATCH v4 20/21] KVM: arm64: Take any host SError before entering the guest James Morse 2017-10-19 14:58 ` James Morse 2017-10-31 6:23 ` Christoffer Dall 2017-10-31 6:23 ` Christoffer Dall 2017-10-31 11:43 ` James Morse 2017-10-31 11:43 ` James Morse 2017-11-01 4:55 ` Christoffer Dall 2017-11-01 4:55 ` Christoffer Dall 2017-11-02 12:18 ` James Morse 2017-11-02 12:18 ` James Morse 2017-11-03 12:49 ` Christoffer Dall 2017-11-03 12:49 ` Christoffer Dall 2017-11-03 16:14 ` James Morse 2017-11-03 16:14 ` James Morse 2017-11-06 12:45 ` Christoffer Dall 2017-11-06 12:45 ` Christoffer Dall 2017-10-19 14:58 ` [PATCH v4 21/21] KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA James Morse 2017-10-19 14:58 ` James Morse 2017-10-31 6:32 ` Christoffer Dall 2017-10-31 6:32 ` Christoffer Dall 2017-10-31 6:32 ` Marc Zyngier 2017-10-31 6:32 ` Marc Zyngier 2017-10-31 6:35 ` [PATCH v4 00/21] SError rework + RAS&IESB for firmware first support Christoffer Dall 2017-10-31 6:35 ` Christoffer Dall 2017-10-31 10:08 ` Will Deacon 2017-10-31 10:08 ` Will Deacon 2017-11-01 15:23 ` James Morse 2017-11-01 15:23 ` James Morse 2017-11-02 8:14 ` Christoffer Dall 2017-11-02 8:14 ` Christoffer Dall 2017-11-09 18:14 ` James Morse 2017-11-09 18:14 ` James Morse 2017-11-10 12:03 ` gengdongjiu 2017-11-10 12:03 ` gengdongjiu 2017-11-13 11:29 ` Christoffer Dall 2017-11-13 11:29 ` Christoffer Dall 2017-11-13 13:05 ` Peter Maydell 2017-11-13 13:05 ` Peter Maydell 2017-11-20 8:53 ` Christoffer Dall 2017-11-20 8:53 ` Christoffer Dall 2017-11-13 16:14 ` Andrew Jones 2017-11-13 16:14 ` Andrew Jones 2017-11-13 17:56 ` Peter Maydell 2017-11-13 17:56 ` Peter Maydell 2017-11-14 16:11 ` James Morse 2017-11-14 16:11 ` James Morse 2017-11-15 9:59 ` gengdongjiu 2017-11-15 9:59 ` gengdongjiu 2017-11-14 16:03 ` James Morse 2017-11-14 16:03 ` James Morse 2017-11-15 9:15 ` gengdongjiu 2017-11-15 9:15 ` gengdongjiu 2017-11-15 18:25 ` James Morse 2017-11-15 18:25 ` James Morse 2017-11-21 11:31 ` gengdongjiu 2017-11-21 11:31 ` gengdongjiu 2017-11-20 8:55 ` Christoffer Dall 2017-11-20 8:55 ` Christoffer Dall
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