* [PATCH 1/7] media: hantro: use G1_REG_INTERRUPT directly for the mpeg2
2021-03-05 18:39 [PATCH 0/7] Microship SAMA5D4 VPU support et al Emil Velikov
2021-03-05 18:39 ` Emil Velikov
@ 2021-03-05 18:39 ` Emil Velikov
2021-03-05 18:39 ` Emil Velikov
` (5 subsequent siblings)
7 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, kernel, Ezequiel Garcia, Philipp Zabel,
linux-media, linux-rockchip
From: Emil Velikov <emil.velikov@collabora.com>
Use the register directly over the existing SWREG().
Ideally we'll port the driver away from the local registers, but for
now this is enough. For context - I was reading through the IRQ register
handling across the variants.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
index 6386a3989bfe..0fd306806f16 100644
--- a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
+++ b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
@@ -10,6 +10,7 @@
#include <media/v4l2-mem2mem.h>
#include "hantro.h"
#include "hantro_hw.h"
+#include "hantro_g1_regs.h"
#define G1_SWREG(nr) ((nr) * 4)
@@ -20,7 +21,6 @@
#define G1_REG_REFER2_BASE G1_SWREG(16)
#define G1_REG_REFER3_BASE G1_SWREG(17)
#define G1_REG_QTABLE_BASE G1_SWREG(40)
-#define G1_REG_DEC_E(v) ((v) ? BIT(0) : 0)
#define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24))
#define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0)
@@ -246,6 +246,5 @@ void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx)
hantro_end_prepare_run(ctx);
- reg = G1_REG_DEC_E(1);
- vdpu_write(vpu, reg, G1_SWREG(1));
+ vdpu_write(vpu, G1_REG_INTERRUPT_DEC_E, G1_REG_INTERRUPT);
}
--
2.30.1
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 1/7] media: hantro: use G1_REG_INTERRUPT directly for the mpeg2
@ 2021-03-05 18:39 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, linux-rockchip, kernel, Ezequiel Garcia, linux-media
From: Emil Velikov <emil.velikov@collabora.com>
Use the register directly over the existing SWREG().
Ideally we'll port the driver away from the local registers, but for
now this is enough. For context - I was reading through the IRQ register
handling across the variants.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
index 6386a3989bfe..0fd306806f16 100644
--- a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
+++ b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
@@ -10,6 +10,7 @@
#include <media/v4l2-mem2mem.h>
#include "hantro.h"
#include "hantro_hw.h"
+#include "hantro_g1_regs.h"
#define G1_SWREG(nr) ((nr) * 4)
@@ -20,7 +21,6 @@
#define G1_REG_REFER2_BASE G1_SWREG(16)
#define G1_REG_REFER3_BASE G1_SWREG(17)
#define G1_REG_QTABLE_BASE G1_SWREG(40)
-#define G1_REG_DEC_E(v) ((v) ? BIT(0) : 0)
#define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24))
#define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0)
@@ -246,6 +246,5 @@ void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx)
hantro_end_prepare_run(ctx);
- reg = G1_REG_DEC_E(1);
- vdpu_write(vpu, reg, G1_SWREG(1));
+ vdpu_write(vpu, G1_REG_INTERRUPT_DEC_E, G1_REG_INTERRUPT);
}
--
2.30.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 1/7] media: hantro: use G1_REG_INTERRUPT directly for the mpeg2
@ 2021-03-05 18:39 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, kernel, Ezequiel Garcia, Philipp Zabel,
linux-media, linux-rockchip
From: Emil Velikov <emil.velikov@collabora.com>
Use the register directly over the existing SWREG().
Ideally we'll port the driver away from the local registers, but for
now this is enough. For context - I was reading through the IRQ register
handling across the variants.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
index 6386a3989bfe..0fd306806f16 100644
--- a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
+++ b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
@@ -10,6 +10,7 @@
#include <media/v4l2-mem2mem.h>
#include "hantro.h"
#include "hantro_hw.h"
+#include "hantro_g1_regs.h"
#define G1_SWREG(nr) ((nr) * 4)
@@ -20,7 +21,6 @@
#define G1_REG_REFER2_BASE G1_SWREG(16)
#define G1_REG_REFER3_BASE G1_SWREG(17)
#define G1_REG_QTABLE_BASE G1_SWREG(40)
-#define G1_REG_DEC_E(v) ((v) ? BIT(0) : 0)
#define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24))
#define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0)
@@ -246,6 +246,5 @@ void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx)
hantro_end_prepare_run(ctx);
- reg = G1_REG_DEC_E(1);
- vdpu_write(vpu, reg, G1_SWREG(1));
+ vdpu_write(vpu, G1_REG_INTERRUPT_DEC_E, G1_REG_INTERRUPT);
}
--
2.30.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 2/7] media: hantro: imx: reuse MB_DIM define
2021-03-05 18:39 [PATCH 0/7] Microship SAMA5D4 VPU support et al Emil Velikov
2021-03-05 18:39 ` Emil Velikov
@ 2021-03-05 18:39 ` Emil Velikov
2021-03-05 18:39 ` Emil Velikov
` (5 subsequent siblings)
7 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, kernel, Ezequiel Garcia, Philipp Zabel,
linux-media, linux-rockchip
From: Emil Velikov <emil.velikov@collabora.com>
Swap the hardcoded 16 with MB_DIM define.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/imx8m_vpu_hw.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index c222de075ef4..1f48c1956cd2 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -109,10 +109,10 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = {
.frmsize = {
.min_width = 48,
.max_width = 3840,
- .step_width = 16,
+ .step_width = MB_DIM,
.min_height = 48,
.max_height = 2160,
- .step_height = 16,
+ .step_height = MB_DIM,
},
},
{
--
2.30.1
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 2/7] media: hantro: imx: reuse MB_DIM define
@ 2021-03-05 18:39 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, linux-rockchip, kernel, Ezequiel Garcia, linux-media
From: Emil Velikov <emil.velikov@collabora.com>
Swap the hardcoded 16 with MB_DIM define.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/imx8m_vpu_hw.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index c222de075ef4..1f48c1956cd2 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -109,10 +109,10 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = {
.frmsize = {
.min_width = 48,
.max_width = 3840,
- .step_width = 16,
+ .step_width = MB_DIM,
.min_height = 48,
.max_height = 2160,
- .step_height = 16,
+ .step_height = MB_DIM,
},
},
{
--
2.30.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 2/7] media: hantro: imx: reuse MB_DIM define
@ 2021-03-05 18:39 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, kernel, Ezequiel Garcia, Philipp Zabel,
linux-media, linux-rockchip
From: Emil Velikov <emil.velikov@collabora.com>
Swap the hardcoded 16 with MB_DIM define.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/imx8m_vpu_hw.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index c222de075ef4..1f48c1956cd2 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -109,10 +109,10 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = {
.frmsize = {
.min_width = 48,
.max_width = 3840,
- .step_width = 16,
+ .step_width = MB_DIM,
.min_height = 48,
.max_height = 2160,
- .step_height = 16,
+ .step_height = MB_DIM,
},
},
{
--
2.30.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 3/7] media: hantro: imx: remove duplicate dec_base init
2021-03-05 18:39 [PATCH 0/7] Microship SAMA5D4 VPU support et al Emil Velikov
2021-03-05 18:39 ` Emil Velikov
@ 2021-03-05 18:39 ` Emil Velikov
2021-03-05 18:39 ` Emil Velikov
` (5 subsequent siblings)
7 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, kernel, Ezequiel Garcia, Philipp Zabel,
linux-media, linux-rockchip
From: Emil Velikov <emil.velikov@collabora.com>
The vpu->dec_base is already set by the hantro driver itself.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/imx8m_vpu_hw.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index 1f48c1956cd2..cb1ac02c03d2 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -150,7 +150,6 @@ static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id)
static int imx8mq_vpu_hw_init(struct hantro_dev *vpu)
{
- vpu->dec_base = vpu->reg_bases[0];
vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1];
return 0;
--
2.30.1
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 3/7] media: hantro: imx: remove duplicate dec_base init
@ 2021-03-05 18:39 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, linux-rockchip, kernel, Ezequiel Garcia, linux-media
From: Emil Velikov <emil.velikov@collabora.com>
The vpu->dec_base is already set by the hantro driver itself.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/imx8m_vpu_hw.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index 1f48c1956cd2..cb1ac02c03d2 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -150,7 +150,6 @@ static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id)
static int imx8mq_vpu_hw_init(struct hantro_dev *vpu)
{
- vpu->dec_base = vpu->reg_bases[0];
vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1];
return 0;
--
2.30.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 3/7] media: hantro: imx: remove duplicate dec_base init
@ 2021-03-05 18:39 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, kernel, Ezequiel Garcia, Philipp Zabel,
linux-media, linux-rockchip
From: Emil Velikov <emil.velikov@collabora.com>
The vpu->dec_base is already set by the hantro driver itself.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/imx8m_vpu_hw.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index 1f48c1956cd2..cb1ac02c03d2 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -150,7 +150,6 @@ static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id)
static int imx8mq_vpu_hw_init(struct hantro_dev *vpu)
{
- vpu->dec_base = vpu->reg_bases[0];
vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1];
return 0;
--
2.30.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 4/7] media: hantro: imx: remove unused include
2021-03-05 18:39 [PATCH 0/7] Microship SAMA5D4 VPU support et al Emil Velikov
2021-03-05 18:39 ` Emil Velikov
@ 2021-03-05 18:39 ` Emil Velikov
2021-03-05 18:39 ` Emil Velikov
` (5 subsequent siblings)
7 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, kernel, Ezequiel Garcia, Philipp Zabel,
linux-media, linux-rockchip
From: Emil Velikov <emil.velikov@collabora.com>
The current imx8 code does not use the jpeg encoder. Remove the
unnecessary include.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/imx8m_vpu_hw.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index cb1ac02c03d2..f36c1bd681ba 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -9,7 +9,6 @@
#include <linux/delay.h>
#include "hantro.h"
-#include "hantro_jpeg.h"
#include "hantro_g1_regs.h"
#define CTRL_SOFT_RESET 0x00
--
2.30.1
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 4/7] media: hantro: imx: remove unused include
@ 2021-03-05 18:39 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, linux-rockchip, kernel, Ezequiel Garcia, linux-media
From: Emil Velikov <emil.velikov@collabora.com>
The current imx8 code does not use the jpeg encoder. Remove the
unnecessary include.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/imx8m_vpu_hw.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index cb1ac02c03d2..f36c1bd681ba 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -9,7 +9,6 @@
#include <linux/delay.h>
#include "hantro.h"
-#include "hantro_jpeg.h"
#include "hantro_g1_regs.h"
#define CTRL_SOFT_RESET 0x00
--
2.30.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 4/7] media: hantro: imx: remove unused include
@ 2021-03-05 18:39 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, kernel, Ezequiel Garcia, Philipp Zabel,
linux-media, linux-rockchip
From: Emil Velikov <emil.velikov@collabora.com>
The current imx8 code does not use the jpeg encoder. Remove the
unnecessary include.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/imx8m_vpu_hw.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index cb1ac02c03d2..f36c1bd681ba 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -9,7 +9,6 @@
#include <linux/delay.h>
#include "hantro.h"
-#include "hantro_jpeg.h"
#include "hantro_g1_regs.h"
#define CTRL_SOFT_RESET 0x00
--
2.30.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 44+ messages in thread
* Re: [PATCH 4/7] media: hantro: imx: remove unused include
2021-03-05 18:39 ` Emil Velikov
(?)
@ 2021-03-08 13:57 ` Philipp Zabel
-1 siblings, 0 replies; 44+ messages in thread
From: Philipp Zabel @ 2021-03-08 13:57 UTC (permalink / raw)
To: Emil Velikov
Cc: dri-devel, Nicolas Ferre, kernel, Ezequiel Garcia, linux-media,
linux-rockchip
Hi Emil,
On Fri, Mar 05, 2021 at 06:39:21PM +0000, Emil Velikov wrote:
> From: Emil Velikov <emil.velikov@collabora.com>
>
> The current imx8 code does not use the jpeg encoder. Remove the
> unnecessary include.
>
> Cc: Ezequiel Garcia <ezequiel@collabora.com>
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: linux-media@vger.kernel.org
> Cc: linux-rockchip@lists.infradead.org
> Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
thank you, patches 2-4 could be tagged
Fixes: 8e4aaa687863 ("media: hantro: add initial i.MX8MQ support")
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
regards
Philipp
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 4/7] media: hantro: imx: remove unused include
@ 2021-03-08 13:57 ` Philipp Zabel
0 siblings, 0 replies; 44+ messages in thread
From: Philipp Zabel @ 2021-03-08 13:57 UTC (permalink / raw)
To: Emil Velikov
Cc: Nicolas Ferre, dri-devel, linux-rockchip, kernel,
Ezequiel Garcia, linux-media
Hi Emil,
On Fri, Mar 05, 2021 at 06:39:21PM +0000, Emil Velikov wrote:
> From: Emil Velikov <emil.velikov@collabora.com>
>
> The current imx8 code does not use the jpeg encoder. Remove the
> unnecessary include.
>
> Cc: Ezequiel Garcia <ezequiel@collabora.com>
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: linux-media@vger.kernel.org
> Cc: linux-rockchip@lists.infradead.org
> Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
thank you, patches 2-4 could be tagged
Fixes: 8e4aaa687863 ("media: hantro: add initial i.MX8MQ support")
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
regards
Philipp
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 4/7] media: hantro: imx: remove unused include
@ 2021-03-08 13:57 ` Philipp Zabel
0 siblings, 0 replies; 44+ messages in thread
From: Philipp Zabel @ 2021-03-08 13:57 UTC (permalink / raw)
To: Emil Velikov
Cc: dri-devel, Nicolas Ferre, kernel, Ezequiel Garcia, linux-media,
linux-rockchip
Hi Emil,
On Fri, Mar 05, 2021 at 06:39:21PM +0000, Emil Velikov wrote:
> From: Emil Velikov <emil.velikov@collabora.com>
>
> The current imx8 code does not use the jpeg encoder. Remove the
> unnecessary include.
>
> Cc: Ezequiel Garcia <ezequiel@collabora.com>
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: linux-media@vger.kernel.org
> Cc: linux-rockchip@lists.infradead.org
> Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
thank you, patches 2-4 could be tagged
Fixes: 8e4aaa687863 ("media: hantro: add initial i.MX8MQ support")
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
regards
Philipp
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 4/7] media: hantro: imx: remove unused include
2021-03-08 13:57 ` Philipp Zabel
(?)
@ 2021-03-08 16:01 ` Emil Velikov
-1 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-08 16:01 UTC (permalink / raw)
To: Philipp Zabel
Cc: ML dri-devel, Nicolas Ferre, kernel, Ezequiel Garcia,
linux-media, linux-rockchip
On Mon, 8 Mar 2021 at 13:57, Philipp Zabel <pza@pengutronix.de> wrote:
>
> Hi Emil,
>
> On Fri, Mar 05, 2021 at 06:39:21PM +0000, Emil Velikov wrote:
> > From: Emil Velikov <emil.velikov@collabora.com>
> >
> > The current imx8 code does not use the jpeg encoder. Remove the
> > unnecessary include.
> >
> > Cc: Ezequiel Garcia <ezequiel@collabora.com>
> > Cc: Philipp Zabel <p.zabel@pengutronix.de>
> > Cc: linux-media@vger.kernel.org
> > Cc: linux-rockchip@lists.infradead.org
> > Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
>
> thank you, patches 2-4 could be tagged
>
> Fixes: 8e4aaa687863 ("media: hantro: add initial i.MX8MQ support")
> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
>
Much appreciated. Will add all the tags for v2.
-Emil
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 4/7] media: hantro: imx: remove unused include
@ 2021-03-08 16:01 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-08 16:01 UTC (permalink / raw)
To: Philipp Zabel
Cc: Nicolas Ferre, ML dri-devel, linux-rockchip, kernel,
Ezequiel Garcia, linux-media
On Mon, 8 Mar 2021 at 13:57, Philipp Zabel <pza@pengutronix.de> wrote:
>
> Hi Emil,
>
> On Fri, Mar 05, 2021 at 06:39:21PM +0000, Emil Velikov wrote:
> > From: Emil Velikov <emil.velikov@collabora.com>
> >
> > The current imx8 code does not use the jpeg encoder. Remove the
> > unnecessary include.
> >
> > Cc: Ezequiel Garcia <ezequiel@collabora.com>
> > Cc: Philipp Zabel <p.zabel@pengutronix.de>
> > Cc: linux-media@vger.kernel.org
> > Cc: linux-rockchip@lists.infradead.org
> > Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
>
> thank you, patches 2-4 could be tagged
>
> Fixes: 8e4aaa687863 ("media: hantro: add initial i.MX8MQ support")
> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
>
Much appreciated. Will add all the tags for v2.
-Emil
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 4/7] media: hantro: imx: remove unused include
@ 2021-03-08 16:01 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-08 16:01 UTC (permalink / raw)
To: Philipp Zabel
Cc: ML dri-devel, Nicolas Ferre, kernel, Ezequiel Garcia,
linux-media, linux-rockchip
On Mon, 8 Mar 2021 at 13:57, Philipp Zabel <pza@pengutronix.de> wrote:
>
> Hi Emil,
>
> On Fri, Mar 05, 2021 at 06:39:21PM +0000, Emil Velikov wrote:
> > From: Emil Velikov <emil.velikov@collabora.com>
> >
> > The current imx8 code does not use the jpeg encoder. Remove the
> > unnecessary include.
> >
> > Cc: Ezequiel Garcia <ezequiel@collabora.com>
> > Cc: Philipp Zabel <p.zabel@pengutronix.de>
> > Cc: linux-media@vger.kernel.org
> > Cc: linux-rockchip@lists.infradead.org
> > Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
>
> thank you, patches 2-4 could be tagged
>
> Fixes: 8e4aaa687863 ("media: hantro: add initial i.MX8MQ support")
> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
>
Much appreciated. Will add all the tags for v2.
-Emil
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 44+ messages in thread
* [PATCH 5/7] media: hantro: introduce hantro_g1.c for common API
2021-03-05 18:39 [PATCH 0/7] Microship SAMA5D4 VPU support et al Emil Velikov
2021-03-05 18:39 ` Emil Velikov
@ 2021-03-05 18:39 ` Emil Velikov
2021-03-05 18:39 ` Emil Velikov
` (5 subsequent siblings)
7 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, kernel, Ezequiel Garcia, Philipp Zabel,
linux-media, linux-rockchip
From: Emil Velikov <emil.velikov@collabora.com>
The Hantro G1 IRQ and reset handling it pretty standard. I was this
close to duplicating it, yet again, before reconsidering and refactoring
it to a separate file.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/Makefile | 1 +
drivers/staging/media/hantro/hantro_g1.c | 39 ++++++++++++++++++++
drivers/staging/media/hantro/hantro_hw.h | 3 ++
drivers/staging/media/hantro/imx8m_vpu_hw.c | 21 +----------
drivers/staging/media/hantro/rk3288_vpu_hw.c | 36 ++----------------
5 files changed, 48 insertions(+), 52 deletions(-)
create mode 100644 drivers/staging/media/hantro/hantro_g1.c
diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
index 743ce08eb184..3747a32799b2 100644
--- a/drivers/staging/media/hantro/Makefile
+++ b/drivers/staging/media/hantro/Makefile
@@ -7,6 +7,7 @@ hantro-vpu-y += \
hantro_v4l2.o \
hantro_postproc.o \
hantro_h1_jpeg_enc.o \
+ hantro_g1.o \
hantro_g1_h264_dec.o \
hantro_g1_mpeg2_dec.o \
hantro_g1_vp8_dec.o \
diff --git a/drivers/staging/media/hantro/hantro_g1.c b/drivers/staging/media/hantro/hantro_g1.c
new file mode 100644
index 000000000000..0ab1cee62218
--- /dev/null
+++ b/drivers/staging/media/hantro/hantro_g1.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Hantro VPU codec driver
+ *
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd.
+ * Jeffy Chen <jeffy.chen@rock-chips.com>
+ * Copyright (C) 2019 Pengutronix, Philipp Zabel <kernel@pengutronix.de>
+ * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com>
+ */
+
+#include "hantro.h"
+#include "hantro_g1_regs.h"
+
+irqreturn_t hantro_g1_irq(int irq, void *dev_id)
+{
+ struct hantro_dev *vpu = dev_id;
+ enum vb2_buffer_state state;
+ u32 status;
+
+ status = vdpu_read(vpu, G1_REG_INTERRUPT);
+ state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ?
+ VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
+
+ vdpu_write(vpu, 0, G1_REG_INTERRUPT);
+ vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
+
+ hantro_irq_done(vpu, state);
+
+ return IRQ_HANDLED;
+}
+
+void hantro_g1_reset(struct hantro_ctx *ctx)
+{
+ struct hantro_dev *vpu = ctx->dev;
+
+ vdpu_write(vpu, G1_REG_INTERRUPT_DEC_IRQ_DIS, G1_REG_INTERRUPT);
+ vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
+ vdpu_write(vpu, 1, G1_REG_SOFT_RESET);
+}
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
index 34c9e4649a25..73c71bb2320c 100644
--- a/drivers/staging/media/hantro/hantro_hw.h
+++ b/drivers/staging/media/hantro/hantro_hw.h
@@ -164,6 +164,9 @@ void hantro_irq_done(struct hantro_dev *vpu,
void hantro_start_prepare_run(struct hantro_ctx *ctx);
void hantro_end_prepare_run(struct hantro_ctx *ctx);
+irqreturn_t hantro_g1_irq(int irq, void *dev_id);
+void hantro_g1_reset(struct hantro_ctx *ctx);
+
void hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx);
void rk3399_vpu_jpeg_enc_run(struct hantro_ctx *ctx);
int hantro_jpeg_enc_init(struct hantro_ctx *ctx);
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index f36c1bd681ba..9eb556460e52 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -9,7 +9,6 @@
#include <linux/delay.h>
#include "hantro.h"
-#include "hantro_g1_regs.h"
#define CTRL_SOFT_RESET 0x00
#define RESET_G1 BIT(1)
@@ -129,24 +128,6 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = {
},
};
-static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id)
-{
- struct hantro_dev *vpu = dev_id;
- enum vb2_buffer_state state;
- u32 status;
-
- status = vdpu_read(vpu, G1_REG_INTERRUPT);
- state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ?
- VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
-
- vdpu_write(vpu, 0, G1_REG_INTERRUPT);
- vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
-
- hantro_irq_done(vpu, state);
-
- return IRQ_HANDLED;
-}
-
static int imx8mq_vpu_hw_init(struct hantro_dev *vpu)
{
vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1];
@@ -191,7 +172,7 @@ static const struct hantro_codec_ops imx8mq_vpu_codec_ops[] = {
*/
static const struct hantro_irq imx8mq_irqs[] = {
- { "g1", imx8m_vpu_g1_irq },
+ { "g1", hantro_g1_irq },
{ "g2", NULL /* TODO: imx8m_vpu_g2_irq */ },
};
diff --git a/drivers/staging/media/hantro/rk3288_vpu_hw.c b/drivers/staging/media/hantro/rk3288_vpu_hw.c
index 7b299ee3e93d..fefd45269e52 100644
--- a/drivers/staging/media/hantro/rk3288_vpu_hw.c
+++ b/drivers/staging/media/hantro/rk3288_vpu_hw.c
@@ -10,7 +10,6 @@
#include "hantro.h"
#include "hantro_jpeg.h"
-#include "hantro_g1_regs.h"
#include "hantro_h1_regs.h"
#define RK3288_ACLK_MAX_FREQ (400 * 1000 * 1000)
@@ -127,24 +126,6 @@ static irqreturn_t rk3288_vepu_irq(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static irqreturn_t rk3288_vdpu_irq(int irq, void *dev_id)
-{
- struct hantro_dev *vpu = dev_id;
- enum vb2_buffer_state state;
- u32 status;
-
- status = vdpu_read(vpu, G1_REG_INTERRUPT);
- state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ?
- VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
-
- vdpu_write(vpu, 0, G1_REG_INTERRUPT);
- vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
-
- hantro_irq_done(vpu, state);
-
- return IRQ_HANDLED;
-}
-
static int rk3288_vpu_hw_init(struct hantro_dev *vpu)
{
/* Bump ACLK to max. possible freq. to improve performance. */
@@ -161,15 +142,6 @@ static void rk3288_vpu_enc_reset(struct hantro_ctx *ctx)
vepu_write(vpu, 0, H1_REG_AXI_CTRL);
}
-static void rk3288_vpu_dec_reset(struct hantro_ctx *ctx)
-{
- struct hantro_dev *vpu = ctx->dev;
-
- vdpu_write(vpu, G1_REG_INTERRUPT_DEC_IRQ_DIS, G1_REG_INTERRUPT);
- vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
- vdpu_write(vpu, 1, G1_REG_SOFT_RESET);
-}
-
/*
* Supported codec ops.
*/
@@ -184,19 +156,19 @@ static const struct hantro_codec_ops rk3288_vpu_codec_ops[] = {
},
[HANTRO_MODE_H264_DEC] = {
.run = hantro_g1_h264_dec_run,
- .reset = rk3288_vpu_dec_reset,
+ .reset = hantro_g1_reset,
.init = hantro_h264_dec_init,
.exit = hantro_h264_dec_exit,
},
[HANTRO_MODE_MPEG2_DEC] = {
.run = hantro_g1_mpeg2_dec_run,
- .reset = rk3288_vpu_dec_reset,
+ .reset = hantro_g1_reset,
.init = hantro_mpeg2_dec_init,
.exit = hantro_mpeg2_dec_exit,
},
[HANTRO_MODE_VP8_DEC] = {
.run = hantro_g1_vp8_dec_run,
- .reset = rk3288_vpu_dec_reset,
+ .reset = hantro_g1_reset,
.init = hantro_vp8_dec_init,
.exit = hantro_vp8_dec_exit,
},
@@ -208,7 +180,7 @@ static const struct hantro_codec_ops rk3288_vpu_codec_ops[] = {
static const struct hantro_irq rk3288_irqs[] = {
{ "vepu", rk3288_vepu_irq },
- { "vdpu", rk3288_vdpu_irq },
+ { "vdpu", hantro_g1_irq },
};
static const char * const rk3288_clk_names[] = {
--
2.30.1
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 5/7] media: hantro: introduce hantro_g1.c for common API
@ 2021-03-05 18:39 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, linux-rockchip, kernel, Ezequiel Garcia, linux-media
From: Emil Velikov <emil.velikov@collabora.com>
The Hantro G1 IRQ and reset handling it pretty standard. I was this
close to duplicating it, yet again, before reconsidering and refactoring
it to a separate file.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/Makefile | 1 +
drivers/staging/media/hantro/hantro_g1.c | 39 ++++++++++++++++++++
drivers/staging/media/hantro/hantro_hw.h | 3 ++
drivers/staging/media/hantro/imx8m_vpu_hw.c | 21 +----------
drivers/staging/media/hantro/rk3288_vpu_hw.c | 36 ++----------------
5 files changed, 48 insertions(+), 52 deletions(-)
create mode 100644 drivers/staging/media/hantro/hantro_g1.c
diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
index 743ce08eb184..3747a32799b2 100644
--- a/drivers/staging/media/hantro/Makefile
+++ b/drivers/staging/media/hantro/Makefile
@@ -7,6 +7,7 @@ hantro-vpu-y += \
hantro_v4l2.o \
hantro_postproc.o \
hantro_h1_jpeg_enc.o \
+ hantro_g1.o \
hantro_g1_h264_dec.o \
hantro_g1_mpeg2_dec.o \
hantro_g1_vp8_dec.o \
diff --git a/drivers/staging/media/hantro/hantro_g1.c b/drivers/staging/media/hantro/hantro_g1.c
new file mode 100644
index 000000000000..0ab1cee62218
--- /dev/null
+++ b/drivers/staging/media/hantro/hantro_g1.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Hantro VPU codec driver
+ *
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd.
+ * Jeffy Chen <jeffy.chen@rock-chips.com>
+ * Copyright (C) 2019 Pengutronix, Philipp Zabel <kernel@pengutronix.de>
+ * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com>
+ */
+
+#include "hantro.h"
+#include "hantro_g1_regs.h"
+
+irqreturn_t hantro_g1_irq(int irq, void *dev_id)
+{
+ struct hantro_dev *vpu = dev_id;
+ enum vb2_buffer_state state;
+ u32 status;
+
+ status = vdpu_read(vpu, G1_REG_INTERRUPT);
+ state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ?
+ VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
+
+ vdpu_write(vpu, 0, G1_REG_INTERRUPT);
+ vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
+
+ hantro_irq_done(vpu, state);
+
+ return IRQ_HANDLED;
+}
+
+void hantro_g1_reset(struct hantro_ctx *ctx)
+{
+ struct hantro_dev *vpu = ctx->dev;
+
+ vdpu_write(vpu, G1_REG_INTERRUPT_DEC_IRQ_DIS, G1_REG_INTERRUPT);
+ vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
+ vdpu_write(vpu, 1, G1_REG_SOFT_RESET);
+}
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
index 34c9e4649a25..73c71bb2320c 100644
--- a/drivers/staging/media/hantro/hantro_hw.h
+++ b/drivers/staging/media/hantro/hantro_hw.h
@@ -164,6 +164,9 @@ void hantro_irq_done(struct hantro_dev *vpu,
void hantro_start_prepare_run(struct hantro_ctx *ctx);
void hantro_end_prepare_run(struct hantro_ctx *ctx);
+irqreturn_t hantro_g1_irq(int irq, void *dev_id);
+void hantro_g1_reset(struct hantro_ctx *ctx);
+
void hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx);
void rk3399_vpu_jpeg_enc_run(struct hantro_ctx *ctx);
int hantro_jpeg_enc_init(struct hantro_ctx *ctx);
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index f36c1bd681ba..9eb556460e52 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -9,7 +9,6 @@
#include <linux/delay.h>
#include "hantro.h"
-#include "hantro_g1_regs.h"
#define CTRL_SOFT_RESET 0x00
#define RESET_G1 BIT(1)
@@ -129,24 +128,6 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = {
},
};
-static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id)
-{
- struct hantro_dev *vpu = dev_id;
- enum vb2_buffer_state state;
- u32 status;
-
- status = vdpu_read(vpu, G1_REG_INTERRUPT);
- state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ?
- VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
-
- vdpu_write(vpu, 0, G1_REG_INTERRUPT);
- vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
-
- hantro_irq_done(vpu, state);
-
- return IRQ_HANDLED;
-}
-
static int imx8mq_vpu_hw_init(struct hantro_dev *vpu)
{
vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1];
@@ -191,7 +172,7 @@ static const struct hantro_codec_ops imx8mq_vpu_codec_ops[] = {
*/
static const struct hantro_irq imx8mq_irqs[] = {
- { "g1", imx8m_vpu_g1_irq },
+ { "g1", hantro_g1_irq },
{ "g2", NULL /* TODO: imx8m_vpu_g2_irq */ },
};
diff --git a/drivers/staging/media/hantro/rk3288_vpu_hw.c b/drivers/staging/media/hantro/rk3288_vpu_hw.c
index 7b299ee3e93d..fefd45269e52 100644
--- a/drivers/staging/media/hantro/rk3288_vpu_hw.c
+++ b/drivers/staging/media/hantro/rk3288_vpu_hw.c
@@ -10,7 +10,6 @@
#include "hantro.h"
#include "hantro_jpeg.h"
-#include "hantro_g1_regs.h"
#include "hantro_h1_regs.h"
#define RK3288_ACLK_MAX_FREQ (400 * 1000 * 1000)
@@ -127,24 +126,6 @@ static irqreturn_t rk3288_vepu_irq(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static irqreturn_t rk3288_vdpu_irq(int irq, void *dev_id)
-{
- struct hantro_dev *vpu = dev_id;
- enum vb2_buffer_state state;
- u32 status;
-
- status = vdpu_read(vpu, G1_REG_INTERRUPT);
- state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ?
- VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
-
- vdpu_write(vpu, 0, G1_REG_INTERRUPT);
- vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
-
- hantro_irq_done(vpu, state);
-
- return IRQ_HANDLED;
-}
-
static int rk3288_vpu_hw_init(struct hantro_dev *vpu)
{
/* Bump ACLK to max. possible freq. to improve performance. */
@@ -161,15 +142,6 @@ static void rk3288_vpu_enc_reset(struct hantro_ctx *ctx)
vepu_write(vpu, 0, H1_REG_AXI_CTRL);
}
-static void rk3288_vpu_dec_reset(struct hantro_ctx *ctx)
-{
- struct hantro_dev *vpu = ctx->dev;
-
- vdpu_write(vpu, G1_REG_INTERRUPT_DEC_IRQ_DIS, G1_REG_INTERRUPT);
- vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
- vdpu_write(vpu, 1, G1_REG_SOFT_RESET);
-}
-
/*
* Supported codec ops.
*/
@@ -184,19 +156,19 @@ static const struct hantro_codec_ops rk3288_vpu_codec_ops[] = {
},
[HANTRO_MODE_H264_DEC] = {
.run = hantro_g1_h264_dec_run,
- .reset = rk3288_vpu_dec_reset,
+ .reset = hantro_g1_reset,
.init = hantro_h264_dec_init,
.exit = hantro_h264_dec_exit,
},
[HANTRO_MODE_MPEG2_DEC] = {
.run = hantro_g1_mpeg2_dec_run,
- .reset = rk3288_vpu_dec_reset,
+ .reset = hantro_g1_reset,
.init = hantro_mpeg2_dec_init,
.exit = hantro_mpeg2_dec_exit,
},
[HANTRO_MODE_VP8_DEC] = {
.run = hantro_g1_vp8_dec_run,
- .reset = rk3288_vpu_dec_reset,
+ .reset = hantro_g1_reset,
.init = hantro_vp8_dec_init,
.exit = hantro_vp8_dec_exit,
},
@@ -208,7 +180,7 @@ static const struct hantro_codec_ops rk3288_vpu_codec_ops[] = {
static const struct hantro_irq rk3288_irqs[] = {
{ "vepu", rk3288_vepu_irq },
- { "vdpu", rk3288_vdpu_irq },
+ { "vdpu", hantro_g1_irq },
};
static const char * const rk3288_clk_names[] = {
--
2.30.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 5/7] media: hantro: introduce hantro_g1.c for common API
@ 2021-03-05 18:39 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, kernel, Ezequiel Garcia, Philipp Zabel,
linux-media, linux-rockchip
From: Emil Velikov <emil.velikov@collabora.com>
The Hantro G1 IRQ and reset handling it pretty standard. I was this
close to duplicating it, yet again, before reconsidering and refactoring
it to a separate file.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
drivers/staging/media/hantro/Makefile | 1 +
drivers/staging/media/hantro/hantro_g1.c | 39 ++++++++++++++++++++
drivers/staging/media/hantro/hantro_hw.h | 3 ++
drivers/staging/media/hantro/imx8m_vpu_hw.c | 21 +----------
drivers/staging/media/hantro/rk3288_vpu_hw.c | 36 ++----------------
5 files changed, 48 insertions(+), 52 deletions(-)
create mode 100644 drivers/staging/media/hantro/hantro_g1.c
diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
index 743ce08eb184..3747a32799b2 100644
--- a/drivers/staging/media/hantro/Makefile
+++ b/drivers/staging/media/hantro/Makefile
@@ -7,6 +7,7 @@ hantro-vpu-y += \
hantro_v4l2.o \
hantro_postproc.o \
hantro_h1_jpeg_enc.o \
+ hantro_g1.o \
hantro_g1_h264_dec.o \
hantro_g1_mpeg2_dec.o \
hantro_g1_vp8_dec.o \
diff --git a/drivers/staging/media/hantro/hantro_g1.c b/drivers/staging/media/hantro/hantro_g1.c
new file mode 100644
index 000000000000..0ab1cee62218
--- /dev/null
+++ b/drivers/staging/media/hantro/hantro_g1.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Hantro VPU codec driver
+ *
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd.
+ * Jeffy Chen <jeffy.chen@rock-chips.com>
+ * Copyright (C) 2019 Pengutronix, Philipp Zabel <kernel@pengutronix.de>
+ * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com>
+ */
+
+#include "hantro.h"
+#include "hantro_g1_regs.h"
+
+irqreturn_t hantro_g1_irq(int irq, void *dev_id)
+{
+ struct hantro_dev *vpu = dev_id;
+ enum vb2_buffer_state state;
+ u32 status;
+
+ status = vdpu_read(vpu, G1_REG_INTERRUPT);
+ state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ?
+ VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
+
+ vdpu_write(vpu, 0, G1_REG_INTERRUPT);
+ vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
+
+ hantro_irq_done(vpu, state);
+
+ return IRQ_HANDLED;
+}
+
+void hantro_g1_reset(struct hantro_ctx *ctx)
+{
+ struct hantro_dev *vpu = ctx->dev;
+
+ vdpu_write(vpu, G1_REG_INTERRUPT_DEC_IRQ_DIS, G1_REG_INTERRUPT);
+ vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
+ vdpu_write(vpu, 1, G1_REG_SOFT_RESET);
+}
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
index 34c9e4649a25..73c71bb2320c 100644
--- a/drivers/staging/media/hantro/hantro_hw.h
+++ b/drivers/staging/media/hantro/hantro_hw.h
@@ -164,6 +164,9 @@ void hantro_irq_done(struct hantro_dev *vpu,
void hantro_start_prepare_run(struct hantro_ctx *ctx);
void hantro_end_prepare_run(struct hantro_ctx *ctx);
+irqreturn_t hantro_g1_irq(int irq, void *dev_id);
+void hantro_g1_reset(struct hantro_ctx *ctx);
+
void hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx);
void rk3399_vpu_jpeg_enc_run(struct hantro_ctx *ctx);
int hantro_jpeg_enc_init(struct hantro_ctx *ctx);
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index f36c1bd681ba..9eb556460e52 100644
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -9,7 +9,6 @@
#include <linux/delay.h>
#include "hantro.h"
-#include "hantro_g1_regs.h"
#define CTRL_SOFT_RESET 0x00
#define RESET_G1 BIT(1)
@@ -129,24 +128,6 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = {
},
};
-static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id)
-{
- struct hantro_dev *vpu = dev_id;
- enum vb2_buffer_state state;
- u32 status;
-
- status = vdpu_read(vpu, G1_REG_INTERRUPT);
- state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ?
- VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
-
- vdpu_write(vpu, 0, G1_REG_INTERRUPT);
- vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
-
- hantro_irq_done(vpu, state);
-
- return IRQ_HANDLED;
-}
-
static int imx8mq_vpu_hw_init(struct hantro_dev *vpu)
{
vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1];
@@ -191,7 +172,7 @@ static const struct hantro_codec_ops imx8mq_vpu_codec_ops[] = {
*/
static const struct hantro_irq imx8mq_irqs[] = {
- { "g1", imx8m_vpu_g1_irq },
+ { "g1", hantro_g1_irq },
{ "g2", NULL /* TODO: imx8m_vpu_g2_irq */ },
};
diff --git a/drivers/staging/media/hantro/rk3288_vpu_hw.c b/drivers/staging/media/hantro/rk3288_vpu_hw.c
index 7b299ee3e93d..fefd45269e52 100644
--- a/drivers/staging/media/hantro/rk3288_vpu_hw.c
+++ b/drivers/staging/media/hantro/rk3288_vpu_hw.c
@@ -10,7 +10,6 @@
#include "hantro.h"
#include "hantro_jpeg.h"
-#include "hantro_g1_regs.h"
#include "hantro_h1_regs.h"
#define RK3288_ACLK_MAX_FREQ (400 * 1000 * 1000)
@@ -127,24 +126,6 @@ static irqreturn_t rk3288_vepu_irq(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static irqreturn_t rk3288_vdpu_irq(int irq, void *dev_id)
-{
- struct hantro_dev *vpu = dev_id;
- enum vb2_buffer_state state;
- u32 status;
-
- status = vdpu_read(vpu, G1_REG_INTERRUPT);
- state = (status & G1_REG_INTERRUPT_DEC_RDY_INT) ?
- VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
-
- vdpu_write(vpu, 0, G1_REG_INTERRUPT);
- vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
-
- hantro_irq_done(vpu, state);
-
- return IRQ_HANDLED;
-}
-
static int rk3288_vpu_hw_init(struct hantro_dev *vpu)
{
/* Bump ACLK to max. possible freq. to improve performance. */
@@ -161,15 +142,6 @@ static void rk3288_vpu_enc_reset(struct hantro_ctx *ctx)
vepu_write(vpu, 0, H1_REG_AXI_CTRL);
}
-static void rk3288_vpu_dec_reset(struct hantro_ctx *ctx)
-{
- struct hantro_dev *vpu = ctx->dev;
-
- vdpu_write(vpu, G1_REG_INTERRUPT_DEC_IRQ_DIS, G1_REG_INTERRUPT);
- vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
- vdpu_write(vpu, 1, G1_REG_SOFT_RESET);
-}
-
/*
* Supported codec ops.
*/
@@ -184,19 +156,19 @@ static const struct hantro_codec_ops rk3288_vpu_codec_ops[] = {
},
[HANTRO_MODE_H264_DEC] = {
.run = hantro_g1_h264_dec_run,
- .reset = rk3288_vpu_dec_reset,
+ .reset = hantro_g1_reset,
.init = hantro_h264_dec_init,
.exit = hantro_h264_dec_exit,
},
[HANTRO_MODE_MPEG2_DEC] = {
.run = hantro_g1_mpeg2_dec_run,
- .reset = rk3288_vpu_dec_reset,
+ .reset = hantro_g1_reset,
.init = hantro_mpeg2_dec_init,
.exit = hantro_mpeg2_dec_exit,
},
[HANTRO_MODE_VP8_DEC] = {
.run = hantro_g1_vp8_dec_run,
- .reset = rk3288_vpu_dec_reset,
+ .reset = hantro_g1_reset,
.init = hantro_vp8_dec_init,
.exit = hantro_vp8_dec_exit,
},
@@ -208,7 +180,7 @@ static const struct hantro_codec_ops rk3288_vpu_codec_ops[] = {
static const struct hantro_irq rk3288_irqs[] = {
{ "vepu", rk3288_vepu_irq },
- { "vdpu", rk3288_vdpu_irq },
+ { "vdpu", hantro_g1_irq },
};
static const char * const rk3288_clk_names[] = {
--
2.30.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 44+ messages in thread
* Re: [PATCH 5/7] media: hantro: introduce hantro_g1.c for common API
2021-03-05 18:39 ` Emil Velikov
(?)
@ 2021-03-08 13:59 ` Philipp Zabel
-1 siblings, 0 replies; 44+ messages in thread
From: Philipp Zabel @ 2021-03-08 13:59 UTC (permalink / raw)
To: Emil Velikov
Cc: dri-devel, Nicolas Ferre, kernel, Ezequiel Garcia, linux-media,
linux-rockchip
On Fri, Mar 05, 2021 at 06:39:22PM +0000, Emil Velikov wrote:
> From: Emil Velikov <emil.velikov@collabora.com>
>
> The Hantro G1 IRQ and reset handling it pretty standard. I was this
> close to duplicating it, yet again, before reconsidering and refactoring
> it to a separate file.
>
> Cc: Ezequiel Garcia <ezequiel@collabora.com>
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: linux-media@vger.kernel.org
> Cc: linux-rockchip@lists.infradead.org
> Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
regards
Philipp
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 5/7] media: hantro: introduce hantro_g1.c for common API
@ 2021-03-08 13:59 ` Philipp Zabel
0 siblings, 0 replies; 44+ messages in thread
From: Philipp Zabel @ 2021-03-08 13:59 UTC (permalink / raw)
To: Emil Velikov
Cc: Nicolas Ferre, dri-devel, linux-rockchip, kernel,
Ezequiel Garcia, linux-media
On Fri, Mar 05, 2021 at 06:39:22PM +0000, Emil Velikov wrote:
> From: Emil Velikov <emil.velikov@collabora.com>
>
> The Hantro G1 IRQ and reset handling it pretty standard. I was this
> close to duplicating it, yet again, before reconsidering and refactoring
> it to a separate file.
>
> Cc: Ezequiel Garcia <ezequiel@collabora.com>
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: linux-media@vger.kernel.org
> Cc: linux-rockchip@lists.infradead.org
> Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
regards
Philipp
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 5/7] media: hantro: introduce hantro_g1.c for common API
@ 2021-03-08 13:59 ` Philipp Zabel
0 siblings, 0 replies; 44+ messages in thread
From: Philipp Zabel @ 2021-03-08 13:59 UTC (permalink / raw)
To: Emil Velikov
Cc: dri-devel, Nicolas Ferre, kernel, Ezequiel Garcia, linux-media,
linux-rockchip
On Fri, Mar 05, 2021 at 06:39:22PM +0000, Emil Velikov wrote:
> From: Emil Velikov <emil.velikov@collabora.com>
>
> The Hantro G1 IRQ and reset handling it pretty standard. I was this
> close to duplicating it, yet again, before reconsidering and refactoring
> it to a separate file.
>
> Cc: Ezequiel Garcia <ezequiel@collabora.com>
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: linux-media@vger.kernel.org
> Cc: linux-rockchip@lists.infradead.org
> Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
regards
Philipp
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 44+ messages in thread
* [PATCH 6/7] ARM: configs: at91: sama5: update with savedefconfig
2021-03-05 18:39 [PATCH 0/7] Microship SAMA5D4 VPU support et al Emil Velikov
2021-03-05 18:39 ` Emil Velikov
@ 2021-03-05 18:39 ` Emil Velikov
2021-03-05 18:39 ` Emil Velikov
` (5 subsequent siblings)
7 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, kernel, Ezequiel Garcia, Philipp Zabel,
linux-media, linux-rockchip
From: Emil Velikov <emil.velikov@collabora.com>
While enabling an extra config, I've noticed that savedefconfig produced
a notable delta. Split out the no-op changes for clarity sake.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
arch/arm/configs/sama5_defconfig | 48 ++++++++++++--------------------
1 file changed, 18 insertions(+), 30 deletions(-)
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 5f6297e6c549..0dca50c64503 100644
--- a/arch/arm/configs/sama5_defconfig
+++ b/arch/arm/configs/sama5_defconfig
@@ -1,7 +1,6 @@
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
-CONFIG_FHANDLE=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=14
@@ -9,29 +8,26 @@ CONFIG_CGROUPS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_AT91=y
CONFIG_SOC_SAMA5D2=y
CONFIG_SOC_SAMA5D3=y
CONFIG_SOC_SAMA5D4=y
# CONFIG_ATMEL_CLOCKSOURCE_PIT is not set
-CONFIG_AEABI=y
CONFIG_UACCESS_WITH_MEMCPY=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
CONFIG_KEXEC=y
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_KERNEL_MODE_NEON=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM_DEBUG=y
CONFIG_PM_ADVANCED_DEBUG=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
@@ -41,13 +37,7 @@ CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
CONFIG_IPV6_SIT_6RD=y
CONFIG_BRIDGE=m
CONFIG_BRIDGE_VLAN_FILTERING=y
@@ -68,7 +58,6 @@ CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
-CONFIG_MTD_M25P80=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_SPI_NOR=y
@@ -87,8 +76,8 @@ CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
CONFIG_NET_DSA_MICROCHIP_KSZ9477=m
CONFIG_NET_DSA_MICROCHIP_KSZ9477_SPI=m
-CONFIG_MACB=y
# CONFIG_NET_VENDOR_BROADCOM is not set
+CONFIG_MACB=y
# CONFIG_NET_VENDOR_CIRRUS is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
@@ -103,7 +92,9 @@ CONFIG_MACB=y
CONFIG_MICREL_PHY=y
CONFIG_LIBERTAS_THINFIRM=m
CONFIG_LIBERTAS_THINFIRM_USB=m
-CONFIG_RTL8187=m
+CONFIG_MWIFIEX=m
+CONFIG_MWIFIEX_SDIO=m
+CONFIG_MWIFIEX_USB=m
CONFIG_RT2X00=m
CONFIG_RT2500USB=m
CONFIG_RT73USB=m
@@ -111,10 +102,7 @@ CONFIG_RT2800USB=m
CONFIG_RT2800USB_RT53XX=y
CONFIG_RT2800USB_RT55XX=y
CONFIG_RT2800USB_UNKNOWN=y
-CONFIG_MWIFIEX=m
-CONFIG_MWIFIEX_SDIO=m
-CONFIG_MWIFIEX_USB=m
-# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_RTL8187=m
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_QT1070=y
@@ -136,9 +124,9 @@ CONFIG_SPI_ATMEL=y
CONFIG_SPI_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_SAMA5D2_PIOBU=m
+CONFIG_POWER_RESET=y
CONFIG_POWER_SUPPLY=y
CONFIG_BATTERY_ACT8945A=y
-CONFIG_POWER_RESET=y
CONFIG_SENSORS_JC42=m
CONFIG_WATCHDOG=y
CONFIG_AT91SAM9X_WATCHDOG=y
@@ -177,11 +165,11 @@ CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_ATMEL_SOC=y
CONFIG_SND_ATMEL_SOC_WM8904=y
-# CONFIG_HID_GENERIC is not set
CONFIG_SND_ATMEL_SOC_CLASSD=y
CONFIG_SND_ATMEL_SOC_PDMIC=y
CONFIG_SND_ATMEL_SOC_TSE850_PCM5142=m
CONFIG_SND_ATMEL_SOC_I2S=y
+# CONFIG_HID_GENERIC is not set
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_EHCI_HCD=y
@@ -235,14 +223,14 @@ CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=y
+CONFIG_CRYPTO_USER_API_HASH=m
+CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_DEV_ATMEL_AES=y
+CONFIG_CRYPTO_DEV_ATMEL_TDES=y
+CONFIG_CRYPTO_DEV_ATMEL_SHA=y
CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
-CONFIG_CRYPTO_USER_API_HASH=m
-CONFIG_CRYPTO_USER_API_SKCIPHER=m
-CONFIG_CRYPTO_DEV_ATMEL_AES=y
-CONFIG_CRYPTO_DEV_ATMEL_TDES=y
-CONFIG_CRYPTO_DEV_ATMEL_SHA=y
--
2.30.1
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 6/7] ARM: configs: at91: sama5: update with savedefconfig
@ 2021-03-05 18:39 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, linux-rockchip, kernel, Ezequiel Garcia, linux-media
From: Emil Velikov <emil.velikov@collabora.com>
While enabling an extra config, I've noticed that savedefconfig produced
a notable delta. Split out the no-op changes for clarity sake.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
arch/arm/configs/sama5_defconfig | 48 ++++++++++++--------------------
1 file changed, 18 insertions(+), 30 deletions(-)
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 5f6297e6c549..0dca50c64503 100644
--- a/arch/arm/configs/sama5_defconfig
+++ b/arch/arm/configs/sama5_defconfig
@@ -1,7 +1,6 @@
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
-CONFIG_FHANDLE=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=14
@@ -9,29 +8,26 @@ CONFIG_CGROUPS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_AT91=y
CONFIG_SOC_SAMA5D2=y
CONFIG_SOC_SAMA5D3=y
CONFIG_SOC_SAMA5D4=y
# CONFIG_ATMEL_CLOCKSOURCE_PIT is not set
-CONFIG_AEABI=y
CONFIG_UACCESS_WITH_MEMCPY=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
CONFIG_KEXEC=y
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_KERNEL_MODE_NEON=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM_DEBUG=y
CONFIG_PM_ADVANCED_DEBUG=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
@@ -41,13 +37,7 @@ CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
CONFIG_IPV6_SIT_6RD=y
CONFIG_BRIDGE=m
CONFIG_BRIDGE_VLAN_FILTERING=y
@@ -68,7 +58,6 @@ CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
-CONFIG_MTD_M25P80=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_SPI_NOR=y
@@ -87,8 +76,8 @@ CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
CONFIG_NET_DSA_MICROCHIP_KSZ9477=m
CONFIG_NET_DSA_MICROCHIP_KSZ9477_SPI=m
-CONFIG_MACB=y
# CONFIG_NET_VENDOR_BROADCOM is not set
+CONFIG_MACB=y
# CONFIG_NET_VENDOR_CIRRUS is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
@@ -103,7 +92,9 @@ CONFIG_MACB=y
CONFIG_MICREL_PHY=y
CONFIG_LIBERTAS_THINFIRM=m
CONFIG_LIBERTAS_THINFIRM_USB=m
-CONFIG_RTL8187=m
+CONFIG_MWIFIEX=m
+CONFIG_MWIFIEX_SDIO=m
+CONFIG_MWIFIEX_USB=m
CONFIG_RT2X00=m
CONFIG_RT2500USB=m
CONFIG_RT73USB=m
@@ -111,10 +102,7 @@ CONFIG_RT2800USB=m
CONFIG_RT2800USB_RT53XX=y
CONFIG_RT2800USB_RT55XX=y
CONFIG_RT2800USB_UNKNOWN=y
-CONFIG_MWIFIEX=m
-CONFIG_MWIFIEX_SDIO=m
-CONFIG_MWIFIEX_USB=m
-# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_RTL8187=m
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_QT1070=y
@@ -136,9 +124,9 @@ CONFIG_SPI_ATMEL=y
CONFIG_SPI_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_SAMA5D2_PIOBU=m
+CONFIG_POWER_RESET=y
CONFIG_POWER_SUPPLY=y
CONFIG_BATTERY_ACT8945A=y
-CONFIG_POWER_RESET=y
CONFIG_SENSORS_JC42=m
CONFIG_WATCHDOG=y
CONFIG_AT91SAM9X_WATCHDOG=y
@@ -177,11 +165,11 @@ CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_ATMEL_SOC=y
CONFIG_SND_ATMEL_SOC_WM8904=y
-# CONFIG_HID_GENERIC is not set
CONFIG_SND_ATMEL_SOC_CLASSD=y
CONFIG_SND_ATMEL_SOC_PDMIC=y
CONFIG_SND_ATMEL_SOC_TSE850_PCM5142=m
CONFIG_SND_ATMEL_SOC_I2S=y
+# CONFIG_HID_GENERIC is not set
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_EHCI_HCD=y
@@ -235,14 +223,14 @@ CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=y
+CONFIG_CRYPTO_USER_API_HASH=m
+CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_DEV_ATMEL_AES=y
+CONFIG_CRYPTO_DEV_ATMEL_TDES=y
+CONFIG_CRYPTO_DEV_ATMEL_SHA=y
CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
-CONFIG_CRYPTO_USER_API_HASH=m
-CONFIG_CRYPTO_USER_API_SKCIPHER=m
-CONFIG_CRYPTO_DEV_ATMEL_AES=y
-CONFIG_CRYPTO_DEV_ATMEL_TDES=y
-CONFIG_CRYPTO_DEV_ATMEL_SHA=y
--
2.30.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 6/7] ARM: configs: at91: sama5: update with savedefconfig
@ 2021-03-05 18:39 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, kernel, Ezequiel Garcia, Philipp Zabel,
linux-media, linux-rockchip
From: Emil Velikov <emil.velikov@collabora.com>
While enabling an extra config, I've noticed that savedefconfig produced
a notable delta. Split out the no-op changes for clarity sake.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
arch/arm/configs/sama5_defconfig | 48 ++++++++++++--------------------
1 file changed, 18 insertions(+), 30 deletions(-)
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 5f6297e6c549..0dca50c64503 100644
--- a/arch/arm/configs/sama5_defconfig
+++ b/arch/arm/configs/sama5_defconfig
@@ -1,7 +1,6 @@
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
-CONFIG_FHANDLE=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=14
@@ -9,29 +8,26 @@ CONFIG_CGROUPS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_AT91=y
CONFIG_SOC_SAMA5D2=y
CONFIG_SOC_SAMA5D3=y
CONFIG_SOC_SAMA5D4=y
# CONFIG_ATMEL_CLOCKSOURCE_PIT is not set
-CONFIG_AEABI=y
CONFIG_UACCESS_WITH_MEMCPY=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
CONFIG_KEXEC=y
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_KERNEL_MODE_NEON=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM_DEBUG=y
CONFIG_PM_ADVANCED_DEBUG=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
@@ -41,13 +37,7 @@ CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET6_XFRM_MODE_BEET is not set
CONFIG_IPV6_SIT_6RD=y
CONFIG_BRIDGE=m
CONFIG_BRIDGE_VLAN_FILTERING=y
@@ -68,7 +58,6 @@ CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
-CONFIG_MTD_M25P80=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_SPI_NOR=y
@@ -87,8 +76,8 @@ CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
CONFIG_NET_DSA_MICROCHIP_KSZ9477=m
CONFIG_NET_DSA_MICROCHIP_KSZ9477_SPI=m
-CONFIG_MACB=y
# CONFIG_NET_VENDOR_BROADCOM is not set
+CONFIG_MACB=y
# CONFIG_NET_VENDOR_CIRRUS is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
@@ -103,7 +92,9 @@ CONFIG_MACB=y
CONFIG_MICREL_PHY=y
CONFIG_LIBERTAS_THINFIRM=m
CONFIG_LIBERTAS_THINFIRM_USB=m
-CONFIG_RTL8187=m
+CONFIG_MWIFIEX=m
+CONFIG_MWIFIEX_SDIO=m
+CONFIG_MWIFIEX_USB=m
CONFIG_RT2X00=m
CONFIG_RT2500USB=m
CONFIG_RT73USB=m
@@ -111,10 +102,7 @@ CONFIG_RT2800USB=m
CONFIG_RT2800USB_RT53XX=y
CONFIG_RT2800USB_RT55XX=y
CONFIG_RT2800USB_UNKNOWN=y
-CONFIG_MWIFIEX=m
-CONFIG_MWIFIEX_SDIO=m
-CONFIG_MWIFIEX_USB=m
-# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_RTL8187=m
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_QT1070=y
@@ -136,9 +124,9 @@ CONFIG_SPI_ATMEL=y
CONFIG_SPI_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_SAMA5D2_PIOBU=m
+CONFIG_POWER_RESET=y
CONFIG_POWER_SUPPLY=y
CONFIG_BATTERY_ACT8945A=y
-CONFIG_POWER_RESET=y
CONFIG_SENSORS_JC42=m
CONFIG_WATCHDOG=y
CONFIG_AT91SAM9X_WATCHDOG=y
@@ -177,11 +165,11 @@ CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_ATMEL_SOC=y
CONFIG_SND_ATMEL_SOC_WM8904=y
-# CONFIG_HID_GENERIC is not set
CONFIG_SND_ATMEL_SOC_CLASSD=y
CONFIG_SND_ATMEL_SOC_PDMIC=y
CONFIG_SND_ATMEL_SOC_TSE850_PCM5142=m
CONFIG_SND_ATMEL_SOC_I2S=y
+# CONFIG_HID_GENERIC is not set
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_EHCI_HCD=y
@@ -235,14 +223,14 @@ CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=y
+CONFIG_CRYPTO_USER_API_HASH=m
+CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_DEV_ATMEL_AES=y
+CONFIG_CRYPTO_DEV_ATMEL_TDES=y
+CONFIG_CRYPTO_DEV_ATMEL_SHA=y
CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
-CONFIG_CRYPTO_USER_API_HASH=m
-CONFIG_CRYPTO_USER_API_SKCIPHER=m
-CONFIG_CRYPTO_DEV_ATMEL_AES=y
-CONFIG_CRYPTO_DEV_ATMEL_TDES=y
-CONFIG_CRYPTO_DEV_ATMEL_SHA=y
--
2.30.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
2021-03-05 18:39 [PATCH 0/7] Microship SAMA5D4 VPU support et al Emil Velikov
2021-03-05 18:39 ` Emil Velikov
@ 2021-03-05 18:39 ` Emil Velikov
2021-03-05 18:39 ` Emil Velikov
` (5 subsequent siblings)
7 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, kernel, Ezequiel Garcia, Philipp Zabel,
linux-media, linux-rockchip
From: Emil Velikov <emil.velikov@collabora.com>
The SoC features a Hantro G1 compatible video decoder.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
arch/arm/boot/dts/sama5d4.dtsi | 9 ++
arch/arm/configs/sama5_defconfig | 3 +
drivers/staging/media/hantro/Kconfig | 10 +-
drivers/staging/media/hantro/Makefile | 3 +
drivers/staging/media/hantro/hantro_drv.c | 3 +
drivers/staging/media/hantro/hantro_hw.h | 1 +
.../staging/media/hantro/sama5d4_vdec_hw.c | 118 ++++++++++++++++++
7 files changed, 146 insertions(+), 1 deletion(-)
create mode 100644 drivers/staging/media/hantro/sama5d4_vdec_hw.c
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 05c55875835d..deaf1f6cc784 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -101,6 +101,15 @@ nfc_sram: sram@100000 {
ranges = <0 0x100000 0x2400>;
};
+ vdec0: vdec@00300000 {
+ compatible = "atmel,sama5d4-vdec";
+ reg = <0x00300000 0x100000>;
+ interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
+ interrupt-names = "vdec";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
+ clock-names = "vdec_clk";
+ };
+
usb0: gadget@400000 {
compatible = "atmel,sama5d3-udc";
reg = <0x00400000 0x100000
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 0dca50c64503..10806f38abfb 100644
--- a/arch/arm/configs/sama5_defconfig
+++ b/arch/arm/configs/sama5_defconfig
@@ -200,6 +200,9 @@ CONFIG_RTC_DRV_AT91RM9200=y
CONFIG_DMADEVICES=y
CONFIG_AT_HDMAC=y
CONFIG_AT_XDMAC=y
+CONFIG_STAGING=y
+CONFIG_STAGING_MEDIA=y
+CONFIG_VIDEO_HANTRO=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_IIO=y
CONFIG_AT91_ADC=y
diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig
index 5b6cf9f62b1a..43762c8164e0 100644
--- a/drivers/staging/media/hantro/Kconfig
+++ b/drivers/staging/media/hantro/Kconfig
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
config VIDEO_HANTRO
tristate "Hantro VPU driver"
- depends on ARCH_MXC || ARCH_ROCKCHIP || COMPILE_TEST
+ depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || COMPILE_TEST
depends on VIDEO_DEV && VIDEO_V4L2
select MEDIA_CONTROLLER
select MEDIA_CONTROLLER_REQUEST_API
@@ -24,6 +24,14 @@ config VIDEO_HANTRO_IMX8M
help
Enable support for i.MX8M SoCs.
+config VIDEO_HANTRO_SAMA5D4
+ bool "Hantro VDEC SAMA5D4 support"
+ depends on VIDEO_HANTRO
+ depends on ARCH_AT91 || COMPILE_TEST
+ default y
+ help
+ Enable support for Atmel SAMA5D4 SoCs.
+
config VIDEO_HANTRO_ROCKCHIP
bool "Hantro VPU Rockchip support"
depends on VIDEO_HANTRO
diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
index 3747a32799b2..f4b99901eeee 100644
--- a/drivers/staging/media/hantro/Makefile
+++ b/drivers/staging/media/hantro/Makefile
@@ -22,6 +22,9 @@ hantro-vpu-y += \
hantro-vpu-$(CONFIG_VIDEO_HANTRO_IMX8M) += \
imx8m_vpu_hw.o
+hantro-vpu-$(CONFIG_VIDEO_HANTRO_SAMA5D4) += \
+ sama5d4_vdec_hw.o
+
hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \
rk3288_vpu_hw.o \
rk3399_vpu_hw.o
diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
index e5f200e64993..19f1202574a2 100644
--- a/drivers/staging/media/hantro/hantro_drv.c
+++ b/drivers/staging/media/hantro/hantro_drv.c
@@ -478,6 +478,9 @@ static const struct of_device_id of_hantro_match[] = {
#endif
#ifdef CONFIG_VIDEO_HANTRO_IMX8M
{ .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, },
+#endif
+#ifdef CONFIG_VIDEO_HANTRO_SAMA5D4
+ { .compatible = "atmel,sama5d4-vdec", .data = &sama5d4_vdec_variant, },
#endif
{ /* sentinel */ }
};
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
index 73c71bb2320c..4d39da1d1581 100644
--- a/drivers/staging/media/hantro/hantro_hw.h
+++ b/drivers/staging/media/hantro/hantro_hw.h
@@ -152,6 +152,7 @@ extern const struct hantro_variant rk3399_vpu_variant;
extern const struct hantro_variant rk3328_vpu_variant;
extern const struct hantro_variant rk3288_vpu_variant;
extern const struct hantro_variant imx8mq_vpu_variant;
+extern const struct hantro_variant sama5d4_vdec_variant;
extern const struct hantro_postproc_regs hantro_g1_postproc_regs;
diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
new file mode 100644
index 000000000000..9cf1068d986b
--- /dev/null
+++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
@@ -0,0 +1,118 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Hantro VDEC driver
+ *
+ * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com>
+ */
+
+#include "hantro.h"
+
+
+/*
+ * Supported formats.
+ */
+
+static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = {
+ {
+ .fourcc = V4L2_PIX_FMT_YUYV,
+ .codec_mode = HANTRO_MODE_NONE,
+ },
+};
+
+static const struct hantro_fmt sama5d4_vdec_fmts[] = {
+ {
+ .fourcc = V4L2_PIX_FMT_NV12,
+ .codec_mode = HANTRO_MODE_NONE,
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_MPEG2_SLICE,
+ .codec_mode = HANTRO_MODE_MPEG2_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1280,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 720,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_VP8_FRAME,
+ .codec_mode = HANTRO_MODE_VP8_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1280,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 720,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_H264_SLICE,
+ .codec_mode = HANTRO_MODE_H264_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1280,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 720,
+ .step_height = MB_DIM,
+ },
+ },
+};
+
+static int sama5d4_hw_init(struct hantro_dev *vpu)
+{
+ return 0;
+}
+
+/*
+ * Supported codec ops.
+ */
+
+static const struct hantro_codec_ops sama5d4_vdec_codec_ops[] = {
+ [HANTRO_MODE_MPEG2_DEC] = {
+ .run = hantro_g1_mpeg2_dec_run,
+ .reset = hantro_g1_reset,
+ .init = hantro_mpeg2_dec_init,
+ .exit = hantro_mpeg2_dec_exit,
+ },
+ [HANTRO_MODE_VP8_DEC] = {
+ .run = hantro_g1_vp8_dec_run,
+ .reset = hantro_g1_reset,
+ .init = hantro_vp8_dec_init,
+ .exit = hantro_vp8_dec_exit,
+ },
+ [HANTRO_MODE_H264_DEC] = {
+ .run = hantro_g1_h264_dec_run,
+ .reset = hantro_g1_reset,
+ .init = hantro_h264_dec_init,
+ .exit = hantro_h264_dec_exit,
+ },
+};
+
+static const struct hantro_irq sama5d4_irqs[] = {
+ { "vdec", hantro_g1_irq },
+};
+
+static const char * const sama5d4_clk_names[] = { "vdec_clk" };
+
+const struct hantro_variant sama5d4_vdec_variant = {
+ .dec_fmts = sama5d4_vdec_fmts,
+ .num_dec_fmts = ARRAY_SIZE(sama5d4_vdec_fmts),
+ .postproc_fmts = sama5d4_vdec_postproc_fmts,
+ .num_postproc_fmts = ARRAY_SIZE(sama5d4_vdec_postproc_fmts),
+ .postproc_regs = &hantro_g1_postproc_regs,
+ .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER |
+ HANTRO_H264_DECODER,
+ .codec_ops = sama5d4_vdec_codec_ops,
+ .init = sama5d4_hw_init,
+ .irqs = sama5d4_irqs,
+ .num_irqs = ARRAY_SIZE(sama5d4_irqs),
+ .clk_names = sama5d4_clk_names,
+ .num_clocks = ARRAY_SIZE(sama5d4_clk_names),
+};
--
2.30.1
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
@ 2021-03-05 18:39 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, linux-rockchip, kernel, Ezequiel Garcia, linux-media
From: Emil Velikov <emil.velikov@collabora.com>
The SoC features a Hantro G1 compatible video decoder.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
arch/arm/boot/dts/sama5d4.dtsi | 9 ++
arch/arm/configs/sama5_defconfig | 3 +
drivers/staging/media/hantro/Kconfig | 10 +-
drivers/staging/media/hantro/Makefile | 3 +
drivers/staging/media/hantro/hantro_drv.c | 3 +
drivers/staging/media/hantro/hantro_hw.h | 1 +
.../staging/media/hantro/sama5d4_vdec_hw.c | 118 ++++++++++++++++++
7 files changed, 146 insertions(+), 1 deletion(-)
create mode 100644 drivers/staging/media/hantro/sama5d4_vdec_hw.c
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 05c55875835d..deaf1f6cc784 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -101,6 +101,15 @@ nfc_sram: sram@100000 {
ranges = <0 0x100000 0x2400>;
};
+ vdec0: vdec@00300000 {
+ compatible = "atmel,sama5d4-vdec";
+ reg = <0x00300000 0x100000>;
+ interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
+ interrupt-names = "vdec";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
+ clock-names = "vdec_clk";
+ };
+
usb0: gadget@400000 {
compatible = "atmel,sama5d3-udc";
reg = <0x00400000 0x100000
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 0dca50c64503..10806f38abfb 100644
--- a/arch/arm/configs/sama5_defconfig
+++ b/arch/arm/configs/sama5_defconfig
@@ -200,6 +200,9 @@ CONFIG_RTC_DRV_AT91RM9200=y
CONFIG_DMADEVICES=y
CONFIG_AT_HDMAC=y
CONFIG_AT_XDMAC=y
+CONFIG_STAGING=y
+CONFIG_STAGING_MEDIA=y
+CONFIG_VIDEO_HANTRO=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_IIO=y
CONFIG_AT91_ADC=y
diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig
index 5b6cf9f62b1a..43762c8164e0 100644
--- a/drivers/staging/media/hantro/Kconfig
+++ b/drivers/staging/media/hantro/Kconfig
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
config VIDEO_HANTRO
tristate "Hantro VPU driver"
- depends on ARCH_MXC || ARCH_ROCKCHIP || COMPILE_TEST
+ depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || COMPILE_TEST
depends on VIDEO_DEV && VIDEO_V4L2
select MEDIA_CONTROLLER
select MEDIA_CONTROLLER_REQUEST_API
@@ -24,6 +24,14 @@ config VIDEO_HANTRO_IMX8M
help
Enable support for i.MX8M SoCs.
+config VIDEO_HANTRO_SAMA5D4
+ bool "Hantro VDEC SAMA5D4 support"
+ depends on VIDEO_HANTRO
+ depends on ARCH_AT91 || COMPILE_TEST
+ default y
+ help
+ Enable support for Atmel SAMA5D4 SoCs.
+
config VIDEO_HANTRO_ROCKCHIP
bool "Hantro VPU Rockchip support"
depends on VIDEO_HANTRO
diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
index 3747a32799b2..f4b99901eeee 100644
--- a/drivers/staging/media/hantro/Makefile
+++ b/drivers/staging/media/hantro/Makefile
@@ -22,6 +22,9 @@ hantro-vpu-y += \
hantro-vpu-$(CONFIG_VIDEO_HANTRO_IMX8M) += \
imx8m_vpu_hw.o
+hantro-vpu-$(CONFIG_VIDEO_HANTRO_SAMA5D4) += \
+ sama5d4_vdec_hw.o
+
hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \
rk3288_vpu_hw.o \
rk3399_vpu_hw.o
diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
index e5f200e64993..19f1202574a2 100644
--- a/drivers/staging/media/hantro/hantro_drv.c
+++ b/drivers/staging/media/hantro/hantro_drv.c
@@ -478,6 +478,9 @@ static const struct of_device_id of_hantro_match[] = {
#endif
#ifdef CONFIG_VIDEO_HANTRO_IMX8M
{ .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, },
+#endif
+#ifdef CONFIG_VIDEO_HANTRO_SAMA5D4
+ { .compatible = "atmel,sama5d4-vdec", .data = &sama5d4_vdec_variant, },
#endif
{ /* sentinel */ }
};
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
index 73c71bb2320c..4d39da1d1581 100644
--- a/drivers/staging/media/hantro/hantro_hw.h
+++ b/drivers/staging/media/hantro/hantro_hw.h
@@ -152,6 +152,7 @@ extern const struct hantro_variant rk3399_vpu_variant;
extern const struct hantro_variant rk3328_vpu_variant;
extern const struct hantro_variant rk3288_vpu_variant;
extern const struct hantro_variant imx8mq_vpu_variant;
+extern const struct hantro_variant sama5d4_vdec_variant;
extern const struct hantro_postproc_regs hantro_g1_postproc_regs;
diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
new file mode 100644
index 000000000000..9cf1068d986b
--- /dev/null
+++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
@@ -0,0 +1,118 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Hantro VDEC driver
+ *
+ * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com>
+ */
+
+#include "hantro.h"
+
+
+/*
+ * Supported formats.
+ */
+
+static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = {
+ {
+ .fourcc = V4L2_PIX_FMT_YUYV,
+ .codec_mode = HANTRO_MODE_NONE,
+ },
+};
+
+static const struct hantro_fmt sama5d4_vdec_fmts[] = {
+ {
+ .fourcc = V4L2_PIX_FMT_NV12,
+ .codec_mode = HANTRO_MODE_NONE,
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_MPEG2_SLICE,
+ .codec_mode = HANTRO_MODE_MPEG2_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1280,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 720,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_VP8_FRAME,
+ .codec_mode = HANTRO_MODE_VP8_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1280,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 720,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_H264_SLICE,
+ .codec_mode = HANTRO_MODE_H264_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1280,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 720,
+ .step_height = MB_DIM,
+ },
+ },
+};
+
+static int sama5d4_hw_init(struct hantro_dev *vpu)
+{
+ return 0;
+}
+
+/*
+ * Supported codec ops.
+ */
+
+static const struct hantro_codec_ops sama5d4_vdec_codec_ops[] = {
+ [HANTRO_MODE_MPEG2_DEC] = {
+ .run = hantro_g1_mpeg2_dec_run,
+ .reset = hantro_g1_reset,
+ .init = hantro_mpeg2_dec_init,
+ .exit = hantro_mpeg2_dec_exit,
+ },
+ [HANTRO_MODE_VP8_DEC] = {
+ .run = hantro_g1_vp8_dec_run,
+ .reset = hantro_g1_reset,
+ .init = hantro_vp8_dec_init,
+ .exit = hantro_vp8_dec_exit,
+ },
+ [HANTRO_MODE_H264_DEC] = {
+ .run = hantro_g1_h264_dec_run,
+ .reset = hantro_g1_reset,
+ .init = hantro_h264_dec_init,
+ .exit = hantro_h264_dec_exit,
+ },
+};
+
+static const struct hantro_irq sama5d4_irqs[] = {
+ { "vdec", hantro_g1_irq },
+};
+
+static const char * const sama5d4_clk_names[] = { "vdec_clk" };
+
+const struct hantro_variant sama5d4_vdec_variant = {
+ .dec_fmts = sama5d4_vdec_fmts,
+ .num_dec_fmts = ARRAY_SIZE(sama5d4_vdec_fmts),
+ .postproc_fmts = sama5d4_vdec_postproc_fmts,
+ .num_postproc_fmts = ARRAY_SIZE(sama5d4_vdec_postproc_fmts),
+ .postproc_regs = &hantro_g1_postproc_regs,
+ .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER |
+ HANTRO_H264_DECODER,
+ .codec_ops = sama5d4_vdec_codec_ops,
+ .init = sama5d4_hw_init,
+ .irqs = sama5d4_irqs,
+ .num_irqs = ARRAY_SIZE(sama5d4_irqs),
+ .clk_names = sama5d4_clk_names,
+ .num_clocks = ARRAY_SIZE(sama5d4_clk_names),
+};
--
2.30.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
@ 2021-03-05 18:39 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 18:39 UTC (permalink / raw)
To: dri-devel
Cc: Nicolas Ferre, kernel, Ezequiel Garcia, Philipp Zabel,
linux-media, linux-rockchip
From: Emil Velikov <emil.velikov@collabora.com>
The SoC features a Hantro G1 compatible video decoder.
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-media@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
arch/arm/boot/dts/sama5d4.dtsi | 9 ++
arch/arm/configs/sama5_defconfig | 3 +
drivers/staging/media/hantro/Kconfig | 10 +-
drivers/staging/media/hantro/Makefile | 3 +
drivers/staging/media/hantro/hantro_drv.c | 3 +
drivers/staging/media/hantro/hantro_hw.h | 1 +
.../staging/media/hantro/sama5d4_vdec_hw.c | 118 ++++++++++++++++++
7 files changed, 146 insertions(+), 1 deletion(-)
create mode 100644 drivers/staging/media/hantro/sama5d4_vdec_hw.c
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 05c55875835d..deaf1f6cc784 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -101,6 +101,15 @@ nfc_sram: sram@100000 {
ranges = <0 0x100000 0x2400>;
};
+ vdec0: vdec@00300000 {
+ compatible = "atmel,sama5d4-vdec";
+ reg = <0x00300000 0x100000>;
+ interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
+ interrupt-names = "vdec";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
+ clock-names = "vdec_clk";
+ };
+
usb0: gadget@400000 {
compatible = "atmel,sama5d3-udc";
reg = <0x00400000 0x100000
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 0dca50c64503..10806f38abfb 100644
--- a/arch/arm/configs/sama5_defconfig
+++ b/arch/arm/configs/sama5_defconfig
@@ -200,6 +200,9 @@ CONFIG_RTC_DRV_AT91RM9200=y
CONFIG_DMADEVICES=y
CONFIG_AT_HDMAC=y
CONFIG_AT_XDMAC=y
+CONFIG_STAGING=y
+CONFIG_STAGING_MEDIA=y
+CONFIG_VIDEO_HANTRO=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_IIO=y
CONFIG_AT91_ADC=y
diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig
index 5b6cf9f62b1a..43762c8164e0 100644
--- a/drivers/staging/media/hantro/Kconfig
+++ b/drivers/staging/media/hantro/Kconfig
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
config VIDEO_HANTRO
tristate "Hantro VPU driver"
- depends on ARCH_MXC || ARCH_ROCKCHIP || COMPILE_TEST
+ depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || COMPILE_TEST
depends on VIDEO_DEV && VIDEO_V4L2
select MEDIA_CONTROLLER
select MEDIA_CONTROLLER_REQUEST_API
@@ -24,6 +24,14 @@ config VIDEO_HANTRO_IMX8M
help
Enable support for i.MX8M SoCs.
+config VIDEO_HANTRO_SAMA5D4
+ bool "Hantro VDEC SAMA5D4 support"
+ depends on VIDEO_HANTRO
+ depends on ARCH_AT91 || COMPILE_TEST
+ default y
+ help
+ Enable support for Atmel SAMA5D4 SoCs.
+
config VIDEO_HANTRO_ROCKCHIP
bool "Hantro VPU Rockchip support"
depends on VIDEO_HANTRO
diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
index 3747a32799b2..f4b99901eeee 100644
--- a/drivers/staging/media/hantro/Makefile
+++ b/drivers/staging/media/hantro/Makefile
@@ -22,6 +22,9 @@ hantro-vpu-y += \
hantro-vpu-$(CONFIG_VIDEO_HANTRO_IMX8M) += \
imx8m_vpu_hw.o
+hantro-vpu-$(CONFIG_VIDEO_HANTRO_SAMA5D4) += \
+ sama5d4_vdec_hw.o
+
hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \
rk3288_vpu_hw.o \
rk3399_vpu_hw.o
diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
index e5f200e64993..19f1202574a2 100644
--- a/drivers/staging/media/hantro/hantro_drv.c
+++ b/drivers/staging/media/hantro/hantro_drv.c
@@ -478,6 +478,9 @@ static const struct of_device_id of_hantro_match[] = {
#endif
#ifdef CONFIG_VIDEO_HANTRO_IMX8M
{ .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, },
+#endif
+#ifdef CONFIG_VIDEO_HANTRO_SAMA5D4
+ { .compatible = "atmel,sama5d4-vdec", .data = &sama5d4_vdec_variant, },
#endif
{ /* sentinel */ }
};
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
index 73c71bb2320c..4d39da1d1581 100644
--- a/drivers/staging/media/hantro/hantro_hw.h
+++ b/drivers/staging/media/hantro/hantro_hw.h
@@ -152,6 +152,7 @@ extern const struct hantro_variant rk3399_vpu_variant;
extern const struct hantro_variant rk3328_vpu_variant;
extern const struct hantro_variant rk3288_vpu_variant;
extern const struct hantro_variant imx8mq_vpu_variant;
+extern const struct hantro_variant sama5d4_vdec_variant;
extern const struct hantro_postproc_regs hantro_g1_postproc_regs;
diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
new file mode 100644
index 000000000000..9cf1068d986b
--- /dev/null
+++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
@@ -0,0 +1,118 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Hantro VDEC driver
+ *
+ * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com>
+ */
+
+#include "hantro.h"
+
+
+/*
+ * Supported formats.
+ */
+
+static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = {
+ {
+ .fourcc = V4L2_PIX_FMT_YUYV,
+ .codec_mode = HANTRO_MODE_NONE,
+ },
+};
+
+static const struct hantro_fmt sama5d4_vdec_fmts[] = {
+ {
+ .fourcc = V4L2_PIX_FMT_NV12,
+ .codec_mode = HANTRO_MODE_NONE,
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_MPEG2_SLICE,
+ .codec_mode = HANTRO_MODE_MPEG2_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1280,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 720,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_VP8_FRAME,
+ .codec_mode = HANTRO_MODE_VP8_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1280,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 720,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_H264_SLICE,
+ .codec_mode = HANTRO_MODE_H264_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1280,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 720,
+ .step_height = MB_DIM,
+ },
+ },
+};
+
+static int sama5d4_hw_init(struct hantro_dev *vpu)
+{
+ return 0;
+}
+
+/*
+ * Supported codec ops.
+ */
+
+static const struct hantro_codec_ops sama5d4_vdec_codec_ops[] = {
+ [HANTRO_MODE_MPEG2_DEC] = {
+ .run = hantro_g1_mpeg2_dec_run,
+ .reset = hantro_g1_reset,
+ .init = hantro_mpeg2_dec_init,
+ .exit = hantro_mpeg2_dec_exit,
+ },
+ [HANTRO_MODE_VP8_DEC] = {
+ .run = hantro_g1_vp8_dec_run,
+ .reset = hantro_g1_reset,
+ .init = hantro_vp8_dec_init,
+ .exit = hantro_vp8_dec_exit,
+ },
+ [HANTRO_MODE_H264_DEC] = {
+ .run = hantro_g1_h264_dec_run,
+ .reset = hantro_g1_reset,
+ .init = hantro_h264_dec_init,
+ .exit = hantro_h264_dec_exit,
+ },
+};
+
+static const struct hantro_irq sama5d4_irqs[] = {
+ { "vdec", hantro_g1_irq },
+};
+
+static const char * const sama5d4_clk_names[] = { "vdec_clk" };
+
+const struct hantro_variant sama5d4_vdec_variant = {
+ .dec_fmts = sama5d4_vdec_fmts,
+ .num_dec_fmts = ARRAY_SIZE(sama5d4_vdec_fmts),
+ .postproc_fmts = sama5d4_vdec_postproc_fmts,
+ .num_postproc_fmts = ARRAY_SIZE(sama5d4_vdec_postproc_fmts),
+ .postproc_regs = &hantro_g1_postproc_regs,
+ .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER |
+ HANTRO_H264_DECODER,
+ .codec_ops = sama5d4_vdec_codec_ops,
+ .init = sama5d4_hw_init,
+ .irqs = sama5d4_irqs,
+ .num_irqs = ARRAY_SIZE(sama5d4_irqs),
+ .clk_names = sama5d4_clk_names,
+ .num_clocks = ARRAY_SIZE(sama5d4_clk_names),
+};
--
2.30.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 44+ messages in thread
* Re: [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
2021-03-05 18:39 ` Emil Velikov
@ 2021-03-06 11:25 ` Ezequiel Garcia
-1 siblings, 0 replies; 44+ messages in thread
From: Ezequiel Garcia @ 2021-03-06 11:25 UTC (permalink / raw)
To: Emil Velikov
Cc: Nicolas Ferre, kernel, Philipp Zabel, linux-media,
linux-rockchip, Nicolas Dufresne, Benjamin Gaignard
(adding another Nicolas)
Hi Emil,
Thanks a lot for the patch.
On Fri, 2021-03-05 at 18:39 +0000, Emil Velikov wrote:
> From: Emil Velikov <emil.velikov@collabora.com>
>
> The SoC features a Hantro G1 compatible video decoder.
>
> Cc: Ezequiel Garcia <ezequiel@collabora.com>
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: linux-media@vger.kernel.org
> Cc: linux-rockchip@lists.infradead.org
> Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
> ---
> arch/arm/boot/dts/sama5d4.dtsi | 9 ++
Usually device-tree changes go to their own patch.
The new compatible string "atmel,sama5d4-vdec" needs
an update to the DT bindings, see Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
for an example.
DT bindings change should also go to a separate
patch, see Documentation/devicetree/bindings/submitting-patches.rst.
> arch/arm/configs/sama5_defconfig | 3 +
Better if config changes are a separate patch.
But also, the driver is in staging and we haven't enabled
in ARM64 defconfig. Let's leave that decision to the machine
maintainer to decide.
> drivers/staging/media/hantro/Kconfig | 10 +-
> drivers/staging/media/hantro/Makefile | 3 +
> drivers/staging/media/hantro/hantro_drv.c | 3 +
> drivers/staging/media/hantro/hantro_hw.h | 1 +
> .../staging/media/hantro/sama5d4_vdec_hw.c | 118 ++++++++++++++++++
> 7 files changed, 146 insertions(+), 1 deletion(-)
> create mode 100644 drivers/staging/media/hantro/sama5d4_vdec_hw.c
>
> diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
> index 05c55875835d..deaf1f6cc784 100644
> --- a/arch/arm/boot/dts/sama5d4.dtsi
> +++ b/arch/arm/boot/dts/sama5d4.dtsi
> @@ -101,6 +101,15 @@ nfc_sram: sram@100000 {
> ranges = <0 0x100000 0x2400>;
> };
>
> + vdec0: vdec@00300000 {
> + compatible = "atmel,sama5d4-vdec";
> + reg = <0x00300000 0x100000>;
> + interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
> + interrupt-names = "vdec";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
> + clock-names = "vdec_clk";
> + };
> +
> usb0: gadget@400000 {
> compatible = "atmel,sama5d3-udc";
> reg = <0x00400000 0x100000
> diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
> index 0dca50c64503..10806f38abfb 100644
> --- a/arch/arm/configs/sama5_defconfig
> +++ b/arch/arm/configs/sama5_defconfig
> @@ -200,6 +200,9 @@ CONFIG_RTC_DRV_AT91RM9200=y
> CONFIG_DMADEVICES=y
> CONFIG_AT_HDMAC=y
> CONFIG_AT_XDMAC=y
> +CONFIG_STAGING=y
> +CONFIG_STAGING_MEDIA=y
> +CONFIG_VIDEO_HANTRO=y
> # CONFIG_IOMMU_SUPPORT is not set
> CONFIG_IIO=y
> CONFIG_AT91_ADC=y
> diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig
> index 5b6cf9f62b1a..43762c8164e0 100644
> --- a/drivers/staging/media/hantro/Kconfig
> +++ b/drivers/staging/media/hantro/Kconfig
> @@ -1,7 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
> config VIDEO_HANTRO
> tristate "Hantro VPU driver"
> - depends on ARCH_MXC || ARCH_ROCKCHIP || COMPILE_TEST
> + depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || COMPILE_TEST
> depends on VIDEO_DEV && VIDEO_V4L2
> select MEDIA_CONTROLLER
> select MEDIA_CONTROLLER_REQUEST_API
> @@ -24,6 +24,14 @@ config VIDEO_HANTRO_IMX8M
> help
> Enable support for i.MX8M SoCs.
>
> +config VIDEO_HANTRO_SAMA5D4
> + bool "Hantro VDEC SAMA5D4 support"
> + depends on VIDEO_HANTRO
> + depends on ARCH_AT91 || COMPILE_TEST
> + default y
> + help
> + Enable support for Atmel SAMA5D4 SoCs.
> +
> config VIDEO_HANTRO_ROCKCHIP
> bool "Hantro VPU Rockchip support"
> depends on VIDEO_HANTRO
> diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
> index 3747a32799b2..f4b99901eeee 100644
> --- a/drivers/staging/media/hantro/Makefile
> +++ b/drivers/staging/media/hantro/Makefile
> @@ -22,6 +22,9 @@ hantro-vpu-y += \
> hantro-vpu-$(CONFIG_VIDEO_HANTRO_IMX8M) += \
> imx8m_vpu_hw.o
>
> +hantro-vpu-$(CONFIG_VIDEO_HANTRO_SAMA5D4) += \
> + sama5d4_vdec_hw.o
> +
> hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \
> rk3288_vpu_hw.o \
> rk3399_vpu_hw.o
> diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
> index e5f200e64993..19f1202574a2 100644
> --- a/drivers/staging/media/hantro/hantro_drv.c
> +++ b/drivers/staging/media/hantro/hantro_drv.c
> @@ -478,6 +478,9 @@ static const struct of_device_id of_hantro_match[] = {
> #endif
> #ifdef CONFIG_VIDEO_HANTRO_IMX8M
> { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, },
> +#endif
> +#ifdef CONFIG_VIDEO_HANTRO_SAMA5D4
> + { .compatible = "atmel,sama5d4-vdec", .data = &sama5d4_vdec_variant, },
> #endif
> { /* sentinel */ }
> };
> diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
> index 73c71bb2320c..4d39da1d1581 100644
> --- a/drivers/staging/media/hantro/hantro_hw.h
> +++ b/drivers/staging/media/hantro/hantro_hw.h
> @@ -152,6 +152,7 @@ extern const struct hantro_variant rk3399_vpu_variant;
> extern const struct hantro_variant rk3328_vpu_variant;
> extern const struct hantro_variant rk3288_vpu_variant;
> extern const struct hantro_variant imx8mq_vpu_variant;
> +extern const struct hantro_variant sama5d4_vdec_variant;
>
> extern const struct hantro_postproc_regs hantro_g1_postproc_regs;
>
> diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
> new file mode 100644
> index 000000000000..9cf1068d986b
> --- /dev/null
> +++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
> @@ -0,0 +1,118 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Hantro VDEC driver
> + *
> + * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com>
> + */
> +
> +#include "hantro.h"
> +
> +
> +/*
> + * Supported formats.
> + */
> +
> +static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = {
> + {
> + .fourcc = V4L2_PIX_FMT_YUYV,
> + .codec_mode = HANTRO_MODE_NONE,
> + },
> +};
> +
I haven't found information on how the series
was tested in the cover letter, could you add that to the next
iteration?
Please test the YUYV post-processed output and MPEG-2 decoding as well.
Also add the fluster score on this platform, and while here you could
give a pass at v4l2-compliance, which should pass without failures.
Note that you need to use v4l2-compliance HEAD from git.
https://git.linuxtv.org/v4l-utils.git
> +static const struct hantro_fmt sama5d4_vdec_fmts[] = {
> + {
> + .fourcc = V4L2_PIX_FMT_NV12,
> + .codec_mode = HANTRO_MODE_NONE,
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_MPEG2_SLICE,
> + .codec_mode = HANTRO_MODE_MPEG2_DEC,
> + .max_depth = 2,
> + .frmsize = {
> + .min_width = 48,
> + .max_width = 1280,
> + .step_width = MB_DIM,
> + .min_height = 48,
> + .max_height = 720,
> + .step_height = MB_DIM,
> + },
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_VP8_FRAME,
> + .codec_mode = HANTRO_MODE_VP8_DEC,
> + .max_depth = 2,
> + .frmsize = {
> + .min_width = 48,
> + .max_width = 1280,
> + .step_width = MB_DIM,
> + .min_height = 48,
> + .max_height = 720,
> + .step_height = MB_DIM,
> + },
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_H264_SLICE,
> + .codec_mode = HANTRO_MODE_H264_DEC,
> + .max_depth = 2,
> + .frmsize = {
> + .min_width = 48,
> + .max_width = 1280,
> + .step_width = MB_DIM,
> + .min_height = 48,
> + .max_height = 720,
> + .step_height = MB_DIM,
> + },
> + },
> +};
> +
> +static int sama5d4_hw_init(struct hantro_dev *vpu)
> +{
> + return 0;
Ah, the hantro_variant.init ops is not optional, but
if this VPU has no hw-specific init, then it should be.
In any case, we might get rid of it soon: Benjamin's work
will hopefully remove the i.MX8M need for ctrl_base.
And then the static clk_set_rate() in Rockchip variants could
be replaced with some dynamic rate using devfreq.
Thanks!
Ezequiel
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
@ 2021-03-06 11:25 ` Ezequiel Garcia
0 siblings, 0 replies; 44+ messages in thread
From: Ezequiel Garcia @ 2021-03-06 11:25 UTC (permalink / raw)
To: Emil Velikov
Cc: Nicolas Ferre, kernel, Philipp Zabel, linux-media,
linux-rockchip, Nicolas Dufresne, Benjamin Gaignard
(adding another Nicolas)
Hi Emil,
Thanks a lot for the patch.
On Fri, 2021-03-05 at 18:39 +0000, Emil Velikov wrote:
> From: Emil Velikov <emil.velikov@collabora.com>
>
> The SoC features a Hantro G1 compatible video decoder.
>
> Cc: Ezequiel Garcia <ezequiel@collabora.com>
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: linux-media@vger.kernel.org
> Cc: linux-rockchip@lists.infradead.org
> Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
> ---
> arch/arm/boot/dts/sama5d4.dtsi | 9 ++
Usually device-tree changes go to their own patch.
The new compatible string "atmel,sama5d4-vdec" needs
an update to the DT bindings, see Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
for an example.
DT bindings change should also go to a separate
patch, see Documentation/devicetree/bindings/submitting-patches.rst.
> arch/arm/configs/sama5_defconfig | 3 +
Better if config changes are a separate patch.
But also, the driver is in staging and we haven't enabled
in ARM64 defconfig. Let's leave that decision to the machine
maintainer to decide.
> drivers/staging/media/hantro/Kconfig | 10 +-
> drivers/staging/media/hantro/Makefile | 3 +
> drivers/staging/media/hantro/hantro_drv.c | 3 +
> drivers/staging/media/hantro/hantro_hw.h | 1 +
> .../staging/media/hantro/sama5d4_vdec_hw.c | 118 ++++++++++++++++++
> 7 files changed, 146 insertions(+), 1 deletion(-)
> create mode 100644 drivers/staging/media/hantro/sama5d4_vdec_hw.c
>
> diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
> index 05c55875835d..deaf1f6cc784 100644
> --- a/arch/arm/boot/dts/sama5d4.dtsi
> +++ b/arch/arm/boot/dts/sama5d4.dtsi
> @@ -101,6 +101,15 @@ nfc_sram: sram@100000 {
> ranges = <0 0x100000 0x2400>;
> };
>
> + vdec0: vdec@00300000 {
> + compatible = "atmel,sama5d4-vdec";
> + reg = <0x00300000 0x100000>;
> + interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
> + interrupt-names = "vdec";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
> + clock-names = "vdec_clk";
> + };
> +
> usb0: gadget@400000 {
> compatible = "atmel,sama5d3-udc";
> reg = <0x00400000 0x100000
> diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
> index 0dca50c64503..10806f38abfb 100644
> --- a/arch/arm/configs/sama5_defconfig
> +++ b/arch/arm/configs/sama5_defconfig
> @@ -200,6 +200,9 @@ CONFIG_RTC_DRV_AT91RM9200=y
> CONFIG_DMADEVICES=y
> CONFIG_AT_HDMAC=y
> CONFIG_AT_XDMAC=y
> +CONFIG_STAGING=y
> +CONFIG_STAGING_MEDIA=y
> +CONFIG_VIDEO_HANTRO=y
> # CONFIG_IOMMU_SUPPORT is not set
> CONFIG_IIO=y
> CONFIG_AT91_ADC=y
> diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig
> index 5b6cf9f62b1a..43762c8164e0 100644
> --- a/drivers/staging/media/hantro/Kconfig
> +++ b/drivers/staging/media/hantro/Kconfig
> @@ -1,7 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
> config VIDEO_HANTRO
> tristate "Hantro VPU driver"
> - depends on ARCH_MXC || ARCH_ROCKCHIP || COMPILE_TEST
> + depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || COMPILE_TEST
> depends on VIDEO_DEV && VIDEO_V4L2
> select MEDIA_CONTROLLER
> select MEDIA_CONTROLLER_REQUEST_API
> @@ -24,6 +24,14 @@ config VIDEO_HANTRO_IMX8M
> help
> Enable support for i.MX8M SoCs.
>
> +config VIDEO_HANTRO_SAMA5D4
> + bool "Hantro VDEC SAMA5D4 support"
> + depends on VIDEO_HANTRO
> + depends on ARCH_AT91 || COMPILE_TEST
> + default y
> + help
> + Enable support for Atmel SAMA5D4 SoCs.
> +
> config VIDEO_HANTRO_ROCKCHIP
> bool "Hantro VPU Rockchip support"
> depends on VIDEO_HANTRO
> diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
> index 3747a32799b2..f4b99901eeee 100644
> --- a/drivers/staging/media/hantro/Makefile
> +++ b/drivers/staging/media/hantro/Makefile
> @@ -22,6 +22,9 @@ hantro-vpu-y += \
> hantro-vpu-$(CONFIG_VIDEO_HANTRO_IMX8M) += \
> imx8m_vpu_hw.o
>
> +hantro-vpu-$(CONFIG_VIDEO_HANTRO_SAMA5D4) += \
> + sama5d4_vdec_hw.o
> +
> hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \
> rk3288_vpu_hw.o \
> rk3399_vpu_hw.o
> diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
> index e5f200e64993..19f1202574a2 100644
> --- a/drivers/staging/media/hantro/hantro_drv.c
> +++ b/drivers/staging/media/hantro/hantro_drv.c
> @@ -478,6 +478,9 @@ static const struct of_device_id of_hantro_match[] = {
> #endif
> #ifdef CONFIG_VIDEO_HANTRO_IMX8M
> { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, },
> +#endif
> +#ifdef CONFIG_VIDEO_HANTRO_SAMA5D4
> + { .compatible = "atmel,sama5d4-vdec", .data = &sama5d4_vdec_variant, },
> #endif
> { /* sentinel */ }
> };
> diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
> index 73c71bb2320c..4d39da1d1581 100644
> --- a/drivers/staging/media/hantro/hantro_hw.h
> +++ b/drivers/staging/media/hantro/hantro_hw.h
> @@ -152,6 +152,7 @@ extern const struct hantro_variant rk3399_vpu_variant;
> extern const struct hantro_variant rk3328_vpu_variant;
> extern const struct hantro_variant rk3288_vpu_variant;
> extern const struct hantro_variant imx8mq_vpu_variant;
> +extern const struct hantro_variant sama5d4_vdec_variant;
>
> extern const struct hantro_postproc_regs hantro_g1_postproc_regs;
>
> diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
> new file mode 100644
> index 000000000000..9cf1068d986b
> --- /dev/null
> +++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
> @@ -0,0 +1,118 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Hantro VDEC driver
> + *
> + * Copyright (C) 2021 Collabora Ltd, Emil Velikov <emil.velikov@collabora.com>
> + */
> +
> +#include "hantro.h"
> +
> +
> +/*
> + * Supported formats.
> + */
> +
> +static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = {
> + {
> + .fourcc = V4L2_PIX_FMT_YUYV,
> + .codec_mode = HANTRO_MODE_NONE,
> + },
> +};
> +
I haven't found information on how the series
was tested in the cover letter, could you add that to the next
iteration?
Please test the YUYV post-processed output and MPEG-2 decoding as well.
Also add the fluster score on this platform, and while here you could
give a pass at v4l2-compliance, which should pass without failures.
Note that you need to use v4l2-compliance HEAD from git.
https://git.linuxtv.org/v4l-utils.git
> +static const struct hantro_fmt sama5d4_vdec_fmts[] = {
> + {
> + .fourcc = V4L2_PIX_FMT_NV12,
> + .codec_mode = HANTRO_MODE_NONE,
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_MPEG2_SLICE,
> + .codec_mode = HANTRO_MODE_MPEG2_DEC,
> + .max_depth = 2,
> + .frmsize = {
> + .min_width = 48,
> + .max_width = 1280,
> + .step_width = MB_DIM,
> + .min_height = 48,
> + .max_height = 720,
> + .step_height = MB_DIM,
> + },
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_VP8_FRAME,
> + .codec_mode = HANTRO_MODE_VP8_DEC,
> + .max_depth = 2,
> + .frmsize = {
> + .min_width = 48,
> + .max_width = 1280,
> + .step_width = MB_DIM,
> + .min_height = 48,
> + .max_height = 720,
> + .step_height = MB_DIM,
> + },
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_H264_SLICE,
> + .codec_mode = HANTRO_MODE_H264_DEC,
> + .max_depth = 2,
> + .frmsize = {
> + .min_width = 48,
> + .max_width = 1280,
> + .step_width = MB_DIM,
> + .min_height = 48,
> + .max_height = 720,
> + .step_height = MB_DIM,
> + },
> + },
> +};
> +
> +static int sama5d4_hw_init(struct hantro_dev *vpu)
> +{
> + return 0;
Ah, the hantro_variant.init ops is not optional, but
if this VPU has no hw-specific init, then it should be.
In any case, we might get rid of it soon: Benjamin's work
will hopefully remove the i.MX8M need for ctrl_base.
And then the static clk_set_rate() in Rockchip variants could
be replaced with some dynamic rate using devfreq.
Thanks!
Ezequiel
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
2021-03-06 11:25 ` Ezequiel Garcia
@ 2021-03-08 13:07 ` Emil Velikov
-1 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-08 13:07 UTC (permalink / raw)
To: Ezequiel Garcia
Cc: Nicolas Ferre, kernel, Philipp Zabel, linux-media,
linux-rockchip, Nicolas Dufresne, Benjamin Gaignard
Hi Ezequiel,
Thanks for the prompt reply
On Sat, 6 Mar 2021 at 11:25, Ezequiel Garcia <ezequiel@collabora.com> wrote:
>
> (adding another Nicolas)
>
> Hi Emil,
>
> Thanks a lot for the patch.
>
> On Fri, 2021-03-05 at 18:39 +0000, Emil Velikov wrote:
> > From: Emil Velikov <emil.velikov@collabora.com>
> >
> > The SoC features a Hantro G1 compatible video decoder.
> >
> > Cc: Ezequiel Garcia <ezequiel@collabora.com>
> > Cc: Philipp Zabel <p.zabel@pengutronix.de>
> > Cc: linux-media@vger.kernel.org
> > Cc: linux-rockchip@lists.infradead.org
> > Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
> > ---
> > arch/arm/boot/dts/sama5d4.dtsi | 9 ++
>
> Usually device-tree changes go to their own patch.
>
> The new compatible string "atmel,sama5d4-vdec" needs
> an update to the DT bindings, see Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> for an example.
>
> DT bindings change should also go to a separate
> patch, see Documentation/devicetree/bindings/submitting-patches.rst.
>
Will do. Thanks
> > arch/arm/configs/sama5_defconfig | 3 +
>
> Better if config changes are a separate patch.
>
> But also, the driver is in staging and we haven't enabled
> in ARM64 defconfig. Let's leave that decision to the machine
> maintainer to decide.
>
Makes sense. Will keep it separate patch for completeness sake, with
explicit note.
ARM/Microchip (AT91) SoC maintainers will be in CC list and will defer
the decision to them.
> > +static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = {
> > + {
> > + .fourcc = V4L2_PIX_FMT_YUYV,
> > + .codec_mode = HANTRO_MODE_NONE,
> > + },
> > +};
> > +
>
> I haven't found information on how the series
> was tested in the cover letter, could you add that to the next
> iteration?
>
> Please test the YUYV post-processed output and MPEG-2 decoding as well.
>
Any recommendations for MPEG-2 and post-processing testing? For the
former I could use gstreamer on Big Buck Bunny or other media, yet not
sure about the latter.
> Also add the fluster score on this platform, and while here you could
> give a pass at v4l2-compliance, which should pass without failures.
> Note that you need to use v4l2-compliance HEAD from git.
>
> https://git.linuxtv.org/v4l-utils.git
>
Ack, will do. Fwiw I did not see any results in the i.MX8M series so I
followed suit :-P
> > +static int sama5d4_hw_init(struct hantro_dev *vpu)
> > +{
> > + return 0;
>
> Ah, the hantro_variant.init ops is not optional, but
> if this VPU has no hw-specific init, then it should be.
>
> In any case, we might get rid of it soon: Benjamin's work
> will hopefully remove the i.MX8M need for ctrl_base.
>
> And then the static clk_set_rate() in Rockchip variants could
> be replaced with some dynamic rate using devfreq.
>
Neat looking forward to it.
Thanks
Emil
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
@ 2021-03-08 13:07 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-08 13:07 UTC (permalink / raw)
To: Ezequiel Garcia
Cc: Nicolas Ferre, kernel, Philipp Zabel, linux-media,
linux-rockchip, Nicolas Dufresne, Benjamin Gaignard
Hi Ezequiel,
Thanks for the prompt reply
On Sat, 6 Mar 2021 at 11:25, Ezequiel Garcia <ezequiel@collabora.com> wrote:
>
> (adding another Nicolas)
>
> Hi Emil,
>
> Thanks a lot for the patch.
>
> On Fri, 2021-03-05 at 18:39 +0000, Emil Velikov wrote:
> > From: Emil Velikov <emil.velikov@collabora.com>
> >
> > The SoC features a Hantro G1 compatible video decoder.
> >
> > Cc: Ezequiel Garcia <ezequiel@collabora.com>
> > Cc: Philipp Zabel <p.zabel@pengutronix.de>
> > Cc: linux-media@vger.kernel.org
> > Cc: linux-rockchip@lists.infradead.org
> > Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
> > ---
> > arch/arm/boot/dts/sama5d4.dtsi | 9 ++
>
> Usually device-tree changes go to their own patch.
>
> The new compatible string "atmel,sama5d4-vdec" needs
> an update to the DT bindings, see Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> for an example.
>
> DT bindings change should also go to a separate
> patch, see Documentation/devicetree/bindings/submitting-patches.rst.
>
Will do. Thanks
> > arch/arm/configs/sama5_defconfig | 3 +
>
> Better if config changes are a separate patch.
>
> But also, the driver is in staging and we haven't enabled
> in ARM64 defconfig. Let's leave that decision to the machine
> maintainer to decide.
>
Makes sense. Will keep it separate patch for completeness sake, with
explicit note.
ARM/Microchip (AT91) SoC maintainers will be in CC list and will defer
the decision to them.
> > +static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = {
> > + {
> > + .fourcc = V4L2_PIX_FMT_YUYV,
> > + .codec_mode = HANTRO_MODE_NONE,
> > + },
> > +};
> > +
>
> I haven't found information on how the series
> was tested in the cover letter, could you add that to the next
> iteration?
>
> Please test the YUYV post-processed output and MPEG-2 decoding as well.
>
Any recommendations for MPEG-2 and post-processing testing? For the
former I could use gstreamer on Big Buck Bunny or other media, yet not
sure about the latter.
> Also add the fluster score on this platform, and while here you could
> give a pass at v4l2-compliance, which should pass without failures.
> Note that you need to use v4l2-compliance HEAD from git.
>
> https://git.linuxtv.org/v4l-utils.git
>
Ack, will do. Fwiw I did not see any results in the i.MX8M series so I
followed suit :-P
> > +static int sama5d4_hw_init(struct hantro_dev *vpu)
> > +{
> > + return 0;
>
> Ah, the hantro_variant.init ops is not optional, but
> if this VPU has no hw-specific init, then it should be.
>
> In any case, we might get rid of it soon: Benjamin's work
> will hopefully remove the i.MX8M need for ctrl_base.
>
> And then the static clk_set_rate() in Rockchip variants could
> be replaced with some dynamic rate using devfreq.
>
Neat looking forward to it.
Thanks
Emil
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
2021-03-08 13:07 ` Emil Velikov
@ 2021-03-08 13:21 ` Nicolas Ferre
-1 siblings, 0 replies; 44+ messages in thread
From: Nicolas Ferre @ 2021-03-08 13:21 UTC (permalink / raw)
To: Emil Velikov, Ezequiel Garcia
Cc: kernel, Philipp Zabel, linux-media, linux-rockchip,
Nicolas Dufresne, Benjamin Gaignard
Hi Emil,
So nice to see this support! Thank you so much for handling that.
Little comments below...
On 08/03/2021 at 14:07, Emil Velikov wrote:
> Hi Ezequiel,
>
> Thanks for the prompt reply
>
> On Sat, 6 Mar 2021 at 11:25, Ezequiel Garcia <ezequiel@collabora.com> wrote:
>>
>> (adding another Nicolas)
>>
>> Hi Emil,
>>
>> Thanks a lot for the patch.
>>
>> On Fri, 2021-03-05 at 18:39 +0000, Emil Velikov wrote:
>>> From: Emil Velikov <emil.velikov@collabora.com>
>>>
>>> The SoC features a Hantro G1 compatible video decoder.
>>>
>>> Cc: Ezequiel Garcia <ezequiel@collabora.com>
>>> Cc: Philipp Zabel <p.zabel@pengutronix.de>
>>> Cc: linux-media@vger.kernel.org
>>> Cc: linux-rockchip@lists.infradead.org
>>> Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
>>> ---
>>> arch/arm/boot/dts/sama5d4.dtsi | 9 ++
>>
>> Usually device-tree changes go to their own patch.
>>
>> The new compatible string "atmel,sama5d4-vdec" needs
Nitpicking: I would use "microchip,sama5d4-vdec". We tend to use the
microchip name for new DT bidings and compatibility strings.
>> an update to the DT bindings, see Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
>> for an example.
>>
>> DT bindings change should also go to a separate
>> patch, see Documentation/devicetree/bindings/submitting-patches.rst.
>>
> Will do. Thanks
>
>>> arch/arm/configs/sama5_defconfig | 3 +
>>
>> Better if config changes are a separate patch.
>>
>> But also, the driver is in staging and we haven't enabled
>> in ARM64 defconfig. Let's leave that decision to the machine
>> maintainer to decide.
>>
> Makes sense. Will keep it separate patch for completeness sake, with
> explicit note.
> ARM/Microchip (AT91) SoC maintainers will be in CC list and will defer
> the decision to them.
I'm fine with having a "staging" component. Maybe add the hantro vdec as
a module instead.
Best regards,
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
@ 2021-03-08 13:21 ` Nicolas Ferre
0 siblings, 0 replies; 44+ messages in thread
From: Nicolas Ferre @ 2021-03-08 13:21 UTC (permalink / raw)
To: Emil Velikov, Ezequiel Garcia
Cc: kernel, Philipp Zabel, linux-media, linux-rockchip,
Nicolas Dufresne, Benjamin Gaignard
Hi Emil,
So nice to see this support! Thank you so much for handling that.
Little comments below...
On 08/03/2021 at 14:07, Emil Velikov wrote:
> Hi Ezequiel,
>
> Thanks for the prompt reply
>
> On Sat, 6 Mar 2021 at 11:25, Ezequiel Garcia <ezequiel@collabora.com> wrote:
>>
>> (adding another Nicolas)
>>
>> Hi Emil,
>>
>> Thanks a lot for the patch.
>>
>> On Fri, 2021-03-05 at 18:39 +0000, Emil Velikov wrote:
>>> From: Emil Velikov <emil.velikov@collabora.com>
>>>
>>> The SoC features a Hantro G1 compatible video decoder.
>>>
>>> Cc: Ezequiel Garcia <ezequiel@collabora.com>
>>> Cc: Philipp Zabel <p.zabel@pengutronix.de>
>>> Cc: linux-media@vger.kernel.org
>>> Cc: linux-rockchip@lists.infradead.org
>>> Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
>>> ---
>>> arch/arm/boot/dts/sama5d4.dtsi | 9 ++
>>
>> Usually device-tree changes go to their own patch.
>>
>> The new compatible string "atmel,sama5d4-vdec" needs
Nitpicking: I would use "microchip,sama5d4-vdec". We tend to use the
microchip name for new DT bidings and compatibility strings.
>> an update to the DT bindings, see Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
>> for an example.
>>
>> DT bindings change should also go to a separate
>> patch, see Documentation/devicetree/bindings/submitting-patches.rst.
>>
> Will do. Thanks
>
>>> arch/arm/configs/sama5_defconfig | 3 +
>>
>> Better if config changes are a separate patch.
>>
>> But also, the driver is in staging and we haven't enabled
>> in ARM64 defconfig. Let's leave that decision to the machine
>> maintainer to decide.
>>
> Makes sense. Will keep it separate patch for completeness sake, with
> explicit note.
> ARM/Microchip (AT91) SoC maintainers will be in CC list and will defer
> the decision to them.
I'm fine with having a "staging" component. Maybe add the hantro vdec as
a module instead.
Best regards,
--
Nicolas Ferre
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
2021-03-08 13:21 ` Nicolas Ferre
@ 2021-03-08 15:57 ` Emil Velikov
-1 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-08 15:57 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Ezequiel Garcia, kernel, Philipp Zabel, linux-media,
linux-rockchip, Nicolas Dufresne, Benjamin Gaignard
On Mon, 8 Mar 2021 at 13:21, Nicolas Ferre <nicolas.ferre@microchip.com> wrote:
>
> Hi Emil,
>
Greetings Nicolas,
> So nice to see this support! Thank you so much for handling that.
>
> Little comments below...
>
> Nitpicking: I would use "microchip,sama5d4-vdec". We tend to use the
> microchip name for new DT bidings and compatibility strings.
>
Should i use Microchip (instead of Atmel) only for the DT bindings or
throughout the series?
> I'm fine with having a "staging" component. Maybe add the hantro vdec as
> a module instead.
>
Ack, will do for v2.
Thanks
Emil
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
@ 2021-03-08 15:57 ` Emil Velikov
0 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-08 15:57 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Ezequiel Garcia, kernel, Philipp Zabel, linux-media,
linux-rockchip, Nicolas Dufresne, Benjamin Gaignard
On Mon, 8 Mar 2021 at 13:21, Nicolas Ferre <nicolas.ferre@microchip.com> wrote:
>
> Hi Emil,
>
Greetings Nicolas,
> So nice to see this support! Thank you so much for handling that.
>
> Little comments below...
>
> Nitpicking: I would use "microchip,sama5d4-vdec". We tend to use the
> microchip name for new DT bidings and compatibility strings.
>
Should i use Microchip (instead of Atmel) only for the DT bindings or
throughout the series?
> I'm fine with having a "staging" component. Maybe add the hantro vdec as
> a module instead.
>
Ack, will do for v2.
Thanks
Emil
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
2021-03-08 15:57 ` Emil Velikov
@ 2021-03-08 17:42 ` Nicolas Ferre
-1 siblings, 0 replies; 44+ messages in thread
From: Nicolas Ferre @ 2021-03-08 17:42 UTC (permalink / raw)
To: Emil Velikov
Cc: Ezequiel Garcia, kernel, Philipp Zabel, linux-media,
linux-rockchip, Nicolas Dufresne, Benjamin Gaignard
On 08/03/2021 at 16:57, Emil Velikov wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Mon, 8 Mar 2021 at 13:21, Nicolas Ferre <nicolas.ferre@microchip.com> wrote:
>>
>> Hi Emil,
>>
> Greetings Nicolas,
>
>> So nice to see this support! Thank you so much for handling that.
>>
>> Little comments below...
>>
>
>> Nitpicking: I would use "microchip,sama5d4-vdec". We tend to use the
>> microchip name for new DT bidings and compatibility strings.
>>
> Should i use Microchip (instead of Atmel) only for the DT bindings or
> throughout the series?
Yes, everywhere you can (Kconfig, explanation text, ...). Only keep
Atmel/atmel where you cannot do differently or if it would require to
modify code or move file just for this purpose.
Regards,
Nicolas
>> I'm fine with having a "staging" component. Maybe add the hantro vdec as
>> a module instead.
>>
> Ack, will do for v2.
>
> Thanks
> Emil
>
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
@ 2021-03-08 17:42 ` Nicolas Ferre
0 siblings, 0 replies; 44+ messages in thread
From: Nicolas Ferre @ 2021-03-08 17:42 UTC (permalink / raw)
To: Emil Velikov
Cc: Ezequiel Garcia, kernel, Philipp Zabel, linux-media,
linux-rockchip, Nicolas Dufresne, Benjamin Gaignard
On 08/03/2021 at 16:57, Emil Velikov wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Mon, 8 Mar 2021 at 13:21, Nicolas Ferre <nicolas.ferre@microchip.com> wrote:
>>
>> Hi Emil,
>>
> Greetings Nicolas,
>
>> So nice to see this support! Thank you so much for handling that.
>>
>> Little comments below...
>>
>
>> Nitpicking: I would use "microchip,sama5d4-vdec". We tend to use the
>> microchip name for new DT bidings and compatibility strings.
>>
> Should i use Microchip (instead of Atmel) only for the DT bindings or
> throughout the series?
Yes, everywhere you can (Kconfig, explanation text, ...). Only keep
Atmel/atmel where you cannot do differently or if it would require to
modify code or move file just for this purpose.
Regards,
Nicolas
>> I'm fine with having a "staging" component. Maybe add the hantro vdec as
>> a module instead.
>>
> Ack, will do for v2.
>
> Thanks
> Emil
>
--
Nicolas Ferre
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
2021-03-08 13:07 ` Emil Velikov
@ 2021-03-08 15:25 ` Ezequiel Garcia
-1 siblings, 0 replies; 44+ messages in thread
From: Ezequiel Garcia @ 2021-03-08 15:25 UTC (permalink / raw)
To: Emil Velikov
Cc: Nicolas Ferre, kernel, Philipp Zabel, linux-media,
linux-rockchip, Nicolas Dufresne, Benjamin Gaignard
On Mon, 2021-03-08 at 13:07 +0000, Emil Velikov wrote:
> Hi Ezequiel,
>
> Thanks for the prompt reply
>
> On Sat, 6 Mar 2021 at 11:25, Ezequiel Garcia <ezequiel@collabora.com> wrote:
> >
> > (adding another Nicolas)
> >
> > Hi Emil,
> >
> > Thanks a lot for the patch.
> >
> > On Fri, 2021-03-05 at 18:39 +0000, Emil Velikov wrote:
> > > From: Emil Velikov <emil.velikov@collabora.com>
> > >
> > > The SoC features a Hantro G1 compatible video decoder.
> > >
> > > Cc: Ezequiel Garcia <ezequiel@collabora.com>
> > > Cc: Philipp Zabel <p.zabel@pengutronix.de>
> > > Cc: linux-media@vger.kernel.org
> > > Cc: linux-rockchip@lists.infradead.org
> > > Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
[..]
> > > +static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = {
> > > + {
> > > + .fourcc = V4L2_PIX_FMT_YUYV,
> > > + .codec_mode = HANTRO_MODE_NONE,
> > > + },
> > > +};
> > > +
> >
> > I haven't found information on how the series
> > was tested in the cover letter, could you add that to the next
> > iteration?
> >
> > Please test the YUYV post-processed output and MPEG-2 decoding as well.
> >
> Any recommendations for MPEG-2 and post-processing testing? For the
> former I could use gstreamer on Big Buck Bunny or other media, yet not
> sure about the latter.
>
The post-processed YUYV output can be requested like this in
GStreamer:
gst-launch-1.0 -v filesrc location=$something ! parsebin ! decodebin ! video/x-raw,format=YUY2 ! ...
For MPEG-2 testing, I'm afraid there's no GStreamer yet for this,
but Jonas' ffmpeg should work https://github.com/Kwiboo/FFmpeg/commits/v4l2-request-hwaccel-4.3.
Thanks,
Ezequiel
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 7/7] ARM: dts: at91: sama5d4: add vdec0 component
@ 2021-03-08 15:25 ` Ezequiel Garcia
0 siblings, 0 replies; 44+ messages in thread
From: Ezequiel Garcia @ 2021-03-08 15:25 UTC (permalink / raw)
To: Emil Velikov
Cc: Nicolas Ferre, kernel, Philipp Zabel, linux-media,
linux-rockchip, Nicolas Dufresne, Benjamin Gaignard
On Mon, 2021-03-08 at 13:07 +0000, Emil Velikov wrote:
> Hi Ezequiel,
>
> Thanks for the prompt reply
>
> On Sat, 6 Mar 2021 at 11:25, Ezequiel Garcia <ezequiel@collabora.com> wrote:
> >
> > (adding another Nicolas)
> >
> > Hi Emil,
> >
> > Thanks a lot for the patch.
> >
> > On Fri, 2021-03-05 at 18:39 +0000, Emil Velikov wrote:
> > > From: Emil Velikov <emil.velikov@collabora.com>
> > >
> > > The SoC features a Hantro G1 compatible video decoder.
> > >
> > > Cc: Ezequiel Garcia <ezequiel@collabora.com>
> > > Cc: Philipp Zabel <p.zabel@pengutronix.de>
> > > Cc: linux-media@vger.kernel.org
> > > Cc: linux-rockchip@lists.infradead.org
> > > Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
[..]
> > > +static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = {
> > > + {
> > > + .fourcc = V4L2_PIX_FMT_YUYV,
> > > + .codec_mode = HANTRO_MODE_NONE,
> > > + },
> > > +};
> > > +
> >
> > I haven't found information on how the series
> > was tested in the cover letter, could you add that to the next
> > iteration?
> >
> > Please test the YUYV post-processed output and MPEG-2 decoding as well.
> >
> Any recommendations for MPEG-2 and post-processing testing? For the
> former I could use gstreamer on Big Buck Bunny or other media, yet not
> sure about the latter.
>
The post-processed YUYV output can be requested like this in
GStreamer:
gst-launch-1.0 -v filesrc location=$something ! parsebin ! decodebin ! video/x-raw,format=YUY2 ! ...
For MPEG-2 testing, I'm afraid there's no GStreamer yet for this,
but Jonas' ffmpeg should work https://github.com/Kwiboo/FFmpeg/commits/v4l2-request-hwaccel-4.3.
Thanks,
Ezequiel
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Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 0/7] Microship SAMA5D4 VPU support et al
2021-03-05 18:39 [PATCH 0/7] Microship SAMA5D4 VPU support et al Emil Velikov
` (6 preceding siblings ...)
2021-03-05 18:39 ` Emil Velikov
@ 2021-03-05 22:58 ` Emil Velikov
7 siblings, 0 replies; 44+ messages in thread
From: Emil Velikov @ 2021-03-05 22:58 UTC (permalink / raw)
To: ML dri-devel; +Cc: kernel, Nicolas Ferre
Seems like I messed up the to line and this ended in the wrong list.
Apologies for the noise o/
Emil
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 44+ messages in thread