[PATCH 00/13] Add ipq806x missing bindings

[PATCH 00/13] Add ipq806x missing bindings

[Christian Marangi]

This series try to add some of the missing bindings for ipq806x.

This still lacks of the cpu bindings and all the bindings required
to scale cpu clk or L2. These will come later as the driver and
documentation require some changes.

So for now we try to add bindings that can directly applied without
making changes to any drivers.

Christian Marangi (13):
  ARM: dts: qcom: add multiple missing pin definition for ipq8064
  ARM: dts: qcom: add gsbi6 missing definition for ipq8064
  ARM: dts: qcom: add missing rpm regulators and cells for ipq8064
  ARM: dts: qcom: disable smb208 regulators for ipq8064-rb3011
  ARM: dts: qcom: add missing snps,dwmac compatible for gmac ipq8064
  ARM: dts: qcom: enable usb phy by default for ipq8064
  ARM: dts: qcom: reduce pci IO size to 64K for ipq8064
  ARM: dts: qcom: fix dtc warning for missing #address-cells for ipq8064
  ARM: dts: qcom: add smem node for ipq8064
  ARM: dts: qcom: add sic non secure node for ipq8064
  ARM: dts: qcom: fix and add some missing gsbi node for ipq8064
  ARM: dts: qcom: add speedbin efuse nvmem binding
  ARM: dts: qcom: remove redundant binding from ipq8064 rb3011 dts

 arch/arm/boot/dts/qcom-ipq8064-rb3011.dts |  21 +--
 arch/arm/boot/dts/qcom-ipq8064.dtsi       | 206 ++++++++++++++++++++--
 2 files changed, 198 insertions(+), 29 deletions(-)

-- 
2.36.1

[PATCH 01/13] ARM: dts: qcom: add multiple missing pin definition for ipq8064

[Christian Marangi]

Add missing definition for mdio0 pins used for gpio-bitbang driver,i2c4
pins and rgmii2 pins for ipq8064.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 4b475d98343c..f06a17bd915a 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -382,6 +382,15 @@ mux {
 				};
 			};
 
+			i2c4_pins: i2c4_pinmux {
+				mux {
+					pins = "gpio12", "gpio13";
+					function = "gsbi4";
+					drive-strength = <12>;
+					bias-disable;
+				};
+			};
+
 			spi_pins: spi_pins {
 				mux {
 					pins = "gpio18", "gpio19", "gpio21";
@@ -424,6 +433,8 @@ mux {
 
 				pullups {
 					pins = "gpio39";
+					function = "nand";
+					drive-strength = <10>;
 					bias-pull-up;
 				};
 
@@ -431,9 +442,32 @@ hold {
 					pins = "gpio40", "gpio41", "gpio42",
 					       "gpio43", "gpio44", "gpio45",
 					       "gpio46", "gpio47";
+					function = "nand";
+					drive-strength = <10>;
 					bias-bus-hold;
 				};
 			};
+
+			mdio0_pins: mdio0_pins {
+				mux {
+					pins = "gpio0", "gpio1";
+					function = "mdio";
+					drive-strength = <8>;
+					bias-disable;
+				};
+			};
+
+			rgmii2_pins: rgmii2_pins {
+				mux {
+					pins = "gpio27", "gpio28", "gpio29",
+					       "gpio30", "gpio31", "gpio32",
+					       "gpio51", "gpio52", "gpio59",
+					       "gpio60", "gpio61", "gpio62";
+					function = "rgmii2";
+					drive-strength = <8>;
+					bias-disable;
+				};
+			};
 		};
 
 		intc: interrupt-controller@2000000 {
-- 
2.36.1

[PATCH 02/13] ARM: dts: qcom: add gsbi6 missing definition for ipq8064

[Christian Marangi]

Add gsbi6 missing definition for ipq8064.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi | 40 +++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index f06a17bd915a..1b4b72723ead 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -665,6 +665,46 @@ spi@1a280000 {
 			};
 		};
 
+		gsbi6: gsbi@16500000 {
+			status = "disabled";
+			compatible = "qcom,gsbi-v1.0.0";
+			cell-index = <6>;
+			reg = <0x16500000 0x100>;
+			clocks = <&gcc GSBI6_H_CLK>;
+			clock-names = "iface";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			syscon-tcsr = <&tcsr>;
+
+			gsbi6_i2c: i2c@16580000 {
+				compatible = "qcom,i2c-qup-v1.1.1";
+				reg = <0x16580000 0x1000>;
+				interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+
+				clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
+				clock-names = "core", "iface";
+				status = "disabled";
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+
+			gsbi6_spi: spi@16580000 {
+				compatible = "qcom,spi-qup-v1.1.1";
+				reg = <0x16580000 0x1000>;
+				interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+
+				clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
+				clock-names = "core", "iface";
+				status = "disabled";
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+		};
+
 		gsbi7: gsbi@16600000 {
 			status = "disabled";
 			compatible = "qcom,gsbi-v1.0.0";
-- 
2.36.1

[PATCH 03/13] ARM: dts: qcom: add missing rpm regulators and cells for ipq8064

[Christian Marangi]

Add cells definition for rpm node and add missing regulators for the 4
regulator present on ipq8064. There regulators are controlled by rpm and
to correctly works gsbi4_i2c require to be NEVER disabled or rpm will
reject any regulator change request.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 1b4b72723ead..c0b05d2a2d6d 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -844,10 +844,46 @@ rpm: rpm@108000 {
 			clocks = <&gcc RPM_MSG_RAM_H_CLK>;
 			clock-names = "ram";
 
+			#address-cells = <1>;
+			#size-cells = <0>;
+
 			rpmcc: clock-controller {
 				compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
 				#clock-cells = <1>;
 			};
+
+			smb208_regulators: regulators {
+				compatible = "qcom,rpm-smb208-regulators";
+				status = "okay";
+
+				smb208_s1a: s1a {
+					regulator-min-microvolt = <1050000>;
+					regulator-max-microvolt = <1150000>;
+
+					qcom,switch-mode-frequency = <1200000>;
+				};
+
+				smb208_s1b: s1b {
+					regulator-min-microvolt = <1050000>;
+					regulator-max-microvolt = <1150000>;
+
+					qcom,switch-mode-frequency = <1200000>;
+				};
+
+				smb208_s2a: s2a {
+					regulator-min-microvolt = < 800000>;
+					regulator-max-microvolt = <1250000>;
+
+					qcom,switch-mode-frequency = <1200000>;
+				};
+
+				smb208_s2b: s2b {
+					regulator-min-microvolt = < 800000>;
+					regulator-max-microvolt = <1250000>;
+
+					qcom,switch-mode-frequency = <1200000>;
+				};
+			};
 		};
 
 		tcsr: syscon@1a400000 {
-- 
2.36.1

[PATCH 04/13] ARM: dts: qcom: disable smb208 regulators for ipq8064-rb3011

[Christian Marangi]

Mikrotik RB3011 have a special configuration where the regulators are
not the common smb208 controlled by RPM but they use a TPS563900
controlled via i2c. Disable the smb208 for this specific device.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Jonathan McDowell <noodles@earth.li>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
 arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
index 9034f00f2bd8..f651e813d75a 100644
--- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
@@ -218,6 +218,10 @@ led@7 {
 	};
 };
 
+&smb208_regulators {
+	status = "disabled";
+};
+
 &adm_dma {
 	status = "okay";
 };
-- 
2.36.1

[PATCH 05/13] ARM: dts: qcom: add missing snps,dwmac compatible for gmac ipq8064

[Christian Marangi]

Add missing snps,dwmac compatible for gmac ipq8064 dtsi.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index c0b05d2a2d6d..b2faa4a067e9 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -1077,7 +1077,7 @@ stmmac_axi_setup: stmmac-axi-config {
 
 		gmac0: ethernet@37000000 {
 			device_type = "network";
-			compatible = "qcom,ipq806x-gmac";
+			compatible = "qcom,ipq806x-gmac", "snps,dwmac";
 			reg = <0x37000000 0x200000>;
 			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "macirq";
@@ -1101,7 +1101,7 @@ gmac0: ethernet@37000000 {
 
 		gmac1: ethernet@37200000 {
 			device_type = "network";
-			compatible = "qcom,ipq806x-gmac";
+			compatible = "qcom,ipq806x-gmac", "snps,dwmac";
 			reg = <0x37200000 0x200000>;
 			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "macirq";
@@ -1125,7 +1125,7 @@ gmac1: ethernet@37200000 {
 
 		gmac2: ethernet@37400000 {
 			device_type = "network";
-			compatible = "qcom,ipq806x-gmac";
+			compatible = "qcom,ipq806x-gmac", "snps,dwmac";
 			reg = <0x37400000 0x200000>;
 			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "macirq";
@@ -1149,7 +1149,7 @@ gmac2: ethernet@37400000 {
 
 		gmac3: ethernet@37600000 {
 			device_type = "network";
-			compatible = "qcom,ipq806x-gmac";
+			compatible = "qcom,ipq806x-gmac", "snps,dwmac";
 			reg = <0x37600000 0x200000>;
 			interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "macirq";
-- 
2.36.1

[PATCH 06/13] ARM: dts: qcom: enable usb phy by default for ipq8064

[Christian Marangi]

Enable usb phy by default. When the usb phy were pushed, half of them
were flagged as disabled by mistake. Fix this to correctly init dwc3
node on any ipq8064 based SoC.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index b2faa4a067e9..9c32c637ea46 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -1177,8 +1177,6 @@ hs_phy_0: phy@100f8800 {
 			clocks = <&gcc USB30_0_UTMI_CLK>;
 			clock-names = "ref";
 			#phy-cells = <0>;
-
-			status = "disabled";
 		};
 
 		ss_phy_0: phy@100f8830 {
@@ -1187,8 +1185,6 @@ ss_phy_0: phy@100f8830 {
 			clocks = <&gcc USB30_0_MASTER_CLK>;
 			clock-names = "ref";
 			#phy-cells = <0>;
-
-			status = "disabled";
 		};
 
 		usb3_0: usb3@100f8800 {
-- 
2.36.1

[PATCH 07/13] ARM: dts: qcom: reduce pci IO size to 64K for ipq8064

[Christian Marangi]

The current value for pci IO is problematic for ath10k wifi card
commonly connected to ipq8064 SoC.
The current value is probably a typo and is actually uncommon to find
1MB IO space even on a x86 arch. Also with recent changes to the pci
driver, pci1 and pci2 now fails to function as any connected device
fails any reg read/write. Reduce this to 64K as it should be more than
enough and 3 * 64K of total IO space doesn't exceed the IO_SPACE_LIMIT
hardcoded for the ARM arch.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 9c32c637ea46..e13f6ae92e05 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -920,7 +920,7 @@ pcie0: pci@1b500000 {
 			#address-cells = <3>;
 			#size-cells = <2>;
 
-			ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000   /* downstream I/O */
+			ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00010000   /* downstream I/O */
 				  0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
 
 			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
@@ -971,7 +971,7 @@ pcie1: pci@1b700000 {
 			#address-cells = <3>;
 			#size-cells = <2>;
 
-			ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000   /* downstream I/O */
+			ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00010000   /* downstream I/O */
 				  0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
 
 			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
@@ -1022,7 +1022,7 @@ pcie2: pci@1b900000 {
 			#address-cells = <3>;
 			#size-cells = <2>;
 
-			ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000   /* downstream I/O */
+			ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00010000   /* downstream I/O */
 				  0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
 
 			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.36.1

[PATCH 08/13] ARM: dts: qcom: fix dtc warning for missing #address-cells for ipq8064

[Christian Marangi]

Fix dtc warning for missing #address-cells for ipq8064.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index e13f6ae92e05..b5aede3d7ccf 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -352,6 +352,7 @@ qcom_pinmux: pinmux@800000 {
 			gpio-ranges = <&qcom_pinmux 0 0 69>;
 			#gpio-cells = <2>;
 			interrupt-controller;
+			#address-cells = <0>;
 			#interrupt-cells = <2>;
 			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 
@@ -473,6 +474,7 @@ mux {
 		intc: interrupt-controller@2000000 {
 			compatible = "qcom,msm-qgic2";
 			interrupt-controller;
+			#address-cells = <0>;
 			#interrupt-cells = <3>;
 			reg = <0x02000000 0x1000>,
 			      <0x02002000 0x1000>;
-- 
2.36.1

[PATCH 09/13] ARM: dts: qcom: add smem node for ipq8064

[Christian Marangi]

Add missing smem node for ipq8064.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index b5aede3d7ccf..98527a7d885e 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -908,6 +908,11 @@ lcc: clock-controller@28000000 {
 			#reset-cells = <1>;
 		};
 
+		sfpb_mutex_block: syscon@1200600 {
+			compatible = "syscon";
+			reg = <0x01200600 0x100>;
+		};
+
 		pcie0: pci@1b500000 {
 			compatible = "qcom,pcie-ipq8064";
 			reg = <0x1b500000 0x1000
@@ -1332,4 +1337,17 @@ sdcc3: mmc@12180000 {
 			};
 		};
 	};
+
+	sfpb_mutex: sfpb-mutex {
+		compatible = "qcom,sfpb-mutex";
+		syscon = <&sfpb_mutex_block 4 4>;
+
+		#hwlock-cells = <1>;
+	};
+
+	smem {
+		compatible = "qcom,smem";
+		memory-region = <&smem>;
+		hwlocks = <&sfpb_mutex 3>;
+	};
 };
-- 
2.36.1

[PATCH 10/13] ARM: dts: qcom: add sic non secure node for ipq8064

[Christian Marangi]

Add missing sic non secure node for ipq8064.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 98527a7d885e..ef8faee6dfd4 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -543,6 +543,11 @@ saw1: regulator@2099000 {
 			regulator;
 		};
 
+		sic_non_secure: sic-non-secure@12100000 {
+			compatible = "syscon";
+			reg = <0x12100000 0x10000>;
+		};
+
 		gsbi2: gsbi@12480000 {
 			compatible = "qcom,gsbi-v1.0.0";
 			cell-index = <2>;
-- 
2.36.1

[PATCH 11/13] ARM: dts: qcom: fix and add some missing gsbi node for ipq8064

[Christian Marangi]

Add some tag for gsbi to make them usable for ipq8064 SoC. Add missing
gsbi7 i2c node and gsbi1 node.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi | 50 ++++++++++++++++++++++++++++-
 1 file changed, 49 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index ef8faee6dfd4..777851bed95a 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -548,6 +548,41 @@ sic_non_secure: sic-non-secure@12100000 {
 			reg = <0x12100000 0x10000>;
 		};
 
+		gsbi1: gsbi@12440000 {
+			compatible = "qcom,gsbi-v1.0.0";
+			cell-index = <1>;
+			reg = <0x12440000 0x100>;
+			clocks = <&gcc GSBI1_H_CLK>;
+			clock-names = "iface";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+			status = "disabled";
+
+			syscon-tcsr = <&tcsr>;
+
+			gsbi1_serial: serial@12450000 {
+				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+				reg = <0x12450000 0x100>,
+				      <0x12400000 0x03>;
+				interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;
+				clock-names = "core", "iface";
+				status = "disabled";
+			};
+
+			gsbi1_i2c: i2c@12460000 {
+				compatible = "qcom,i2c-qup-v1.1.1";
+				reg = <0x12460000 0x1000>;
+				interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
+				clock-names = "core", "iface";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+		};
+
 		gsbi2: gsbi@12480000 {
 			compatible = "qcom,gsbi-v1.0.0";
 			cell-index = <2>;
@@ -571,7 +606,7 @@ gsbi2_serial: serial@12490000 {
 				status = "disabled";
 			};
 
-			i2c@124a0000 {
+			gsbi2_i2c: i2c@124a0000 {
 				compatible = "qcom,i2c-qup-v1.1.1";
 				reg = <0x124a0000 0x1000>;
 				interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
@@ -733,6 +768,19 @@ gsbi7_serial: serial@16640000 {
 				clock-names = "core", "iface";
 				status = "disabled";
 			};
+
+			gsbi7_i2c: i2c@16680000 {
+				compatible = "qcom,i2c-qup-v1.1.1";
+				reg = <0x16680000 0x1000>;
+				interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+
+				clocks = <&gcc GSBI7_QUP_CLK>, <&gcc GSBI7_H_CLK>;
+				clock-names = "core", "iface";
+				status = "disabled";
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
 		};
 
 		rng@1a500000 {
-- 
2.36.1

[PATCH 12/13] ARM: dts: qcom: add speedbin efuse nvmem binding

[Christian Marangi]

Add speedbin efuse nvmem binding needed for the opp table for the CPU
freqs.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 777851bed95a..45e713387deb 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -862,6 +862,9 @@ tsens_calib: calib@400 {
 			tsens_calib_backup: calib_backup@410 {
 				reg = <0x410 0xb>;
 			};
+			speedbin_efuse: speedbin@c0 {
+				reg = <0xc0 0x4>;
+			};
 		};
 
 		gcc: clock-controller@900000 {
-- 
2.36.1

[PATCH 13/13] ARM: dts: qcom: remove redundant binding from ipq8064 rb3011 dts

[Christian Marangi]

Mdio0_pins are now declared in ipq8064 dtsi. Usb phy are enabled by
default.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
 arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 17 -----------------
 1 file changed, 17 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
index f651e813d75a..58893cd2bb5d 100644
--- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
@@ -261,10 +261,6 @@ &gsbi7_serial {
 	status = "okay";
 };
 
-&hs_phy_1 {
-	status = "okay";
-};
-
 &nand {
 	status = "okay";
 
@@ -311,15 +307,6 @@ mux {
 		};
 	};
 
-	mdio0_pins: mdio0_pins {
-		mux {
-			pins = "gpio0", "gpio1";
-			function = "gpio";
-			drive-strength = <8>;
-			bias-disable;
-		};
-	};
-
 	mdio1_pins: mdio1_pins {
 		mux {
 			pins = "gpio10", "gpio11";
@@ -360,10 +347,6 @@ mux {
 	};
 };
 
-&ss_phy_1 {
-	status = "okay";
-};
-
 &usb3_1 {
 	pinctrl-0 = <&usb1_pwr_en_pins>;
 	pinctrl-names = "default";
-- 
2.36.1

Re: [PATCH 00/13] Add ipq806x missing bindings

[Christian Marangi]

On Tue, Jul 05, 2022 at 04:28:47PM +0200, Krzysztof Kozlowski wrote:
> On 05/07/2022 15:39, Christian Marangi wrote:
> > This series try to add some of the missing bindings for ipq806x.
> > 
> > This still lacks of the cpu bindings and all the bindings required
> > to scale cpu clk or L2. These will come later as the driver and
> > documentation require some changes.
> > 
> > So for now we try to add bindings that can directly applied without
> > making changes to any drivers.
> 
> You mention here and in subject bindings, but your patchset does not
> have any bindings.
>

What would be correct word? Node? Compatible?
Sorry for the confusion.

> Best regards,
> Krzysztof

-- 
	Ansuel

Re: [PATCH 00/13] Add ipq806x missing bindings

[Krzysztof Kozlowski]

On 05/07/2022 15:39, Christian Marangi wrote:
> This series try to add some of the missing bindings for ipq806x.
> 
> This still lacks of the cpu bindings and all the bindings required
> to scale cpu clk or L2. These will come later as the driver and
> documentation require some changes.
> 
> So for now we try to add bindings that can directly applied without
> making changes to any drivers.

You mention here and in subject bindings, but your patchset does not
have any bindings.

Best regards,
Krzysztof

Re: [PATCH 00/13] Add ipq806x missing bindings

[Christian Marangi]

On Tue, Jul 05, 2022 at 05:55:14PM +0200, Krzysztof Kozlowski wrote:
> On 05/07/2022 16:04, Christian Marangi wrote:
> > On Tue, Jul 05, 2022 at 04:28:47PM +0200, Krzysztof Kozlowski wrote:
> >> On 05/07/2022 15:39, Christian Marangi wrote:
> >>> This series try to add some of the missing bindings for ipq806x.
> >>>
> >>> This still lacks of the cpu bindings and all the bindings required
> >>> to scale cpu clk or L2. These will come later as the driver and
> >>> documentation require some changes.
> >>>
> >>> So for now we try to add bindings that can directly applied without
> >>> making changes to any drivers.
> >>
> >> You mention here and in subject bindings, but your patchset does not
> >> have any bindings.
> >>
> > 
> > What would be correct word? Node? Compatible?
> 
> "device node" or just "node"
> 

Ok will fix it in v2 and also in other patch where I used binding
instead of node.

-- 
	Ansuel

Re: [PATCH 00/13] Add ipq806x missing bindings

[Krzysztof Kozlowski]

On 05/07/2022 16:04, Christian Marangi wrote:
> On Tue, Jul 05, 2022 at 04:28:47PM +0200, Krzysztof Kozlowski wrote:
>> On 05/07/2022 15:39, Christian Marangi wrote:
>>> This series try to add some of the missing bindings for ipq806x.
>>>
>>> This still lacks of the cpu bindings and all the bindings required
>>> to scale cpu clk or L2. These will come later as the driver and
>>> documentation require some changes.
>>>
>>> So for now we try to add bindings that can directly applied without
>>> making changes to any drivers.
>>
>> You mention here and in subject bindings, but your patchset does not
>> have any bindings.
>>
> 
> What would be correct word? Node? Compatible?

"device node" or just "node"

Best regards,
Krzysztof

Re: [PATCH 02/13] ARM: dts: qcom: add gsbi6 missing definition for ipq8064

[Krzysztof Kozlowski]

On 05/07/2022 15:39, Christian Marangi wrote:
> Add gsbi6 missing definition for ipq8064.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 40 +++++++++++++++++++++++++++++
>  1 file changed, 40 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index f06a17bd915a..1b4b72723ead 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -665,6 +665,46 @@ spi@1a280000 {
>  			};
>  		};
>  
> +		gsbi6: gsbi@16500000 {
> +			status = "disabled";

status goes to the end of properties.

> +			compatible = "qcom,gsbi-v1.0.0";

Compatible is first.

> +			cell-index = <6>;
> +			reg = <0x16500000 0x100>;

reg is second.

> +			clocks = <&gcc GSBI6_H_CLK>;
> +			clock-names = "iface";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges;
> +
> +			syscon-tcsr = <&tcsr>;
> +
> +			gsbi6_i2c: i2c@16580000 {
> +				compatible = "qcom,i2c-qup-v1.1.1";
> +				reg = <0x16580000 0x1000>;
> +				interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> +
> +				clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
> +				clock-names = "core", "iface";
> +				status = "disabled";

Ditto.

> +
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +			};
> +
> +			gsbi6_spi: spi@16580000 {
> +				compatible = "qcom,spi-qup-v1.1.1";
> +				reg = <0x16580000 0x1000>;
> +				interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> +
> +				clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
> +				clock-names = "core", "iface";
> +				status = "disabled";

Ditto

> +
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +			};
> +		};
> +
>  		gsbi7: gsbi@16600000 {
>  			status = "disabled";
>  			compatible = "qcom,gsbi-v1.0.0";


Best regards,
Krzysztof

Re: [PATCH 03/13] ARM: dts: qcom: add missing rpm regulators and cells for ipq8064

[Krzysztof Kozlowski]

On 05/07/2022 15:39, Christian Marangi wrote:
> Add cells definition for rpm node and add missing regulators for the 4
> regulator present on ipq8064. There regulators are controlled by rpm and
> to correctly works gsbi4_i2c require to be NEVER disabled or rpm will
> reject any regulator change request.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++
>  1 file changed, 36 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index 1b4b72723ead..c0b05d2a2d6d 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -844,10 +844,46 @@ rpm: rpm@108000 {
>  			clocks = <&gcc RPM_MSG_RAM_H_CLK>;
>  			clock-names = "ram";
>  
> +			#address-cells = <1>;
> +			#size-cells = <0>;

Why adding these?

> +
>  			rpmcc: clock-controller {
>  				compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
>  				#clock-cells = <1>;
>  			};
> +
> +			smb208_regulators: regulators {
> +				compatible = "qcom,rpm-smb208-regulators";
> +				status = "okay";

Was the node disabled?

> +
> +				smb208_s1a: s1a {
> +					regulator-min-microvolt = <1050000>;
> +					regulator-max-microvolt = <1150000>;
> +
> +					qcom,switch-mode-frequency = <1200000>;
> +				};
> +
> +				smb208_s1b: s1b {
> +					regulator-min-microvolt = <1050000>;
> +					regulator-max-microvolt = <1150000>;
> +
> +					qcom,switch-mode-frequency = <1200000>;
> +				};
> +
> +				smb208_s2a: s2a {
> +					regulator-min-microvolt = < 800000>;
> +					regulator-max-microvolt = <1250000>;
> +
> +					qcom,switch-mode-frequency = <1200000>;
> +				};
> +
> +				smb208_s2b: s2b {
> +					regulator-min-microvolt = < 800000>;
> +					regulator-max-microvolt = <1250000>;
> +
> +					qcom,switch-mode-frequency = <1200000>;
> +				};
> +			};
>  		};
>  
>  		tcsr: syscon@1a400000 {


Best regards,
Krzysztof

Re: [PATCH 04/13] ARM: dts: qcom: disable smb208 regulators for ipq8064-rb3011

[Krzysztof Kozlowski]

On 05/07/2022 15:39, Christian Marangi wrote:
> Mikrotik RB3011 have a special configuration where the regulators are
> not the common smb208 controlled by RPM but they use a TPS563900
> controlled via i2c. Disable the smb208 for this specific device.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Reviewed-by: Jonathan McDowell <noodles@earth.li>
> Tested-by: Jonathan McDowell <noodles@earth.li>

This is the first version of patchset. How did the Rb/Tb tags appear?

Best regards,
Krzysztof

Re: [PATCH 05/13] ARM: dts: qcom: add missing snps,dwmac compatible for gmac ipq8064

[Krzysztof Kozlowski]

On 05/07/2022 15:39, Christian Marangi wrote:
> Add missing snps,dwmac compatible for gmac ipq8064 dtsi.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

Re: [PATCH 06/13] ARM: dts: qcom: enable usb phy by default for ipq8064

[Krzysztof Kozlowski]

On 05/07/2022 15:39, Christian Marangi wrote:
> Enable usb phy by default. When the usb phy were pushed, half of them
> were flagged as disabled by mistake. Fix this to correctly init dwc3
> node on any ipq8064 based SoC.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

Re: [PATCH 08/13] ARM: dts: qcom: fix dtc warning for missing #address-cells for ipq8064

[Krzysztof Kozlowski]

On 05/07/2022 15:39, Christian Marangi wrote:
> Fix dtc warning for missing #address-cells for ipq8064.

Paste the applicable part of warning in the commit log.

> 


Best regards,
Krzysztof

Re: [PATCH 09/13] ARM: dts: qcom: add smem node for ipq8064

[Krzysztof Kozlowski]

On 05/07/2022 15:39, Christian Marangi wrote:
> Add missing smem node for ipq8064.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index b5aede3d7ccf..98527a7d885e 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -908,6 +908,11 @@ lcc: clock-controller@28000000 {
>  			#reset-cells = <1>;
>  		};
>  
> +		sfpb_mutex_block: syscon@1200600 {
> +			compatible = "syscon";

syscon alone is not allowed.

> +			reg = <0x01200600 0x100>;
> +		};
> +
>  		pcie0: pci@1b500000 {
>  			compatible = "qcom,pcie-ipq8064";
>  			reg = <0x1b500000 0x1000
> @@ -1332,4 +1337,17 @@ sdcc3: mmc@12180000 {
>  			};
>  		};
>  	};
> +
> +	sfpb_mutex: sfpb-mutex {

Generic node names, so hwlock

> +		compatible = "qcom,sfpb-mutex";
> +		syscon = <&sfpb_mutex_block 4 4>;
> +
> +		#hwlock-cells = <1>;
> +	};
> +
> +	smem {
> +		compatible = "qcom,smem";
> +		memory-region = <&smem>;
> +		hwlocks = <&sfpb_mutex 3>;
> +	};
>  };


Best regards,
Krzysztof

Re: [PATCH 10/13] ARM: dts: qcom: add sic non secure node for ipq8064

[Krzysztof Kozlowski]

On 05/07/2022 15:39, Christian Marangi wrote:
> Add missing sic non secure node for ipq8064.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index 98527a7d885e..ef8faee6dfd4 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -543,6 +543,11 @@ saw1: regulator@2099000 {
>  			regulator;
>  		};
>  
> +		sic_non_secure: sic-non-secure@12100000 {
> +			compatible = "syscon";

syscon alone is not allowed

> +			reg = <0x12100000 0x10000>;
> +		};
> +
>  		gsbi2: gsbi@12480000 {
>  			compatible = "qcom,gsbi-v1.0.0";
>  			cell-index = <2>;


Best regards,
Krzysztof

Re: [PATCH 11/13] ARM: dts: qcom: fix and add some missing gsbi node for ipq8064

[Krzysztof Kozlowski]

On 05/07/2022 15:39, Christian Marangi wrote:
> Add some tag for gsbi to make them usable for ipq8064 SoC. Add missing
> gsbi7 i2c node and gsbi1 node.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 50 ++++++++++++++++++++++++++++-
>  1 file changed, 49 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index ef8faee6dfd4..777851bed95a 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -548,6 +548,41 @@ sic_non_secure: sic-non-secure@12100000 {
>  			reg = <0x12100000 0x10000>;
>  		};
>  
> +		gsbi1: gsbi@12440000 {
> +			compatible = "qcom,gsbi-v1.0.0";

Order of properties is:
compatible
reg
...
...
status


Best regards,
Krzysztof

Re: [PATCH 12/13] ARM: dts: qcom: add speedbin efuse nvmem binding

[Krzysztof Kozlowski]

On 05/07/2022 15:39, Christian Marangi wrote:
> Add speedbin efuse nvmem binding needed for the opp table for the CPU
> freqs.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index 777851bed95a..45e713387deb 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -862,6 +862,9 @@ tsens_calib: calib@400 {
>  			tsens_calib_backup: calib_backup@410 {
>  				reg = <0x410 0xb>;
>  			};
> +			speedbin_efuse: speedbin@c0 {

Wrong order of nodes. 0xc0 is before 0x410.


Best regards,
Krzysztof

Re: [PATCH 03/13] ARM: dts: qcom: add missing rpm regulators and cells for ipq8064

[Christian Marangi]

On Wed, Jul 06, 2022 at 10:34:16AM +0200, Krzysztof Kozlowski wrote:
> On 05/07/2022 15:39, Christian Marangi wrote:
> > Add cells definition for rpm node and add missing regulators for the 4
> > regulator present on ipq8064. There regulators are controlled by rpm and
> > to correctly works gsbi4_i2c require to be NEVER disabled or rpm will
> > reject any regulator change request.
> > 
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > Tested-by: Jonathan McDowell <noodles@earth.li>
> > ---
> >  arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++
> >  1 file changed, 36 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > index 1b4b72723ead..c0b05d2a2d6d 100644
> > --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > @@ -844,10 +844,46 @@ rpm: rpm@108000 {
> >  			clocks = <&gcc RPM_MSG_RAM_H_CLK>;
> >  			clock-names = "ram";
> >  
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> 
> Why adding these?
>

Fix dt warning, will split and put it in a separate commit.

> > +
> >  			rpmcc: clock-controller {
> >  				compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
> >  				#clock-cells = <1>;
> >  			};
> > +
> > +			smb208_regulators: regulators {
> > +				compatible = "qcom,rpm-smb208-regulators";
> > +				status = "okay";
> 
> Was the node disabled?
> 

smb208 is the normal and advised way to handle regulators on this
platform. Some device may want to not follow that and implement their
own regulator bypassing rpm so we add a status and on the current device
present upstream we set it disabled as it does use different regulators
implementation.

> > +
> > +				smb208_s1a: s1a {
> > +					regulator-min-microvolt = <1050000>;
> > +					regulator-max-microvolt = <1150000>;
> > +
> > +					qcom,switch-mode-frequency = <1200000>;
> > +				};
> > +
> > +				smb208_s1b: s1b {
> > +					regulator-min-microvolt = <1050000>;
> > +					regulator-max-microvolt = <1150000>;
> > +
> > +					qcom,switch-mode-frequency = <1200000>;
> > +				};
> > +
> > +				smb208_s2a: s2a {
> > +					regulator-min-microvolt = < 800000>;
> > +					regulator-max-microvolt = <1250000>;
> > +
> > +					qcom,switch-mode-frequency = <1200000>;
> > +				};
> > +
> > +				smb208_s2b: s2b {
> > +					regulator-min-microvolt = < 800000>;
> > +					regulator-max-microvolt = <1250000>;
> > +
> > +					qcom,switch-mode-frequency = <1200000>;
> > +				};
> > +			};
> >  		};
> >  
> >  		tcsr: syscon@1a400000 {
> 
> 
> Best regards,
> Krzysztof

-- 
	Ansuel

Re: [PATCH 04/13] ARM: dts: qcom: disable smb208 regulators for ipq8064-rb3011

[Christian Marangi]

On Wed, Jul 06, 2022 at 10:34:50AM +0200, Krzysztof Kozlowski wrote:
> On 05/07/2022 15:39, Christian Marangi wrote:
> > Mikrotik RB3011 have a special configuration where the regulators are
> > not the common smb208 controlled by RPM but they use a TPS563900
> > controlled via i2c. Disable the smb208 for this specific device.
> > 
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > Reviewed-by: Jonathan McDowell <noodles@earth.li>
> > Tested-by: Jonathan McDowell <noodles@earth.li>
> 
> This is the first version of patchset. How did the Rb/Tb tags appear?
> 
> Best regards,
> Krzysztof

Will add in the cover letter where this comes from. Didn't add this as
this series contains less patch and other changes than the prev series
but now I will do so we know where these tags comes from.

-- 
	Ansuel

Re: [PATCH 08/13] ARM: dts: qcom: fix dtc warning for missing #address-cells for ipq8064

[Christian Marangi]

On Wed, Jul 06, 2022 at 10:37:47AM +0200, Krzysztof Kozlowski wrote:
> On 05/07/2022 15:39, Christian Marangi wrote:
> > Fix dtc warning for missing #address-cells for ipq8064.
> 
> Paste the applicable part of warning in the commit log.
> 
> > 
> 
> 
> Best regards,
> Krzysztof

Can I squash here the warning from the smb patch?

-- 
	Ansuel

Re: [PATCH 09/13] ARM: dts: qcom: add smem node for ipq8064

[Christian Marangi]

On Wed, Jul 06, 2022 at 10:39:16AM +0200, Krzysztof Kozlowski wrote:
> On 05/07/2022 15:39, Christian Marangi wrote:
> > Add missing smem node for ipq8064.
> > 
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > Tested-by: Jonathan McDowell <noodles@earth.li>
> > ---
> >  arch/arm/boot/dts/qcom-ipq8064.dtsi | 18 ++++++++++++++++++
> >  1 file changed, 18 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > index b5aede3d7ccf..98527a7d885e 100644
> > --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > @@ -908,6 +908,11 @@ lcc: clock-controller@28000000 {
> >  			#reset-cells = <1>;
> >  		};
> >  
> > +		sfpb_mutex_block: syscon@1200600 {
> > +			compatible = "syscon";
> 
> syscon alone is not allowed.
>

Mh... This is problematic. How this should be handled?
This should be put in sfpb_mutex and change the driver to use regs if
present instead of syscon?

> > +			reg = <0x01200600 0x100>;
> > +		};
> > +
> >  		pcie0: pci@1b500000 {
> >  			compatible = "qcom,pcie-ipq8064";
> >  			reg = <0x1b500000 0x1000
> > @@ -1332,4 +1337,17 @@ sdcc3: mmc@12180000 {
> >  			};
> >  		};
> >  	};
> > +
> > +	sfpb_mutex: sfpb-mutex {
> 
> Generic node names, so hwlock
> 
> > +		compatible = "qcom,sfpb-mutex";
> > +		syscon = <&sfpb_mutex_block 4 4>;
> > +
> > +		#hwlock-cells = <1>;
> > +	};
> > +
> > +	smem {
> > +		compatible = "qcom,smem";
> > +		memory-region = <&smem>;
> > +		hwlocks = <&sfpb_mutex 3>;
> > +	};
> >  };
> 
> 
> Best regards,
> Krzysztof

-- 
	Ansuel

Re: [PATCH 09/13] ARM: dts: qcom: add smem node for ipq8064

[Christian Marangi]

On Wed, Jul 06, 2022 at 12:14:42PM +0200, Christian Marangi wrote:
> On Wed, Jul 06, 2022 at 10:39:16AM +0200, Krzysztof Kozlowski wrote:
> > On 05/07/2022 15:39, Christian Marangi wrote:
> > > Add missing smem node for ipq8064.
> > > 
> > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > > Tested-by: Jonathan McDowell <noodles@earth.li>
> > > ---
> > >  arch/arm/boot/dts/qcom-ipq8064.dtsi | 18 ++++++++++++++++++
> > >  1 file changed, 18 insertions(+)
> > > 
> > > diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > > index b5aede3d7ccf..98527a7d885e 100644
> > > --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > > +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > > @@ -908,6 +908,11 @@ lcc: clock-controller@28000000 {
> > >  			#reset-cells = <1>;
> > >  		};
> > >  
> > > +		sfpb_mutex_block: syscon@1200600 {
> > > +			compatible = "syscon";
> > 
> > syscon alone is not allowed.
> >
> 
> Mh... This is problematic. How this should be handled?
> This should be put in sfpb_mutex and change the driver to use regs if
> present instead of syscon?
>

Found an alternative solution used in ipq807x so I can drop the syscon
only node.

> > > +			reg = <0x01200600 0x100>;
> > > +		};
> > > +
> > >  		pcie0: pci@1b500000 {
> > >  			compatible = "qcom,pcie-ipq8064";
> > >  			reg = <0x1b500000 0x1000
> > > @@ -1332,4 +1337,17 @@ sdcc3: mmc@12180000 {
> > >  			};
> > >  		};
> > >  	};
> > > +
> > > +	sfpb_mutex: sfpb-mutex {
> > 
> > Generic node names, so hwlock
> > 
> > > +		compatible = "qcom,sfpb-mutex";
> > > +		syscon = <&sfpb_mutex_block 4 4>;
> > > +
> > > +		#hwlock-cells = <1>;
> > > +	};
> > > +
> > > +	smem {
> > > +		compatible = "qcom,smem";
> > > +		memory-region = <&smem>;
> > > +		hwlocks = <&sfpb_mutex 3>;
> > > +	};
> > >  };
> > 
> > 
> > Best regards,
> > Krzysztof
> 
> -- 
> 	Ansuel

-- 
	Ansuel

Re: [PATCH 03/13] ARM: dts: qcom: add missing rpm regulators and cells for ipq8064

[Dmitry Baryshkov]

On Wed, 6 Jul 2022 at 13:26, Christian Marangi <ansuelsmth@gmail.com> wrote:
> On Wed, Jul 06, 2022 at 10:34:16AM +0200, Krzysztof Kozlowski wrote:
> > On 05/07/2022 15:39, Christian Marangi wrote:
> > > Add cells definition for rpm node and add missing regulators for the 4
> > > regulator present on ipq8064. There regulators are controlled by rpm and
> > > to correctly works gsbi4_i2c require to be NEVER disabled or rpm will
> > > reject any regulator change request.
> > >
> > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > > Tested-by: Jonathan McDowell <noodles@earth.li>

[...]

>
> > > +
> > >                     rpmcc: clock-controller {
> > >                             compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
> > >                             #clock-cells = <1>;
> > >                     };
> > > +
> > > +                   smb208_regulators: regulators {
> > > +                           compatible = "qcom,rpm-smb208-regulators";
> > > +                           status = "okay";
> >
> > Was the node disabled?
> >
>
> smb208 is the normal and advised way to handle regulators on this
> platform. Some device may want to not follow that and implement their
> own regulator bypassing rpm so we add a status and on the current device
> present upstream we set it disabled as it does use different regulators
> implementation.

Yep, this is correct. But you don't have to define status = 'okay'. It
is the default.

There are two typical patterns:
1) Disable by default
foo.dtsi:
    abc: def {
        status = "disabled";
    };
foo-bar.dtsi:
    &abc { status = "okay"; }

2) Enable by default
foo.dtsi:
    abc: def {
        /* usual properties */
    };
foo-bar.dtsi:
    &abc { status = "disabled"; }


-- 
With best wishes
Dmitry

Re: [PATCH 09/13] ARM: dts: qcom: add smem node for ipq8064

[Dmitry Baryshkov]

On Wed, 6 Jul 2022 at 13:31, Christian Marangi <ansuelsmth@gmail.com> wrote:
>
> On Wed, Jul 06, 2022 at 10:39:16AM +0200, Krzysztof Kozlowski wrote:
> > On 05/07/2022 15:39, Christian Marangi wrote:
> > > Add missing smem node for ipq8064.
> > >
> > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > > Tested-by: Jonathan McDowell <noodles@earth.li>
> > > ---
> > >  arch/arm/boot/dts/qcom-ipq8064.dtsi | 18 ++++++++++++++++++
> > >  1 file changed, 18 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > > index b5aede3d7ccf..98527a7d885e 100644
> > > --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > > +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > > @@ -908,6 +908,11 @@ lcc: clock-controller@28000000 {
> > >                     #reset-cells = <1>;
> > >             };
> > >
> > > +           sfpb_mutex_block: syscon@1200600 {
> > > +                   compatible = "syscon";
> >
> > syscon alone is not allowed.
> >
>
> Mh... This is problematic. How this should be handled?
> This should be put in sfpb_mutex and change the driver to use regs if
> present instead of syscon?

If nothing else works, you can add two compat strings, for example:
"qcom,ipq8064-sfpb-mutex", "syscon";
This way if we add an sfpb driver at some point, we can still use old dts files.

-- 
With best wishes
Dmitry

Re: [PATCH 01/13] ARM: dts: qcom: add multiple missing pin definition for ipq8064

[Konrad Dybcio]

On 5.07.2022 15:39, Christian Marangi wrote:
> Add missing definition for mdio0 pins used for gpio-bitbang driver,i2c4
> pins and rgmii2 pins for ipq8064.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index 4b475d98343c..f06a17bd915a 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -382,6 +382,15 @@ mux {
>  				};
>  			};
>  
Hi,
> +			i2c4_pins: i2c4_pinmux {
No underscores in node names (use them only in labels), please.

Also, please rename this to something like i2c4-default, for
example to make it clear which power state it represents (I 
suppose i2c4-sleep is going to appear sometime in the as well).


> +				mux {

Please drop the unnecessary mux{} level.

Konrad
> +					pins = "gpio12", "gpio13";
> +					function = "gsbi4";
> +					drive-strength = <12>;
> +					bias-disable;
> +				};
> +			};
> +
>  			spi_pins: spi_pins {
>  				mux {
>  					pins = "gpio18", "gpio19", "gpio21";
> @@ -424,6 +433,8 @@ mux {
>  
>  				pullups {
>  					pins = "gpio39";
> +					function = "nand";
> +					drive-strength = <10>;
>  					bias-pull-up;
>  				};
>  
> @@ -431,9 +442,32 @@ hold {
>  					pins = "gpio40", "gpio41", "gpio42",
>  					       "gpio43", "gpio44", "gpio45",
>  					       "gpio46", "gpio47";
> +					function = "nand";
> +					drive-strength = <10>;
>  					bias-bus-hold;
>  				};
>  			};
> +
> +			mdio0_pins: mdio0_pins {
> +				mux {
> +					pins = "gpio0", "gpio1";
> +					function = "mdio";
> +					drive-strength = <8>;
> +					bias-disable;
> +				};
> +			};
> +
> +			rgmii2_pins: rgmii2_pins {
> +				mux {
> +					pins = "gpio27", "gpio28", "gpio29",
> +					       "gpio30", "gpio31", "gpio32",
> +					       "gpio51", "gpio52", "gpio59",
> +					       "gpio60", "gpio61", "gpio62";
> +					function = "rgmii2";
> +					drive-strength = <8>;
> +					bias-disable;
> +				};
> +			};
>  		};
>  
>  		intc: interrupt-controller@2000000 {

Re: [PATCH 02/13] ARM: dts: qcom: add gsbi6 missing definition for ipq8064

[Konrad Dybcio]

On 5.07.2022 15:39, Christian Marangi wrote:
> Add gsbi6 missing definition for ipq8064.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 40 +++++++++++++++++++++++++++++
>  1 file changed, 40 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index f06a17bd915a..1b4b72723ead 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -665,6 +665,46 @@ spi@1a280000 {
>  			};
>  		};
>  
> +		gsbi6: gsbi@16500000 {
> +			status = "disabled"
Please make the compatible first, reg 2nd and move status to the bottom.

Konrad
> +			compatible = "qcom,gsbi-v1.0.0";
> +			cell-index = <6>;
> +			reg = <0x16500000 0x100>;
> +			clocks = <&gcc GSBI6_H_CLK>;
> +			clock-names = "iface";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges;
> +
> +			syscon-tcsr = <&tcsr>;
> +
> +			gsbi6_i2c: i2c@16580000 {
> +				compatible = "qcom,i2c-qup-v1.1.1";
> +				reg = <0x16580000 0x1000>;
> +				interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> +
> +				clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
> +				clock-names = "core", "iface";
> +				status = "disabled";
> +
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +			};
> +
> +			gsbi6_spi: spi@16580000 {
> +				compatible = "qcom,spi-qup-v1.1.1";
> +				reg = <0x16580000 0x1000>;
> +				interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> +
> +				clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
> +				clock-names = "core", "iface";
> +				status = "disabled";
> +
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +			};
> +		};
> +
>  		gsbi7: gsbi@16600000 {
>  			status = "disabled";
>  			compatible = "qcom,gsbi-v1.0.0";

Re: [PATCH 03/13] ARM: dts: qcom: add missing rpm regulators and cells for ipq8064

[Christian Marangi]

On Wed, Jul 06, 2022 at 03:02:44PM +0200, Konrad Dybcio wrote:
> 
> 
> On 5.07.2022 15:39, Christian Marangi wrote:
> > Add cells definition for rpm node and add missing regulators for the 4
> > regulator present on ipq8064. There regulators are controlled by rpm and
> > to correctly works gsbi4_i2c require to be NEVER disabled or rpm will
> > reject any regulator change request.
> That sounds.. very weird for a RPM regulator..
> 
>

I know but it's like that. In theory the smb208 can be controlled via
the gsbi4_i2c and bypass rpm completely but we have no ducmentation of
smb208 so rpm is the only way to scale voltage on this SoC.

If gsbi4_i2c is disabled any RPM voltage request fails as RPM in it's
firmware use the same line and assume it's always enabled.

> > 
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > Tested-by: Jonathan McDowell <noodles@earth.li>
> > ---
> >  arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++
> >  1 file changed, 36 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > index 1b4b72723ead..c0b05d2a2d6d 100644
> > --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > @@ -844,10 +844,46 @@ rpm: rpm@108000 {
> >  			clocks = <&gcc RPM_MSG_RAM_H_CLK>;
> >  			clock-names = "ram";
> >  
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +
> >  			rpmcc: clock-controller {
> >  				compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
> >  				#clock-cells = <1>;
> >  			};
> > +
> > +			smb208_regulators: regulators {
> Are you sure it is used on all ipq8064 boards? And with the same
> voltage settings?
> 

Out of 28 device we have on openwrt only the one present upstream
doesn't use the smb208 regulator and use it's own way.

The voltage are all the same, it does change with other revision of the
SoC (ipq8065) but they will pushed in another series later.

> > +				compatible = "qcom,rpm-smb208-regulators";
> > +				status = "okay";
> They are enabled by default, as you are defining them here and
> the status property is not overwritten anywhere else.
> 
> Konrad
> > +
> > +				smb208_s1a: s1a {
> > +					regulator-min-microvolt = <1050000>;
> > +					regulator-max-microvolt = <1150000>;
> > +
> > +					qcom,switch-mode-frequency = <1200000>;
> > +				};
> > +
> > +				smb208_s1b: s1b {
> > +					regulator-min-microvolt = <1050000>;
> > +					regulator-max-microvolt = <1150000>;
> > +
> > +					qcom,switch-mode-frequency = <1200000>;
> > +				};
> > +
> > +				smb208_s2a: s2a {
> > +					regulator-min-microvolt = < 800000>;
> > +					regulator-max-microvolt = <1250000>;
> > +
> > +					qcom,switch-mode-frequency = <1200000>;
> > +				};
> > +
> > +				smb208_s2b: s2b {
> > +					regulator-min-microvolt = < 800000>;
> > +					regulator-max-microvolt = <1250000>;
> > +
> > +					qcom,switch-mode-frequency = <1200000>;
> > +				};
> > +			};
> >  		};
> >  
> >  		tcsr: syscon@1a400000 {

-- 
	Ansuel

Re: [PATCH 04/13] ARM: dts: qcom: disable smb208 regulators for ipq8064-rb3011

[Christian Marangi]

On Wed, Jul 06, 2022 at 03:03:32PM +0200, Konrad Dybcio wrote:
> 
> 
> On 5.07.2022 15:39, Christian Marangi wrote:
> > Mikrotik RB3011 have a special configuration where the regulators are
> > not the common smb208 controlled by RPM but they use a TPS563900
> > controlled via i2c. Disable the smb208 for this specific device.
> Ok, so that answers my question from the previous email.
> Please define the SMB208 regulators only in the DTs of
> boards that actually use it, as it is not a SoC component as
> far as I can tell.
> 
> Konrad

This was already discuessed, rb3011 is the exception, qcom for ipq8064
recommends to use smb208 but gives the option to implement it in their
own way. So again we have 28 device with smb208 and 1 device that use
its own special way...

Wonder if a separate dtsi can be used for this if we really can't put
smb208 in ipq8064 dtsi?

> > 
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > Reviewed-by: Jonathan McDowell <noodles@earth.li>
> > Tested-by: Jonathan McDowell <noodles@earth.li>
> > ---
> >  arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
> > index 9034f00f2bd8..f651e813d75a 100644
> > --- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
> > +++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
> > @@ -218,6 +218,10 @@ led@7 {
> >  	};
> >  };
> >  
> > +&smb208_regulators {
> > +	status = "disabled";
> > +};
> > +
> >  &adm_dma {
> >  	status = "okay";
> >  };

-- 
	Ansuel

Re: [PATCH 06/13] ARM: dts: qcom: enable usb phy by default for ipq8064

[Christian Marangi]

On Wed, Jul 06, 2022 at 03:04:44PM +0200, Konrad Dybcio wrote:
> 
> 
> On 5.07.2022 15:39, Christian Marangi wrote:
> > Enable usb phy by default. When the usb phy were pushed, half of them
> > were flagged as disabled by mistake. Fix this to correctly init dwc3
> > node on any ipq8064 based SoC.
> Are you sure they are used on *all* devices? If not, you will
> lose power by enabling unused hw..
> 
> Konrad

Well there could be device that have no usb at all... so honestly
enabling one of them is also wrong. Should I disable the other and
enable it for the upstream device?

Also it's all handled by dummy vbus so i think we can ignore the losing
power thing. (this thing is old)

> > 
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > Tested-by: Jonathan McDowell <noodles@earth.li>
> > ---
> >  arch/arm/boot/dts/qcom-ipq8064.dtsi | 4 ----
> >  1 file changed, 4 deletions(-)
> > 
> > diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > index b2faa4a067e9..9c32c637ea46 100644
> > --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > @@ -1177,8 +1177,6 @@ hs_phy_0: phy@100f8800 {
> >  			clocks = <&gcc USB30_0_UTMI_CLK>;
> >  			clock-names = "ref";
> >  			#phy-cells = <0>;
> > -
> > -			status = "disabled";
> >  		};
> >  
> >  		ss_phy_0: phy@100f8830 {
> > @@ -1187,8 +1185,6 @@ ss_phy_0: phy@100f8830 {
> >  			clocks = <&gcc USB30_0_MASTER_CLK>;
> >  			clock-names = "ref";
> >  			#phy-cells = <0>;
> > -
> > -			status = "disabled";
> >  		};
> >  
> >  		usb3_0: usb3@100f8800 {

-- 
	Ansuel

Re: [PATCH 03/13] ARM: dts: qcom: add missing rpm regulators and cells for ipq8064

[Konrad Dybcio]

On 5.07.2022 15:39, Christian Marangi wrote:
> Add cells definition for rpm node and add missing regulators for the 4
> regulator present on ipq8064. There regulators are controlled by rpm and
> to correctly works gsbi4_i2c require to be NEVER disabled or rpm will
> reject any regulator change request.
That sounds.. very weird for a RPM regulator..


> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++
>  1 file changed, 36 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index 1b4b72723ead..c0b05d2a2d6d 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -844,10 +844,46 @@ rpm: rpm@108000 {
>  			clocks = <&gcc RPM_MSG_RAM_H_CLK>;
>  			clock-names = "ram";
>  
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
>  			rpmcc: clock-controller {
>  				compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
>  				#clock-cells = <1>;
>  			};
> +
> +			smb208_regulators: regulators {
Are you sure it is used on all ipq8064 boards? And with the same
voltage settings?

> +				compatible = "qcom,rpm-smb208-regulators";
> +				status = "okay";
They are enabled by default, as you are defining them here and
the status property is not overwritten anywhere else.

Konrad
> +
> +				smb208_s1a: s1a {
> +					regulator-min-microvolt = <1050000>;
> +					regulator-max-microvolt = <1150000>;
> +
> +					qcom,switch-mode-frequency = <1200000>;
> +				};
> +
> +				smb208_s1b: s1b {
> +					regulator-min-microvolt = <1050000>;
> +					regulator-max-microvolt = <1150000>;
> +
> +					qcom,switch-mode-frequency = <1200000>;
> +				};
> +
> +				smb208_s2a: s2a {
> +					regulator-min-microvolt = < 800000>;
> +					regulator-max-microvolt = <1250000>;
> +
> +					qcom,switch-mode-frequency = <1200000>;
> +				};
> +
> +				smb208_s2b: s2b {
> +					regulator-min-microvolt = < 800000>;
> +					regulator-max-microvolt = <1250000>;
> +
> +					qcom,switch-mode-frequency = <1200000>;
> +				};
> +			};
>  		};
>  
>  		tcsr: syscon@1a400000 {

Re: [PATCH 09/13] ARM: dts: qcom: add smem node for ipq8064

[Christian Marangi]

On Wed, Jul 06, 2022 at 03:11:05PM +0200, Konrad Dybcio wrote:
> 
> 
> On 5.07.2022 15:39, Christian Marangi wrote:
> > Add missing smem node for ipq8064.
> > 
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > Tested-by: Jonathan McDowell <noodles@earth.li>
> > ---
> I can't find a downstream kernel for these router SoCs, but
> I wonder if the 8x64 family DTs couldn't be somewhat
> unified? It looks like they share quite some code..

Mhh don't know they have some peculiar changes so unifying them would
make more harm than good IMHO.

> 
> Konrad
> >  arch/arm/boot/dts/qcom-ipq8064.dtsi | 18 ++++++++++++++++++
> >  1 file changed, 18 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > index b5aede3d7ccf..98527a7d885e 100644
> > --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> > @@ -908,6 +908,11 @@ lcc: clock-controller@28000000 {
> >  			#reset-cells = <1>;
> >  		};
> >  
> > +		sfpb_mutex_block: syscon@1200600 {
> > +			compatible = "syscon";
> > +			reg = <0x01200600 0x100>;
> > +		};
> > +
> >  		pcie0: pci@1b500000 {
> >  			compatible = "qcom,pcie-ipq8064";
> >  			reg = <0x1b500000 0x1000
> > @@ -1332,4 +1337,17 @@ sdcc3: mmc@12180000 {
> >  			};
> >  		};
> >  	};
> > +
> > +	sfpb_mutex: sfpb-mutex {
> > +		compatible = "qcom,sfpb-mutex";
> > +		syscon = <&sfpb_mutex_block 4 4>;
> > +
> > +		#hwlock-cells = <1>;
> > +	};
> > +
> > +	smem {
> > +		compatible = "qcom,smem";
> > +		memory-region = <&smem>;
> > +		hwlocks = <&sfpb_mutex 3>;
> > +	};
> >  };

-- 
	Ansuel

Re: [PATCH 04/13] ARM: dts: qcom: disable smb208 regulators for ipq8064-rb3011

[Konrad Dybcio]

On 5.07.2022 15:39, Christian Marangi wrote:
> Mikrotik RB3011 have a special configuration where the regulators are
> not the common smb208 controlled by RPM but they use a TPS563900
> controlled via i2c. Disable the smb208 for this specific device.
Ok, so that answers my question from the previous email.
Please define the SMB208 regulators only in the DTs of
boards that actually use it, as it is not a SoC component as
far as I can tell.

Konrad
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Reviewed-by: Jonathan McDowell <noodles@earth.li>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
>  arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
> index 9034f00f2bd8..f651e813d75a 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
> +++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
> @@ -218,6 +218,10 @@ led@7 {
>  	};
>  };
>  
> +&smb208_regulators {
> +	status = "disabled";
> +};
> +
>  &adm_dma {
>  	status = "okay";
>  };

Re: [PATCH 05/13] ARM: dts: qcom: add missing snps,dwmac compatible for gmac ipq8064

[Konrad Dybcio]

On 5.07.2022 15:39, Christian Marangi wrote:
> Add missing snps,dwmac compatible for gmac ipq8064 dtsi.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>

Konrad
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index c0b05d2a2d6d..b2faa4a067e9 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -1077,7 +1077,7 @@ stmmac_axi_setup: stmmac-axi-config {
>  
>  		gmac0: ethernet@37000000 {
>  			device_type = "network";
> -			compatible = "qcom,ipq806x-gmac";
> +			compatible = "qcom,ipq806x-gmac", "snps,dwmac";
>  			reg = <0x37000000 0x200000>;
>  			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
>  			interrupt-names = "macirq";
> @@ -1101,7 +1101,7 @@ gmac0: ethernet@37000000 {
>  
>  		gmac1: ethernet@37200000 {
>  			device_type = "network";
> -			compatible = "qcom,ipq806x-gmac";
> +			compatible = "qcom,ipq806x-gmac", "snps,dwmac";
>  			reg = <0x37200000 0x200000>;
>  			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
>  			interrupt-names = "macirq";
> @@ -1125,7 +1125,7 @@ gmac1: ethernet@37200000 {
>  
>  		gmac2: ethernet@37400000 {
>  			device_type = "network";
> -			compatible = "qcom,ipq806x-gmac";
> +			compatible = "qcom,ipq806x-gmac", "snps,dwmac";
>  			reg = <0x37400000 0x200000>;
>  			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
>  			interrupt-names = "macirq";
> @@ -1149,7 +1149,7 @@ gmac2: ethernet@37400000 {
>  
>  		gmac3: ethernet@37600000 {
>  			device_type = "network";
> -			compatible = "qcom,ipq806x-gmac";
> +			compatible = "qcom,ipq806x-gmac", "snps,dwmac";
>  			reg = <0x37600000 0x200000>;
>  			interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
>  			interrupt-names = "macirq";

Re: [PATCH 06/13] ARM: dts: qcom: enable usb phy by default for ipq8064

[Konrad Dybcio]

On 5.07.2022 15:39, Christian Marangi wrote:
> Enable usb phy by default. When the usb phy were pushed, half of them
> were flagged as disabled by mistake. Fix this to correctly init dwc3
> node on any ipq8064 based SoC.
Are you sure they are used on *all* devices? If not, you will
lose power by enabling unused hw..

Konrad
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 4 ----
>  1 file changed, 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index b2faa4a067e9..9c32c637ea46 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -1177,8 +1177,6 @@ hs_phy_0: phy@100f8800 {
>  			clocks = <&gcc USB30_0_UTMI_CLK>;
>  			clock-names = "ref";
>  			#phy-cells = <0>;
> -
> -			status = "disabled";
>  		};
>  
>  		ss_phy_0: phy@100f8830 {
> @@ -1187,8 +1185,6 @@ ss_phy_0: phy@100f8830 {
>  			clocks = <&gcc USB30_0_MASTER_CLK>;
>  			clock-names = "ref";
>  			#phy-cells = <0>;
> -
> -			status = "disabled";
>  		};
>  
>  		usb3_0: usb3@100f8800 {

Re: [PATCH 09/13] ARM: dts: qcom: add smem node for ipq8064

[Konrad Dybcio]

On 5.07.2022 15:39, Christian Marangi wrote:
> Add missing smem node for ipq8064.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
I can't find a downstream kernel for these router SoCs, but
I wonder if the 8x64 family DTs couldn't be somewhat
unified? It looks like they share quite some code..

Konrad
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index b5aede3d7ccf..98527a7d885e 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -908,6 +908,11 @@ lcc: clock-controller@28000000 {
>  			#reset-cells = <1>;
>  		};
>  
> +		sfpb_mutex_block: syscon@1200600 {
> +			compatible = "syscon";
> +			reg = <0x01200600 0x100>;
> +		};
> +
>  		pcie0: pci@1b500000 {
>  			compatible = "qcom,pcie-ipq8064";
>  			reg = <0x1b500000 0x1000
> @@ -1332,4 +1337,17 @@ sdcc3: mmc@12180000 {
>  			};
>  		};
>  	};
> +
> +	sfpb_mutex: sfpb-mutex {
> +		compatible = "qcom,sfpb-mutex";
> +		syscon = <&sfpb_mutex_block 4 4>;
> +
> +		#hwlock-cells = <1>;
> +	};
> +
> +	smem {
> +		compatible = "qcom,smem";
> +		memory-region = <&smem>;
> +		hwlocks = <&sfpb_mutex 3>;
> +	};
>  };

Re: [PATCH 04/13] ARM: dts: qcom: disable smb208 regulators for ipq8064-rb3011

[Christian Marangi]

On Wed, Jul 06, 2022 at 03:31:55PM +0200, Konrad Dybcio wrote:
> 
> 
> On 6.07.2022 14:56, Christian Marangi wrote:
> > On Wed, Jul 06, 2022 at 03:03:32PM +0200, Konrad Dybcio wrote:
> >>
> >>
> >> On 5.07.2022 15:39, Christian Marangi wrote:
> >>> Mikrotik RB3011 have a special configuration where the regulators are
> >>> not the common smb208 controlled by RPM but they use a TPS563900
> >>> controlled via i2c. Disable the smb208 for this specific device.
> >> Ok, so that answers my question from the previous email.
> >> Please define the SMB208 regulators only in the DTs of
> >> boards that actually use it, as it is not a SoC component as
> >> far as I can tell.
> >>
> >> Konrad
> > 
> > This was already discuessed,
> Yeah sorry, I didn't notice earlier and started reviewing patches
> that were already reviewed by others.
>

Np, thanks for the review.

> 
> rb3011 is the exception, qcom for ipq8064
> > recommends to use smb208 but gives the option to implement it in their
> > own way. So again we have 28 device with smb208 and 1 device that use
> > its own special way...
> > 
> > Wonder if a separate dtsi can be used for this if we really can't put
> > smb208 in ipq8064 dtsi?
> There's msm8916-pm8916.dtsi. You can follow.

Ok, will put the smb208 definition to a separate dtsi, something like
ipq8064-smb208.dtsi? or ipq8064-rpm-smb208.dtsi? Looks also cleaner that
way.

> 
> Konrad
> 
> [...]

-- 
	Ansuel

Re: [PATCH 06/13] ARM: dts: qcom: enable usb phy by default for ipq8064

[Christian Marangi]

On Wed, Jul 06, 2022 at 03:33:25PM +0200, Konrad Dybcio wrote:
> 
> 
> On 6.07.2022 14:59, Christian Marangi wrote:
> > On Wed, Jul 06, 2022 at 03:04:44PM +0200, Konrad Dybcio wrote:
> >>
> >>
> >> On 5.07.2022 15:39, Christian Marangi wrote:
> >>> Enable usb phy by default. When the usb phy were pushed, half of them
> >>> were flagged as disabled by mistake. Fix this to correctly init dwc3
> >>> node on any ipq8064 based SoC.
> >> Are you sure they are used on *all* devices? If not, you will
> >> lose power by enabling unused hw..
> >>
> >> Konrad
> > 
> > Well there could be device that have no usb at all... so honestly
> > enabling one of them is also wrong. Should I disable the other and
> > enable it for the upstream device?
> We generally disable everything that's not obviously being used by the
> SoC internally or is required for components like these for function
> (think clock controllers etc) and enable peripherals on a per-device
> basis.
> 

Will change this to disable the other usb and push another commit to
enable usb on the upstream device.

> Konrad
> > 
> > Also it's all handled by dummy vbus so i think we can ignore the losing
> > power thing. (this thing is old)
> > 
> >>>
> >>> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> >>> Tested-by: Jonathan McDowell <noodles@earth.li>
> >>> ---
> >>>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 4 ----
> >>>  1 file changed, 4 deletions(-)
> >>>
> >>> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> >>> index b2faa4a067e9..9c32c637ea46 100644
> >>> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> >>> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> >>> @@ -1177,8 +1177,6 @@ hs_phy_0: phy@100f8800 {
> >>>  			clocks = <&gcc USB30_0_UTMI_CLK>;
> >>>  			clock-names = "ref";
> >>>  			#phy-cells = <0>;
> >>> -
> >>> -			status = "disabled";
> >>>  		};
> >>>  
> >>>  		ss_phy_0: phy@100f8830 {
> >>> @@ -1187,8 +1185,6 @@ ss_phy_0: phy@100f8830 {
> >>>  			clocks = <&gcc USB30_0_MASTER_CLK>;
> >>>  			clock-names = "ref";
> >>>  			#phy-cells = <0>;
> >>> -
> >>> -			status = "disabled";
> >>>  		};
> >>>  
> >>>  		usb3_0: usb3@100f8800 {
> > 

-- 
	Ansuel

Re: [PATCH 04/13] ARM: dts: qcom: disable smb208 regulators for ipq8064-rb3011

[Christian Marangi]

On Wed, Jul 06, 2022 at 03:37:36PM +0200, Konrad Dybcio wrote:
> 
> 
> On 6.07.2022 15:19, Christian Marangi wrote:
> > On Wed, Jul 06, 2022 at 03:31:55PM +0200, Konrad Dybcio wrote:
> >>
> >>
> >> On 6.07.2022 14:56, Christian Marangi wrote:
> >>> On Wed, Jul 06, 2022 at 03:03:32PM +0200, Konrad Dybcio wrote:
> >>>>
> >>>>
> >>>> On 5.07.2022 15:39, Christian Marangi wrote:
> >>>>> Mikrotik RB3011 have a special configuration where the regulators are
> >>>>> not the common smb208 controlled by RPM but they use a TPS563900
> >>>>> controlled via i2c. Disable the smb208 for this specific device.
> >>>> Ok, so that answers my question from the previous email.
> >>>> Please define the SMB208 regulators only in the DTs of
> >>>> boards that actually use it, as it is not a SoC component as
> >>>> far as I can tell.
> >>>>
> >>>> Konrad
> >>>
> >>> This was already discuessed,
> >> Yeah sorry, I didn't notice earlier and started reviewing patches
> >> that were already reviewed by others.
> >>
> > 
> > Np, thanks for the review.
> > 
> >>
> >> rb3011 is the exception, qcom for ipq8064
> >>> recommends to use smb208 but gives the option to implement it in their
> >>> own way. So again we have 28 device with smb208 and 1 device that use
> >>> its own special way...
> >>>
> >>> Wonder if a separate dtsi can be used for this if we really can't put
> >>> smb208 in ipq8064 dtsi?
> >> There's msm8916-pm8916.dtsi. You can follow.
> > 
> > Ok, will put the smb208 definition to a separate dtsi, something like
> > ipq8064-smb208.dtsi? or ipq8064-rpm-smb208.dtsi? Looks also cleaner that
> > way.
> You can create ipq8064-smb208.dtsi that will also contain every ipq8064-plus-smb208-specific
> configuration, such as regulator assignemnts to in-SoC components (like PHYs, SDHCIs etc.).

Just for reference there regulators are used only for cpu voltage, l2
cache and special ubi32 cores that are not supported currently, nothing
more.

>
> Konrad
> > 
> >>
> >> Konrad
> >>
> >> [...]
> > 

-- 
	Ansuel

Re: [PATCH 04/13] ARM: dts: qcom: disable smb208 regulators for ipq8064-rb3011

[Konrad Dybcio]

On 6.07.2022 14:56, Christian Marangi wrote:
> On Wed, Jul 06, 2022 at 03:03:32PM +0200, Konrad Dybcio wrote:
>>
>>
>> On 5.07.2022 15:39, Christian Marangi wrote:
>>> Mikrotik RB3011 have a special configuration where the regulators are
>>> not the common smb208 controlled by RPM but they use a TPS563900
>>> controlled via i2c. Disable the smb208 for this specific device.
>> Ok, so that answers my question from the previous email.
>> Please define the SMB208 regulators only in the DTs of
>> boards that actually use it, as it is not a SoC component as
>> far as I can tell.
>>
>> Konrad
> 
> This was already discuessed,
Yeah sorry, I didn't notice earlier and started reviewing patches
that were already reviewed by others.


rb3011 is the exception, qcom for ipq8064
> recommends to use smb208 but gives the option to implement it in their
> own way. So again we have 28 device with smb208 and 1 device that use
> its own special way...
> 
> Wonder if a separate dtsi can be used for this if we really can't put
> smb208 in ipq8064 dtsi?
There's msm8916-pm8916.dtsi. You can follow.

Konrad

[...]

Re: [PATCH 06/13] ARM: dts: qcom: enable usb phy by default for ipq8064

[Konrad Dybcio]

On 6.07.2022 14:59, Christian Marangi wrote:
> On Wed, Jul 06, 2022 at 03:04:44PM +0200, Konrad Dybcio wrote:
>>
>>
>> On 5.07.2022 15:39, Christian Marangi wrote:
>>> Enable usb phy by default. When the usb phy were pushed, half of them
>>> were flagged as disabled by mistake. Fix this to correctly init dwc3
>>> node on any ipq8064 based SoC.
>> Are you sure they are used on *all* devices? If not, you will
>> lose power by enabling unused hw..
>>
>> Konrad
> 
> Well there could be device that have no usb at all... so honestly
> enabling one of them is also wrong. Should I disable the other and
> enable it for the upstream device?
We generally disable everything that's not obviously being used by the
SoC internally or is required for components like these for function
(think clock controllers etc) and enable peripherals on a per-device
basis.

Konrad
> 
> Also it's all handled by dummy vbus so i think we can ignore the losing
> power thing. (this thing is old)
> 
>>>
>>> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
>>> Tested-by: Jonathan McDowell <noodles@earth.li>
>>> ---
>>>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 4 ----
>>>  1 file changed, 4 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
>>> index b2faa4a067e9..9c32c637ea46 100644
>>> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
>>> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
>>> @@ -1177,8 +1177,6 @@ hs_phy_0: phy@100f8800 {
>>>  			clocks = <&gcc USB30_0_UTMI_CLK>;
>>>  			clock-names = "ref";
>>>  			#phy-cells = <0>;
>>> -
>>> -			status = "disabled";
>>>  		};
>>>  
>>>  		ss_phy_0: phy@100f8830 {
>>> @@ -1187,8 +1185,6 @@ ss_phy_0: phy@100f8830 {
>>>  			clocks = <&gcc USB30_0_MASTER_CLK>;
>>>  			clock-names = "ref";
>>>  			#phy-cells = <0>;
>>> -
>>> -			status = "disabled";
>>>  		};
>>>  
>>>  		usb3_0: usb3@100f8800 {
> 

Re: [PATCH 04/13] ARM: dts: qcom: disable smb208 regulators for ipq8064-rb3011

[Konrad Dybcio]

On 6.07.2022 15:19, Christian Marangi wrote:
> On Wed, Jul 06, 2022 at 03:31:55PM +0200, Konrad Dybcio wrote:
>>
>>
>> On 6.07.2022 14:56, Christian Marangi wrote:
>>> On Wed, Jul 06, 2022 at 03:03:32PM +0200, Konrad Dybcio wrote:
>>>>
>>>>
>>>> On 5.07.2022 15:39, Christian Marangi wrote:
>>>>> Mikrotik RB3011 have a special configuration where the regulators are
>>>>> not the common smb208 controlled by RPM but they use a TPS563900
>>>>> controlled via i2c. Disable the smb208 for this specific device.
>>>> Ok, so that answers my question from the previous email.
>>>> Please define the SMB208 regulators only in the DTs of
>>>> boards that actually use it, as it is not a SoC component as
>>>> far as I can tell.
>>>>
>>>> Konrad
>>>
>>> This was already discuessed,
>> Yeah sorry, I didn't notice earlier and started reviewing patches
>> that were already reviewed by others.
>>
> 
> Np, thanks for the review.
> 
>>
>> rb3011 is the exception, qcom for ipq8064
>>> recommends to use smb208 but gives the option to implement it in their
>>> own way. So again we have 28 device with smb208 and 1 device that use
>>> its own special way...
>>>
>>> Wonder if a separate dtsi can be used for this if we really can't put
>>> smb208 in ipq8064 dtsi?
>> There's msm8916-pm8916.dtsi. You can follow.
> 
> Ok, will put the smb208 definition to a separate dtsi, something like
> ipq8064-smb208.dtsi? or ipq8064-rpm-smb208.dtsi? Looks also cleaner that
> way.
You can create ipq8064-smb208.dtsi that will also contain every ipq8064-plus-smb208-specific
configuration, such as regulator assignemnts to in-SoC components (like PHYs, SDHCIs etc.).

Konrad
> 
>>
>> Konrad
>>
>> [...]
> 

Re: [PATCH 09/13] ARM: dts: qcom: add smem node for ipq8064

[Dmitry Baryshkov]

On Wed, 6 Jul 2022 at 16:11, Konrad Dybcio <konrad.dybcio@somainline.org> wrote:
>
>
>
> On 5.07.2022 15:39, Christian Marangi wrote:
> > Add missing smem node for ipq8064.
> >
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > Tested-by: Jonathan McDowell <noodles@earth.li>
> > ---
> I can't find a downstream kernel for these router SoCs, but
> I wonder if the 8x64 family DTs couldn't be somewhat
> unified? It looks like they share quite some code..

Let's modernize them first, using the other one as an example. We can
merge them afterwards. And don't forget the foster child, msm8960.

>

-- 
With best wishes
Dmitry

Re: [PATCH 03/13] ARM: dts: qcom: add missing rpm regulators and cells for ipq8064

[Krzysztof Kozlowski]

On 06/07/2022 12:09, Christian Marangi wrote:
> On Wed, Jul 06, 2022 at 10:34:16AM +0200, Krzysztof Kozlowski wrote:
>> On 05/07/2022 15:39, Christian Marangi wrote:
>>> Add cells definition for rpm node and add missing regulators for the 4
>>> regulator present on ipq8064. There regulators are controlled by rpm and
>>> to correctly works gsbi4_i2c require to be NEVER disabled or rpm will
>>> reject any regulator change request.
>>>
>>> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
>>> Tested-by: Jonathan McDowell <noodles@earth.li>
>>> ---
>>>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++
>>>  1 file changed, 36 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
>>> index 1b4b72723ead..c0b05d2a2d6d 100644
>>> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
>>> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
>>> @@ -844,10 +844,46 @@ rpm: rpm@108000 {
>>>  			clocks = <&gcc RPM_MSG_RAM_H_CLK>;
>>>  			clock-names = "ram";
>>>  
>>> +			#address-cells = <1>;
>>> +			#size-cells = <0>;
>>
>> Why adding these?
>>
> 
> Fix dt warning, will split and put it in a separate commit.
> 
>>> +
>>>  			rpmcc: clock-controller {
>>>  				compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
>>>  				#clock-cells = <1>;
>>>  			};
>>> +
>>> +			smb208_regulators: regulators {
>>> +				compatible = "qcom,rpm-smb208-regulators";
>>> +				status = "okay";
>>
>> Was the node disabled?
>>
> 
> smb208 is the normal and advised way to handle regulators on this
> platform. Some device may want to not follow that and implement their
> own regulator bypassing rpm so we add a status and on the current device
> present upstream we set it disabled as it does use different regulators
> implementation.

You just added a new node and say we set it as disabled... so the code
is not correct, because you enabled it. So again my question is valid -
was the node already existing and was it disabled?

> 


Best regards,
Krzysztof

Re: [PATCH 08/13] ARM: dts: qcom: fix dtc warning for missing #address-cells for ipq8064

[Krzysztof Kozlowski]

On 06/07/2022 12:12, Christian Marangi wrote:
> On Wed, Jul 06, 2022 at 10:37:47AM +0200, Krzysztof Kozlowski wrote:
>> On 05/07/2022 15:39, Christian Marangi wrote:
>>> Fix dtc warning for missing #address-cells for ipq8064.
>>
>> Paste the applicable part of warning in the commit log.
>>
>>>
>>
>>
>> Best regards,
>> Krzysztof
> 
> Can I squash here the warning from the smb patch?

Do you fix the same stuff in both commits?

Best regards,
Krzysztof

Re: [PATCH 09/13] ARM: dts: qcom: add smem node for ipq8064

[Krzysztof Kozlowski]

On 06/07/2022 12:14, Christian Marangi wrote:
> On Wed, Jul 06, 2022 at 10:39:16AM +0200, Krzysztof Kozlowski wrote:
>> On 05/07/2022 15:39, Christian Marangi wrote:
>>> Add missing smem node for ipq8064.
>>>
>>> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
>>> Tested-by: Jonathan McDowell <noodles@earth.li>
>>> ---
>>>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 18 ++++++++++++++++++
>>>  1 file changed, 18 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
>>> index b5aede3d7ccf..98527a7d885e 100644
>>> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
>>> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
>>> @@ -908,6 +908,11 @@ lcc: clock-controller@28000000 {
>>>  			#reset-cells = <1>;
>>>  		};
>>>  
>>> +		sfpb_mutex_block: syscon@1200600 {
>>> +			compatible = "syscon";
>>
>> syscon alone is not allowed.
>>
> 
> Mh... This is problematic. How this should be handled?

As usual - add specific compatible.

Maybe I was not specific enough, but my commit was under compatible, not
under device node, so it seems obvious. Just in case it is not obvious -
you cannot have "syscon" compatible alone.


Best regards,
Krzysztof