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From: John Garry <john.garry@huawei.com>
To: Mark Brown <broonie@kernel.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	<tudor.ambarus@microchip.com>, <linux-kernel@vger.kernel.org>,
	<chenxiang66@hisilicon.com>, <linuxarm@huawei.com>,
	<linux-spi@vger.kernel.org>, <marek.vasut@gmail.com>,
	<linux-mtd@lists.infradead.org>, <xuejiancheng@hisilicon.com>,
	<fengsheng5@huawei.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	wanghuiqiang <wanghuiqiang@huawei.com>, <liusimin4@huawei.com>
Subject: Re: [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver
Date: Mon, 13 Jan 2020 13:01:06 +0000	[thread overview]
Message-ID: <6dd45da9-9ccf-45f7-ed12-8f1406a0a56b@huawei.com> (raw)
In-Reply-To: <20200113114256.GH3897@sirena.org.uk>

On 13/01/2020 11:42, Mark Brown wrote:
> On Mon, Jan 13, 2020 at 10:09:27AM +0000, John Garry wrote:
>> On 10/01/2020 19:31, Andy Shevchenko wrote:
> 
>>> PRP method is only for vendors to *test* the hardware in ACPI environment.
>>> The proper method is to allocate correct ACPI ID.
> 
>> Yes, that would seem the proper thing to do. So the SPI NOR driver is based
>> on micron m25p80 and compatible string is "jedec,spi-nor", so I don't know
>> who should or would do this registration.
> 

Hi Mark,

> The idiomatic approach appears to be for individual board vendors
> to allocate IDs, you do end up with multiple IDs from multiple
> vendors for the same thing.

So we see sort of approach a lot when vendors integrate 3rd party IP 
into a SoC and then assign some vendor specific ID for that.

But I am not sure how appropriate that same approach would be for some 
3rd party memory part which we're simply wiring up on our board. Maybe 
it is.

> 
>> BTW, Do any of these sensors you mention have any ACPI standardization?
> 
> In general there's not really much standardizaiton for devices,
> the bindings that do exist aren't really centrally documented and
> the Windows standard is just to have the basic device
> registration in the firmware and do all properties based on
> quirking based on DMI information.
> 

OK, so there is always DMI. I hoped to avoid this sort of thing in the 
linux driver :)

Cheers,
John

WARNING: multiple messages have this Message-ID (diff)
From: John Garry <john.garry@huawei.com>
To: Mark Brown <broonie@kernel.org>
Cc: chenxiang66@hisilicon.com, linux-kernel@vger.kernel.org,
	tudor.ambarus@microchip.com, liusimin4@huawei.com,
	linuxarm@huawei.com, linux-spi@vger.kernel.org,
	marek.vasut@gmail.com, linux-mtd@lists.infradead.org,
	xuejiancheng@hisilicon.com,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	wanghuiqiang <wanghuiqiang@huawei.com>,
	fengsheng5@huawei.com
Subject: Re: [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver
Date: Mon, 13 Jan 2020 13:01:06 +0000	[thread overview]
Message-ID: <6dd45da9-9ccf-45f7-ed12-8f1406a0a56b@huawei.com> (raw)
In-Reply-To: <20200113114256.GH3897@sirena.org.uk>

On 13/01/2020 11:42, Mark Brown wrote:
> On Mon, Jan 13, 2020 at 10:09:27AM +0000, John Garry wrote:
>> On 10/01/2020 19:31, Andy Shevchenko wrote:
> 
>>> PRP method is only for vendors to *test* the hardware in ACPI environment.
>>> The proper method is to allocate correct ACPI ID.
> 
>> Yes, that would seem the proper thing to do. So the SPI NOR driver is based
>> on micron m25p80 and compatible string is "jedec,spi-nor", so I don't know
>> who should or would do this registration.
> 

Hi Mark,

> The idiomatic approach appears to be for individual board vendors
> to allocate IDs, you do end up with multiple IDs from multiple
> vendors for the same thing.

So we see sort of approach a lot when vendors integrate 3rd party IP 
into a SoC and then assign some vendor specific ID for that.

But I am not sure how appropriate that same approach would be for some 
3rd party memory part which we're simply wiring up on our board. Maybe 
it is.

> 
>> BTW, Do any of these sensors you mention have any ACPI standardization?
> 
> In general there's not really much standardizaiton for devices,
> the bindings that do exist aren't really centrally documented and
> the Windows standard is just to have the basic device
> registration in the firmware and do all properties based on
> quirking based on DMI information.
> 

OK, so there is always DMI. I hoped to avoid this sort of thing in the 
linux driver :)

Cheers,
John

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

  reply	other threads:[~2020-01-13 13:01 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-09 14:08 [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-09 14:08 ` John Garry
2019-12-09 14:08 ` [PATCH v2 1/3] mtd: spi-nor: hisi-sfc: Try to provide some clarity on which SFC we are John Garry
2019-12-09 14:08   ` John Garry
2020-01-16 11:03   ` Tudor.Ambarus
2020-01-16 11:03     ` Tudor.Ambarus
2019-12-09 14:08 ` [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver John Garry
2019-12-09 14:08   ` John Garry
2020-01-09 15:54   ` John Garry
2020-01-09 15:54     ` John Garry
2020-01-09 21:28     ` Mark Brown
2020-01-09 21:28       ` Mark Brown
2020-01-10 11:55       ` John Garry
2020-01-10 11:55         ` John Garry
2020-01-10 11:55         ` John Garry
2020-01-10 14:07         ` Mark Brown
2020-01-10 14:07           ` Mark Brown
2020-01-10 14:07           ` Mark Brown
2020-01-10 14:58           ` John Garry
2020-01-10 14:58             ` John Garry
2020-01-10 15:12             ` Mark Brown
2020-01-10 15:12               ` Mark Brown
2020-01-10 16:09               ` John Garry
2020-01-10 16:09                 ` John Garry
2020-01-10 19:31             ` Andy Shevchenko
2020-01-10 19:31               ` Andy Shevchenko
2020-01-10 19:31               ` Andy Shevchenko
2020-01-13 10:09               ` John Garry
2020-01-13 10:09                 ` John Garry
2020-01-13 11:42                 ` Mark Brown
2020-01-13 11:42                   ` Mark Brown
2020-01-13 13:01                   ` John Garry [this message]
2020-01-13 13:01                     ` John Garry
2020-01-13 14:06                     ` Mark Brown
2020-01-13 14:06                       ` Mark Brown
2020-01-13 14:17                       ` Andy Shevchenko
2020-01-13 14:17                         ` Andy Shevchenko
2020-01-13 14:17                         ` Andy Shevchenko
2020-01-13 14:27                         ` Mark Brown
2020-01-13 14:27                           ` Mark Brown
2020-01-13 14:27                           ` Mark Brown
2020-01-13 14:34                           ` Andy Shevchenko
2020-01-13 14:34                             ` Andy Shevchenko
2020-01-13 14:34                             ` Andy Shevchenko
2020-01-31 10:08                             ` John Garry
2020-01-31 10:08                               ` John Garry
2020-01-31 11:39                               ` Andy Shevchenko
2020-01-31 11:39                                 ` Andy Shevchenko
2020-01-31 11:39                                 ` Andy Shevchenko
2020-01-31 12:03                                 ` John Garry
2020-01-31 12:03                                   ` John Garry
2020-01-31 12:03                                   ` John Garry
2020-01-31 15:46                                   ` Andy Shevchenko
2020-01-31 15:46                                     ` Andy Shevchenko
2020-01-31 15:46                                     ` Andy Shevchenko
2020-01-31 16:26                                     ` John Garry
2020-01-31 16:26                                       ` John Garry
2020-01-31 16:26                                       ` John Garry
2020-02-01 11:34                                       ` Mark Brown
2020-02-01 11:34                                         ` Mark Brown
2020-02-01 11:32                                     ` Mark Brown
2020-02-01 11:32                                       ` Mark Brown
2020-01-10 19:59   ` Applied "spi: Add HiSilicon v3xx SPI NOR flash controller driver" to the spi tree Mark Brown
2020-01-10 19:59     ` Mark Brown
2020-01-10 19:59     ` Mark Brown
2019-12-09 14:08 ` [PATCH v2 3/3] MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver John Garry
2019-12-09 14:08   ` John Garry
2020-01-10 19:59   ` Applied "MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver" to the spi tree Mark Brown
2020-01-10 19:59     ` Mark Brown
2020-01-10 19:59     ` Mark Brown
2019-12-16 14:52 ` [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-16 14:52   ` John Garry
2019-12-16 14:56   ` Mark Brown
2019-12-16 14:56     ` Mark Brown

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