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From: John Garry <john.garry@huawei.com>
To: Mark Brown <broonie@kernel.org>
Cc: <tudor.ambarus@microchip.com>, <linux-kernel@vger.kernel.org>,
	<chenxiang66@hisilicon.com>, <linuxarm@huawei.com>,
	<linux-spi@vger.kernel.org>, <marek.vasut@gmail.com>,
	<linux-mtd@lists.infradead.org>, <xuejiancheng@hisilicon.com>,
	<fengsheng5@huawei.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	wanghuiqiang <wanghuiqiang@huawei.com>, <liusimin4@huawei.com>
Subject: Re: [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver
Date: Fri, 10 Jan 2020 16:09:39 +0000	[thread overview]
Message-ID: <876fdbb7-1e2f-13a6-ea8b-48b0470136c1@huawei.com> (raw)
In-Reply-To: <20200110151220.GC5889@sirena.org.uk>

On 10/01/2020 15:12, Mark Brown wrote:
> On Fri, Jan 10, 2020 at 02:58:54PM +0000, John Garry wrote:
>> On 10/01/2020 14:07, Mark Brown wrote:
>>> On Fri, Jan 10, 2020 at 11:55:37AM +0000, John Garry wrote: >
> 

Hi Mark,

>>> OK, so that's just reusing the DT binding in which case everything
>>> that's valid for the DT binding should also be valid for ACPI - I
>>> thought that actually worked automatically without you having to do
>>> anything in the code but ICBW.
> 
>> I thought that it would be improper as we could be mixing ACPI methods to
>> describe the serial bus (SPI Serial Bus Connection Resource Descriptor) and
>> also DT properties which could conflict, like CS active high.
> 
> Yes, that's one of the issues with importing bits of DT into ACPI
> unfortunately - you will get conflicts, it's not clear it's a good idea
> to be using PRP0001 for SPI stuff given that there's bus level bindings
> for both ACPI and SPI and they don't line up exactly.

Yeah, I'm not entirely comfortable with this yet.

> 
>> However I do see extra properties than "compatible" being added in DSD for
>> PRP0001:
>> https://patchwork.ozlabs.org/patch/662813/ (see EEPROM part)
> 
>> And if we were to do this, I think that we would need to add some
>> device_property_read_u32("spi-rx-bus-width", ...), etc calls in the SPI FW
>> parsing for ACPI path - I couldn't see that.
> 
> You'd need parsing code, yes.
> 

I'll continue to check the options.

Thanks,
john

WARNING: multiple messages have this Message-ID (diff)
From: John Garry <john.garry@huawei.com>
To: Mark Brown <broonie@kernel.org>
Cc: chenxiang66@hisilicon.com, linux-kernel@vger.kernel.org,
	tudor.ambarus@microchip.com, liusimin4@huawei.com,
	linuxarm@huawei.com, linux-spi@vger.kernel.org,
	marek.vasut@gmail.com, linux-mtd@lists.infradead.org,
	xuejiancheng@hisilicon.com,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	wanghuiqiang <wanghuiqiang@huawei.com>,
	fengsheng5@huawei.com
Subject: Re: [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver
Date: Fri, 10 Jan 2020 16:09:39 +0000	[thread overview]
Message-ID: <876fdbb7-1e2f-13a6-ea8b-48b0470136c1@huawei.com> (raw)
In-Reply-To: <20200110151220.GC5889@sirena.org.uk>

On 10/01/2020 15:12, Mark Brown wrote:
> On Fri, Jan 10, 2020 at 02:58:54PM +0000, John Garry wrote:
>> On 10/01/2020 14:07, Mark Brown wrote:
>>> On Fri, Jan 10, 2020 at 11:55:37AM +0000, John Garry wrote: >
> 

Hi Mark,

>>> OK, so that's just reusing the DT binding in which case everything
>>> that's valid for the DT binding should also be valid for ACPI - I
>>> thought that actually worked automatically without you having to do
>>> anything in the code but ICBW.
> 
>> I thought that it would be improper as we could be mixing ACPI methods to
>> describe the serial bus (SPI Serial Bus Connection Resource Descriptor) and
>> also DT properties which could conflict, like CS active high.
> 
> Yes, that's one of the issues with importing bits of DT into ACPI
> unfortunately - you will get conflicts, it's not clear it's a good idea
> to be using PRP0001 for SPI stuff given that there's bus level bindings
> for both ACPI and SPI and they don't line up exactly.

Yeah, I'm not entirely comfortable with this yet.

> 
>> However I do see extra properties than "compatible" being added in DSD for
>> PRP0001:
>> https://patchwork.ozlabs.org/patch/662813/ (see EEPROM part)
> 
>> And if we were to do this, I think that we would need to add some
>> device_property_read_u32("spi-rx-bus-width", ...), etc calls in the SPI FW
>> parsing for ACPI path - I couldn't see that.
> 
> You'd need parsing code, yes.
> 

I'll continue to check the options.

Thanks,
john

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

  reply	other threads:[~2020-01-10 16:09 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-09 14:08 [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-09 14:08 ` John Garry
2019-12-09 14:08 ` [PATCH v2 1/3] mtd: spi-nor: hisi-sfc: Try to provide some clarity on which SFC we are John Garry
2019-12-09 14:08   ` John Garry
2020-01-16 11:03   ` Tudor.Ambarus
2020-01-16 11:03     ` Tudor.Ambarus
2019-12-09 14:08 ` [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver John Garry
2019-12-09 14:08   ` John Garry
2020-01-09 15:54   ` John Garry
2020-01-09 15:54     ` John Garry
2020-01-09 21:28     ` Mark Brown
2020-01-09 21:28       ` Mark Brown
2020-01-10 11:55       ` John Garry
2020-01-10 11:55         ` John Garry
2020-01-10 11:55         ` John Garry
2020-01-10 14:07         ` Mark Brown
2020-01-10 14:07           ` Mark Brown
2020-01-10 14:07           ` Mark Brown
2020-01-10 14:58           ` John Garry
2020-01-10 14:58             ` John Garry
2020-01-10 15:12             ` Mark Brown
2020-01-10 15:12               ` Mark Brown
2020-01-10 16:09               ` John Garry [this message]
2020-01-10 16:09                 ` John Garry
2020-01-10 19:31             ` Andy Shevchenko
2020-01-10 19:31               ` Andy Shevchenko
2020-01-10 19:31               ` Andy Shevchenko
2020-01-13 10:09               ` John Garry
2020-01-13 10:09                 ` John Garry
2020-01-13 11:42                 ` Mark Brown
2020-01-13 11:42                   ` Mark Brown
2020-01-13 13:01                   ` John Garry
2020-01-13 13:01                     ` John Garry
2020-01-13 14:06                     ` Mark Brown
2020-01-13 14:06                       ` Mark Brown
2020-01-13 14:17                       ` Andy Shevchenko
2020-01-13 14:17                         ` Andy Shevchenko
2020-01-13 14:17                         ` Andy Shevchenko
2020-01-13 14:27                         ` Mark Brown
2020-01-13 14:27                           ` Mark Brown
2020-01-13 14:27                           ` Mark Brown
2020-01-13 14:34                           ` Andy Shevchenko
2020-01-13 14:34                             ` Andy Shevchenko
2020-01-13 14:34                             ` Andy Shevchenko
2020-01-31 10:08                             ` John Garry
2020-01-31 10:08                               ` John Garry
2020-01-31 11:39                               ` Andy Shevchenko
2020-01-31 11:39                                 ` Andy Shevchenko
2020-01-31 11:39                                 ` Andy Shevchenko
2020-01-31 12:03                                 ` John Garry
2020-01-31 12:03                                   ` John Garry
2020-01-31 12:03                                   ` John Garry
2020-01-31 15:46                                   ` Andy Shevchenko
2020-01-31 15:46                                     ` Andy Shevchenko
2020-01-31 15:46                                     ` Andy Shevchenko
2020-01-31 16:26                                     ` John Garry
2020-01-31 16:26                                       ` John Garry
2020-01-31 16:26                                       ` John Garry
2020-02-01 11:34                                       ` Mark Brown
2020-02-01 11:34                                         ` Mark Brown
2020-02-01 11:32                                     ` Mark Brown
2020-02-01 11:32                                       ` Mark Brown
2020-01-10 19:59   ` Applied "spi: Add HiSilicon v3xx SPI NOR flash controller driver" to the spi tree Mark Brown
2020-01-10 19:59     ` Mark Brown
2020-01-10 19:59     ` Mark Brown
2019-12-09 14:08 ` [PATCH v2 3/3] MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver John Garry
2019-12-09 14:08   ` John Garry
2020-01-10 19:59   ` Applied "MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver" to the spi tree Mark Brown
2020-01-10 19:59     ` Mark Brown
2020-01-10 19:59     ` Mark Brown
2019-12-16 14:52 ` [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-16 14:52   ` John Garry
2019-12-16 14:56   ` Mark Brown
2019-12-16 14:56     ` Mark Brown

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