* [PATCH v1] arm64: dts: imx8mm-verdin: update CAN clock to 40MHz
@ 2022-05-12 10:40 ` Andrejs Cainikovs
0 siblings, 0 replies; 12+ messages in thread
From: Andrejs Cainikovs @ 2022-05-12 10:40 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team
Cc: Marcel Ziswiler, Francesco Dolcini, Andrejs Cainikovs,
devicetree, linux-arm-kernel, linux-kernel
Update SPI CAN controller clock to match current hardware design.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
---
arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
index 0d84d29e70f1..d309bc0ab8f6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
@@ -32,10 +32,10 @@ backlight: backlight {
};
/* Fixed clock dedicated to SPI CAN controller */
- clk20m: oscillator {
+ clk40m: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency = <20000000>;
+ clock-frequency = <40000000>;
};
gpio-keys {
@@ -194,7 +194,7 @@ &ecspi3 {
can1: can@0 {
compatible = "microchip,mcp251xfd";
- clocks = <&clk20m>;
+ clocks = <&clk40m>;
interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1_int>;
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v1] arm64: dts: imx8mm-verdin: update CAN clock to 40MHz
2022-05-12 10:40 ` Andrejs Cainikovs
@ 2022-05-12 13:41 ` Marcel Ziswiler
-1 siblings, 0 replies; 12+ messages in thread
From: Marcel Ziswiler @ 2022-05-12 13:41 UTC (permalink / raw)
To: linux-imx, kernel, s.hauer, festevam, Andrejs Cainikovs,
shawnguo, krzysztof.kozlowski+dt, robh+dt
Cc: linux-arm-kernel, devicetree, Francesco Dolcini, linux-kernel
On Thu, 2022-05-12 at 12:40 +0200, Andrejs Cainikovs wrote:
> Update SPI CAN controller clock to match current hardware design.
>
> Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-
> verdin.dtsi
> index 0d84d29e70f1..d309bc0ab8f6 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> @@ -32,10 +32,10 @@ backlight: backlight {
> };
>
> /* Fixed clock dedicated to SPI CAN controller */
> - clk20m: oscillator {
> + clk40m: oscillator {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> - clock-frequency = <20000000>;
> + clock-frequency = <40000000>;
> };
>
> gpio-keys {
> @@ -194,7 +194,7 @@ &ecspi3 {
>
> can1: can@0 {
> compatible = "microchip,mcp251xfd";
> - clocks = <&clk20m>;
> + clocks = <&clk40m>;
> interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_FALLING>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_can1_int>;
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v1] arm64: dts: imx8mm-verdin: update CAN clock to 40MHz
@ 2022-05-12 13:41 ` Marcel Ziswiler
0 siblings, 0 replies; 12+ messages in thread
From: Marcel Ziswiler @ 2022-05-12 13:41 UTC (permalink / raw)
To: linux-imx, kernel, s.hauer, festevam, Andrejs Cainikovs,
shawnguo, krzysztof.kozlowski+dt, robh+dt
Cc: linux-arm-kernel, devicetree, Francesco Dolcini, linux-kernel
On Thu, 2022-05-12 at 12:40 +0200, Andrejs Cainikovs wrote:
> Update SPI CAN controller clock to match current hardware design.
>
> Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-
> verdin.dtsi
> index 0d84d29e70f1..d309bc0ab8f6 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> @@ -32,10 +32,10 @@ backlight: backlight {
> };
>
> /* Fixed clock dedicated to SPI CAN controller */
> - clk20m: oscillator {
> + clk40m: oscillator {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> - clock-frequency = <20000000>;
> + clock-frequency = <40000000>;
> };
>
> gpio-keys {
> @@ -194,7 +194,7 @@ &ecspi3 {
>
> can1: can@0 {
> compatible = "microchip,mcp251xfd";
> - clocks = <&clk20m>;
> + clocks = <&clk40m>;
> interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_FALLING>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_can1_int>;
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v1] arm64: dts: imx8mm-verdin: update CAN clock to 40MHz
2022-05-12 10:40 ` Andrejs Cainikovs
@ 2022-06-21 18:07 ` Francesco Dolcini
-1 siblings, 0 replies; 12+ messages in thread
From: Francesco Dolcini @ 2022-06-21 18:07 UTC (permalink / raw)
To: Shawn Guo
Cc: Rob Herring, Andrejs Cainikovs, Krzysztof Kozlowski,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Marcel Ziswiler, Francesco Dolcini, devicetree,
linux-arm-kernel, linux-kernel
Hello Shawn, just a ping on this.
Francesco
On Thu, May 12, 2022 at 12:40:19PM +0200, Andrejs Cainikovs wrote:
> Update SPI CAN controller clock to match current hardware design.
>
> Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> index 0d84d29e70f1..d309bc0ab8f6 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> @@ -32,10 +32,10 @@ backlight: backlight {
> };
>
> /* Fixed clock dedicated to SPI CAN controller */
> - clk20m: oscillator {
> + clk40m: oscillator {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> - clock-frequency = <20000000>;
> + clock-frequency = <40000000>;
> };
>
> gpio-keys {
> @@ -194,7 +194,7 @@ &ecspi3 {
>
> can1: can@0 {
> compatible = "microchip,mcp251xfd";
> - clocks = <&clk20m>;
> + clocks = <&clk40m>;
> interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_FALLING>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_can1_int>;
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v1] arm64: dts: imx8mm-verdin: update CAN clock to 40MHz
@ 2022-06-21 18:07 ` Francesco Dolcini
0 siblings, 0 replies; 12+ messages in thread
From: Francesco Dolcini @ 2022-06-21 18:07 UTC (permalink / raw)
To: Shawn Guo
Cc: Rob Herring, Andrejs Cainikovs, Krzysztof Kozlowski,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Marcel Ziswiler, Francesco Dolcini, devicetree,
linux-arm-kernel, linux-kernel
Hello Shawn, just a ping on this.
Francesco
On Thu, May 12, 2022 at 12:40:19PM +0200, Andrejs Cainikovs wrote:
> Update SPI CAN controller clock to match current hardware design.
>
> Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> index 0d84d29e70f1..d309bc0ab8f6 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> @@ -32,10 +32,10 @@ backlight: backlight {
> };
>
> /* Fixed clock dedicated to SPI CAN controller */
> - clk20m: oscillator {
> + clk40m: oscillator {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> - clock-frequency = <20000000>;
> + clock-frequency = <40000000>;
> };
>
> gpio-keys {
> @@ -194,7 +194,7 @@ &ecspi3 {
>
> can1: can@0 {
> compatible = "microchip,mcp251xfd";
> - clocks = <&clk20m>;
> + clocks = <&clk40m>;
> interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_FALLING>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_can1_int>;
> --
> 2.34.1
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v1] arm64: dts: imx8mm-verdin: update CAN clock to 40MHz
2022-06-21 18:07 ` Francesco Dolcini
@ 2022-06-21 19:50 ` Marc Kleine-Budde
-1 siblings, 0 replies; 12+ messages in thread
From: Marc Kleine-Budde @ 2022-06-21 19:50 UTC (permalink / raw)
To: Francesco Dolcini
Cc: Shawn Guo, devicetree, Krzysztof Kozlowski, Marcel Ziswiler,
Sascha Hauer, linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Andrejs Cainikovs, Fabio Estevam,
linux-arm-kernel
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On 21.06.2022 20:07:49, Francesco Dolcini wrote:
> Hello Shawn, just a ping on this.
>
> Francesco
>
> On Thu, May 12, 2022 at 12:40:19PM +0200, Andrejs Cainikovs wrote:
> > Update SPI CAN controller clock to match current hardware design.
> >
> > Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> > index 0d84d29e70f1..d309bc0ab8f6 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> > @@ -32,10 +32,10 @@ backlight: backlight {
> > };
> >
> > /* Fixed clock dedicated to SPI CAN controller */
> > - clk20m: oscillator {
> > + clk40m: oscillator {
> > compatible = "fixed-clock";
> > #clock-cells = <0>;
> > - clock-frequency = <20000000>;
> > + clock-frequency = <40000000>;
> > };
> >
> > gpio-keys {
> > @@ -194,7 +194,7 @@ &ecspi3 {
> >
> > can1: can@0 {
> > compatible = "microchip,mcp251xfd";
> > - clocks = <&clk20m>;
> > + clocks = <&clk40m>;
> > interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_FALLING>;
You don't want to use an edge triggered interrupt with the mcp251xfd
chip. You will be losing interrupts, better use IRQ_TYPE_LEVEL_LOW.
regards,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung West/Dortmund | Phone: +49-231-2826-924 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v1] arm64: dts: imx8mm-verdin: update CAN clock to 40MHz
@ 2022-06-21 19:50 ` Marc Kleine-Budde
0 siblings, 0 replies; 12+ messages in thread
From: Marc Kleine-Budde @ 2022-06-21 19:50 UTC (permalink / raw)
To: Francesco Dolcini
Cc: Shawn Guo, devicetree, Krzysztof Kozlowski, Marcel Ziswiler,
Sascha Hauer, linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Andrejs Cainikovs, Fabio Estevam,
linux-arm-kernel
[-- Attachment #1.1: Type: text/plain, Size: 1754 bytes --]
On 21.06.2022 20:07:49, Francesco Dolcini wrote:
> Hello Shawn, just a ping on this.
>
> Francesco
>
> On Thu, May 12, 2022 at 12:40:19PM +0200, Andrejs Cainikovs wrote:
> > Update SPI CAN controller clock to match current hardware design.
> >
> > Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> > index 0d84d29e70f1..d309bc0ab8f6 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> > @@ -32,10 +32,10 @@ backlight: backlight {
> > };
> >
> > /* Fixed clock dedicated to SPI CAN controller */
> > - clk20m: oscillator {
> > + clk40m: oscillator {
> > compatible = "fixed-clock";
> > #clock-cells = <0>;
> > - clock-frequency = <20000000>;
> > + clock-frequency = <40000000>;
> > };
> >
> > gpio-keys {
> > @@ -194,7 +194,7 @@ &ecspi3 {
> >
> > can1: can@0 {
> > compatible = "microchip,mcp251xfd";
> > - clocks = <&clk20m>;
> > + clocks = <&clk40m>;
> > interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_FALLING>;
You don't want to use an edge triggered interrupt with the mcp251xfd
chip. You will be losing interrupts, better use IRQ_TYPE_LEVEL_LOW.
regards,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung West/Dortmund | Phone: +49-231-2826-924 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v1] arm64: dts: imx8mm-verdin: update CAN clock to 40MHz
2022-06-21 19:50 ` Marc Kleine-Budde
@ 2022-06-22 6:38 ` Andrejs Cainikovs
-1 siblings, 0 replies; 12+ messages in thread
From: Andrejs Cainikovs @ 2022-06-22 6:38 UTC (permalink / raw)
To: Marc Kleine-Budde, Francesco Dolcini
Cc: Shawn Guo, devicetree, Krzysztof Kozlowski, Marcel Ziswiler,
Sascha Hauer, linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel
On Tue, 2022-06-21 at 21:50 +0200, Marc Kleine-Budde wrote:
> On 21.06.2022 20:07:49, Francesco Dolcini wrote:
> > Hello Shawn, just a ping on this.
> >
> > Francesco
> >
> > On Thu, May 12, 2022 at 12:40:19PM +0200, Andrejs Cainikovs wrote:
> > > Update SPI CAN controller clock to match current hardware design.
> > >
> > > Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> > > ---
> > > arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 6 +++---
> > > 1 file changed, 3 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> > > b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> > > index 0d84d29e70f1..d309bc0ab8f6 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> > > @@ -32,10 +32,10 @@ backlight: backlight {
> > > };
> > >
> > > /* Fixed clock dedicated to SPI CAN controller */
> > > - clk20m: oscillator {
> > > + clk40m: oscillator {
> > > compatible = "fixed-clock";
> > > #clock-cells = <0>;
> > > - clock-frequency = <20000000>;
> > > + clock-frequency = <40000000>;
> > > };
> > >
> > > gpio-keys {
> > > @@ -194,7 +194,7 @@ &ecspi3 {
> > >
> > > can1: can@0 {
> > > compatible = "microchip,mcp251xfd";
> > > - clocks = <&clk20m>;
> > > + clocks = <&clk40m>;
> > > interrupts-extended = <&gpio1 6
> > > IRQ_TYPE_EDGE_FALLING>;
>
> You don't want to use an edge triggered interrupt with the mcp251xfd
> chip. You will be losing interrupts, better use IRQ_TYPE_LEVEL_LOW.
>
> regards,
> Marc
>
Hi Marc,
This particular change is not about interrupts. But thanks for a hint,
I'll make sure this is addressed.
Best regards,
Andrejs Cainikovs.
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v1] arm64: dts: imx8mm-verdin: update CAN clock to 40MHz
@ 2022-06-22 6:38 ` Andrejs Cainikovs
0 siblings, 0 replies; 12+ messages in thread
From: Andrejs Cainikovs @ 2022-06-22 6:38 UTC (permalink / raw)
To: Marc Kleine-Budde, Francesco Dolcini
Cc: Shawn Guo, devicetree, Krzysztof Kozlowski, Marcel Ziswiler,
Sascha Hauer, linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel
On Tue, 2022-06-21 at 21:50 +0200, Marc Kleine-Budde wrote:
> On 21.06.2022 20:07:49, Francesco Dolcini wrote:
> > Hello Shawn, just a ping on this.
> >
> > Francesco
> >
> > On Thu, May 12, 2022 at 12:40:19PM +0200, Andrejs Cainikovs wrote:
> > > Update SPI CAN controller clock to match current hardware design.
> > >
> > > Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> > > ---
> > > arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 6 +++---
> > > 1 file changed, 3 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> > > b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> > > index 0d84d29e70f1..d309bc0ab8f6 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> > > @@ -32,10 +32,10 @@ backlight: backlight {
> > > };
> > >
> > > /* Fixed clock dedicated to SPI CAN controller */
> > > - clk20m: oscillator {
> > > + clk40m: oscillator {
> > > compatible = "fixed-clock";
> > > #clock-cells = <0>;
> > > - clock-frequency = <20000000>;
> > > + clock-frequency = <40000000>;
> > > };
> > >
> > > gpio-keys {
> > > @@ -194,7 +194,7 @@ &ecspi3 {
> > >
> > > can1: can@0 {
> > > compatible = "microchip,mcp251xfd";
> > > - clocks = <&clk20m>;
> > > + clocks = <&clk40m>;
> > > interrupts-extended = <&gpio1 6
> > > IRQ_TYPE_EDGE_FALLING>;
>
> You don't want to use an edge triggered interrupt with the mcp251xfd
> chip. You will be losing interrupts, better use IRQ_TYPE_LEVEL_LOW.
>
> regards,
> Marc
>
Hi Marc,
This particular change is not about interrupts. But thanks for a hint,
I'll make sure this is addressed.
Best regards,
Andrejs Cainikovs.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v1] arm64: dts: imx8mm-verdin: update CAN clock to 40MHz
2022-06-22 6:38 ` Andrejs Cainikovs
@ 2022-06-22 6:51 ` Marc Kleine-Budde
-1 siblings, 0 replies; 12+ messages in thread
From: Marc Kleine-Budde @ 2022-06-22 6:51 UTC (permalink / raw)
To: Andrejs Cainikovs
Cc: Francesco Dolcini, Shawn Guo, devicetree, Krzysztof Kozlowski,
Marcel Ziswiler, Sascha Hauer, linux-kernel, Rob Herring,
NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam,
linux-arm-kernel
[-- Attachment #1: Type: text/plain, Size: 978 bytes --]
On 22.06.2022 08:38:04, Andrejs Cainikovs wrote:
> > > > can1: can@0 {
> > > > compatible = "microchip,mcp251xfd";
> > > > - clocks = <&clk20m>;
> > > > + clocks = <&clk40m>;
> > > > interrupts-extended = <&gpio1 6
> > > > IRQ_TYPE_EDGE_FALLING>;
> >
> > You don't want to use an edge triggered interrupt with the mcp251xfd
> > chip. You will be losing interrupts, better use IRQ_TYPE_LEVEL_LOW.
>
> This particular change is not about interrupts.
Sure, I just noticed it.
> But thanks for a hint, I'll make sure this is addressed.
Thanks,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung West/Dortmund | Phone: +49-231-2826-924 |
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^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v1] arm64: dts: imx8mm-verdin: update CAN clock to 40MHz
@ 2022-06-22 6:51 ` Marc Kleine-Budde
0 siblings, 0 replies; 12+ messages in thread
From: Marc Kleine-Budde @ 2022-06-22 6:51 UTC (permalink / raw)
To: Andrejs Cainikovs
Cc: Francesco Dolcini, Shawn Guo, devicetree, Krzysztof Kozlowski,
Marcel Ziswiler, Sascha Hauer, linux-kernel, Rob Herring,
NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam,
linux-arm-kernel
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On 22.06.2022 08:38:04, Andrejs Cainikovs wrote:
> > > > can1: can@0 {
> > > > compatible = "microchip,mcp251xfd";
> > > > - clocks = <&clk20m>;
> > > > + clocks = <&clk40m>;
> > > > interrupts-extended = <&gpio1 6
> > > > IRQ_TYPE_EDGE_FALLING>;
> >
> > You don't want to use an edge triggered interrupt with the mcp251xfd
> > chip. You will be losing interrupts, better use IRQ_TYPE_LEVEL_LOW.
>
> This particular change is not about interrupts.
Sure, I just noticed it.
> But thanks for a hint, I'll make sure this is addressed.
Thanks,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung West/Dortmund | Phone: +49-231-2826-924 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 12+ messages in thread