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From: Vidya Sagar <vidyas@nvidia.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com,
	thierry.reding@gmail.com, jonathanh@nvidia.com, kishon@ti.com,
	catalin.marinas@arm.com, will.deacon@arm.com,
	jingoohan1@gmail.com, gustavo.pimentel@synopsys.com,
	digetx@gmail.com, mperttunen@nvidia.com,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, kthota@nvidia.com,
	mmaddireddy@nvidia.com, sagar.tv@gmail.com
Subject: Re: [PATCH V13 08/12] dt-bindings: Add PCIe supports-clkreq property
Date: Wed, 10 Jul 2019 22:44:20 +0530	[thread overview]
Message-ID: <95103fa2-9181-247e-3fd5-1b0bd95e8bb9@nvidia.com> (raw)
In-Reply-To: <20190710152856.GB8781@e121166-lin.cambridge.arm.com>

On 7/10/2019 8:58 PM, Lorenzo Pieralisi wrote:
> On Wed, Jul 10, 2019 at 11:52:08AM +0530, Vidya Sagar wrote:
>> Some host controllers need to know the existence of clkreq signal routing to
>> downstream devices to be able to advertise low power features like ASPM L1
>> substates. Without clkreq signal routing being present, enabling ASPM L1 sub
>> states might lead to downstream devices falling off the bus. Hence a new device
> 
> You mean "being disconnected from the bus" right ? I will update it.
Yes. I meant the same.

> 
> Lorenzo
> 
>> tree property 'supports-clkreq' is added to make such host controllers
>> aware of clkreq signal routing to downstream devices.
>>
>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
>> Reviewed-by: Rob Herring <robh@kernel.org>
>> Reviewed-by: Thierry Reding <treding@nvidia.com>
>> ---
>> V13:
>> * None
>>
>> V12:
>> * Rebased on top of linux-next top of the tree
>>
>> V11:
>> * None
>>
>> V10:
>> * None
>>
>> V9:
>> * None
>>
>> V8:
>> * None
>>
>> V7:
>> * None
>>
>> V6:
>> * s/Documentation\/devicetree/dt-bindings/ in the subject
>>
>> V5:
>> * None
>>
>> V4:
>> * Rebased on top of linux-next top of the tree
>>
>> V3:
>> * None
>>
>> V2:
>> * This is a new patch in v2 series
>>
>>   Documentation/devicetree/bindings/pci/pci.txt | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt
>> index 2a5d91024059..29bcbd88f457 100644
>> --- a/Documentation/devicetree/bindings/pci/pci.txt
>> +++ b/Documentation/devicetree/bindings/pci/pci.txt
>> @@ -27,6 +27,11 @@ driver implementation may support the following properties:
>>   - reset-gpios:
>>      If present this property specifies PERST# GPIO. Host drivers can parse the
>>      GPIO and apply fundamental reset to endpoints.
>> +- supports-clkreq:
>> +   If present this property specifies that CLKREQ signal routing exists from
>> +   root port to downstream device and host bridge drivers can do programming
>> +   which depends on CLKREQ signal existence. For example, programming root port
>> +   not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal.
>>   
>>   PCI-PCI Bridge properties
>>   -------------------------
>> -- 
>> 2.17.1
>>

WARNING: multiple messages have this Message-ID (diff)
From: Vidya Sagar <vidyas@nvidia.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: <bhelgaas@google.com>, <robh+dt@kernel.org>,
	<mark.rutland@arm.com>, <thierry.reding@gmail.com>,
	<jonathanh@nvidia.com>, <kishon@ti.com>,
	<catalin.marinas@arm.com>, <will.deacon@arm.com>,
	<jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>,
	<digetx@gmail.com>, <mperttunen@nvidia.com>,
	<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <kthota@nvidia.com>,
	<mmaddireddy@nvidia.com>, <sagar.tv@gmail.com>
Subject: Re: [PATCH V13 08/12] dt-bindings: Add PCIe supports-clkreq property
Date: Wed, 10 Jul 2019 22:44:20 +0530	[thread overview]
Message-ID: <95103fa2-9181-247e-3fd5-1b0bd95e8bb9@nvidia.com> (raw)
In-Reply-To: <20190710152856.GB8781@e121166-lin.cambridge.arm.com>

On 7/10/2019 8:58 PM, Lorenzo Pieralisi wrote:
> On Wed, Jul 10, 2019 at 11:52:08AM +0530, Vidya Sagar wrote:
>> Some host controllers need to know the existence of clkreq signal routing to
>> downstream devices to be able to advertise low power features like ASPM L1
>> substates. Without clkreq signal routing being present, enabling ASPM L1 sub
>> states might lead to downstream devices falling off the bus. Hence a new device
> 
> You mean "being disconnected from the bus" right ? I will update it.
Yes. I meant the same.

> 
> Lorenzo
> 
>> tree property 'supports-clkreq' is added to make such host controllers
>> aware of clkreq signal routing to downstream devices.
>>
>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
>> Reviewed-by: Rob Herring <robh@kernel.org>
>> Reviewed-by: Thierry Reding <treding@nvidia.com>
>> ---
>> V13:
>> * None
>>
>> V12:
>> * Rebased on top of linux-next top of the tree
>>
>> V11:
>> * None
>>
>> V10:
>> * None
>>
>> V9:
>> * None
>>
>> V8:
>> * None
>>
>> V7:
>> * None
>>
>> V6:
>> * s/Documentation\/devicetree/dt-bindings/ in the subject
>>
>> V5:
>> * None
>>
>> V4:
>> * Rebased on top of linux-next top of the tree
>>
>> V3:
>> * None
>>
>> V2:
>> * This is a new patch in v2 series
>>
>>   Documentation/devicetree/bindings/pci/pci.txt | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt
>> index 2a5d91024059..29bcbd88f457 100644
>> --- a/Documentation/devicetree/bindings/pci/pci.txt
>> +++ b/Documentation/devicetree/bindings/pci/pci.txt
>> @@ -27,6 +27,11 @@ driver implementation may support the following properties:
>>   - reset-gpios:
>>      If present this property specifies PERST# GPIO. Host drivers can parse the
>>      GPIO and apply fundamental reset to endpoints.
>> +- supports-clkreq:
>> +   If present this property specifies that CLKREQ signal routing exists from
>> +   root port to downstream device and host bridge drivers can do programming
>> +   which depends on CLKREQ signal existence. For example, programming root port
>> +   not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal.
>>   
>>   PCI-PCI Bridge properties
>>   -------------------------
>> -- 
>> 2.17.1
>>


WARNING: multiple messages have this Message-ID (diff)
From: Vidya Sagar <vidyas@nvidia.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	mperttunen@nvidia.com, mmaddireddy@nvidia.com,
	linux-pci@vger.kernel.org, catalin.marinas@arm.com,
	will.deacon@arm.com, linux-kernel@vger.kernel.org,
	kthota@nvidia.com, kishon@ti.com, linux-tegra@vger.kernel.org,
	robh+dt@kernel.org, thierry.reding@gmail.com,
	gustavo.pimentel@synopsys.com, jingoohan1@gmail.com,
	bhelgaas@google.com, digetx@gmail.com, jonathanh@nvidia.com,
	linux-arm-kernel@lists.infradead.org, sagar.tv@gmail.com
Subject: Re: [PATCH V13 08/12] dt-bindings: Add PCIe supports-clkreq property
Date: Wed, 10 Jul 2019 22:44:20 +0530	[thread overview]
Message-ID: <95103fa2-9181-247e-3fd5-1b0bd95e8bb9@nvidia.com> (raw)
In-Reply-To: <20190710152856.GB8781@e121166-lin.cambridge.arm.com>

On 7/10/2019 8:58 PM, Lorenzo Pieralisi wrote:
> On Wed, Jul 10, 2019 at 11:52:08AM +0530, Vidya Sagar wrote:
>> Some host controllers need to know the existence of clkreq signal routing to
>> downstream devices to be able to advertise low power features like ASPM L1
>> substates. Without clkreq signal routing being present, enabling ASPM L1 sub
>> states might lead to downstream devices falling off the bus. Hence a new device
> 
> You mean "being disconnected from the bus" right ? I will update it.
Yes. I meant the same.

> 
> Lorenzo
> 
>> tree property 'supports-clkreq' is added to make such host controllers
>> aware of clkreq signal routing to downstream devices.
>>
>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
>> Reviewed-by: Rob Herring <robh@kernel.org>
>> Reviewed-by: Thierry Reding <treding@nvidia.com>
>> ---
>> V13:
>> * None
>>
>> V12:
>> * Rebased on top of linux-next top of the tree
>>
>> V11:
>> * None
>>
>> V10:
>> * None
>>
>> V9:
>> * None
>>
>> V8:
>> * None
>>
>> V7:
>> * None
>>
>> V6:
>> * s/Documentation\/devicetree/dt-bindings/ in the subject
>>
>> V5:
>> * None
>>
>> V4:
>> * Rebased on top of linux-next top of the tree
>>
>> V3:
>> * None
>>
>> V2:
>> * This is a new patch in v2 series
>>
>>   Documentation/devicetree/bindings/pci/pci.txt | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt
>> index 2a5d91024059..29bcbd88f457 100644
>> --- a/Documentation/devicetree/bindings/pci/pci.txt
>> +++ b/Documentation/devicetree/bindings/pci/pci.txt
>> @@ -27,6 +27,11 @@ driver implementation may support the following properties:
>>   - reset-gpios:
>>      If present this property specifies PERST# GPIO. Host drivers can parse the
>>      GPIO and apply fundamental reset to endpoints.
>> +- supports-clkreq:
>> +   If present this property specifies that CLKREQ signal routing exists from
>> +   root port to downstream device and host bridge drivers can do programming
>> +   which depends on CLKREQ signal existence. For example, programming root port
>> +   not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal.
>>   
>>   PCI-PCI Bridge properties
>>   -------------------------
>> -- 
>> 2.17.1
>>


_______________________________________________
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  reply	other threads:[~2019-07-10 17:14 UTC|newest]

Thread overview: 90+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-10  6:22 [PATCH V13 00/12] PCI: tegra: Add Tegra194 PCIe support Vidya Sagar
2019-07-10  6:22 ` Vidya Sagar
2019-07-10  6:22 ` Vidya Sagar
2019-07-10  6:22 ` [PATCH V13 01/12] PCI: Add #defines for some of PCIe spec r4.0 features Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10 20:14   ` Bjorn Helgaas
2019-07-10 20:14     ` Bjorn Helgaas
2019-07-10  6:22 ` [PATCH V13 02/12] PCI: Disable MSI for Tegra root ports Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22 ` [PATCH V13 03/12] PCI: dwc: Perform dbi regs write lock towards the end Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22 ` [PATCH V13 04/12] PCI: dwc: Move config space capability search API Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22 ` [PATCH V13 05/12] PCI: dwc: Add ext " Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10 10:37   ` Lorenzo Pieralisi
2019-07-10 10:37     ` Lorenzo Pieralisi
2019-07-10 11:27     ` Vidya Sagar
2019-07-10 11:27       ` Vidya Sagar
2019-07-10 11:27       ` Vidya Sagar
2019-07-10 14:19       ` Lorenzo Pieralisi
2019-07-10 14:19         ` Lorenzo Pieralisi
2019-07-10  6:22 ` [PATCH V13 06/12] dt-bindings: PCI: designware: Add binding for CDM register check Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22 ` [PATCH V13 07/12] PCI: dwc: Add support to enable " Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22 ` [PATCH V13 08/12] dt-bindings: Add PCIe supports-clkreq property Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10 15:28   ` Lorenzo Pieralisi
2019-07-10 15:28     ` Lorenzo Pieralisi
2019-07-10 17:14     ` Vidya Sagar [this message]
2019-07-10 17:14       ` Vidya Sagar
2019-07-10 17:14       ` Vidya Sagar
2019-07-10  6:22 ` [PATCH V13 09/12] dt-bindings: PCI: tegra: Add device tree support for Tegra194 Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22 ` [PATCH V13 10/12] dt-bindings: PHY: P2U: Add Tegra194 P2U block Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22 ` [PATCH V13 11/12] phy: tegra: Add PCIe PIPE2UPHY support Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22 ` [PATCH V13 12/12] PCI: tegra: Add Tegra194 PCIe support Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10  6:22   ` Vidya Sagar
2019-07-10 17:02   ` Lorenzo Pieralisi
2019-07-10 17:02     ` Lorenzo Pieralisi
2019-07-10 17:26     ` Vidya Sagar
2019-07-10 17:26       ` Vidya Sagar
2019-07-10 17:26       ` Vidya Sagar
2019-07-11 12:54   ` Lorenzo Pieralisi
2019-07-11 12:54     ` Lorenzo Pieralisi
2019-07-12 15:32     ` Vidya Sagar
2019-07-12 15:32       ` Vidya Sagar
2019-07-12 15:32       ` Vidya Sagar
2019-07-12 16:07       ` Lorenzo Pieralisi
2019-07-12 16:07         ` Lorenzo Pieralisi
2019-07-13  7:04         ` Vidya Sagar
2019-07-13  7:04           ` Vidya Sagar
2019-07-13  7:04           ` Vidya Sagar
2019-07-16 11:22           ` Lorenzo Pieralisi
2019-07-16 11:22             ` Lorenzo Pieralisi
2019-07-16 19:00             ` Bjorn Helgaas
2019-07-16 19:00               ` Bjorn Helgaas
2019-07-23 14:28               ` Vidya Sagar
2019-07-23 14:28                 ` Vidya Sagar
2019-07-23 14:28                 ` Vidya Sagar
2019-07-23 14:44             ` Vidya Sagar
2019-07-23 14:44               ` Vidya Sagar
2019-07-23 14:44               ` Vidya Sagar
2019-07-30 15:49               ` Lorenzo Pieralisi
2019-07-30 15:49                 ` Lorenzo Pieralisi
2019-08-02 12:06                 ` Vidya Sagar
2019-08-02 12:06                   ` Vidya Sagar
2019-08-02 12:06                   ` Vidya Sagar
2019-08-05 14:01                   ` Lorenzo Pieralisi
2019-08-05 14:01                     ` Lorenzo Pieralisi
2019-08-05 16:54                     ` Vidya Sagar
2019-08-05 16:54                       ` Vidya Sagar
2019-08-05 16:54                       ` Vidya Sagar
2019-08-06 14:51                       ` Lorenzo Pieralisi
2019-08-06 14:51                         ` Lorenzo Pieralisi

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