From: "Christian König" <christian.koenig@amd.com> To: Pekka Paalanen <ppaalanen@gmail.com> Cc: Daniel Stone <daniel@fooishbar.org>, Nicolas Dufresne <nicolas@ndufresne.ca>, Daniel Vetter <daniel@ffwll.ch>, "Sharma, Shashank" <Shashank.Sharma@amd.com>, lkml <linux-kernel@vger.kernel.org>, dri-devel <dri-devel@lists.freedesktop.org>, linaro-mm-sig@lists.linaro.org, Sumit Semwal <sumit.semwal@linaro.org>, linux-media <linux-media@vger.kernel.org> Subject: Re: DMA-buf and uncached system memory Date: Thu, 23 Jun 2022 09:26:15 +0200 [thread overview] Message-ID: <954d0a9b-29ef-52ef-f6ca-22d7e6aa3f4d@amd.com> (raw) In-Reply-To: <20220623101326.18beeab3@eldfell> Am 23.06.22 um 09:13 schrieb Pekka Paalanen: > On Thu, 23 Jun 2022 08:59:41 +0200 > Christian König <christian.koenig@amd.com> wrote: > >> The exporter isn't doing anything wrong here. DMA-buf are supposed to be >> CPU cached and can also be cache hot. > Hi, > > what is that statement based on? On the design documentation of DMA-buf and the actual driver implementations. Coherency and snooping of the CPU cache is mandatory for devices and root complexes in the PCI specification. Incoherent access is just an extension. We inherited that by basing DMA-buf on the Linux kernel DMA-API which in turn is largely based on the PCI specification. > Were the (mandatory for CPU access) cpu_access_begin/end functions & > ioctls not supposed to ensure that CPU cache is up-to-date / CPU cache > is fully flushed out? No, those functions are to inform the exporter that the importer has started and finished accessing the buffer using the CPU. There is no signaling in the other direction. In other words the exporter doesn't inform the importer about CPU accesses because it is the owner of the buffer. It's the responsibility of the importer to make sure that it can actually access the data in the buffer. If it can't guarantee that the importer shouldn't import the buffer in the first place. Regards, Christian. > > > Thanks, > pq
WARNING: multiple messages have this Message-ID (diff)
From: "Christian König" <christian.koenig@amd.com> To: Pekka Paalanen <ppaalanen@gmail.com> Cc: "Sharma, Shashank" <Shashank.Sharma@amd.com>, lkml <linux-kernel@vger.kernel.org>, dri-devel <dri-devel@lists.freedesktop.org>, Nicolas Dufresne <nicolas@ndufresne.ca>, linaro-mm-sig@lists.linaro.org, Sumit Semwal <sumit.semwal@linaro.org>, linux-media <linux-media@vger.kernel.org> Subject: Re: DMA-buf and uncached system memory Date: Thu, 23 Jun 2022 09:26:15 +0200 [thread overview] Message-ID: <954d0a9b-29ef-52ef-f6ca-22d7e6aa3f4d@amd.com> (raw) In-Reply-To: <20220623101326.18beeab3@eldfell> Am 23.06.22 um 09:13 schrieb Pekka Paalanen: > On Thu, 23 Jun 2022 08:59:41 +0200 > Christian König <christian.koenig@amd.com> wrote: > >> The exporter isn't doing anything wrong here. DMA-buf are supposed to be >> CPU cached and can also be cache hot. > Hi, > > what is that statement based on? On the design documentation of DMA-buf and the actual driver implementations. Coherency and snooping of the CPU cache is mandatory for devices and root complexes in the PCI specification. Incoherent access is just an extension. We inherited that by basing DMA-buf on the Linux kernel DMA-API which in turn is largely based on the PCI specification. > Were the (mandatory for CPU access) cpu_access_begin/end functions & > ioctls not supposed to ensure that CPU cache is up-to-date / CPU cache > is fully flushed out? No, those functions are to inform the exporter that the importer has started and finished accessing the buffer using the CPU. There is no signaling in the other direction. In other words the exporter doesn't inform the importer about CPU accesses because it is the owner of the buffer. It's the responsibility of the importer to make sure that it can actually access the data in the buffer. If it can't guarantee that the importer shouldn't import the buffer in the first place. Regards, Christian. > > > Thanks, > pq
next prev parent reply other threads:[~2022-06-23 7:26 UTC|newest] Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-02-15 8:58 DMA-buf and uncached system memory Christian König 2021-02-15 8:58 ` Christian König 2021-02-15 9:06 ` Simon Ser 2021-02-15 9:06 ` Simon Ser 2021-02-15 9:34 ` Christian König 2021-02-15 9:34 ` Christian König 2021-02-15 11:53 ` Lucas Stach 2021-02-15 11:53 ` Lucas Stach 2021-02-15 12:04 ` Christian König 2021-02-15 12:04 ` Christian König 2021-02-15 12:16 ` Lucas Stach 2021-02-15 12:16 ` Lucas Stach 2021-02-15 12:25 ` Christian König 2021-02-15 12:25 ` Christian König 2021-02-15 14:41 ` David Laight 2021-02-15 14:41 ` David Laight 2021-02-15 14:54 ` [Linaro-mm-sig] " Christian König 2021-02-15 14:54 ` Christian König 2021-02-15 9:49 ` Thomas Zimmermann 2021-02-15 9:49 ` Thomas Zimmermann 2021-02-15 12:00 ` Thomas Zimmermann 2021-02-15 12:00 ` Thomas Zimmermann 2021-02-15 12:10 ` Christian König 2021-02-15 12:10 ` Christian König 2021-02-15 20:46 ` Nicolas Dufresne 2021-02-15 20:46 ` Nicolas Dufresne 2021-02-15 20:39 ` Nicolas Dufresne 2021-02-15 20:39 ` Nicolas Dufresne 2022-06-21 10:17 ` Andy.Hsieh 2022-06-21 10:34 ` Christian König 2022-06-21 15:42 ` Nicolas Dufresne 2022-06-21 15:42 ` Nicolas Dufresne 2022-06-22 9:05 ` [Linaro-mm-sig] " Christian König 2022-06-22 9:05 ` Christian König 2021-02-16 9:25 ` Daniel Vetter 2021-02-16 9:25 ` Daniel Vetter 2022-06-22 19:39 ` Nicolas Dufresne 2022-06-22 19:39 ` Nicolas Dufresne 2022-06-22 23:34 ` Daniel Stone 2022-06-22 23:34 ` Daniel Stone 2022-06-23 6:59 ` Christian König 2022-06-23 6:59 ` Christian König 2022-06-23 7:13 ` Pekka Paalanen 2022-06-23 7:13 ` Pekka Paalanen 2022-06-23 7:26 ` Christian König [this message] 2022-06-23 7:26 ` Christian König 2022-06-23 8:04 ` Lucas Stach 2022-06-23 8:14 ` Christian König 2022-06-23 8:58 ` Lucas Stach 2022-06-23 9:09 ` Christian König 2022-06-23 9:33 ` Lucas Stach 2022-06-23 9:46 ` Christian König 2022-06-23 10:13 ` Lucas Stach 2022-06-23 11:10 ` Christian König 2022-06-23 11:27 ` Daniel Stone 2022-06-23 11:27 ` Daniel Stone 2022-06-23 11:32 ` Christian König 2022-06-23 11:32 ` Christian König 2022-06-24 22:02 ` [Linaro-mm-sig] " Daniel Vetter 2022-06-24 22:02 ` Daniel Vetter 2022-07-04 13:48 ` Christian König 2022-08-09 14:46 ` Daniel Vetter 2022-08-09 14:46 ` Daniel Vetter 2022-08-10 5:55 ` Christian König 2022-06-23 11:29 ` Lucas Stach 2022-06-23 11:54 ` Christian König 2022-06-23 12:14 ` Lucas Stach 2022-06-23 12:52 ` Christian König 2022-06-23 15:26 ` Lucas Stach 2022-06-24 6:54 ` Christian König 2022-06-24 8:10 ` Lucas Stach 2022-06-27 13:54 ` Nicolas Dufresne 2022-06-27 14:06 ` Lucas Stach 2022-06-27 14:30 ` Nicolas Dufresne 2022-06-27 13:51 ` Nicolas Dufresne 2022-06-23 8:13 ` Thomas Zimmermann 2022-06-23 8:26 ` Christian König 2022-06-23 8:42 ` Thomas Zimmermann 2022-08-09 15:01 ` Rob Clark 2022-08-09 15:01 ` Rob Clark
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