From: Anup Patel <anup@brainfault.org> To: Atish Patra <atishp@rivosinc.com> Cc: linux-kernel@vger.kernel.org, Andrew Jones <ajones@ventanamicro.com>, Atish Patra <atishp@atishpatra.org>, Guo Ren <guoren@kernel.org>, Heiko Stuebner <heiko@sntech.de>, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland <mark.rutland@arm.com>, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Sergey Matyukevich <sergey.matyukevich@syntacore.com>, Will Deacon <will@kernel.org> Subject: Re: [PATCH v3 09/14] RISC-V: KVM: Make PMU functionality depend on Sscofpmf Date: Sun, 29 Jan 2023 18:05:55 +0530 [thread overview] Message-ID: <CAAhSdy086ftqg_WXoAJJuXF0WFRpdiM5ipkOG1=XodDa7cZAPg@mail.gmail.com> (raw) In-Reply-To: <20230127182558.2416400-10-atishp@rivosinc.com> On Fri, Jan 27, 2023 at 11:56 PM Atish Patra <atishp@rivosinc.com> wrote: > > The privilege mode filtering feature must be available in the host so > that the host can inhibit the counters while the execution is in HS mode. > Otherwise, the guests may have access to critical guest information. > > Signed-off-by: Atish Patra <atishp@rivosinc.com> Looks good to me. Reviewed-by: Anup Patel <anup@brainfault.org> Regards, Anup > --- > arch/riscv/kvm/vcpu_pmu.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/riscv/kvm/vcpu_pmu.c b/arch/riscv/kvm/vcpu_pmu.c > index d3fd551..7713927 100644 > --- a/arch/riscv/kvm/vcpu_pmu.c > +++ b/arch/riscv/kvm/vcpu_pmu.c > @@ -79,6 +79,14 @@ int kvm_riscv_vcpu_pmu_init(struct kvm_vcpu *vcpu) > struct kvm_pmu *kvpmu = vcpu_to_pmu(vcpu); > struct kvm_pmc *pmc; > > + /* > + * PMU functionality should be only available to guests if privilege mode > + * filtering is available in the host. Otherwise, guest will always count > + * events while the execution is in hypervisor mode. > + */ > + if (!riscv_isa_extension_available(NULL, SSCOFPMF)) > + return 0; > + > ret = riscv_pmu_get_hpm_info(&hpm_width, &num_hw_ctrs); > if (ret < 0) > return ret; > -- > 2.25.1 >
WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <anup@brainfault.org> To: Atish Patra <atishp@rivosinc.com> Cc: linux-kernel@vger.kernel.org, Andrew Jones <ajones@ventanamicro.com>, Atish Patra <atishp@atishpatra.org>, Guo Ren <guoren@kernel.org>, Heiko Stuebner <heiko@sntech.de>, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland <mark.rutland@arm.com>, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Sergey Matyukevich <sergey.matyukevich@syntacore.com>, Will Deacon <will@kernel.org> Subject: Re: [PATCH v3 09/14] RISC-V: KVM: Make PMU functionality depend on Sscofpmf Date: Sun, 29 Jan 2023 18:05:55 +0530 [thread overview] Message-ID: <CAAhSdy086ftqg_WXoAJJuXF0WFRpdiM5ipkOG1=XodDa7cZAPg@mail.gmail.com> (raw) In-Reply-To: <20230127182558.2416400-10-atishp@rivosinc.com> On Fri, Jan 27, 2023 at 11:56 PM Atish Patra <atishp@rivosinc.com> wrote: > > The privilege mode filtering feature must be available in the host so > that the host can inhibit the counters while the execution is in HS mode. > Otherwise, the guests may have access to critical guest information. > > Signed-off-by: Atish Patra <atishp@rivosinc.com> Looks good to me. Reviewed-by: Anup Patel <anup@brainfault.org> Regards, Anup > --- > arch/riscv/kvm/vcpu_pmu.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/riscv/kvm/vcpu_pmu.c b/arch/riscv/kvm/vcpu_pmu.c > index d3fd551..7713927 100644 > --- a/arch/riscv/kvm/vcpu_pmu.c > +++ b/arch/riscv/kvm/vcpu_pmu.c > @@ -79,6 +79,14 @@ int kvm_riscv_vcpu_pmu_init(struct kvm_vcpu *vcpu) > struct kvm_pmu *kvpmu = vcpu_to_pmu(vcpu); > struct kvm_pmc *pmc; > > + /* > + * PMU functionality should be only available to guests if privilege mode > + * filtering is available in the host. Otherwise, guest will always count > + * events while the execution is in hypervisor mode. > + */ > + if (!riscv_isa_extension_available(NULL, SSCOFPMF)) > + return 0; > + > ret = riscv_pmu_get_hpm_info(&hpm_width, &num_hw_ctrs); > if (ret < 0) > return ret; > -- > 2.25.1 > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-01-29 12:36 UTC|newest] Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-27 18:25 [PATCH v3 00/14] KVM perf support Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-27 18:25 ` [PATCH v3 01/14] perf: RISC-V: Define helper functions expose hpm counter width and count Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-28 14:44 ` Anup Patel 2023-01-28 14:44 ` Anup Patel 2023-01-27 18:25 ` [PATCH v3 02/14] perf: RISC-V: Improve privilege mode filtering for perf Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-28 14:47 ` Anup Patel 2023-01-28 14:47 ` Anup Patel 2023-01-27 18:25 ` [PATCH v3 03/14] RISC-V: Improve SBI PMU extension related definitions Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-27 22:53 ` Conor Dooley 2023-01-27 22:53 ` Conor Dooley 2023-01-31 19:30 ` Atish Patra 2023-01-31 19:30 ` Atish Patra 2023-01-27 18:25 ` [PATCH v3 04/14] RISC-V: KVM: Define a probe function for SBI extension data structures Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-28 14:50 ` Anup Patel 2023-01-28 14:50 ` Anup Patel 2023-01-27 18:25 ` [PATCH v3 05/14] RISC-V: KVM: Return correct code for hsm stop function Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-28 14:52 ` Anup Patel 2023-01-28 14:52 ` Anup Patel 2023-01-27 18:25 ` [PATCH v3 06/14] RISC-V: KVM: Modify SBI extension handler to return SBI error code Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-29 12:16 ` Anup Patel 2023-01-29 12:16 ` Anup Patel 2023-01-31 20:38 ` Atish Patra 2023-01-31 20:38 ` Atish Patra 2023-01-27 18:25 ` [PATCH v3 07/14] RISC-V: KVM: Add skeleton support for perf Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-29 12:30 ` Anup Patel 2023-01-29 12:30 ` Anup Patel 2023-01-31 22:35 ` Atish Patra 2023-01-31 22:35 ` Atish Patra 2023-02-01 3:48 ` Anup Patel 2023-02-01 3:48 ` Anup Patel 2023-02-01 8:41 ` Atish Patra 2023-02-01 8:41 ` Atish Patra 2023-02-01 9:05 ` Anup Patel 2023-02-01 9:05 ` Anup Patel 2023-01-27 18:25 ` [PATCH v3 08/14] RISC-V: KVM: Add SBI PMU extension support Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-29 12:34 ` Anup Patel 2023-01-29 12:34 ` Anup Patel 2023-01-27 18:25 ` [PATCH v3 09/14] RISC-V: KVM: Make PMU functionality depend on Sscofpmf Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-29 12:35 ` Anup Patel [this message] 2023-01-29 12:35 ` Anup Patel 2023-01-27 18:25 ` [PATCH v3 10/14] RISC-V: KVM: Disable all hpmcounter access for VS/VU mode Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-29 12:37 ` Anup Patel 2023-01-29 12:37 ` Anup Patel 2023-01-27 18:25 ` [PATCH v3 11/14] RISC-V: KVM: Implement trap & emulate for hpmcounters Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-29 12:44 ` Anup Patel 2023-01-29 12:44 ` Anup Patel 2023-01-31 22:46 ` Atish Patra 2023-01-31 22:46 ` Atish Patra 2023-02-01 8:58 ` Atish Patra 2023-02-01 8:58 ` Atish Patra 2023-02-01 9:09 ` Anup Patel 2023-02-01 9:09 ` Anup Patel 2023-01-27 18:25 ` [PATCH v3 12/14] RISC-V: KVM: Implement perf support without sampling Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-30 15:40 ` Anup Patel 2023-01-30 15:40 ` Anup Patel 2023-01-27 18:25 ` [PATCH v3 13/14] RISC-V: KVM: Support firmware events Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-30 15:47 ` Anup Patel 2023-01-30 15:47 ` Anup Patel 2023-01-27 18:25 ` [PATCH v3 14/14] RISC-V: KVM: Increment firmware pmu events Atish Patra 2023-01-27 18:25 ` Atish Patra 2023-01-30 15:48 ` Anup Patel 2023-01-30 15:48 ` Anup Patel
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