From: Jonas Jensen <jonas.jensen@gmail.com> To: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Cc: "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "devicetree-discuss@lists.ozlabs.org" <devicetree-discuss@lists.ozlabs.org>, "arm@kernel.org" <arm@kernel.org>, Russell King - ARM Linux <linux@arm.linux.org.uk>, Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net> Subject: Re: [PATCH v4 2/2] ARM: mach-moxart: add MOXA ART SoC device tree files Date: Mon, 16 Dec 2013 21:05:22 +0100 [thread overview] Message-ID: <CACmBeS1H96Scr+ycHa-Ar_t72Q2x=LH-2vrbQXiLiuYHyH3S-Q@mail.gmail.com> (raw) In-Reply-To: <CAEgOgz7=xZ8N+vGuaQ6L3n5SYpS3bS+xN88WXDH+A7m7JNLrcw@mail.gmail.com> On 15 December 2013 05:27, Peter Crosthwaite <peter.crosthwaite@xilinx.com> wrote: >> + sdhci: sdhci@98e00000 { >> + compatible = "moxa,moxart-sdhci"; >> + reg = <0x98e00000 0x5C>; >> + interrupts = <5 0>; >> + clocks = <&clk_apb>; >> + dmas = <&dma 5>, >> + <&dma 5>; >> + dma-names = "tx", "rx"; >> + }; > > Is your SDHCI really implemented on the board level? The fact that its > reg property is within the same as the SoC range (for your dtsi) > suggests the SDHCI is part of the SoC and should perhaps be in the > dtsi? >> + mac1: mac@92000000 { >> + compatible = "moxa,moxart-mac"; >> + reg = <0x92000000 0x90>; >> + interrupts = <27 0>; >> + phy-handle = <ðphy1>; >> + phy-mode = "mii"; >> + }; > > Same for MACs. >> + >> + uart0: uart@98200000 { >> + compatible = "ns16550a"; >> + reg = <0x98200000 0x20>; >> + interrupts = <31 8>; >> + reg-shift = <2>; >> + reg-io-width = <4>; >> + clock-frequency = <14745600>; >> + status = "okay"; >> + }; >> + > > And UARTs. > > Let me know if i'm misunderstanding dts/dtsi split but looking at some > of the other SoCs this seems inconsistent to me. It is likely to be true, that technically these are all part of the SoC. By examining the hardware, there are no external chips (on either base or main board) that looks capable of handling such functions: https://plus.google.com/photos/103371465418643926605/albums/5820634595801767953 I made the split with some consideration to other MOXA ART machines, that they can be added as a separate file including the same dtsi: MOXA ART hardware examples: UC-7112/UC-7110: "SD slot (UC-7112, and UC-7112 Plus only)": http://www.moxa.com/product/UC-7112_UC-7110.htm IA241: "64 MB RAM": http://www.moxa.com/product/IA241_IA240.htm UC-7101-LX: "One 10/100 Mbps Ethernet port": http://www.moxa.com/product/UC-7101-LX.htm UC-7112-LX has 32 MB RAM and two ethernet ports. This is why I think MAC is good as is, RAM should move out from SoC? I don't know if they all have a debug UART (I only have access to UC-7112-LX), and it's not obvious in specifications. UART can possibly be moved into SoC as you say. In cases where SD slot is missing but the register remains in the SoC, how is that normally handled? Regards, Jonas
WARNING: multiple messages have this Message-ID (diff)
From: jonas.jensen@gmail.com (Jonas Jensen) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 2/2] ARM: mach-moxart: add MOXA ART SoC device tree files Date: Mon, 16 Dec 2013 21:05:22 +0100 [thread overview] Message-ID: <CACmBeS1H96Scr+ycHa-Ar_t72Q2x=LH-2vrbQXiLiuYHyH3S-Q@mail.gmail.com> (raw) In-Reply-To: <CAEgOgz7=xZ8N+vGuaQ6L3n5SYpS3bS+xN88WXDH+A7m7JNLrcw@mail.gmail.com> On 15 December 2013 05:27, Peter Crosthwaite <peter.crosthwaite@xilinx.com> wrote: >> + sdhci: sdhci at 98e00000 { >> + compatible = "moxa,moxart-sdhci"; >> + reg = <0x98e00000 0x5C>; >> + interrupts = <5 0>; >> + clocks = <&clk_apb>; >> + dmas = <&dma 5>, >> + <&dma 5>; >> + dma-names = "tx", "rx"; >> + }; > > Is your SDHCI really implemented on the board level? The fact that its > reg property is within the same as the SoC range (for your dtsi) > suggests the SDHCI is part of the SoC and should perhaps be in the > dtsi? >> + mac1: mac at 92000000 { >> + compatible = "moxa,moxart-mac"; >> + reg = <0x92000000 0x90>; >> + interrupts = <27 0>; >> + phy-handle = <ðphy1>; >> + phy-mode = "mii"; >> + }; > > Same for MACs. >> + >> + uart0: uart at 98200000 { >> + compatible = "ns16550a"; >> + reg = <0x98200000 0x20>; >> + interrupts = <31 8>; >> + reg-shift = <2>; >> + reg-io-width = <4>; >> + clock-frequency = <14745600>; >> + status = "okay"; >> + }; >> + > > And UARTs. > > Let me know if i'm misunderstanding dts/dtsi split but looking at some > of the other SoCs this seems inconsistent to me. It is likely to be true, that technically these are all part of the SoC. By examining the hardware, there are no external chips (on either base or main board) that looks capable of handling such functions: https://plus.google.com/photos/103371465418643926605/albums/5820634595801767953 I made the split with some consideration to other MOXA ART machines, that they can be added as a separate file including the same dtsi: MOXA ART hardware examples: UC-7112/UC-7110: "SD slot (UC-7112, and UC-7112 Plus only)": http://www.moxa.com/product/UC-7112_UC-7110.htm IA241: "64 MB RAM": http://www.moxa.com/product/IA241_IA240.htm UC-7101-LX: "One 10/100 Mbps Ethernet port": http://www.moxa.com/product/UC-7101-LX.htm UC-7112-LX has 32 MB RAM and two ethernet ports. This is why I think MAC is good as is, RAM should move out from SoC? I don't know if they all have a debug UART (I only have access to UC-7112-LX), and it's not obvious in specifications. UART can possibly be moved into SoC as you say. In cases where SD slot is missing but the register remains in the SoC, how is that normally handled? Regards, Jonas
next prev parent reply other threads:[~2013-12-16 20:11 UTC|newest] Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top 2013-12-13 14:33 [PATCH v4 0/2] ARM: mach-moxart: add MOXA ART SoC support Jonas Jensen 2013-12-13 14:33 ` Jonas Jensen 2013-12-13 14:33 ` [PATCH v4 1/2] ARM: mach-moxart: add MOXA ART SoC platform files Jonas Jensen 2013-12-13 14:33 ` Jonas Jensen [not found] ` <1386945188-8316-2-git-send-email-jonas.jensen-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2013-12-13 14:38 ` Fwd: " Jonas Jensen 2013-12-13 16:17 ` Arnd Bergmann 2013-12-13 16:17 ` Arnd Bergmann 2013-12-13 17:23 ` Jonas Jensen 2013-12-13 17:23 ` Jonas Jensen 2013-12-13 19:07 ` Guenter Roeck 2013-12-13 19:07 ` Guenter Roeck 2013-12-14 4:01 ` Arnd Bergmann 2013-12-14 4:01 ` Arnd Bergmann 2013-12-14 8:32 ` Jonas Jensen 2013-12-14 8:32 ` Jonas Jensen 2013-12-14 15:50 ` Guenter Roeck 2013-12-14 15:50 ` Guenter Roeck 2013-12-14 16:26 ` Jonas Jensen 2013-12-14 16:26 ` Jonas Jensen 2013-12-14 18:50 ` Arnd Bergmann 2013-12-14 18:50 ` Arnd Bergmann 2013-12-14 20:14 ` Guenter Roeck 2013-12-14 20:14 ` Guenter Roeck 2013-12-15 0:21 ` Arnd Bergmann 2013-12-15 0:21 ` Arnd Bergmann 2013-12-22 19:48 ` Olof Johansson 2013-12-22 19:48 ` Olof Johansson 2013-12-13 14:33 ` [PATCH v4 2/2] ARM: mach-moxart: add MOXA ART SoC device tree files Jonas Jensen 2013-12-13 14:33 ` Jonas Jensen [not found] ` <1386945188-8316-3-git-send-email-jonas.jensen-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2013-12-13 14:39 ` Fwd: " Jonas Jensen 2013-12-13 16:17 ` Arnd Bergmann 2013-12-13 16:17 ` Arnd Bergmann 2013-12-15 4:27 ` Peter Crosthwaite 2013-12-15 4:27 ` Peter Crosthwaite 2013-12-16 20:05 ` Jonas Jensen [this message] 2013-12-16 20:05 ` Jonas Jensen 2013-12-16 23:53 ` Peter Crosthwaite 2013-12-16 23:53 ` Peter Crosthwaite 2013-12-16 23:53 ` Peter Crosthwaite 2013-12-17 0:09 ` Sören Brinkmann 2013-12-17 0:09 ` Sören Brinkmann 2013-12-17 0:09 ` Sören Brinkmann 2013-12-22 19:49 ` Olof Johansson 2013-12-22 19:49 ` Olof Johansson
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