From: Peter Maydell <peter.maydell@linaro.org>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: Edgar Iglesias <edgar.iglesias@xilinx.com>,
QEMU Developers <qemu-devel@nongnu.org>,
Alexander Graf <agraf@suse.de>,
Sergey Fedorov <serge.fdrv@gmail.com>,
Laurent Desnogues <laurent.desnogues@gmail.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Subject: Re: [Qemu-devel] [PATCH v3 3/9] target-arm: Add support for S2 page-table protection bits
Date: Wed, 14 Oct 2015 20:38:54 +0100 [thread overview]
Message-ID: <CAFEAcA_E=4jD=2Chtk-KURihhkM8r2frau3K8TL0YtauNnJQUA@mail.gmail.com> (raw)
In-Reply-To: <87a8rl7h5i.fsf@linaro.org>
On 14 October 2015 at 13:45, Alex Bennée <alex.bennee@linaro.org> wrote:
> While looking I noticed we probably extract more than we need into attrs
> considering the tableattrs is snarfed earlier. Maybe we should only do:
>
> attrs = extract64(descriptor, 2, 10)
> | (extract64(descriptor, 52, 7) << 10);
>
> Or even:
>
> attrs = extract64(descriptor, 2, 10)
> | (extract64(descriptor, 52, 3) << 10);
It seemed neater to grab all of the attribute bits, even the
reserved ones. Otherwise we'll end up needing to change the
code back later if a new attribute we care about is added.
thanks
-- PMM
next prev parent reply other threads:[~2015-10-14 19:39 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-03 22:38 [Qemu-devel] [PATCH v3 0/9] arm: Steps towards EL2 support round 5 Edgar E. Iglesias
2015-10-03 22:38 ` [Qemu-devel] [PATCH v3 1/9] target-arm: Add HPFAR_EL2 Edgar E. Iglesias
2015-10-07 11:51 ` Alex Bennée
2015-10-07 21:18 ` Peter Maydell
2015-10-08 7:52 ` Alex Bennée
2015-10-08 5:38 ` Laurent Desnogues
2015-10-08 8:18 ` Peter Maydell
2015-10-08 8:24 ` Alex Bennée
2015-10-08 9:40 ` Laurent Desnogues
2015-10-08 9:14 ` Alex Bennée
2015-10-08 19:16 ` Edgar E. Iglesias
2015-10-03 22:38 ` [Qemu-devel] [PATCH v3 2/9] target-arm: Add computation of starting level for S2 PTW Edgar E. Iglesias
2015-10-07 12:24 ` Alex Bennée
2015-10-08 19:35 ` Edgar E. Iglesias
2015-10-03 22:38 ` [Qemu-devel] [PATCH v3 3/9] target-arm: Add support for S2 page-table protection bits Edgar E. Iglesias
2015-10-07 16:19 ` Alex Bennée
2015-10-07 23:11 ` Peter Maydell
2015-10-14 12:45 ` Alex Bennée
2015-10-14 19:38 ` Peter Maydell [this message]
2015-10-03 22:38 ` [Qemu-devel] [PATCH v3 4/9] target-arm: Avoid inline for get_phys_addr Edgar E. Iglesias
2015-10-03 22:38 ` [Qemu-devel] [PATCH v3 5/9] target-arm: Add ARMMMUFaultInfo Edgar E. Iglesias
2015-10-07 16:24 ` Alex Bennée
2015-10-08 19:25 ` Edgar E. Iglesias
2015-10-08 20:06 ` Edgar E. Iglesias
2015-10-08 21:15 ` Peter Maydell
2015-10-14 13:00 ` Alex Bennée
2015-10-14 20:47 ` Edgar E. Iglesias
2015-10-03 22:38 ` [Qemu-devel] [PATCH v3 6/9] target-arm: Add S2 translation to 64bit S1 PTWs Edgar E. Iglesias
2015-10-03 22:38 ` [Qemu-devel] [PATCH v3 7/9] target-arm: Add S2 translation to 32bit " Edgar E. Iglesias
2015-10-03 22:38 ` [Qemu-devel] [PATCH v3 8/9] target-arm: Route S2 MMU faults to EL2 Edgar E. Iglesias
2015-10-03 22:38 ` [Qemu-devel] [PATCH v3 9/9] target-arm: Add support for S1 + S2 MMU translations Edgar E. Iglesias
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