* [PATCH v1] ARM: imx6plus: enable internal routing of clk_enet_ref where possible
@ 2020-06-13 20:17 ` Sven Van Asbroeck
0 siblings, 0 replies; 12+ messages in thread
From: Sven Van Asbroeck @ 2020-06-13 20:17 UTC (permalink / raw)
To: Shawn Guo
Cc: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
On imx6, the ethernet reference clock (clk_enet_ref) can be generated
by either the imx6, or an external source (e.g. an oscillator or the
PHY). When generated by the imx6, the clock source (from ANATOP)
must be routed to the input of clk_enet_ref via two pads on the SoC,
typically via a dedicated track on the PCB.
On an imx6 plus however, there is a new setting which enables this
clock to be routed internally on the SoC, from its ANATOP clock
source, straight to clk_enet_ref, without having to go through
the SoC pads.
Board designs where the clock is generated by the imx6 should not
be affected by routing the clock internally. Therefore on a plus,
we can enable internal routing by default.
To: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com>
---
arch/arm/mach-imx/mach-imx6q.c | 18 ++++++++++++++++++
include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 +
2 files changed, 19 insertions(+)
Tree: next-20200613
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 85c084a716ab..4d22567bb650 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -203,6 +203,24 @@ static void __init imx6q_1588_init(void)
else
pr_err("failed to find fsl,imx6q-iomuxc-gpr regmap\n");
+ /*
+ * On imx6 plus, enet_ref from ANATOP/CCM can be internally routed to
+ * be the PTP clock source, instead of having to be routed through
+ * pads.
+ * Board designs which route the ANATOP/CCM clock through pads are
+ * unaffected when routing happens internally. So on these designs,
+ * route internally by default.
+ */
+ if (clksel == IMX6Q_GPR1_ENET_CLK_SEL_ANATOP && cpu_is_imx6q() &&
+ imx_get_soc_revision() >= IMX_CHIP_REVISION_2_0) {
+ if (!IS_ERR(gpr))
+ regmap_update_bits(gpr, IOMUXC_GPR5,
+ IMX6Q_GPR5_ENET_TXCLK_SEL,
+ IMX6Q_GPR5_ENET_TXCLK_SEL);
+ else
+ pr_err("failed to find fsl,imx6q-iomuxc-gpr regmap\n");
+ }
+
clk_put(enet_ref);
put_ptp_clk:
clk_put(ptp_clk);
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
index d4b5e527a7a3..eb65d48da0df 100644
--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
@@ -240,6 +240,7 @@
#define IMX6Q_GPR4_IPU_RD_CACHE_CTL BIT(0)
#define IMX6Q_GPR5_L2_CLK_STOP BIT(8)
+#define IMX6Q_GPR5_ENET_TXCLK_SEL BIT(9)
#define IMX6Q_GPR5_SATA_SW_PD BIT(10)
#define IMX6Q_GPR5_SATA_SW_RST BIT(11)
--
2.17.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v1] ARM: imx6plus: enable internal routing of clk_enet_ref where possible
@ 2020-06-13 20:17 ` Sven Van Asbroeck
0 siblings, 0 replies; 12+ messages in thread
From: Sven Van Asbroeck @ 2020-06-13 20:17 UTC (permalink / raw)
To: Shawn Guo
Cc: Sascha Hauer, linux-kernel, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel
On imx6, the ethernet reference clock (clk_enet_ref) can be generated
by either the imx6, or an external source (e.g. an oscillator or the
PHY). When generated by the imx6, the clock source (from ANATOP)
must be routed to the input of clk_enet_ref via two pads on the SoC,
typically via a dedicated track on the PCB.
On an imx6 plus however, there is a new setting which enables this
clock to be routed internally on the SoC, from its ANATOP clock
source, straight to clk_enet_ref, without having to go through
the SoC pads.
Board designs where the clock is generated by the imx6 should not
be affected by routing the clock internally. Therefore on a plus,
we can enable internal routing by default.
To: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com>
---
arch/arm/mach-imx/mach-imx6q.c | 18 ++++++++++++++++++
include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 +
2 files changed, 19 insertions(+)
Tree: next-20200613
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 85c084a716ab..4d22567bb650 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -203,6 +203,24 @@ static void __init imx6q_1588_init(void)
else
pr_err("failed to find fsl,imx6q-iomuxc-gpr regmap\n");
+ /*
+ * On imx6 plus, enet_ref from ANATOP/CCM can be internally routed to
+ * be the PTP clock source, instead of having to be routed through
+ * pads.
+ * Board designs which route the ANATOP/CCM clock through pads are
+ * unaffected when routing happens internally. So on these designs,
+ * route internally by default.
+ */
+ if (clksel == IMX6Q_GPR1_ENET_CLK_SEL_ANATOP && cpu_is_imx6q() &&
+ imx_get_soc_revision() >= IMX_CHIP_REVISION_2_0) {
+ if (!IS_ERR(gpr))
+ regmap_update_bits(gpr, IOMUXC_GPR5,
+ IMX6Q_GPR5_ENET_TXCLK_SEL,
+ IMX6Q_GPR5_ENET_TXCLK_SEL);
+ else
+ pr_err("failed to find fsl,imx6q-iomuxc-gpr regmap\n");
+ }
+
clk_put(enet_ref);
put_ptp_clk:
clk_put(ptp_clk);
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
index d4b5e527a7a3..eb65d48da0df 100644
--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
@@ -240,6 +240,7 @@
#define IMX6Q_GPR4_IPU_RD_CACHE_CTL BIT(0)
#define IMX6Q_GPR5_L2_CLK_STOP BIT(8)
+#define IMX6Q_GPR5_ENET_TXCLK_SEL BIT(9)
#define IMX6Q_GPR5_SATA_SW_PD BIT(10)
#define IMX6Q_GPR5_SATA_SW_RST BIT(11)
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v1] ARM: imx6plus: enable internal routing of clk_enet_ref where possible
2020-06-13 20:17 ` Sven Van Asbroeck
(?)
@ 2020-06-23 11:53 ` Shawn Guo
2020-06-24 1:40 ` Andy Duan
-1 siblings, 1 reply; 12+ messages in thread
From: Shawn Guo @ 2020-06-23 11:53 UTC (permalink / raw)
To: Sven Van Asbroeck, Fugang Duan
Cc: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
Hi Fugang,
Can you take a look at this patch? Thanks!
Shawn
On Sat, Jun 13, 2020 at 04:17:03PM -0400, Sven Van Asbroeck wrote:
> On imx6, the ethernet reference clock (clk_enet_ref) can be generated
> by either the imx6, or an external source (e.g. an oscillator or the
> PHY). When generated by the imx6, the clock source (from ANATOP)
> must be routed to the input of clk_enet_ref via two pads on the SoC,
> typically via a dedicated track on the PCB.
>
> On an imx6 plus however, there is a new setting which enables this
> clock to be routed internally on the SoC, from its ANATOP clock
> source, straight to clk_enet_ref, without having to go through
> the SoC pads.
>
> Board designs where the clock is generated by the imx6 should not
> be affected by routing the clock internally. Therefore on a plus,
> we can enable internal routing by default.
>
> To: Shawn Guo <shawnguo@kernel.org>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: NXP Linux Team <linux-imx@nxp.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com>
> ---
> arch/arm/mach-imx/mach-imx6q.c | 18 ++++++++++++++++++
> include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 +
> 2 files changed, 19 insertions(+)
>
> Tree: next-20200613
>
> diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
> index 85c084a716ab..4d22567bb650 100644
> --- a/arch/arm/mach-imx/mach-imx6q.c
> +++ b/arch/arm/mach-imx/mach-imx6q.c
> @@ -203,6 +203,24 @@ static void __init imx6q_1588_init(void)
> else
> pr_err("failed to find fsl,imx6q-iomuxc-gpr regmap\n");
>
> + /*
> + * On imx6 plus, enet_ref from ANATOP/CCM can be internally routed to
> + * be the PTP clock source, instead of having to be routed through
> + * pads.
> + * Board designs which route the ANATOP/CCM clock through pads are
> + * unaffected when routing happens internally. So on these designs,
> + * route internally by default.
> + */
> + if (clksel == IMX6Q_GPR1_ENET_CLK_SEL_ANATOP && cpu_is_imx6q() &&
> + imx_get_soc_revision() >= IMX_CHIP_REVISION_2_0) {
> + if (!IS_ERR(gpr))
> + regmap_update_bits(gpr, IOMUXC_GPR5,
> + IMX6Q_GPR5_ENET_TXCLK_SEL,
> + IMX6Q_GPR5_ENET_TXCLK_SEL);
> + else
> + pr_err("failed to find fsl,imx6q-iomuxc-gpr regmap\n");
> + }
> +
> clk_put(enet_ref);
> put_ptp_clk:
> clk_put(ptp_clk);
> diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
> index d4b5e527a7a3..eb65d48da0df 100644
> --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
> +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
> @@ -240,6 +240,7 @@
> #define IMX6Q_GPR4_IPU_RD_CACHE_CTL BIT(0)
>
> #define IMX6Q_GPR5_L2_CLK_STOP BIT(8)
> +#define IMX6Q_GPR5_ENET_TXCLK_SEL BIT(9)
> #define IMX6Q_GPR5_SATA_SW_PD BIT(10)
> #define IMX6Q_GPR5_SATA_SW_RST BIT(11)
>
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v1] ARM: imx6plus: enable internal routing of clk_enet_ref where possible
2020-06-13 20:17 ` Sven Van Asbroeck
(?)
(?)
@ 2020-06-23 14:19 ` Fabio Estevam
2020-06-23 15:00 ` Sven Van Asbroeck
-1 siblings, 1 reply; 12+ messages in thread
From: Fabio Estevam @ 2020-06-23 14:19 UTC (permalink / raw)
To: Sven Van Asbroeck
Cc: Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, NXP Linux Team,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
linux-kernel
Hi Sven,
On Sat, Jun 13, 2020 at 5:17 PM Sven Van Asbroeck <thesven73@gmail.com> wrote:
> + /*
> + * On imx6 plus, enet_ref from ANATOP/CCM can be internally routed to
> + * be the PTP clock source, instead of having to be routed through
> + * pads.
> + * Board designs which route the ANATOP/CCM clock through pads are
> + * unaffected when routing happens internally. So on these designs,
> + * route internally by default.
> + */
> + if (clksel == IMX6Q_GPR1_ENET_CLK_SEL_ANATOP && cpu_is_imx6q() &&
> + imx_get_soc_revision() >= IMX_CHIP_REVISION_2_0) {
You should limit this to imx6 quad plus only, so you would better
check against "fsl,imx6qp".
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v1] ARM: imx6plus: enable internal routing of clk_enet_ref where possible
2020-06-23 14:19 ` Fabio Estevam
@ 2020-06-23 15:00 ` Sven Van Asbroeck
0 siblings, 0 replies; 12+ messages in thread
From: Sven Van Asbroeck @ 2020-06-23 15:00 UTC (permalink / raw)
To: Fabio Estevam
Cc: Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, NXP Linux Team,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
linux-kernel
Hi Fabio,
On Tue, Jun 23, 2020 at 10:19 AM Fabio Estevam <festevam@gmail.com> wrote:
>
> You should limit this to imx6 quad plus only, so you would better
> check against "fsl,imx6qp".
Excellent suggestion, thank you ! I tried to determine if running on a plus by
using the method from imx6q_init_machine(). But yes, checking for
"fsl,imx6qp" sounds much more elegant.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v1] ARM: imx6plus: enable internal routing of clk_enet_ref where possible
@ 2020-06-23 15:00 ` Sven Van Asbroeck
0 siblings, 0 replies; 12+ messages in thread
From: Sven Van Asbroeck @ 2020-06-23 15:00 UTC (permalink / raw)
To: Fabio Estevam
Cc: Sascha Hauer, linux-kernel, NXP Linux Team,
Pengutronix Kernel Team, Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
Hi Fabio,
On Tue, Jun 23, 2020 at 10:19 AM Fabio Estevam <festevam@gmail.com> wrote:
>
> You should limit this to imx6 quad plus only, so you would better
> check against "fsl,imx6qp".
Excellent suggestion, thank you ! I tried to determine if running on a plus by
using the method from imx6q_init_machine(). But yes, checking for
"fsl,imx6qp" sounds much more elegant.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [EXT] Re: [PATCH v1] ARM: imx6plus: enable internal routing of clk_enet_ref where possible
2020-06-23 11:53 ` Shawn Guo
@ 2020-06-24 1:40 ` Andy Duan
0 siblings, 0 replies; 12+ messages in thread
From: Andy Duan @ 2020-06-24 1:40 UTC (permalink / raw)
To: Shawn Guo, Sven Van Asbroeck
Cc: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
dl-linux-imx, linux-arm-kernel, linux-kernel
From: Shawn Guo <shawnguo@kernel.org> Sent: Tuesday, June 23, 2020 7:54 PM
> Hi Fugang,
>
> Can you take a look at this patch? Thanks!
>
The patch looks good.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
> Shawn
>
> On Sat, Jun 13, 2020 at 04:17:03PM -0400, Sven Van Asbroeck wrote:
> > On imx6, the ethernet reference clock (clk_enet_ref) can be generated
> > by either the imx6, or an external source (e.g. an oscillator or the
> > PHY). When generated by the imx6, the clock source (from ANATOP) must
> > be routed to the input of clk_enet_ref via two pads on the SoC,
> > typically via a dedicated track on the PCB.
> >
> > On an imx6 plus however, there is a new setting which enables this
> > clock to be routed internally on the SoC, from its ANATOP clock
> > source, straight to clk_enet_ref, without having to go through the SoC
> > pads.
> >
> > Board designs where the clock is generated by the imx6 should not be
> > affected by routing the clock internally. Therefore on a plus, we can
> > enable internal routing by default.
> >
> > To: Shawn Guo <shawnguo@kernel.org>
> > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> > Cc: Fabio Estevam <festevam@gmail.com>
> > Cc: NXP Linux Team <linux-imx@nxp.com>
> > Cc: linux-arm-kernel@lists.infradead.org
> > Cc: linux-kernel@vger.kernel.org
> > Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com>
> > ---
> > arch/arm/mach-imx/mach-imx6q.c | 18
> ++++++++++++++++++
> > include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 +
> > 2 files changed, 19 insertions(+)
> >
> > Tree: next-20200613
> >
> > diff --git a/arch/arm/mach-imx/mach-imx6q.c
> > b/arch/arm/mach-imx/mach-imx6q.c index 85c084a716ab..4d22567bb650
> > 100644
> > --- a/arch/arm/mach-imx/mach-imx6q.c
> > +++ b/arch/arm/mach-imx/mach-imx6q.c
> > @@ -203,6 +203,24 @@ static void __init imx6q_1588_init(void)
> > else
> > pr_err("failed to find fsl,imx6q-iomuxc-gpr regmap\n");
> >
> > + /*
> > + * On imx6 plus, enet_ref from ANATOP/CCM can be internally
> routed to
> > + * be the PTP clock source, instead of having to be routed through
> > + * pads.
> > + * Board designs which route the ANATOP/CCM clock through pads
> are
> > + * unaffected when routing happens internally. So on these designs,
> > + * route internally by default.
> > + */
> > + if (clksel == IMX6Q_GPR1_ENET_CLK_SEL_ANATOP &&
> cpu_is_imx6q() &&
> > + imx_get_soc_revision() >=
> IMX_CHIP_REVISION_2_0) {
> > + if (!IS_ERR(gpr))
> > + regmap_update_bits(gpr, IOMUXC_GPR5,
> > +
> IMX6Q_GPR5_ENET_TXCLK_SEL,
> > +
> IMX6Q_GPR5_ENET_TXCLK_SEL);
> > + else
> > + pr_err("failed to find fsl,imx6q-iomuxc-gpr
> regmap\n");
> > + }
> > +
> > clk_put(enet_ref);
> > put_ptp_clk:
> > clk_put(ptp_clk);
> > diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
> > b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
> > index d4b5e527a7a3..eb65d48da0df 100644
> > --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
> > +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
> > @@ -240,6 +240,7 @@
> > #define IMX6Q_GPR4_IPU_RD_CACHE_CTL BIT(0)
> >
> > #define IMX6Q_GPR5_L2_CLK_STOP BIT(8)
> > +#define IMX6Q_GPR5_ENET_TXCLK_SEL BIT(9)
> > #define IMX6Q_GPR5_SATA_SW_PD BIT(10)
> > #define IMX6Q_GPR5_SATA_SW_RST BIT(11)
> >
> > --
> > 2.17.1
> >
^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [EXT] Re: [PATCH v1] ARM: imx6plus: enable internal routing of clk_enet_ref where possible
@ 2020-06-24 1:40 ` Andy Duan
0 siblings, 0 replies; 12+ messages in thread
From: Andy Duan @ 2020-06-24 1:40 UTC (permalink / raw)
To: Shawn Guo, Sven Van Asbroeck
Cc: Sascha Hauer, linux-kernel, dl-linux-imx,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel
From: Shawn Guo <shawnguo@kernel.org> Sent: Tuesday, June 23, 2020 7:54 PM
> Hi Fugang,
>
> Can you take a look at this patch? Thanks!
>
The patch looks good.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
> Shawn
>
> On Sat, Jun 13, 2020 at 04:17:03PM -0400, Sven Van Asbroeck wrote:
> > On imx6, the ethernet reference clock (clk_enet_ref) can be generated
> > by either the imx6, or an external source (e.g. an oscillator or the
> > PHY). When generated by the imx6, the clock source (from ANATOP) must
> > be routed to the input of clk_enet_ref via two pads on the SoC,
> > typically via a dedicated track on the PCB.
> >
> > On an imx6 plus however, there is a new setting which enables this
> > clock to be routed internally on the SoC, from its ANATOP clock
> > source, straight to clk_enet_ref, without having to go through the SoC
> > pads.
> >
> > Board designs where the clock is generated by the imx6 should not be
> > affected by routing the clock internally. Therefore on a plus, we can
> > enable internal routing by default.
> >
> > To: Shawn Guo <shawnguo@kernel.org>
> > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> > Cc: Fabio Estevam <festevam@gmail.com>
> > Cc: NXP Linux Team <linux-imx@nxp.com>
> > Cc: linux-arm-kernel@lists.infradead.org
> > Cc: linux-kernel@vger.kernel.org
> > Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com>
> > ---
> > arch/arm/mach-imx/mach-imx6q.c | 18
> ++++++++++++++++++
> > include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 +
> > 2 files changed, 19 insertions(+)
> >
> > Tree: next-20200613
> >
> > diff --git a/arch/arm/mach-imx/mach-imx6q.c
> > b/arch/arm/mach-imx/mach-imx6q.c index 85c084a716ab..4d22567bb650
> > 100644
> > --- a/arch/arm/mach-imx/mach-imx6q.c
> > +++ b/arch/arm/mach-imx/mach-imx6q.c
> > @@ -203,6 +203,24 @@ static void __init imx6q_1588_init(void)
> > else
> > pr_err("failed to find fsl,imx6q-iomuxc-gpr regmap\n");
> >
> > + /*
> > + * On imx6 plus, enet_ref from ANATOP/CCM can be internally
> routed to
> > + * be the PTP clock source, instead of having to be routed through
> > + * pads.
> > + * Board designs which route the ANATOP/CCM clock through pads
> are
> > + * unaffected when routing happens internally. So on these designs,
> > + * route internally by default.
> > + */
> > + if (clksel == IMX6Q_GPR1_ENET_CLK_SEL_ANATOP &&
> cpu_is_imx6q() &&
> > + imx_get_soc_revision() >=
> IMX_CHIP_REVISION_2_0) {
> > + if (!IS_ERR(gpr))
> > + regmap_update_bits(gpr, IOMUXC_GPR5,
> > +
> IMX6Q_GPR5_ENET_TXCLK_SEL,
> > +
> IMX6Q_GPR5_ENET_TXCLK_SEL);
> > + else
> > + pr_err("failed to find fsl,imx6q-iomuxc-gpr
> regmap\n");
> > + }
> > +
> > clk_put(enet_ref);
> > put_ptp_clk:
> > clk_put(ptp_clk);
> > diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
> > b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
> > index d4b5e527a7a3..eb65d48da0df 100644
> > --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
> > +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
> > @@ -240,6 +240,7 @@
> > #define IMX6Q_GPR4_IPU_RD_CACHE_CTL BIT(0)
> >
> > #define IMX6Q_GPR5_L2_CLK_STOP BIT(8)
> > +#define IMX6Q_GPR5_ENET_TXCLK_SEL BIT(9)
> > #define IMX6Q_GPR5_SATA_SW_PD BIT(10)
> > #define IMX6Q_GPR5_SATA_SW_RST BIT(11)
> >
> > --
> > 2.17.1
> >
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [EXT] Re: [PATCH v1] ARM: imx6plus: enable internal routing of clk_enet_ref where possible
2020-06-24 1:40 ` Andy Duan
@ 2020-06-24 2:56 ` Sven Van Asbroeck
-1 siblings, 0 replies; 12+ messages in thread
From: Sven Van Asbroeck @ 2020-06-24 2:56 UTC (permalink / raw)
To: Andy Duan
Cc: Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
dl-linux-imx, linux-arm-kernel, linux-kernel
Hi Andy,
On Tue, Jun 23, 2020 at 9:40 PM Andy Duan <fugang.duan@nxp.com> wrote:
>
> The patch looks good.
> Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Thank you !
To check we're on a plus, the patch uses:
cpu_is_imx6q() && imx_get_soc_revision() >= IMX_CHIP_REVISION_2_0
Fabio Estevam suggested that perhaps checking
of_machine_is_compatible("fsl,imx6qp")
might be preferable. What is your opinion on this?
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [EXT] Re: [PATCH v1] ARM: imx6plus: enable internal routing of clk_enet_ref where possible
@ 2020-06-24 2:56 ` Sven Van Asbroeck
0 siblings, 0 replies; 12+ messages in thread
From: Sven Van Asbroeck @ 2020-06-24 2:56 UTC (permalink / raw)
To: Andy Duan
Cc: Shawn Guo, Sascha Hauer, linux-kernel, dl-linux-imx,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel
Hi Andy,
On Tue, Jun 23, 2020 at 9:40 PM Andy Duan <fugang.duan@nxp.com> wrote:
>
> The patch looks good.
> Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Thank you !
To check we're on a plus, the patch uses:
cpu_is_imx6q() && imx_get_soc_revision() >= IMX_CHIP_REVISION_2_0
Fabio Estevam suggested that perhaps checking
of_machine_is_compatible("fsl,imx6qp")
might be preferable. What is your opinion on this?
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [EXT] Re: [PATCH v1] ARM: imx6plus: enable internal routing of clk_enet_ref where possible
2020-06-24 2:56 ` Sven Van Asbroeck
@ 2020-06-24 3:46 ` Andy Duan
-1 siblings, 0 replies; 12+ messages in thread
From: Andy Duan @ 2020-06-24 3:46 UTC (permalink / raw)
To: Sven Van Asbroeck
Cc: Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
dl-linux-imx, linux-arm-kernel, linux-kernel
From: Sven Van Asbroeck <thesven73@gmail.com> Sent: Wednesday, June 24, 2020 10:56 AM
> Hi Andy,
>
> On Tue, Jun 23, 2020 at 9:40 PM Andy Duan <fugang.duan@nxp.com> wrote:
> >
> > The patch looks good.
> > Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
>
> Thank you !
>
> To check we're on a plus, the patch uses:
> cpu_is_imx6q() && imx_get_soc_revision() >= IMX_CHIP_REVISION_2_0
>
> Fabio Estevam suggested that perhaps checking
> of_machine_is_compatible("fsl,imx6qp")
> might be preferable. What is your opinion on this?
Yes, I also think of_machine_is_compatible() is much better.
Thanks.
^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [EXT] Re: [PATCH v1] ARM: imx6plus: enable internal routing of clk_enet_ref where possible
@ 2020-06-24 3:46 ` Andy Duan
0 siblings, 0 replies; 12+ messages in thread
From: Andy Duan @ 2020-06-24 3:46 UTC (permalink / raw)
To: Sven Van Asbroeck
Cc: Shawn Guo, Sascha Hauer, linux-kernel, dl-linux-imx,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel
From: Sven Van Asbroeck <thesven73@gmail.com> Sent: Wednesday, June 24, 2020 10:56 AM
> Hi Andy,
>
> On Tue, Jun 23, 2020 at 9:40 PM Andy Duan <fugang.duan@nxp.com> wrote:
> >
> > The patch looks good.
> > Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
>
> Thank you !
>
> To check we're on a plus, the patch uses:
> cpu_is_imx6q() && imx_get_soc_revision() >= IMX_CHIP_REVISION_2_0
>
> Fabio Estevam suggested that perhaps checking
> of_machine_is_compatible("fsl,imx6qp")
> might be preferable. What is your opinion on this?
Yes, I also think of_machine_is_compatible() is much better.
Thanks.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2020-06-24 3:49 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-06-13 20:17 [PATCH v1] ARM: imx6plus: enable internal routing of clk_enet_ref where possible Sven Van Asbroeck
2020-06-13 20:17 ` Sven Van Asbroeck
2020-06-23 11:53 ` Shawn Guo
2020-06-24 1:40 ` [EXT] " Andy Duan
2020-06-24 1:40 ` Andy Duan
2020-06-24 2:56 ` Sven Van Asbroeck
2020-06-24 2:56 ` Sven Van Asbroeck
2020-06-24 3:46 ` Andy Duan
2020-06-24 3:46 ` Andy Duan
2020-06-23 14:19 ` Fabio Estevam
2020-06-23 15:00 ` Sven Van Asbroeck
2020-06-23 15:00 ` Sven Van Asbroeck
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