* [PATCH 01/10] xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze
@ 2021-11-17 12:40 Ovidiu Panait
2021-11-17 12:40 ` [PATCH 02/10] microblaze: u-boot.lds: replace __end symbol with _end Ovidiu Panait
` (8 more replies)
0 siblings, 9 replies; 12+ messages in thread
From: Ovidiu Panait @ 2021-11-17 12:40 UTC (permalink / raw)
To: u-boot; +Cc: monstr, Ovidiu Panait, Masahiro Yamada
Xilinx board_fdt_blob_setup() implementation makes use of
XILINX_OF_BOARD_DTB_ADDR Kconfig option, but no default value is currently
defined for microblaze. Add one so that microblaze could also be configured
with CONFIG_OF_SEPARATE.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
---
board/xilinx/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig
index 64507b5d84..9e69166903 100644
--- a/board/xilinx/Kconfig
+++ b/board/xilinx/Kconfig
@@ -43,7 +43,7 @@ endif
config XILINX_OF_BOARD_DTB_ADDR
hex "Default DTB pickup address"
default 0x1000 if ARCH_VERSAL
- default 0x100000 if ARCH_ZYNQ || ARCH_ZYNQMP
+ default 0x100000 if ARCH_ZYNQ || ARCH_ZYNQMP || MICROBLAZE
depends on OF_BOARD || OF_SEPARATE
help
Offset in the memory where the board configuration DTB is placed.
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 02/10] microblaze: u-boot.lds: replace __end symbol with _end 2021-11-17 12:40 [PATCH 01/10] xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze Ovidiu Panait @ 2021-11-17 12:40 ` Ovidiu Panait 2021-11-17 12:40 ` [PATCH 03/10] microblaze: spl: add board_boot_order() implementation Ovidiu Panait ` (7 subsequent siblings) 8 siblings, 0 replies; 12+ messages in thread From: Ovidiu Panait @ 2021-11-17 12:40 UTC (permalink / raw) To: u-boot; +Cc: monstr, Ovidiu Panait board_fdt_blob_setup() uses the _end symbol to find the dtb in the non-spl case. In order to allow microblaze builds to compile successfully with CONFIG_OF_SEPARATE, the _end symbol must be defined. Align microblaze with the other architectures and use _end symbol rather than __end to mark the end of the u-boot binary. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> --- arch/microblaze/cpu/start.S | 4 ++-- arch/microblaze/cpu/u-boot-spl.lds | 4 ++-- arch/microblaze/cpu/u-boot.lds | 2 +- arch/microblaze/include/asm/processor.h | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 9479737aa2..463e0feba4 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -15,7 +15,7 @@ _start: mts rmsr, r0 /* disable cache */ - addi r8, r0, __end + addi r8, r0, _end mts rslr, r8 #if defined(CONFIG_SPL_BUILD) @@ -270,7 +270,7 @@ relocate_code: add r23, r0, r7 /* Move reloc addr to r23 */ /* Relocate text and data - r12 temp value */ addi r21, r0, _start - addi r22, r0, __end - 4 /* Include BSS too */ + addi r22, r0, _end - 4 /* Include BSS too */ rsub r6, r21, r22 or r5, r0, r0 diff --git a/arch/microblaze/cpu/u-boot-spl.lds b/arch/microblaze/cpu/u-boot-spl.lds index 3387eb7189..7883a64b15 100644 --- a/arch/microblaze/cpu/u-boot-spl.lds +++ b/arch/microblaze/cpu/u-boot-spl.lds @@ -53,10 +53,10 @@ SECTIONS . = ALIGN(4); __bss_end = .; } - __end = . ; + _end = . ; } #if defined(CONFIG_SPL_MAX_FOOTPRINT) -ASSERT(__end - _start <= (CONFIG_SPL_MAX_FOOTPRINT), \ +ASSERT(_end - _start <= (CONFIG_SPL_MAX_FOOTPRINT), \ "SPL image plus BSS too big"); #endif diff --git a/arch/microblaze/cpu/u-boot.lds b/arch/microblaze/cpu/u-boot.lds index 5dc09dbad2..2b316cc7f5 100644 --- a/arch/microblaze/cpu/u-boot.lds +++ b/arch/microblaze/cpu/u-boot.lds @@ -56,5 +56,5 @@ SECTIONS . = ALIGN(4); __bss_end = .; } - __end = . ; + _end = . ; } diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h index 16e0d0ef0a..958018c190 100644 --- a/arch/microblaze/include/asm/processor.h +++ b/arch/microblaze/include/asm/processor.h @@ -8,7 +8,7 @@ /* References to section boundaries */ -extern char __end[]; +extern char _end[]; extern char __text_start[]; /* Microblaze board initialization function */ -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 03/10] microblaze: spl: add board_boot_order() implementation 2021-11-17 12:40 [PATCH 01/10] xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze Ovidiu Panait 2021-11-17 12:40 ` [PATCH 02/10] microblaze: u-boot.lds: replace __end symbol with _end Ovidiu Panait @ 2021-11-17 12:40 ` Ovidiu Panait 2021-11-17 12:40 ` [PATCH 04/10] microblaze: Kconfig: SPL dependencies fixup Ovidiu Panait ` (6 subsequent siblings) 8 siblings, 0 replies; 12+ messages in thread From: Ovidiu Panait @ 2021-11-17 12:40 UTC (permalink / raw) To: u-boot; +Cc: monstr, Ovidiu Panait Microblaze has three boot modes defined in microblaze/include/asm/spl.h, but only booting from NOR flash is currently useable. Add a custom board_boot_order() implementation so that RAM and SPI boot modes can also be selected if the corresponding load-image support is present. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> --- arch/microblaze/cpu/spl.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c index 86522f8447..06d4af99b2 100644 --- a/arch/microblaze/cpu/spl.c +++ b/arch/microblaze/cpu/spl.c @@ -15,9 +15,11 @@ bool boot_linux; -u32 spl_boot_device(void) +void board_boot_order(u32 *spl_boot_list) { - return BOOT_DEVICE_NOR; + spl_boot_list[0] = BOOT_DEVICE_NOR; + spl_boot_list[1] = BOOT_DEVICE_RAM; + spl_boot_list[2] = BOOT_DEVICE_SPI; } /* Board initialization after bss clearance */ -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 04/10] microblaze: Kconfig: SPL dependencies fixup 2021-11-17 12:40 [PATCH 01/10] xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze Ovidiu Panait 2021-11-17 12:40 ` [PATCH 02/10] microblaze: u-boot.lds: replace __end symbol with _end Ovidiu Panait 2021-11-17 12:40 ` [PATCH 03/10] microblaze: spl: add board_boot_order() implementation Ovidiu Panait @ 2021-11-17 12:40 ` Ovidiu Panait 2021-11-17 12:40 ` [PATCH 05/10] microblaze: start.S: use stack space as scratch memory for endian offset Ovidiu Panait ` (5 subsequent siblings) 8 siblings, 0 replies; 12+ messages in thread From: Ovidiu Panait @ 2021-11-17 12:40 UTC (permalink / raw) To: u-boot; +Cc: monstr, Ovidiu Panait, Masahiro Yamada Enable SPL_LIBCOMMON_SUPPORT and SPL_LIBGENERIC_SUPPORT if CONFIG_SPL=y, in order to fix the following link failures: common/spl/spl.o: in function `board_init_r': common/spl/spl.c:755: undefined reference to `puts' ... common/spl/spl.o: in function `board_init_r': common/spl/spl.c:756: undefined reference to `hang' common/spl/spl.c:740: undefined reference to `memset' Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> --- arch/microblaze/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index 99a17bccb3..a25a95a013 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -15,6 +15,8 @@ config TARGET_MICROBLAZE_GENERIC select DM_SERIAL select OF_CONTROL select SUPPORT_SPL + select SPL_LIBCOMMON_SUPPORT if SPL + select SPL_LIBGENERIC_SUPPORT if SPL select SYSRESET select DM_SPI select DM_SPI_FLASH -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 05/10] microblaze: start.S: use stack space as scratch memory for endian offset 2021-11-17 12:40 [PATCH 01/10] xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze Ovidiu Panait ` (2 preceding siblings ...) 2021-11-17 12:40 ` [PATCH 04/10] microblaze: Kconfig: SPL dependencies fixup Ovidiu Panait @ 2021-11-17 12:40 ` Ovidiu Panait 2021-11-17 12:40 ` [PATCH 06/10] microblaze: drop CONFIG_SYS_RESET_ADDRESS macro Ovidiu Panait ` (4 subsequent siblings) 8 siblings, 0 replies; 12+ messages in thread From: Ovidiu Panait @ 2021-11-17 12:40 UTC (permalink / raw) To: u-boot; +Cc: monstr, Ovidiu Panait To simpify the code, use stack space as scratch memory for endian offset calculation, rather than saving/restoring the first unused MB vector. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> --- arch/microblaze/cpu/start.S | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 463e0feba4..a1c06108d7 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -125,10 +125,8 @@ __setup_exceptions: * 4b) BIG endian - r10 contains 0x0 because 0x2 offset is on addr 0x3 */ addik r6, r0, 0x2 /* BIG/LITTLE endian offset */ - lwi r7, r0, 0x28 - swi r6, r0, 0x28 /* used first unused MB vector */ - lbui r10, r0, 0x28 /* used first unused MB vector */ - swi r7, r0, 0x28 + sw r6, r1, r0 + lbu r10, r1, r0 /* add opcode instruction for 32bit jump - 2 instruction imm & brai */ addi r2, r0, 0xb0000000 /* hex b000 opcode imm */ -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 06/10] microblaze: drop CONFIG_SYS_RESET_ADDRESS macro 2021-11-17 12:40 [PATCH 01/10] xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze Ovidiu Panait ` (3 preceding siblings ...) 2021-11-17 12:40 ` [PATCH 05/10] microblaze: start.S: use stack space as scratch memory for endian offset Ovidiu Panait @ 2021-11-17 12:40 ` Ovidiu Panait 2021-11-17 12:40 ` [PATCH 07/10] microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Ovidiu Panait ` (3 subsequent siblings) 8 siblings, 0 replies; 12+ messages in thread From: Ovidiu Panait @ 2021-11-17 12:40 UTC (permalink / raw) To: u-boot; +Cc: monstr, Ovidiu Panait Microblaze is one the last two users of the CONFIG_SYS_RESET_ADDRESS macro (the other is arch/powerpc/cpu/mpc8xx/cpu.c, but the macro is not defined anywhere in powerpc code, so it should be removed there too). Replace CONFIG_SYS_RESET_ADDRESS usage in start.S with CONFIG_SYS_TEXT_BASE. If the reset address should really be user-configurable, a new Kconfig option could be added. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> --- arch/microblaze/cpu/start.S | 4 +--- include/configs/microblaze-generic.h | 3 --- 2 files changed, 1 insertion(+), 6 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index a1c06108d7..74ed998c55 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -132,19 +132,17 @@ __setup_exceptions: addi r2, r0, 0xb0000000 /* hex b000 opcode imm */ addi r3, r0, 0xb8080000 /* hew b808 opcode brai */ -#ifdef CONFIG_SYS_RESET_ADDRESS /* reset address */ swi r2, r0, 0x0 /* reset address - imm opcode */ swi r3, r0, 0x4 /* reset address - brai opcode */ - addik r6, r0, CONFIG_SYS_RESET_ADDRESS + addik r6, r0, CONFIG_SYS_TEXT_BASE sw r6, r1, r0 lhu r7, r1, r10 rsubi r8, r10, 0x2 sh r7, r0, r8 rsubi r8, r10, 0x6 sh r6, r0, r8 -#endif #ifdef CONFIG_SYS_USR_EXCEP /* user_vector_exception */ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index e7882fb607..975580e4d4 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -21,9 +21,6 @@ # define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} -/* setting reset address */ -/*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ - /* Stack location before relocation */ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_F_LEN) -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 07/10] microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig 2021-11-17 12:40 [PATCH 01/10] xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze Ovidiu Panait ` (4 preceding siblings ...) 2021-11-17 12:40 ` [PATCH 06/10] microblaze: drop CONFIG_SYS_RESET_ADDRESS macro Ovidiu Panait @ 2021-11-17 12:40 ` Ovidiu Panait 2021-11-29 14:04 ` Michal Simek 2021-11-17 12:40 ` [PATCH 08/10] microblaze: add Kconfig symbol for the vector base address Ovidiu Panait ` (2 subsequent siblings) 8 siblings, 1 reply; 12+ messages in thread From: Ovidiu Panait @ 2021-11-17 12:40 UTC (permalink / raw) To: u-boot Cc: monstr, Ovidiu Panait, Marek Behún, Patrick Delaunay, Priyanka Jain, Simon Glass, Stefan Roese Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> --- arch/microblaze/cpu/exception.c | 2 +- arch/microblaze/cpu/start.S | 2 +- board/xilinx/microblaze-generic/Kconfig | 4 ++++ include/configs/microblaze-generic.h | 2 -- scripts/config_whitelist.txt | 1 - 5 files changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/microblaze/cpu/exception.c b/arch/microblaze/cpu/exception.c index b8dedc4e19..e9476abedb 100644 --- a/arch/microblaze/cpu/exception.c +++ b/arch/microblaze/cpu/exception.c @@ -55,7 +55,7 @@ void _hw_exception_handler (void) hang(); } -#ifdef CONFIG_SYS_USR_EXCEP +#if CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USR_EXCEP) void _exception_handler (void) { puts("User vector_exception\n"); diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 74ed998c55..68f97f426c 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -144,7 +144,7 @@ __setup_exceptions: rsubi r8, r10, 0x6 sh r6, r0, r8 -#ifdef CONFIG_SYS_USR_EXCEP +#if CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USR_EXCEP) /* user_vector_exception */ swi r2, r0, 0x8 /* user vector exception - imm opcode */ swi r3, r0, 0xC /* user vector exception - brai opcode */ diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index f2fa0f72b1..e3243297fe 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -38,4 +38,8 @@ config XILINX_MICROBLAZE0_HW_VER string "Core version number" default "7.10.d" +config XILINX_MICROBLAZE0_USR_EXCEP + bool "MicroBlaze user exception support" + default y + endif diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 975580e4d4..28f67e30d5 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -54,8 +54,6 @@ #define CONFIG_HOSTNAME "microblaze-generic" /* architecture dependent code */ -#define CONFIG_SYS_USR_EXCEP /* user exception */ - #if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP) #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na) #else diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index b9c1c61e13..c53c2c3801 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -2870,7 +2870,6 @@ CONFIG_SYS_USE_MMC CONFIG_SYS_USE_NAND CONFIG_SYS_USE_NANDFLASH CONFIG_SYS_USE_NORFLASH -CONFIG_SYS_USR_EXCEP CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 07/10] microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig 2021-11-17 12:40 ` [PATCH 07/10] microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Ovidiu Panait @ 2021-11-29 14:04 ` Michal Simek 0 siblings, 0 replies; 12+ messages in thread From: Michal Simek @ 2021-11-29 14:04 UTC (permalink / raw) To: Ovidiu Panait Cc: U-Boot, Marek Behún, Patrick Delaunay, Priyanka Jain, Simon Glass, Stefan Roese st 17. 11. 2021 v 13:41 odesílatel Ovidiu Panait <ovidiu.panait@windriver.com> napsal: > > Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to > XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of > microblaze-generic Kconfig options. > > Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> > --- > > arch/microblaze/cpu/exception.c | 2 +- > arch/microblaze/cpu/start.S | 2 +- > board/xilinx/microblaze-generic/Kconfig | 4 ++++ > include/configs/microblaze-generic.h | 2 -- > scripts/config_whitelist.txt | 1 - > 5 files changed, 6 insertions(+), 5 deletions(-) > > diff --git a/arch/microblaze/cpu/exception.c b/arch/microblaze/cpu/exception.c > index b8dedc4e19..e9476abedb 100644 > --- a/arch/microblaze/cpu/exception.c > +++ b/arch/microblaze/cpu/exception.c > @@ -55,7 +55,7 @@ void _hw_exception_handler (void) > hang(); > } > > -#ifdef CONFIG_SYS_USR_EXCEP > +#if CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USR_EXCEP) > void _exception_handler (void) > { > puts("User vector_exception\n"); > diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S > index 74ed998c55..68f97f426c 100644 > --- a/arch/microblaze/cpu/start.S > +++ b/arch/microblaze/cpu/start.S > @@ -144,7 +144,7 @@ __setup_exceptions: > rsubi r8, r10, 0x6 > sh r6, r0, r8 > > -#ifdef CONFIG_SYS_USR_EXCEP > +#if CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USR_EXCEP) > /* user_vector_exception */ > swi r2, r0, 0x8 /* user vector exception - imm opcode */ > swi r3, r0, 0xC /* user vector exception - brai opcode */ > diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig > index f2fa0f72b1..e3243297fe 100644 > --- a/board/xilinx/microblaze-generic/Kconfig > +++ b/board/xilinx/microblaze-generic/Kconfig > @@ -38,4 +38,8 @@ config XILINX_MICROBLAZE0_HW_VER > string "Core version number" > default "7.10.d" > > +config XILINX_MICROBLAZE0_USR_EXCEP > + bool "MicroBlaze user exception support" > + default y Can you please write a small paragraph here? Thanks, Michal ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 08/10] microblaze: add Kconfig symbol for the vector base address 2021-11-17 12:40 [PATCH 01/10] xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze Ovidiu Panait ` (5 preceding siblings ...) 2021-11-17 12:40 ` [PATCH 07/10] microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Ovidiu Panait @ 2021-11-17 12:40 ` Ovidiu Panait 2021-11-29 14:10 ` Michal Simek 2021-11-17 12:40 ` [PATCH 09/10] microblaze: start.S: add support for configurable " Ovidiu Panait 2021-11-17 12:40 ` [PATCH 10/10] microblaze: branch to base vector address on reset Ovidiu Panait 8 siblings, 1 reply; 12+ messages in thread From: Ovidiu Panait @ 2021-11-17 12:40 UTC (permalink / raw) To: u-boot; +Cc: monstr, Ovidiu Panait MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> --- board/xilinx/microblaze-generic/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index e3243297fe..0aa88feb55 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -42,4 +42,8 @@ config XILINX_MICROBLAZE0_USR_EXCEP bool "MicroBlaze user exception support" default y +config XILINX_MICROBLAZE0_VECTOR_BASE_ADDR + hex "Location of MicroBlaze vectors" + default 0x0 + endif -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 08/10] microblaze: add Kconfig symbol for the vector base address 2021-11-17 12:40 ` [PATCH 08/10] microblaze: add Kconfig symbol for the vector base address Ovidiu Panait @ 2021-11-29 14:10 ` Michal Simek 0 siblings, 0 replies; 12+ messages in thread From: Michal Simek @ 2021-11-29 14:10 UTC (permalink / raw) To: Ovidiu Panait; +Cc: U-Boot st 17. 11. 2021 v 13:41 odesílatel Ovidiu Panait <ovidiu.panait@windriver.com> napsal: > > MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS > configuration parameter). Current code assumes that the reset vector > location is always 0x0. > > Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user > can adjust the reset vector address. > > Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> > --- > > board/xilinx/microblaze-generic/Kconfig | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig > index e3243297fe..0aa88feb55 100644 > --- a/board/xilinx/microblaze-generic/Kconfig > +++ b/board/xilinx/microblaze-generic/Kconfig > @@ -42,4 +42,8 @@ config XILINX_MICROBLAZE0_USR_EXCEP > bool "MicroBlaze user exception support" > default y > > +config XILINX_MICROBLAZE0_VECTOR_BASE_ADDR > + hex "Location of MicroBlaze vectors" > + default 0x0 > + Here also having a small paragraph for everybody to understand what's going on would be useful. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 09/10] microblaze: start.S: add support for configurable vector base address 2021-11-17 12:40 [PATCH 01/10] xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze Ovidiu Panait ` (6 preceding siblings ...) 2021-11-17 12:40 ` [PATCH 08/10] microblaze: add Kconfig symbol for the vector base address Ovidiu Panait @ 2021-11-17 12:40 ` Ovidiu Panait 2021-11-17 12:40 ` [PATCH 10/10] microblaze: branch to base vector address on reset Ovidiu Panait 8 siblings, 0 replies; 12+ messages in thread From: Ovidiu Panait @ 2021-11-17 12:40 UTC (permalink / raw) To: u-boot; +Cc: monstr, Ovidiu Panait Current code assumes that the vector base address is always at 0x0. However, this value is configurable for MicroBlaze, so update the __setup_exceptions routine to work with any vector base address. The r4 register is reserved for the vector base address inside __setup_exceptions and the function prologe/epilogue are also updated to save and restore r4. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> --- arch/microblaze/cpu/start.S | 58 ++++++++++++++++++++----------------- 1 file changed, 32 insertions(+), 26 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 68f97f426c..645f7cb038 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -105,15 +105,17 @@ clear_bss: * r10: Stores little/big endian offset for vectors * r2: Stores imm opcode * r3: Stores brai opcode + * r4: Stores the vector base address */ __setup_exceptions: - addik r1, r1, -28 + addik r1, r1, -32 swi r2, r1, 4 swi r3, r1, 8 - swi r6, r1, 12 - swi r7, r1, 16 - swi r8, r1, 20 - swi r10, r1, 24 + swi r4, r1, 12 + swi r6, r1, 16 + swi r7, r1, 20 + swi r8, r1, 24 + swi r10, r1, 28 /* Find-out if u-boot is running on BIG/LITTLE endian platform * There are some steps which is necessary to keep in mind: @@ -132,22 +134,25 @@ __setup_exceptions: addi r2, r0, 0xb0000000 /* hex b000 opcode imm */ addi r3, r0, 0xb8080000 /* hew b808 opcode brai */ + /* Store the vector base address in r4 */ + addi r4, r0, CONFIG_XILINX_MICROBLAZE0_VECTOR_BASE_ADDR + /* reset address */ - swi r2, r0, 0x0 /* reset address - imm opcode */ - swi r3, r0, 0x4 /* reset address - brai opcode */ + swi r2, r4, 0x0 /* reset address - imm opcode */ + swi r3, r4, 0x4 /* reset address - brai opcode */ addik r6, r0, CONFIG_SYS_TEXT_BASE sw r6, r1, r0 lhu r7, r1, r10 rsubi r8, r10, 0x2 - sh r7, r0, r8 + sh r7, r4, r8 rsubi r8, r10, 0x6 - sh r6, r0, r8 + sh r6, r4, r8 #if CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USR_EXCEP) /* user_vector_exception */ - swi r2, r0, 0x8 /* user vector exception - imm opcode */ - swi r3, r0, 0xC /* user vector exception - brai opcode */ + swi r2, r4, 0x8 /* user vector exception - imm opcode */ + swi r3, r4, 0xC /* user vector exception - brai opcode */ addik r6, r5, _exception_handler sw r6, r1, r0 @@ -173,42 +178,43 @@ __setup_exceptions: */ lhu r7, r1, r10 rsubi r8, r10, 0xa - sh r7, r0, r8 + sh r7, r4, r8 rsubi r8, r10, 0xe - sh r6, r0, r8 + sh r6, r4, r8 #endif /* interrupt_handler */ - swi r2, r0, 0x10 /* interrupt - imm opcode */ - swi r3, r0, 0x14 /* interrupt - brai opcode */ + swi r2, r4, 0x10 /* interrupt - imm opcode */ + swi r3, r4, 0x14 /* interrupt - brai opcode */ addik r6, r5, _interrupt_handler sw r6, r1, r0 lhu r7, r1, r10 rsubi r8, r10, 0x12 - sh r7, r0, r8 + sh r7, r4, r8 rsubi r8, r10, 0x16 - sh r6, r0, r8 + sh r6, r4, r8 /* hardware exception */ - swi r2, r0, 0x20 /* hardware exception - imm opcode */ - swi r3, r0, 0x24 /* hardware exception - brai opcode */ + swi r2, r4, 0x20 /* hardware exception - imm opcode */ + swi r3, r4, 0x24 /* hardware exception - brai opcode */ addik r6, r5, _hw_exception_handler sw r6, r1, r0 lhu r7, r1, r10 rsubi r8, r10, 0x22 - sh r7, r0, r8 + sh r7, r4, r8 rsubi r8, r10, 0x26 - sh r6, r0, r8 + sh r6, r4, r8 - lwi r10, r1, 24 - lwi r8, r1, 20 - lwi r7, r1, 16 - lwi r6, r1, 12 + lwi r10, r1, 28 + lwi r8, r1, 24 + lwi r7, r1, 20 + lwi r6, r1, 16 + lwi r4, r1, 12 lwi r3, r1, 8 lwi r2, r1, 4 - addik r1, r1, 28 + addik r1, r1, 32 rtsd r15, 8 or r0, r0, r0 -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 10/10] microblaze: branch to base vector address on reset 2021-11-17 12:40 [PATCH 01/10] xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze Ovidiu Panait ` (7 preceding siblings ...) 2021-11-17 12:40 ` [PATCH 09/10] microblaze: start.S: add support for configurable " Ovidiu Panait @ 2021-11-17 12:40 ` Ovidiu Panait 8 siblings, 0 replies; 12+ messages in thread From: Ovidiu Panait @ 2021-11-17 12:40 UTC (permalink / raw) To: u-boot; +Cc: monstr, Ovidiu Panait Current code assumes that the vector base address is always at 0x0. However, this value is configurable for MicroBlaze using the CONFIG_XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option. Update the reset routines to branch to this location instead. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> --- arch/microblaze/cpu/spl.c | 6 ++++-- drivers/sysreset/sysreset_microblaze.c | 6 ++++-- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c index 06d4af99b2..cea6d56f16 100644 --- a/arch/microblaze/cpu/spl.c +++ b/arch/microblaze/cpu/spl.c @@ -12,6 +12,7 @@ #include <spl.h> #include <asm/io.h> #include <asm/u-boot.h> +#include <linux/stringify.h> bool boot_linux; @@ -54,8 +55,9 @@ int spl_start_uboot(void) int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { - __asm__ __volatile__ ("mts rmsr, r0;" \ - "bra r0"); + __asm__ __volatile__ ( + "mts rmsr, r0;" \ + "brai " __stringify(CONFIG_XILINX_MICROBLAZE0_VECTOR_BASE_ADDR)); return 0; } diff --git a/drivers/sysreset/sysreset_microblaze.c b/drivers/sysreset/sysreset_microblaze.c index 514c95817f..83a7f77ac4 100644 --- a/drivers/sysreset/sysreset_microblaze.c +++ b/drivers/sysreset/sysreset_microblaze.c @@ -8,13 +8,15 @@ #include <errno.h> #include <sysreset.h> #include <linux/err.h> +#include <linux/stringify.h> static int microblaze_sysreset_request(struct udevice *dev, enum sysreset_t type) { puts("Microblaze soft reset sysreset\n"); - __asm__ __volatile__ (" mts rmsr, r0;" \ - "bra r0"); + __asm__ __volatile__ ( + "mts rmsr, r0;" \ + "brai " __stringify(CONFIG_XILINX_MICROBLAZE0_VECTOR_BASE_ADDR)); return -EINPROGRESS; } -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2021-11-29 14:10 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-11-17 12:40 [PATCH 01/10] xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze Ovidiu Panait 2021-11-17 12:40 ` [PATCH 02/10] microblaze: u-boot.lds: replace __end symbol with _end Ovidiu Panait 2021-11-17 12:40 ` [PATCH 03/10] microblaze: spl: add board_boot_order() implementation Ovidiu Panait 2021-11-17 12:40 ` [PATCH 04/10] microblaze: Kconfig: SPL dependencies fixup Ovidiu Panait 2021-11-17 12:40 ` [PATCH 05/10] microblaze: start.S: use stack space as scratch memory for endian offset Ovidiu Panait 2021-11-17 12:40 ` [PATCH 06/10] microblaze: drop CONFIG_SYS_RESET_ADDRESS macro Ovidiu Panait 2021-11-17 12:40 ` [PATCH 07/10] microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Ovidiu Panait 2021-11-29 14:04 ` Michal Simek 2021-11-17 12:40 ` [PATCH 08/10] microblaze: add Kconfig symbol for the vector base address Ovidiu Panait 2021-11-29 14:10 ` Michal Simek 2021-11-17 12:40 ` [PATCH 09/10] microblaze: start.S: add support for configurable " Ovidiu Panait 2021-11-17 12:40 ` [PATCH 10/10] microblaze: branch to base vector address on reset Ovidiu Panait
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