* [PATCH qom-next 00/59] QOM CPUState, part 4: CPU_COMMON
@ 2012-05-23 3:07 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Anthony Liguori, Paolo Bonzini,
Igor Mammedov, Richard Henderson, Peter Maydell,
Edgar E. Iglesias, Michael Walle, Aurélien Jarno,
Alexander Graf, David Gibson, qemu-ppc, Blue Swirl, Guan Xuetao,
Max Filippov, Avi Kivity, Marcelo Tosatti, Jan Kiszka, kvm,
Stefano Stabellini, xen-devel
Hello,
This series, based on qom-next and the two pending ARM cleanup patches, starts
moving fields from CPUArchState (CPU_COMMON) to QOM CPUState. It stops short
of moving all easily possible fields (i.e., those not depending on target_ulong
or target_phys_addr_t) since the series got too long already and is expected to
spark some controversies due to collisions with several other series.
The series is structured as preparatory refactorings interwoven with the actual
touch-all movement of one field ("cpu: Move ... to CPUState"), optionally
followed by type signature cleanups, culminating in the movement of two fields
that are tied together by VMState.
Thus, unlike part 3, this series cannot randomly be cherry-picked to
<arch>-next trees, only select parts thereof (e.g., use of cpu_s390x_init()).
Please review and test.
The use of cpu_index vs. cpuid_apic_id for x86 cpu[n] still needs some thought.
The question was brought up whether adding the CPUs a child<X86CPU> properties
should be generalized outside the machine scope - I don't think so, since CPU
hotplug seems highly architecture-specific and not applicable everywhere (SoCs).
Blue will likely have a superb idea how to avoid the cpu_tlb_flush() indirection
that I needed for VMState, but apart from having been a lot of dumb typing, it
works fine as interim solution. "Blah." wasn't terribly helpful as a comment.
I have checked this to compile on ...
* openSUSE 12.1 x86_64 w/KVM,
* openSUSE Factory ppc w/KVM,
* SLES 11 SP2 s390x w/KVM,
* mingw32/64 cross-builds,
* OpenBSD 5.1 amd64 (not for final version though, master doesn't build).
Untested: Xen.
Only some targets including i386 were lightly runtime-tested.
Available for testing and cherry-picking (not pulling!) from:
git://github.com/afaerber/qemu-cpu.git qom-cpu-common.v1
https://github.com/afaerber/qemu-cpu/commits/qom-cpu-common.v1
Regards,
Andreas
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Igor Mammedov <imammedo@redhat.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Aurélien Jarno <aurelien@aurel32.net>
Cc: Alexander Graf <agraf@suse.de>
Cc: David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-ppc <qemu-ppc@nongnu.org>
Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Avi Kivity <avi@redhat.com>
Cc: Marcelo Tosatti <mtosatti@redhat.com>
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Cc: kvm <kvm@vger.kernel.org>
Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Cc: xen-devel <xen-devel@lists.xensource.com>
Changes from preview in Igor's apic thread:
* Use g_strdup_printf() for "cpu[x]" to be safe wrt length and nul termination.
* Clean up removal of x86 version 5 load/save support.
* Convert use of env->halted in s390x KVM code.
* Convert some uses of env->halted/interrupt_request in ppc KVM code.
* Convert some uses of env->halted in Xen code, prepend cpu_x86_init() patch.
* Avoid using POWERPC_CPU() / SPARC_CPU() macros inside *_set_irq() functions.
Andreas Färber (59):
qemu-thread: Let qemu_thread_is_self() return bool
cpu: Move CPU_COMMON_THREAD into CPUState
cpu: Move thread field into CPUState
pc: Add CPU as /machine/cpu[n]
apic: Replace cpu_env pointer by X86CPU link
pc: Pass X86CPU to cpu_is_bsp()
cpu: Move thread_kicked to CPUState
Makefile.dis: Add include/ to include path
cpus: Pass CPUState to qemu_cpu_is_self()
cpus: Pass CPUState to qemu_cpu_kick_thread()
cpu: Move created field to CPUState
cpu: Move stop field to CPUState
ppce500_spin: Store PowerPCCPU in SpinKick
cpu: Move stopped field to CPUState
cpus: Pass CPUState to cpu_is_stopped()
cpus: Pass CPUState to cpu_can_run()
cpu: Move halt_cond to CPUState
cpus: Pass CPUState to qemu_tcg_cpu_thread_fn
cpus: Pass CPUState to qemu_tcg_init_vcpu()
ppc: Pass PowerPCCPU to ppc6xx_set_irq()
ppc: Pass PowerPCCPU to ppc970_set_irq()
ppc: Pass PowerPCCPU to power7_set_irq()
ppc: Pass PowerPCCPU to ppc40x_set_irq()
ppc: Pass PowerPCCPU to ppce500_set_irq()
sun4m: Pass SPARCCPU to cpu_set_irq()
sun4m: Pass SPARCCPU to cpu_kick_irq()
sun4u: Pass SPARCCPU to {,s,hs}tick_irq() and cpu_timer_create()
sun4u: Pass SPARCCPU to cpu_kick_irq()
target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU
target-s390x: Let cpu_s390x_init() return S390CPU
s390-virtio: Use cpu_s390x_init() to obtain S390CPU
s390-virtio: Let s390_cpu_addr2state() return S390CPU
target-s390x: Pass S390CPU to s390_cpu_restart()
cpus: Pass CPUState to qemu_cpu_kick()
cpu: Move queued_work_{first,last} to CPUState
cpus: Pass CPUState to flush_queued_work()
cpus: Pass CPUState to qemu_wait_io_event_common()
target-ppc: Pass PowerPCCPU to powerpc_excp()
target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall
spapr: Pass PowerPCCPU to spapr_hypercall()
spapr: Pass PowerPCCPU to hypercalls
xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
cpus: Pass CPUState to [qemu_]cpu_has_work()
target-i386: Pass X86CPU to kvm_mce_inject()
target-i386: Pass X86CPU to cpu_x86_inject_mce()
cpus: Pass CPUState to run_on_cpu()
cpu: Move thread_id to CPUState
target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()
target-i386: Drop version 5 CPU VMState support
target-i386: Pass X86CPU to kvm_get_mp_state()
target-i386: Pass X86CPU to kvm_handle_halt()
target-mips: Pass MIPSCPU to mips_tc_wake()
target-mips: Pass MIPSCPU to mips_vpe_is_wfi()
target-mips: Pass MIPSCPU to mips_tc_sleep()
target-mips: Pass MIPSCPU to mips_vpe_sleep()
sun4u: Pass SPARCCPU to cpu_set_ivec_irq()
cpu: Introduce mandatory tlb_flush callback
xen_machine_pv: Use cpu_x86_init() to obtain X86CPU
cpu: Move halted and interrupt_request to CPUState
Makefile.dis | 1 +
cpu-all.h | 4 -
cpu-defs.h | 19 ----
cpu-exec.c | 40 ++++----
cpus.c | 233 +++++++++++++++++++++++--------------------
exec.c | 44 ++++++---
gdbstub.c | 4 +-
hw/apic.c | 34 ++++---
hw/apic.h | 2 +-
hw/apic_common.c | 14 ++-
hw/apic_internal.h | 2 +-
hw/kvm/apic.c | 9 +-
hw/kvmvapic.c | 6 +-
hw/leon3.c | 2 +-
hw/omap1.c | 4 +-
hw/pc.c | 31 +++++-
hw/ppc.c | 69 ++++++++-----
hw/ppce500_mpc8544ds.c | 4 +-
hw/ppce500_spin.c | 15 ++--
hw/pxa2xx_gpio.c | 3 +-
hw/pxa2xx_pic.c | 2 +-
hw/s390-virtio-bus.c | 6 +-
hw/s390-virtio.c | 26 +++--
hw/spapr.c | 10 +-
hw/spapr.h | 4 +-
hw/spapr_hcall.c | 42 +++++---
hw/spapr_llan.c | 10 +-
hw/spapr_rtas.c | 13 ++-
hw/spapr_vio.c | 12 +-
hw/spapr_vty.c | 4 +-
hw/sun4m.c | 31 +++---
hw/sun4u.c | 47 +++++----
hw/xen_machine_pv.c | 6 +-
hw/xics.c | 11 ++-
hw/xtensa_pic.c | 14 ++-
include/qemu/cpu.h | 81 +++++++++++++++
kvm-all.c | 15 ++-
monitor.c | 6 +-
qemu-common.h | 2 -
qemu-thread-posix.c | 2 +-
qemu-thread-win32.c | 2 +-
qemu-thread.h | 3 +-
qom/cpu.c | 11 ++
target-alpha/cpu.c | 18 +++-
target-alpha/cpu.h | 4 +-
target-alpha/translate.c | 3 +-
target-arm/cpu.c | 10 ++
target-arm/cpu.h | 4 +-
target-arm/helper.c | 3 +-
target-arm/op_helper.c | 4 +-
target-cris/cpu.c | 10 ++
target-cris/cpu.h | 4 +-
target-cris/translate.c | 4 +-
target-i386/cpu.c | 10 ++
target-i386/cpu.h | 16 ++-
target-i386/helper.c | 21 ++--
target-i386/kvm.c | 77 ++++++++------
target-i386/machine.c | 10 +--
target-i386/op_helper.c | 13 ++-
target-lm32/cpu.c | 10 ++
target-lm32/cpu.h | 4 +-
target-lm32/op_helper.c | 4 +-
target-m68k/cpu.c | 10 ++
target-m68k/cpu.h | 4 +-
target-m68k/op_helper.c | 3 +-
target-m68k/qregs.def | 1 -
target-m68k/translate.c | 6 +
target-microblaze/cpu.c | 10 ++
target-microblaze/cpu.h | 4 +-
target-mips/cpu.c | 10 ++
target-mips/cpu.h | 15 ++--
target-mips/op_helper.c | 45 ++++++---
target-mips/translate.c | 8 +-
target-ppc/cpu.h | 8 +-
target-ppc/helper.c | 48 +++++----
target-ppc/helper_regs.h | 7 +-
target-ppc/kvm.c | 25 +++--
target-ppc/op_helper.c | 8 +-
target-ppc/translate.c | 3 +-
target-ppc/translate_init.c | 10 ++
target-s390x/cpu.c | 12 ++-
target-s390x/cpu.h | 16 ++--
target-s390x/helper.c | 14 ++-
target-s390x/kvm.c | 18 ++-
target-sh4/cpu.c | 10 ++
target-sh4/cpu.h | 4 +-
target-sh4/helper.c | 5 +-
target-sh4/op_helper.c | 4 +-
target-sparc/cpu.c | 10 ++
target-sparc/cpu.h | 6 +-
target-unicore32/cpu.c | 18 +++-
target-unicore32/cpu.h | 4 +-
target-xtensa/cpu.c | 10 ++
target-xtensa/cpu.h | 4 +-
target-xtensa/op_helper.c | 4 +-
xen-all.c | 10 +-
96 files changed, 974 insertions(+), 529 deletions(-)
--
1.7.7
^ permalink raw reply [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 00/59] QOM CPUState, part 4: CPU_COMMON
@ 2012-05-23 3:07 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Guan Xuetao, kvm, Stefano Stabellini, Jan Kiszka,
Marcelo Tosatti, Edgar E. Iglesias, Alexander Graf, Blue Swirl,
Max Filippov, Michael Walle, xen-devel, qemu-ppc, Avi Kivity,
Anthony Liguori, Igor Mammedov, Paolo Bonzini, David Gibson,
Andreas Färber, Aurélien Jarno, Richard Henderson
Hello,
This series, based on qom-next and the two pending ARM cleanup patches, starts
moving fields from CPUArchState (CPU_COMMON) to QOM CPUState. It stops short
of moving all easily possible fields (i.e., those not depending on target_ulong
or target_phys_addr_t) since the series got too long already and is expected to
spark some controversies due to collisions with several other series.
The series is structured as preparatory refactorings interwoven with the actual
touch-all movement of one field ("cpu: Move ... to CPUState"), optionally
followed by type signature cleanups, culminating in the movement of two fields
that are tied together by VMState.
Thus, unlike part 3, this series cannot randomly be cherry-picked to
<arch>-next trees, only select parts thereof (e.g., use of cpu_s390x_init()).
Please review and test.
The use of cpu_index vs. cpuid_apic_id for x86 cpu[n] still needs some thought.
The question was brought up whether adding the CPUs a child<X86CPU> properties
should be generalized outside the machine scope - I don't think so, since CPU
hotplug seems highly architecture-specific and not applicable everywhere (SoCs).
Blue will likely have a superb idea how to avoid the cpu_tlb_flush() indirection
that I needed for VMState, but apart from having been a lot of dumb typing, it
works fine as interim solution. "Blah." wasn't terribly helpful as a comment.
I have checked this to compile on ...
* openSUSE 12.1 x86_64 w/KVM,
* openSUSE Factory ppc w/KVM,
* SLES 11 SP2 s390x w/KVM,
* mingw32/64 cross-builds,
* OpenBSD 5.1 amd64 (not for final version though, master doesn't build).
Untested: Xen.
Only some targets including i386 were lightly runtime-tested.
Available for testing and cherry-picking (not pulling!) from:
git://github.com/afaerber/qemu-cpu.git qom-cpu-common.v1
https://github.com/afaerber/qemu-cpu/commits/qom-cpu-common.v1
Regards,
Andreas
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Igor Mammedov <imammedo@redhat.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Aurélien Jarno <aurelien@aurel32.net>
Cc: Alexander Graf <agraf@suse.de>
Cc: David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-ppc <qemu-ppc@nongnu.org>
Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Avi Kivity <avi@redhat.com>
Cc: Marcelo Tosatti <mtosatti@redhat.com>
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Cc: kvm <kvm@vger.kernel.org>
Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Cc: xen-devel <xen-devel@lists.xensource.com>
Changes from preview in Igor's apic thread:
* Use g_strdup_printf() for "cpu[x]" to be safe wrt length and nul termination.
* Clean up removal of x86 version 5 load/save support.
* Convert use of env->halted in s390x KVM code.
* Convert some uses of env->halted/interrupt_request in ppc KVM code.
* Convert some uses of env->halted in Xen code, prepend cpu_x86_init() patch.
* Avoid using POWERPC_CPU() / SPARC_CPU() macros inside *_set_irq() functions.
Andreas Färber (59):
qemu-thread: Let qemu_thread_is_self() return bool
cpu: Move CPU_COMMON_THREAD into CPUState
cpu: Move thread field into CPUState
pc: Add CPU as /machine/cpu[n]
apic: Replace cpu_env pointer by X86CPU link
pc: Pass X86CPU to cpu_is_bsp()
cpu: Move thread_kicked to CPUState
Makefile.dis: Add include/ to include path
cpus: Pass CPUState to qemu_cpu_is_self()
cpus: Pass CPUState to qemu_cpu_kick_thread()
cpu: Move created field to CPUState
cpu: Move stop field to CPUState
ppce500_spin: Store PowerPCCPU in SpinKick
cpu: Move stopped field to CPUState
cpus: Pass CPUState to cpu_is_stopped()
cpus: Pass CPUState to cpu_can_run()
cpu: Move halt_cond to CPUState
cpus: Pass CPUState to qemu_tcg_cpu_thread_fn
cpus: Pass CPUState to qemu_tcg_init_vcpu()
ppc: Pass PowerPCCPU to ppc6xx_set_irq()
ppc: Pass PowerPCCPU to ppc970_set_irq()
ppc: Pass PowerPCCPU to power7_set_irq()
ppc: Pass PowerPCCPU to ppc40x_set_irq()
ppc: Pass PowerPCCPU to ppce500_set_irq()
sun4m: Pass SPARCCPU to cpu_set_irq()
sun4m: Pass SPARCCPU to cpu_kick_irq()
sun4u: Pass SPARCCPU to {,s,hs}tick_irq() and cpu_timer_create()
sun4u: Pass SPARCCPU to cpu_kick_irq()
target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU
target-s390x: Let cpu_s390x_init() return S390CPU
s390-virtio: Use cpu_s390x_init() to obtain S390CPU
s390-virtio: Let s390_cpu_addr2state() return S390CPU
target-s390x: Pass S390CPU to s390_cpu_restart()
cpus: Pass CPUState to qemu_cpu_kick()
cpu: Move queued_work_{first,last} to CPUState
cpus: Pass CPUState to flush_queued_work()
cpus: Pass CPUState to qemu_wait_io_event_common()
target-ppc: Pass PowerPCCPU to powerpc_excp()
target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall
spapr: Pass PowerPCCPU to spapr_hypercall()
spapr: Pass PowerPCCPU to hypercalls
xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
cpus: Pass CPUState to [qemu_]cpu_has_work()
target-i386: Pass X86CPU to kvm_mce_inject()
target-i386: Pass X86CPU to cpu_x86_inject_mce()
cpus: Pass CPUState to run_on_cpu()
cpu: Move thread_id to CPUState
target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()
target-i386: Drop version 5 CPU VMState support
target-i386: Pass X86CPU to kvm_get_mp_state()
target-i386: Pass X86CPU to kvm_handle_halt()
target-mips: Pass MIPSCPU to mips_tc_wake()
target-mips: Pass MIPSCPU to mips_vpe_is_wfi()
target-mips: Pass MIPSCPU to mips_tc_sleep()
target-mips: Pass MIPSCPU to mips_vpe_sleep()
sun4u: Pass SPARCCPU to cpu_set_ivec_irq()
cpu: Introduce mandatory tlb_flush callback
xen_machine_pv: Use cpu_x86_init() to obtain X86CPU
cpu: Move halted and interrupt_request to CPUState
Makefile.dis | 1 +
cpu-all.h | 4 -
cpu-defs.h | 19 ----
cpu-exec.c | 40 ++++----
cpus.c | 233 +++++++++++++++++++++++--------------------
exec.c | 44 ++++++---
gdbstub.c | 4 +-
hw/apic.c | 34 ++++---
hw/apic.h | 2 +-
hw/apic_common.c | 14 ++-
hw/apic_internal.h | 2 +-
hw/kvm/apic.c | 9 +-
hw/kvmvapic.c | 6 +-
hw/leon3.c | 2 +-
hw/omap1.c | 4 +-
hw/pc.c | 31 +++++-
hw/ppc.c | 69 ++++++++-----
hw/ppce500_mpc8544ds.c | 4 +-
hw/ppce500_spin.c | 15 ++--
hw/pxa2xx_gpio.c | 3 +-
hw/pxa2xx_pic.c | 2 +-
hw/s390-virtio-bus.c | 6 +-
hw/s390-virtio.c | 26 +++--
hw/spapr.c | 10 +-
hw/spapr.h | 4 +-
hw/spapr_hcall.c | 42 +++++---
hw/spapr_llan.c | 10 +-
hw/spapr_rtas.c | 13 ++-
hw/spapr_vio.c | 12 +-
hw/spapr_vty.c | 4 +-
hw/sun4m.c | 31 +++---
hw/sun4u.c | 47 +++++----
hw/xen_machine_pv.c | 6 +-
hw/xics.c | 11 ++-
hw/xtensa_pic.c | 14 ++-
include/qemu/cpu.h | 81 +++++++++++++++
kvm-all.c | 15 ++-
monitor.c | 6 +-
qemu-common.h | 2 -
qemu-thread-posix.c | 2 +-
qemu-thread-win32.c | 2 +-
qemu-thread.h | 3 +-
qom/cpu.c | 11 ++
target-alpha/cpu.c | 18 +++-
target-alpha/cpu.h | 4 +-
target-alpha/translate.c | 3 +-
target-arm/cpu.c | 10 ++
target-arm/cpu.h | 4 +-
target-arm/helper.c | 3 +-
target-arm/op_helper.c | 4 +-
target-cris/cpu.c | 10 ++
target-cris/cpu.h | 4 +-
target-cris/translate.c | 4 +-
target-i386/cpu.c | 10 ++
target-i386/cpu.h | 16 ++-
target-i386/helper.c | 21 ++--
target-i386/kvm.c | 77 ++++++++------
target-i386/machine.c | 10 +--
target-i386/op_helper.c | 13 ++-
target-lm32/cpu.c | 10 ++
target-lm32/cpu.h | 4 +-
target-lm32/op_helper.c | 4 +-
target-m68k/cpu.c | 10 ++
target-m68k/cpu.h | 4 +-
target-m68k/op_helper.c | 3 +-
target-m68k/qregs.def | 1 -
target-m68k/translate.c | 6 +
target-microblaze/cpu.c | 10 ++
target-microblaze/cpu.h | 4 +-
target-mips/cpu.c | 10 ++
target-mips/cpu.h | 15 ++--
target-mips/op_helper.c | 45 ++++++---
target-mips/translate.c | 8 +-
target-ppc/cpu.h | 8 +-
target-ppc/helper.c | 48 +++++----
target-ppc/helper_regs.h | 7 +-
target-ppc/kvm.c | 25 +++--
target-ppc/op_helper.c | 8 +-
target-ppc/translate.c | 3 +-
target-ppc/translate_init.c | 10 ++
target-s390x/cpu.c | 12 ++-
target-s390x/cpu.h | 16 ++--
target-s390x/helper.c | 14 ++-
target-s390x/kvm.c | 18 ++-
target-sh4/cpu.c | 10 ++
target-sh4/cpu.h | 4 +-
target-sh4/helper.c | 5 +-
target-sh4/op_helper.c | 4 +-
target-sparc/cpu.c | 10 ++
target-sparc/cpu.h | 6 +-
target-unicore32/cpu.c | 18 +++-
target-unicore32/cpu.h | 4 +-
target-xtensa/cpu.c | 10 ++
target-xtensa/cpu.h | 4 +-
target-xtensa/op_helper.c | 4 +-
xen-all.c | 10 +-
96 files changed, 974 insertions(+), 529 deletions(-)
--
1.7.7
^ permalink raw reply [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 01/59] qemu-thread: Let qemu_thread_is_self() return bool
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Stefan Weil, Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
qemu-thread-posix.c | 2 +-
qemu-thread-win32.c | 2 +-
qemu-thread.h | 3 ++-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/qemu-thread-posix.c b/qemu-thread-posix.c
index 9e1b5fb..8fbabda 100644
--- a/qemu-thread-posix.c
+++ b/qemu-thread-posix.c
@@ -151,7 +151,7 @@ void qemu_thread_get_self(QemuThread *thread)
thread->thread = pthread_self();
}
-int qemu_thread_is_self(QemuThread *thread)
+bool qemu_thread_is_self(QemuThread *thread)
{
return pthread_equal(pthread_self(), thread->thread);
}
diff --git a/qemu-thread-win32.c b/qemu-thread-win32.c
index 3524c8b..177b398 100644
--- a/qemu-thread-win32.c
+++ b/qemu-thread-win32.c
@@ -330,7 +330,7 @@ HANDLE qemu_thread_get_handle(QemuThread *thread)
return handle;
}
-int qemu_thread_is_self(QemuThread *thread)
+bool qemu_thread_is_self(QemuThread *thread)
{
return GetCurrentThreadId() == thread->tid;
}
diff --git a/qemu-thread.h b/qemu-thread.h
index a78a8f2..05fdaaf 100644
--- a/qemu-thread.h
+++ b/qemu-thread.h
@@ -2,6 +2,7 @@
#define __QEMU_THREAD_H 1
#include <inttypes.h>
+#include <stdbool.h>
typedef struct QemuMutex QemuMutex;
typedef struct QemuCond QemuCond;
@@ -42,7 +43,7 @@ void qemu_thread_create(QemuThread *thread,
void *arg, int mode);
void *qemu_thread_join(QemuThread *thread);
void qemu_thread_get_self(QemuThread *thread);
-int qemu_thread_is_self(QemuThread *thread);
+bool qemu_thread_is_self(QemuThread *thread);
void qemu_thread_exit(void *retval);
#endif
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 02/59] cpu: Move CPU_COMMON_THREAD into CPUState
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
(?)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
CPU_COMMON_THREAD was only used for Windows, adding an hThread field
to CPU_COMMON.
Move the field into QOM CPUState and change its type to HANDLE,
which it is assigned from. This requires Windows headers, pulled in
through qemu-thread.h.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-defs.h | 9 ---------
cpus.c | 10 +++++++---
include/qemu/cpu.h | 5 +++++
3 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/cpu-defs.h b/cpu-defs.h
index f49e950..d0dd781 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -151,14 +151,6 @@ typedef struct CPUWatchpoint {
QTAILQ_ENTRY(CPUWatchpoint) entry;
} CPUWatchpoint;
-#ifdef _WIN32
-#define CPU_COMMON_THREAD \
- void *hThread;
-
-#else
-#define CPU_COMMON_THREAD
-#endif
-
#define CPU_TEMP_BUF_NLONGS 128
#define CPU_COMMON \
struct TranslationBlock *current_tb; /* currently executing TB */ \
@@ -217,7 +209,6 @@ typedef struct CPUWatchpoint {
uint32_t stop; /* Stop request */ \
uint32_t stopped; /* Artificially stopped */ \
struct QemuThread *thread; \
- CPU_COMMON_THREAD \
struct QemuCond *halt_cond; \
int thread_kicked; \
struct qemu_work_item *queued_work_first, *queued_work_last; \
diff --git a/cpus.c b/cpus.c
index b182b3d..fcde874 100644
--- a/cpus.c
+++ b/cpus.c
@@ -852,9 +852,10 @@ static void qemu_cpu_kick_thread(CPUArchState *env)
}
#else /* _WIN32 */
if (!qemu_cpu_is_self(env)) {
- SuspendThread(env->hThread);
+ CPUState *cpu = ENV_GET_CPU(env);
+ SuspendThread(cpu->hThread);
cpu_signal(0);
- ResumeThread(env->hThread);
+ ResumeThread(cpu->hThread);
}
#endif
}
@@ -974,6 +975,9 @@ void resume_all_vcpus(void)
static void qemu_tcg_init_vcpu(void *_env)
{
CPUArchState *env = _env;
+#ifdef _WIN32
+ CPUState *cpu = ENV_GET_CPU(env);
+#endif
/* share a single thread for all cpus with TCG */
if (!tcg_cpu_thread) {
@@ -984,7 +988,7 @@ static void qemu_tcg_init_vcpu(void *_env)
qemu_thread_create(env->thread, qemu_tcg_cpu_thread_fn, env,
QEMU_THREAD_JOINABLE);
#ifdef _WIN32
- env->hThread = qemu_thread_get_handle(env->thread);
+ cpu->hThread = qemu_thread_get_handle(env->thread);
#endif
while (env->created == 0) {
qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 78b65b3..5d52e1c 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -21,6 +21,7 @@
#define QEMU_CPU_H
#include "qemu/object.h"
+#include "qemu-thread.h"
/**
* SECTION:cpu
@@ -61,6 +62,10 @@ struct CPUState {
Object parent_obj;
/*< public >*/
+#ifdef _WIN32
+ HANDLE hThread;
+#endif
+
/* TODO Move common fields from CPUArchState here. */
};
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 03/59] cpu: Move thread field into CPUState
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (2 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-defs.h | 1 -
cpus.c | 40 +++++++++++++++++++++++-----------------
include/qemu/cpu.h | 1 +
3 files changed, 24 insertions(+), 18 deletions(-)
diff --git a/cpu-defs.h b/cpu-defs.h
index d0dd781..be89684 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -208,7 +208,6 @@ typedef struct CPUWatchpoint {
uint32_t created; \
uint32_t stop; /* Stop request */ \
uint32_t stopped; /* Artificially stopped */ \
- struct QemuThread *thread; \
struct QemuCond *halt_cond; \
int thread_kicked; \
struct qemu_work_item *queued_work_first, *queued_work_last; \
diff --git a/cpus.c b/cpus.c
index fcde874..b12890b 100644
--- a/cpus.c
+++ b/cpus.c
@@ -728,10 +728,11 @@ static void qemu_kvm_wait_io_event(CPUArchState *env)
static void *qemu_kvm_cpu_thread_fn(void *arg)
{
CPUArchState *env = arg;
+ CPUState *cpu = ENV_GET_CPU(env);
int r;
qemu_mutex_lock(&qemu_global_mutex);
- qemu_thread_get_self(env->thread);
+ qemu_thread_get_self(cpu->thread);
env->thread_id = qemu_get_thread_id();
cpu_single_env = env;
@@ -767,11 +768,12 @@ static void *qemu_dummy_cpu_thread_fn(void *arg)
exit(1);
#else
CPUArchState *env = arg;
+ CPUState *cpu = ENV_GET_CPU(env);
sigset_t waitset;
int r;
qemu_mutex_lock_iothread();
- qemu_thread_get_self(env->thread);
+ qemu_thread_get_self(cpu->thread);
env->thread_id = qemu_get_thread_id();
sigemptyset(&waitset);
@@ -807,9 +809,10 @@ static void tcg_exec_all(void);
static void *qemu_tcg_cpu_thread_fn(void *arg)
{
CPUArchState *env = arg;
+ CPUState *cpu = ENV_GET_CPU(env);
qemu_tcg_init_cpu_signals();
- qemu_thread_get_self(env->thread);
+ qemu_thread_get_self(cpu->thread);
/* signal CPU creation */
qemu_mutex_lock(&qemu_global_mutex);
@@ -842,17 +845,17 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
static void qemu_cpu_kick_thread(CPUArchState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
#ifndef _WIN32
int err;
- err = pthread_kill(env->thread->thread, SIG_IPI);
+ err = pthread_kill(cpu->thread->thread, SIG_IPI);
if (err) {
fprintf(stderr, "qemu:%s: %s", __func__, strerror(err));
exit(1);
}
#else /* _WIN32 */
if (!qemu_cpu_is_self(env)) {
- CPUState *cpu = ENV_GET_CPU(env);
SuspendThread(cpu->hThread);
cpu_signal(0);
ResumeThread(cpu->hThread);
@@ -888,8 +891,9 @@ void qemu_cpu_kick_self(void)
int qemu_cpu_is_self(void *_env)
{
CPUArchState *env = _env;
+ CPUState *cpu = ENV_GET_CPU(env);
- return qemu_thread_is_self(env->thread);
+ return qemu_thread_is_self(cpu->thread);
}
void qemu_mutex_lock_iothread(void)
@@ -975,37 +979,37 @@ void resume_all_vcpus(void)
static void qemu_tcg_init_vcpu(void *_env)
{
CPUArchState *env = _env;
-#ifdef _WIN32
CPUState *cpu = ENV_GET_CPU(env);
-#endif
/* share a single thread for all cpus with TCG */
if (!tcg_cpu_thread) {
- env->thread = g_malloc0(sizeof(QemuThread));
+ cpu->thread = g_malloc0(sizeof(QemuThread));
env->halt_cond = g_malloc0(sizeof(QemuCond));
qemu_cond_init(env->halt_cond);
tcg_halt_cond = env->halt_cond;
- qemu_thread_create(env->thread, qemu_tcg_cpu_thread_fn, env,
+ qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, env,
QEMU_THREAD_JOINABLE);
#ifdef _WIN32
- cpu->hThread = qemu_thread_get_handle(env->thread);
+ cpu->hThread = qemu_thread_get_handle(cpu->thread);
#endif
while (env->created == 0) {
qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
}
- tcg_cpu_thread = env->thread;
+ tcg_cpu_thread = cpu->thread;
} else {
- env->thread = tcg_cpu_thread;
+ cpu->thread = tcg_cpu_thread;
env->halt_cond = tcg_halt_cond;
}
}
static void qemu_kvm_start_vcpu(CPUArchState *env)
{
- env->thread = g_malloc0(sizeof(QemuThread));
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->thread = g_malloc0(sizeof(QemuThread));
env->halt_cond = g_malloc0(sizeof(QemuCond));
qemu_cond_init(env->halt_cond);
- qemu_thread_create(env->thread, qemu_kvm_cpu_thread_fn, env,
+ qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, env,
QEMU_THREAD_JOINABLE);
while (env->created == 0) {
qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
@@ -1014,10 +1018,12 @@ static void qemu_kvm_start_vcpu(CPUArchState *env)
static void qemu_dummy_start_vcpu(CPUArchState *env)
{
- env->thread = g_malloc0(sizeof(QemuThread));
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->thread = g_malloc0(sizeof(QemuThread));
env->halt_cond = g_malloc0(sizeof(QemuCond));
qemu_cond_init(env->halt_cond);
- qemu_thread_create(env->thread, qemu_dummy_cpu_thread_fn, env,
+ qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, env,
QEMU_THREAD_JOINABLE);
while (env->created == 0) {
qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 5d52e1c..d20644b 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -62,6 +62,7 @@ struct CPUState {
Object parent_obj;
/*< public >*/
+ struct QemuThread *thread;
#ifdef _WIN32
HANDLE hThread;
#endif
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (3 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
2012-06-08 8:20 ` Igor Mammedov
-1 siblings, 1 reply; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Anthony Liguori, Andreas Färber, Igor Mammedov
Using the cpu_index, give the X86CPU a canonical path.
This must be done before initializing the APIC.
Signed-off-by: Igor Mammedov <niallain@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/pc.c | 12 ++++++++++++
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/hw/pc.c b/hw/pc.c
index 4167782..e9d7e05 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -945,6 +945,8 @@ static X86CPU *pc_new_cpu(const char *cpu_model)
{
X86CPU *cpu;
CPUX86State *env;
+ char *name;
+ Error *error = NULL;
cpu = cpu_x86_init(cpu_model);
if (cpu == NULL) {
@@ -952,6 +954,16 @@ static X86CPU *pc_new_cpu(const char *cpu_model)
exit(1);
}
env = &cpu->env;
+
+ name = g_strdup_printf("cpu[%d]", env->cpu_index);
+ object_property_add_child(OBJECT(qdev_get_machine()), name,
+ OBJECT(cpu), &error);
+ g_free(name);
+ if (error_is_set(&error)) {
+ qerror_report_err(error);
+ exit(1);
+ }
+
if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
env->apic_state = apic_init(env, env->cpuid_apic_id);
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 05/59] apic: Replace cpu_env pointer by X86CPU link
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (4 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
2012-07-11 10:47 ` Igor Mammedov
-1 siblings, 1 reply; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Paolo Bonzini, Anthony Liguori, Andreas Färber
Needed for converting cpu_is_bsp().
Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Paolo Bonzini <pbonzini@redhat.com>
---
hw/apic.c | 34 +++++++++++++++++++---------------
hw/apic_common.c | 14 +++++++++++---
hw/apic_internal.h | 2 +-
hw/kvm/apic.c | 9 +++++----
hw/pc.c | 9 ++++++++-
5 files changed, 44 insertions(+), 24 deletions(-)
diff --git a/hw/apic.c b/hw/apic.c
index 4eeaf88..1207c33 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -114,7 +114,7 @@ static void apic_sync_vapic(APICCommonState *s, int sync_type)
length = offsetof(VAPICState, enabled) - offsetof(VAPICState, isr);
if (sync_type & SYNC_TO_VAPIC) {
- assert(qemu_cpu_is_self(s->cpu_env));
+ assert(qemu_cpu_is_self(&s->cpu->env));
vapic_state.tpr = s->tpr;
vapic_state.enabled = 1;
@@ -158,15 +158,15 @@ static void apic_local_deliver(APICCommonState *s, int vector)
switch ((lvt >> 8) & 7) {
case APIC_DM_SMI:
- cpu_interrupt(s->cpu_env, CPU_INTERRUPT_SMI);
+ cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_SMI);
break;
case APIC_DM_NMI:
- cpu_interrupt(s->cpu_env, CPU_INTERRUPT_NMI);
+ cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_NMI);
break;
case APIC_DM_EXTINT:
- cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD);
+ cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD);
break;
case APIC_DM_FIXED:
@@ -194,7 +194,7 @@ void apic_deliver_pic_intr(DeviceState *d, int level)
reset_bit(s->irr, lvt & 0xff);
/* fall through */
case APIC_DM_EXTINT:
- cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_HARD);
+ cpu_reset_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD);
break;
}
}
@@ -255,18 +255,22 @@ static void apic_bus_deliver(const uint32_t *deliver_bitmask,
case APIC_DM_SMI:
foreach_apic(apic_iter, deliver_bitmask,
- cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_SMI) );
+ cpu_interrupt(&apic_iter->cpu->env, CPU_INTERRUPT_SMI)
+ );
return;
case APIC_DM_NMI:
foreach_apic(apic_iter, deliver_bitmask,
- cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_NMI) );
+ cpu_interrupt(&apic_iter->cpu->env, CPU_INTERRUPT_NMI)
+ );
return;
case APIC_DM_INIT:
/* normal INIT IPI sent to processors */
foreach_apic(apic_iter, deliver_bitmask,
- cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_INIT) );
+ cpu_interrupt(&apic_iter->cpu->env,
+ CPU_INTERRUPT_INIT)
+ );
return;
case APIC_DM_EXTINT:
@@ -300,7 +304,7 @@ static void apic_set_base(APICCommonState *s, uint64_t val)
/* if disabled, cannot be enabled again */
if (!(val & MSR_IA32_APICBASE_ENABLE)) {
s->apicbase &= ~MSR_IA32_APICBASE_ENABLE;
- cpu_clear_apic_feature(s->cpu_env);
+ cpu_clear_apic_feature(&s->cpu->env);
s->spurious_vec &= ~APIC_SV_ENABLE;
}
}
@@ -370,7 +374,7 @@ static void apic_update_irq(APICCommonState *s)
return;
}
if (apic_irq_pending(s) > 0) {
- cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD);
+ cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD);
} else if (apic_accept_pic_intr(&s->busdev.qdev) &&
pic_get_output(isa_pic)) {
apic_deliver_pic_intr(&s->busdev.qdev, 1);
@@ -480,18 +484,18 @@ static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask,
static void apic_startup(APICCommonState *s, int vector_num)
{
s->sipi_vector = vector_num;
- cpu_interrupt(s->cpu_env, CPU_INTERRUPT_SIPI);
+ cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_SIPI);
}
void apic_sipi(DeviceState *d)
{
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
- cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_SIPI);
+ cpu_reset_interrupt(&s->cpu->env, CPU_INTERRUPT_SIPI);
if (!s->wait_for_sipi)
return;
- cpu_x86_load_seg_cache_sipi(s->cpu_env, s->sipi_vector);
+ cpu_x86_load_seg_cache_sipi(&s->cpu->env, s->sipi_vector);
s->wait_for_sipi = 0;
}
@@ -666,7 +670,7 @@ static uint32_t apic_mem_readl(void *opaque, target_phys_addr_t addr)
case 0x08:
apic_sync_vapic(s, SYNC_FROM_VAPIC);
if (apic_report_tpr_access) {
- cpu_report_tpr_access(s->cpu_env, TPR_ACCESS_READ);
+ cpu_report_tpr_access(&s->cpu->env, TPR_ACCESS_READ);
}
val = s->tpr;
break;
@@ -768,7 +772,7 @@ static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
break;
case 0x08:
if (apic_report_tpr_access) {
- cpu_report_tpr_access(s->cpu_env, TPR_ACCESS_WRITE);
+ cpu_report_tpr_access(&s->cpu->env, TPR_ACCESS_WRITE);
}
s->tpr = val;
apic_sync_vapic(s, SYNC_TO_VAPIC);
diff --git a/hw/apic_common.c b/hw/apic_common.c
index 60b8259..46a9ff7 100644
--- a/hw/apic_common.c
+++ b/hw/apic_common.c
@@ -103,7 +103,7 @@ void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
{
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
- vapic_report_tpr_access(s->vapic, s->cpu_env, ip, access);
+ vapic_report_tpr_access(s->vapic, &s->cpu->env, ip, access);
}
void apic_report_irq_delivered(int delivered)
@@ -207,7 +207,7 @@ static void apic_reset_common(DeviceState *d)
APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
bool bsp;
- bsp = cpu_is_bsp(s->cpu_env);
+ bsp = cpu_is_bsp(&s->cpu->env);
s->apicbase = 0xfee00000 |
(bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE;
@@ -354,9 +354,16 @@ static const VMStateDescription vmstate_apic_common = {
}
};
+static void apic_common_initfn(Object *obj)
+{
+ APICCommonState *s = APIC_COMMON(obj);
+
+ object_property_add_link(obj, "cpu", TYPE_X86_CPU, (Object **)&s->cpu,
+ NULL);
+}
+
static Property apic_properties_common[] = {
DEFINE_PROP_UINT8("id", APICCommonState, id, -1),
- DEFINE_PROP_PTR("cpu_env", APICCommonState, cpu_env),
DEFINE_PROP_BIT("vapic", APICCommonState, vapic_control, VAPIC_ENABLE_BIT,
true),
DEFINE_PROP_END_OF_LIST(),
@@ -378,6 +385,7 @@ static TypeInfo apic_common_type = {
.name = TYPE_APIC_COMMON,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(APICCommonState),
+ .instance_init = apic_common_initfn,
.class_size = sizeof(APICCommonClass),
.class_init = apic_common_class_init,
.abstract = true,
diff --git a/hw/apic_internal.h b/hw/apic_internal.h
index 60a6a8b..645718c 100644
--- a/hw/apic_internal.h
+++ b/hw/apic_internal.h
@@ -96,7 +96,7 @@ typedef struct APICCommonClass
struct APICCommonState {
SysBusDevice busdev;
MemoryRegion io_memory;
- void *cpu_env;
+ X86CPU *cpu;
uint32_t apicbase;
uint8_t id;
uint8_t arb_id;
diff --git a/hw/kvm/apic.c b/hw/kvm/apic.c
index ffe7a52..cf52bb2 100644
--- a/hw/kvm/apic.c
+++ b/hw/kvm/apic.c
@@ -103,7 +103,7 @@ static void kvm_apic_enable_tpr_reporting(APICCommonState *s, bool enable)
.enabled = enable
};
- kvm_vcpu_ioctl(s->cpu_env, KVM_TPR_ACCESS_REPORTING, &ctl);
+ kvm_vcpu_ioctl(&s->cpu->env, KVM_TPR_ACCESS_REPORTING, &ctl);
}
static void kvm_apic_vapic_base_update(APICCommonState *s)
@@ -113,7 +113,7 @@ static void kvm_apic_vapic_base_update(APICCommonState *s)
};
int ret;
- ret = kvm_vcpu_ioctl(s->cpu_env, KVM_SET_VAPIC_ADDR, &vapid_addr);
+ ret = kvm_vcpu_ioctl(&s->cpu->env, KVM_SET_VAPIC_ADDR, &vapid_addr);
if (ret < 0) {
fprintf(stderr, "KVM: setting VAPIC address failed (%s)\n",
strerror(-ret));
@@ -124,7 +124,8 @@ static void kvm_apic_vapic_base_update(APICCommonState *s)
static void do_inject_external_nmi(void *data)
{
APICCommonState *s = data;
- CPUX86State *env = s->cpu_env;
+ X86CPU *cpu = s->cpu;
+ CPUX86State *env = &cpu->env;
uint32_t lvt;
int ret;
@@ -142,7 +143,7 @@ static void do_inject_external_nmi(void *data)
static void kvm_apic_external_nmi(APICCommonState *s)
{
- run_on_cpu(s->cpu_env, do_inject_external_nmi, s);
+ run_on_cpu(&s->cpu->env, do_inject_external_nmi, s);
}
static void kvm_apic_init(APICCommonState *s)
diff --git a/hw/pc.c b/hw/pc.c
index e9d7e05..6bb3d2a 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -888,6 +888,7 @@ DeviceState *cpu_get_current_apic(void)
static DeviceState *apic_init(void *env, uint8_t apic_id)
{
DeviceState *dev;
+ Error *error = NULL;
static int apic_mapped;
if (kvm_irqchip_in_kernel()) {
@@ -899,7 +900,13 @@ static DeviceState *apic_init(void *env, uint8_t apic_id)
}
qdev_prop_set_uint8(dev, "id", apic_id);
- qdev_prop_set_ptr(dev, "cpu_env", env);
+ object_property_set_link(OBJECT(dev), OBJECT(ENV_GET_CPU(env)), "cpu",
+ &error);
+ if (error_is_set(&error)) {
+ qerror_report_err(error);
+ error_free(error);
+ exit(1);
+ }
qdev_init_nofail(dev);
/* XXX: mapping more APICs at the same memory location */
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 06/59] pc: Pass X86CPU to cpu_is_bsp()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Anthony Liguori, Avi Kivity,
Marcelo Tosatti, open list:X86
Also change return type to bool.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/apic.h | 2 +-
hw/apic_common.c | 2 +-
hw/pc.c | 6 +++---
target-i386/helper.c | 2 +-
target-i386/kvm.c | 4 +++-
5 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/hw/apic.h b/hw/apic.h
index 62179ce..1030097 100644
--- a/hw/apic.h
+++ b/hw/apic.h
@@ -22,7 +22,7 @@ void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
TPRAccess access);
/* pc.c */
-int cpu_is_bsp(CPUX86State *env);
+bool cpu_is_bsp(X86CPU *cpu);
DeviceState *cpu_get_current_apic(void);
#endif
diff --git a/hw/apic_common.c b/hw/apic_common.c
index 46a9ff7..bea885b 100644
--- a/hw/apic_common.c
+++ b/hw/apic_common.c
@@ -207,7 +207,7 @@ static void apic_reset_common(DeviceState *d)
APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
bool bsp;
- bsp = cpu_is_bsp(&s->cpu->env);
+ bsp = cpu_is_bsp(s->cpu);
s->apicbase = 0xfee00000 |
(bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE;
diff --git a/hw/pc.c b/hw/pc.c
index 6bb3d2a..f0cbfef 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -870,10 +870,10 @@ void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd)
nb_ne2k++;
}
-int cpu_is_bsp(CPUX86State *env)
+bool cpu_is_bsp(X86CPU *cpu)
{
/* We hard-wire the BSP to the first CPU. */
- return env->cpu_index == 0;
+ return cpu->env.cpu_index == 0;
}
DeviceState *cpu_get_current_apic(void)
@@ -945,7 +945,7 @@ static void pc_cpu_reset(void *opaque)
CPUX86State *env = &cpu->env;
cpu_reset(CPU(cpu));
- env->halted = !cpu_is_bsp(env);
+ env->halted = !cpu_is_bsp(cpu);
}
static X86CPU *pc_new_cpu(const char *cpu_model)
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 2cc8097..018a98f 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1191,7 +1191,7 @@ void do_cpu_init(X86CPU *cpu)
env->interrupt_request = sipi;
env->pat = pat;
apic_init_reset(env->apic_state);
- env->halted = !cpu_is_bsp(env);
+ env->halted = !cpu_is_bsp(cpu);
}
void do_cpu_sipi(X86CPU *cpu)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 0d0d8f6..97a2cb1 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -579,11 +579,13 @@ int kvm_arch_init_vcpu(CPUX86State *env)
void kvm_arch_reset_vcpu(CPUX86State *env)
{
+ X86CPU *cpu = x86_env_get_cpu(env);
+
env->exception_injected = -1;
env->interrupt_injected = -1;
env->xcr0 = 1;
if (kvm_irqchip_in_kernel()) {
- env->mp_state = cpu_is_bsp(env) ? KVM_MP_STATE_RUNNABLE :
+ env->mp_state = cpu_is_bsp(cpu) ? KVM_MP_STATE_RUNNABLE :
KVM_MP_STATE_UNINITIALIZED;
} else {
env->mp_state = KVM_MP_STATE_RUNNABLE;
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 06/59] pc: Pass X86CPU to cpu_is_bsp()
@ 2012-05-23 3:07 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: Anthony Liguori, Marcelo Tosatti, Andreas Färber,
open list:X86, Avi Kivity
Also change return type to bool.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/apic.h | 2 +-
hw/apic_common.c | 2 +-
hw/pc.c | 6 +++---
target-i386/helper.c | 2 +-
target-i386/kvm.c | 4 +++-
5 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/hw/apic.h b/hw/apic.h
index 62179ce..1030097 100644
--- a/hw/apic.h
+++ b/hw/apic.h
@@ -22,7 +22,7 @@ void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
TPRAccess access);
/* pc.c */
-int cpu_is_bsp(CPUX86State *env);
+bool cpu_is_bsp(X86CPU *cpu);
DeviceState *cpu_get_current_apic(void);
#endif
diff --git a/hw/apic_common.c b/hw/apic_common.c
index 46a9ff7..bea885b 100644
--- a/hw/apic_common.c
+++ b/hw/apic_common.c
@@ -207,7 +207,7 @@ static void apic_reset_common(DeviceState *d)
APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
bool bsp;
- bsp = cpu_is_bsp(&s->cpu->env);
+ bsp = cpu_is_bsp(s->cpu);
s->apicbase = 0xfee00000 |
(bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE;
diff --git a/hw/pc.c b/hw/pc.c
index 6bb3d2a..f0cbfef 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -870,10 +870,10 @@ void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd)
nb_ne2k++;
}
-int cpu_is_bsp(CPUX86State *env)
+bool cpu_is_bsp(X86CPU *cpu)
{
/* We hard-wire the BSP to the first CPU. */
- return env->cpu_index == 0;
+ return cpu->env.cpu_index == 0;
}
DeviceState *cpu_get_current_apic(void)
@@ -945,7 +945,7 @@ static void pc_cpu_reset(void *opaque)
CPUX86State *env = &cpu->env;
cpu_reset(CPU(cpu));
- env->halted = !cpu_is_bsp(env);
+ env->halted = !cpu_is_bsp(cpu);
}
static X86CPU *pc_new_cpu(const char *cpu_model)
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 2cc8097..018a98f 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1191,7 +1191,7 @@ void do_cpu_init(X86CPU *cpu)
env->interrupt_request = sipi;
env->pat = pat;
apic_init_reset(env->apic_state);
- env->halted = !cpu_is_bsp(env);
+ env->halted = !cpu_is_bsp(cpu);
}
void do_cpu_sipi(X86CPU *cpu)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 0d0d8f6..97a2cb1 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -579,11 +579,13 @@ int kvm_arch_init_vcpu(CPUX86State *env)
void kvm_arch_reset_vcpu(CPUX86State *env)
{
+ X86CPU *cpu = x86_env_get_cpu(env);
+
env->exception_injected = -1;
env->interrupt_injected = -1;
env->xcr0 = 1;
if (kvm_irqchip_in_kernel()) {
- env->mp_state = cpu_is_bsp(env) ? KVM_MP_STATE_RUNNABLE :
+ env->mp_state = cpu_is_bsp(cpu) ? KVM_MP_STATE_RUNNABLE :
KVM_MP_STATE_UNINITIALIZED;
} else {
env->mp_state = KVM_MP_STATE_RUNNABLE;
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 07/59] cpu: Move thread_kicked to CPUState
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (6 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Change field type to bool.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-defs.h | 1 -
cpus.c | 14 +++++++++-----
include/qemu/cpu.h | 1 +
3 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/cpu-defs.h b/cpu-defs.h
index be89684..4018b88 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -209,7 +209,6 @@ typedef struct CPUWatchpoint {
uint32_t stop; /* Stop request */ \
uint32_t stopped; /* Artificially stopped */ \
struct QemuCond *halt_cond; \
- int thread_kicked; \
struct qemu_work_item *queued_work_first, *queued_work_last; \
const char *cpu_model_str; \
struct KVMState *kvm_state; \
diff --git a/cpus.c b/cpus.c
index b12890b..7d8e2ad 100644
--- a/cpus.c
+++ b/cpus.c
@@ -686,13 +686,15 @@ static void flush_queued_work(CPUArchState *env)
static void qemu_wait_io_event_common(CPUArchState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
if (env->stop) {
env->stop = 0;
env->stopped = 1;
qemu_cond_signal(&qemu_pause_cond);
}
flush_queued_work(env);
- env->thread_kicked = false;
+ cpu->thread_kicked = false;
}
static void qemu_tcg_wait_io_event(void)
@@ -866,11 +868,12 @@ static void qemu_cpu_kick_thread(CPUArchState *env)
void qemu_cpu_kick(void *_env)
{
CPUArchState *env = _env;
+ CPUState *cpu = ENV_GET_CPU(env);
qemu_cond_broadcast(env->halt_cond);
- if (!tcg_enabled() && !env->thread_kicked) {
+ if (!tcg_enabled() && !cpu->thread_kicked) {
qemu_cpu_kick_thread(env);
- env->thread_kicked = true;
+ cpu->thread_kicked = true;
}
}
@@ -878,10 +881,11 @@ void qemu_cpu_kick_self(void)
{
#ifndef _WIN32
assert(cpu_single_env);
+ CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env);
- if (!cpu_single_env->thread_kicked) {
+ if (!cpu_single_cpu->thread_kicked) {
qemu_cpu_kick_thread(cpu_single_env);
- cpu_single_env->thread_kicked = true;
+ cpu_single_cpu->thread_kicked = true;
}
#else
abort();
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index d20644b..ad706a6 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -66,6 +66,7 @@ struct CPUState {
#ifdef _WIN32
HANDLE hThread;
#endif
+ bool thread_kicked;
/* TODO Move common fields from CPUArchState here. */
};
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 08/59] Makefile.dis: Add include/ to include path
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (7 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Prepares for including qemu/cpu.h.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
Makefile.dis | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/Makefile.dis b/Makefile.dis
index 3e1fcaf..65f2662 100644
--- a/Makefile.dis
+++ b/Makefile.dis
@@ -9,6 +9,7 @@ include $(SRC_PATH)/rules.mak
$(call set-vpath, $(SRC_PATH))
QEMU_CFLAGS+=-I..
+QEMU_CFLAGS += -I$(SRC_PATH)/include
include $(SRC_PATH)/Makefile.objs
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 09/59] cpus: Pass CPUState to qemu_cpu_is_self()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Avi Kivity, Marcelo Tosatti, open list:Overall
Change return type to bool, move to include/qemu/cpu.h and
add documentation.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpus.c | 10 ++++------
exec.c | 3 ++-
hw/apic.c | 2 +-
include/qemu/cpu.h | 10 ++++++++++
kvm-all.c | 4 +++-
qemu-common.h | 1 -
target-i386/kvm.c | 6 ++++--
7 files changed, 24 insertions(+), 12 deletions(-)
diff --git a/cpus.c b/cpus.c
index 7d8e2ad..8712259 100644
--- a/cpus.c
+++ b/cpus.c
@@ -640,9 +640,10 @@ void qemu_init_cpu_loop(void)
void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
{
+ CPUState *cpu = ENV_GET_CPU(env);
struct qemu_work_item wi;
- if (qemu_cpu_is_self(env)) {
+ if (qemu_cpu_is_self(cpu)) {
func(data);
return;
}
@@ -857,7 +858,7 @@ static void qemu_cpu_kick_thread(CPUArchState *env)
exit(1);
}
#else /* _WIN32 */
- if (!qemu_cpu_is_self(env)) {
+ if (!qemu_cpu_is_self(cpu)) {
SuspendThread(cpu->hThread);
cpu_signal(0);
ResumeThread(cpu->hThread);
@@ -892,11 +893,8 @@ void qemu_cpu_kick_self(void)
#endif
}
-int qemu_cpu_is_self(void *_env)
+bool qemu_cpu_is_self(CPUState *cpu)
{
- CPUArchState *env = _env;
- CPUState *cpu = ENV_GET_CPU(env);
-
return qemu_thread_is_self(cpu->thread);
}
diff --git a/exec.c b/exec.c
index a0494c7..79e553c 100644
--- a/exec.c
+++ b/exec.c
@@ -1734,6 +1734,7 @@ static void cpu_unlink_tb(CPUArchState *env)
/* mask must never be zero, except for A20 change call */
static void tcg_handle_interrupt(CPUArchState *env, int mask)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int old_mask;
old_mask = env->interrupt_request;
@@ -1743,7 +1744,7 @@ static void tcg_handle_interrupt(CPUArchState *env, int mask)
* If called from iothread context, wake the target cpu in
* case its halted.
*/
- if (!qemu_cpu_is_self(env)) {
+ if (!qemu_cpu_is_self(cpu)) {
qemu_cpu_kick(env);
return;
}
diff --git a/hw/apic.c b/hw/apic.c
index 1207c33..b14635d 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -114,7 +114,7 @@ static void apic_sync_vapic(APICCommonState *s, int sync_type)
length = offsetof(VAPICState, enabled) - offsetof(VAPICState, isr);
if (sync_type & SYNC_TO_VAPIC) {
- assert(qemu_cpu_is_self(&s->cpu->env));
+ assert(qemu_cpu_is_self(CPU(s->cpu)));
vapic_state.tpr = s->tpr;
vapic_state.enabled = 1;
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index ad706a6..7be983d 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -78,5 +78,15 @@ struct CPUState {
*/
void cpu_reset(CPUState *cpu);
+/**
+ * qemu_cpu_is_self:
+ * @cpu: The vCPU to check against.
+ *
+ * Checks whether the caller is executing on the vCPU thread.
+ *
+ * Returns: %true if called from @cpu's thread, %false otherwise.
+ */
+bool qemu_cpu_is_self(CPUState *cpu);
+
#endif
diff --git a/kvm-all.c b/kvm-all.c
index 9b73ccf..f25cf6d 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -831,9 +831,11 @@ static MemoryListener kvm_memory_listener = {
static void kvm_handle_interrupt(CPUArchState *env, int mask)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
env->interrupt_request |= mask;
- if (!qemu_cpu_is_self(env)) {
+ if (!qemu_cpu_is_self(cpu)) {
qemu_cpu_kick(env);
}
}
diff --git a/qemu-common.h b/qemu-common.h
index cccfb42..653e0e5 100644
--- a/qemu-common.h
+++ b/qemu-common.h
@@ -285,7 +285,6 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id);
/* Unblock cpu */
void qemu_cpu_kick(void *env);
void qemu_cpu_kick_self(void);
-int qemu_cpu_is_self(void *env);
bool all_cpu_threads_idle(void);
/* work queue */
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 97a2cb1..e9e2241 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1527,9 +1527,10 @@ static int kvm_get_debugregs(CPUX86State *env)
int kvm_arch_put_registers(CPUX86State *env, int level)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int ret;
- assert(cpu_is_stopped(env) || qemu_cpu_is_self(env));
+ assert(cpu_is_stopped(env) || qemu_cpu_is_self(cpu));
ret = kvm_getput_regs(env, 1);
if (ret < 0) {
@@ -1584,9 +1585,10 @@ int kvm_arch_put_registers(CPUX86State *env, int level)
int kvm_arch_get_registers(CPUX86State *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int ret;
- assert(cpu_is_stopped(env) || qemu_cpu_is_self(env));
+ assert(cpu_is_stopped(env) || qemu_cpu_is_self(cpu));
ret = kvm_getput_regs(env, 0);
if (ret < 0) {
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 09/59] cpus: Pass CPUState to qemu_cpu_is_self()
@ 2012-05-23 3:07 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: Marcelo Tosatti, Andreas Färber, open list:Overall, Avi Kivity
Change return type to bool, move to include/qemu/cpu.h and
add documentation.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpus.c | 10 ++++------
exec.c | 3 ++-
hw/apic.c | 2 +-
include/qemu/cpu.h | 10 ++++++++++
kvm-all.c | 4 +++-
qemu-common.h | 1 -
target-i386/kvm.c | 6 ++++--
7 files changed, 24 insertions(+), 12 deletions(-)
diff --git a/cpus.c b/cpus.c
index 7d8e2ad..8712259 100644
--- a/cpus.c
+++ b/cpus.c
@@ -640,9 +640,10 @@ void qemu_init_cpu_loop(void)
void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
{
+ CPUState *cpu = ENV_GET_CPU(env);
struct qemu_work_item wi;
- if (qemu_cpu_is_self(env)) {
+ if (qemu_cpu_is_self(cpu)) {
func(data);
return;
}
@@ -857,7 +858,7 @@ static void qemu_cpu_kick_thread(CPUArchState *env)
exit(1);
}
#else /* _WIN32 */
- if (!qemu_cpu_is_self(env)) {
+ if (!qemu_cpu_is_self(cpu)) {
SuspendThread(cpu->hThread);
cpu_signal(0);
ResumeThread(cpu->hThread);
@@ -892,11 +893,8 @@ void qemu_cpu_kick_self(void)
#endif
}
-int qemu_cpu_is_self(void *_env)
+bool qemu_cpu_is_self(CPUState *cpu)
{
- CPUArchState *env = _env;
- CPUState *cpu = ENV_GET_CPU(env);
-
return qemu_thread_is_self(cpu->thread);
}
diff --git a/exec.c b/exec.c
index a0494c7..79e553c 100644
--- a/exec.c
+++ b/exec.c
@@ -1734,6 +1734,7 @@ static void cpu_unlink_tb(CPUArchState *env)
/* mask must never be zero, except for A20 change call */
static void tcg_handle_interrupt(CPUArchState *env, int mask)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int old_mask;
old_mask = env->interrupt_request;
@@ -1743,7 +1744,7 @@ static void tcg_handle_interrupt(CPUArchState *env, int mask)
* If called from iothread context, wake the target cpu in
* case its halted.
*/
- if (!qemu_cpu_is_self(env)) {
+ if (!qemu_cpu_is_self(cpu)) {
qemu_cpu_kick(env);
return;
}
diff --git a/hw/apic.c b/hw/apic.c
index 1207c33..b14635d 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -114,7 +114,7 @@ static void apic_sync_vapic(APICCommonState *s, int sync_type)
length = offsetof(VAPICState, enabled) - offsetof(VAPICState, isr);
if (sync_type & SYNC_TO_VAPIC) {
- assert(qemu_cpu_is_self(&s->cpu->env));
+ assert(qemu_cpu_is_self(CPU(s->cpu)));
vapic_state.tpr = s->tpr;
vapic_state.enabled = 1;
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index ad706a6..7be983d 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -78,5 +78,15 @@ struct CPUState {
*/
void cpu_reset(CPUState *cpu);
+/**
+ * qemu_cpu_is_self:
+ * @cpu: The vCPU to check against.
+ *
+ * Checks whether the caller is executing on the vCPU thread.
+ *
+ * Returns: %true if called from @cpu's thread, %false otherwise.
+ */
+bool qemu_cpu_is_self(CPUState *cpu);
+
#endif
diff --git a/kvm-all.c b/kvm-all.c
index 9b73ccf..f25cf6d 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -831,9 +831,11 @@ static MemoryListener kvm_memory_listener = {
static void kvm_handle_interrupt(CPUArchState *env, int mask)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
env->interrupt_request |= mask;
- if (!qemu_cpu_is_self(env)) {
+ if (!qemu_cpu_is_self(cpu)) {
qemu_cpu_kick(env);
}
}
diff --git a/qemu-common.h b/qemu-common.h
index cccfb42..653e0e5 100644
--- a/qemu-common.h
+++ b/qemu-common.h
@@ -285,7 +285,6 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id);
/* Unblock cpu */
void qemu_cpu_kick(void *env);
void qemu_cpu_kick_self(void);
-int qemu_cpu_is_self(void *env);
bool all_cpu_threads_idle(void);
/* work queue */
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 97a2cb1..e9e2241 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1527,9 +1527,10 @@ static int kvm_get_debugregs(CPUX86State *env)
int kvm_arch_put_registers(CPUX86State *env, int level)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int ret;
- assert(cpu_is_stopped(env) || qemu_cpu_is_self(env));
+ assert(cpu_is_stopped(env) || qemu_cpu_is_self(cpu));
ret = kvm_getput_regs(env, 1);
if (ret < 0) {
@@ -1584,9 +1585,10 @@ int kvm_arch_put_registers(CPUX86State *env, int level)
int kvm_arch_get_registers(CPUX86State *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int ret;
- assert(cpu_is_stopped(env) || qemu_cpu_is_self(env));
+ assert(cpu_is_stopped(env) || qemu_cpu_is_self(cpu));
ret = kvm_getput_regs(env, 0);
if (ret < 0) {
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 10/59] cpus: Pass CPUState to qemu_cpu_kick_thread()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (9 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
CPUArchState is no longer needed there.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpus.c | 9 ++++-----
1 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/cpus.c b/cpus.c
index 8712259..7d30e55 100644
--- a/cpus.c
+++ b/cpus.c
@@ -846,9 +846,8 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
return NULL;
}
-static void qemu_cpu_kick_thread(CPUArchState *env)
+static void qemu_cpu_kick_thread(CPUState *cpu)
{
- CPUState *cpu = ENV_GET_CPU(env);
#ifndef _WIN32
int err;
@@ -873,7 +872,7 @@ void qemu_cpu_kick(void *_env)
qemu_cond_broadcast(env->halt_cond);
if (!tcg_enabled() && !cpu->thread_kicked) {
- qemu_cpu_kick_thread(env);
+ qemu_cpu_kick_thread(cpu);
cpu->thread_kicked = true;
}
}
@@ -885,7 +884,7 @@ void qemu_cpu_kick_self(void)
CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env);
if (!cpu_single_cpu->thread_kicked) {
- qemu_cpu_kick_thread(cpu_single_env);
+ qemu_cpu_kick_thread(cpu_single_cpu);
cpu_single_cpu->thread_kicked = true;
}
#else
@@ -905,7 +904,7 @@ void qemu_mutex_lock_iothread(void)
} else {
iothread_requesting_mutex = true;
if (qemu_mutex_trylock(&qemu_global_mutex)) {
- qemu_cpu_kick_thread(first_cpu);
+ qemu_cpu_kick_thread(ENV_GET_CPU(first_cpu));
qemu_mutex_lock(&qemu_global_mutex);
}
iothread_requesting_mutex = false;
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 11/59] cpu: Move created field to CPUState
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (10 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Change its type to bool.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-defs.h | 1 -
cpus.c | 13 +++++++------
include/qemu/cpu.h | 2 ++
3 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/cpu-defs.h b/cpu-defs.h
index 4018b88..ae95158 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -205,7 +205,6 @@ typedef struct CPUWatchpoint {
/* user data */ \
void *opaque; \
\
- uint32_t created; \
uint32_t stop; /* Stop request */ \
uint32_t stopped; /* Artificially stopped */ \
struct QemuCond *halt_cond; \
diff --git a/cpus.c b/cpus.c
index 7d30e55..8ad4949 100644
--- a/cpus.c
+++ b/cpus.c
@@ -748,7 +748,7 @@ static void *qemu_kvm_cpu_thread_fn(void *arg)
qemu_kvm_init_cpu_signals(env);
/* signal CPU creation */
- env->created = 1;
+ cpu->created = true;
qemu_cond_signal(&qemu_cpu_cond);
while (1) {
@@ -783,7 +783,7 @@ static void *qemu_dummy_cpu_thread_fn(void *arg)
sigaddset(&waitset, SIG_IPI);
/* signal CPU creation */
- env->created = 1;
+ cpu->created = true;
qemu_cond_signal(&qemu_cpu_cond);
cpu_single_env = env;
@@ -820,8 +820,9 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
/* signal CPU creation */
qemu_mutex_lock(&qemu_global_mutex);
for (env = first_cpu; env != NULL; env = env->next_cpu) {
+ cpu = ENV_GET_CPU(env);
env->thread_id = qemu_get_thread_id();
- env->created = 1;
+ cpu->created = true;
}
qemu_cond_signal(&qemu_cpu_cond);
@@ -993,7 +994,7 @@ static void qemu_tcg_init_vcpu(void *_env)
#ifdef _WIN32
cpu->hThread = qemu_thread_get_handle(cpu->thread);
#endif
- while (env->created == 0) {
+ while (!cpu->created) {
qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
}
tcg_cpu_thread = cpu->thread;
@@ -1012,7 +1013,7 @@ static void qemu_kvm_start_vcpu(CPUArchState *env)
qemu_cond_init(env->halt_cond);
qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, env,
QEMU_THREAD_JOINABLE);
- while (env->created == 0) {
+ while (!cpu->created) {
qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
}
}
@@ -1026,7 +1027,7 @@ static void qemu_dummy_start_vcpu(CPUArchState *env)
qemu_cond_init(env->halt_cond);
qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, env,
QEMU_THREAD_JOINABLE);
- while (env->created == 0) {
+ while (!cpu->created) {
qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
}
}
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 7be983d..3ab2e25 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -54,6 +54,7 @@ typedef struct CPUClass {
/**
* CPUState:
+ * @created: Indicates whether the CPU thread has been successfully created.
*
* State of one CPU core or thread.
*/
@@ -67,6 +68,7 @@ struct CPUState {
HANDLE hThread;
#endif
bool thread_kicked;
+ bool created;
/* TODO Move common fields from CPUArchState here. */
};
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 12/59] cpu: Move stop field to CPUState
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (11 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Change its type to bool.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-defs.h | 1 -
cpus.c | 27 ++++++++++++++++++---------
include/qemu/cpu.h | 2 ++
3 files changed, 20 insertions(+), 10 deletions(-)
diff --git a/cpu-defs.h b/cpu-defs.h
index ae95158..c93371e 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -205,7 +205,6 @@ typedef struct CPUWatchpoint {
/* user data */ \
void *opaque; \
\
- uint32_t stop; /* Stop request */ \
uint32_t stopped; /* Artificially stopped */ \
struct QemuCond *halt_cond; \
struct qemu_work_item *queued_work_first, *queued_work_last; \
diff --git a/cpus.c b/cpus.c
index 8ad4949..e26ef39 100644
--- a/cpus.c
+++ b/cpus.c
@@ -424,7 +424,9 @@ static void do_vm_stop(RunState state)
static int cpu_can_run(CPUArchState *env)
{
- if (env->stop) {
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ if (cpu->stop) {
return 0;
}
if (env->stopped || !runstate_is_running()) {
@@ -435,7 +437,9 @@ static int cpu_can_run(CPUArchState *env)
static bool cpu_thread_is_idle(CPUArchState *env)
{
- if (env->stop || env->queued_work_first) {
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ if (cpu->stop || env->queued_work_first) {
return false;
}
if (env->stopped || !runstate_is_running()) {
@@ -689,8 +693,8 @@ static void qemu_wait_io_event_common(CPUArchState *env)
{
CPUState *cpu = ENV_GET_CPU(env);
- if (env->stop) {
- env->stop = 0;
+ if (cpu->stop) {
+ cpu->stop = false;
env->stopped = 1;
qemu_cond_signal(&qemu_pause_cond);
}
@@ -938,7 +942,8 @@ void pause_all_vcpus(void)
qemu_clock_enable(vm_clock, false);
while (penv) {
- penv->stop = 1;
+ CPUState *pcpu = ENV_GET_CPU(penv);
+ pcpu->stop = true;
qemu_cpu_kick(penv);
penv = penv->next_cpu;
}
@@ -947,7 +952,8 @@ void pause_all_vcpus(void)
cpu_stop_current();
if (!kvm_enabled()) {
while (penv) {
- penv->stop = 0;
+ CPUState *pcpu = ENV_GET_CPU(penv);
+ pcpu->stop = 0;
penv->stopped = 1;
penv = penv->next_cpu;
}
@@ -971,7 +977,8 @@ void resume_all_vcpus(void)
qemu_clock_enable(vm_clock, true);
while (penv) {
- penv->stop = 0;
+ CPUState *pcpu = ENV_GET_CPU(penv);
+ pcpu->stop = false;
penv->stopped = 0;
qemu_cpu_kick(penv);
penv = penv->next_cpu;
@@ -1051,7 +1058,8 @@ void qemu_init_vcpu(void *_env)
void cpu_stop_current(void)
{
if (cpu_single_env) {
- cpu_single_env->stop = 0;
+ CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env);
+ cpu_single_cpu->stop = false;
cpu_single_env->stopped = 1;
cpu_exit(cpu_single_env);
qemu_cond_signal(&qemu_pause_cond);
@@ -1133,6 +1141,7 @@ static void tcg_exec_all(void)
}
for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) {
CPUArchState *env = next_cpu;
+ CPUState *cpu = ENV_GET_CPU(env);
qemu_clock_enable(vm_clock,
(env->singlestep_enabled & SSTEP_NOTIMER) == 0);
@@ -1143,7 +1152,7 @@ static void tcg_exec_all(void)
cpu_handle_guest_debug(env);
break;
}
- } else if (env->stop || env->stopped) {
+ } else if (cpu->stop || env->stopped) {
break;
}
}
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 3ab2e25..04c7848 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -55,6 +55,7 @@ typedef struct CPUClass {
/**
* CPUState:
* @created: Indicates whether the CPU thread has been successfully created.
+ * @stop: Indicates a pending stop request.
*
* State of one CPU core or thread.
*/
@@ -69,6 +70,7 @@ struct CPUState {
#endif
bool thread_kicked;
bool created;
+ bool stop;
/* TODO Move common fields from CPUArchState here. */
};
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 13/59] ppce500_spin: Store PowerPCCPU in SpinKick
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (12 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Needed for moving stop field to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/ppce500_spin.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c
index fddf219..4c4a456 100644
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@@ -49,7 +49,7 @@ typedef struct spin_state {
} SpinState;
typedef struct spin_kick {
- CPUPPCState *env;
+ PowerPCCPU *cpu;
SpinInfo *spin;
} SpinKick;
@@ -92,7 +92,7 @@ static void mmubooke_create_initial_mapping(CPUPPCState *env,
static void spin_kick(void *data)
{
SpinKick *kick = data;
- CPUPPCState *env = kick->env;
+ CPUPPCState *env = &kick->cpu->env;
SpinInfo *curspin = kick->spin;
target_phys_addr_t map_size = 64 * 1024 * 1024;
target_phys_addr_t map_start;
@@ -158,7 +158,7 @@ static void spin_write(void *opaque, target_phys_addr_t addr, uint64_t value,
if (!(ldq_p(&curspin->addr) & 1)) {
/* run CPU */
SpinKick kick = {
- .env = env,
+ .cpu = ppc_env_get_cpu(env),
.spin = curspin,
};
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 14/59] cpu: Move stopped field to CPUState
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (13 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Change its type to bool.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-defs.h | 1 -
cpus.c | 30 ++++++++++++++++++------------
hw/ppce500_spin.c | 3 ++-
include/qemu/cpu.h | 2 ++
4 files changed, 22 insertions(+), 14 deletions(-)
diff --git a/cpu-defs.h b/cpu-defs.h
index c93371e..43af2ba 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -205,7 +205,6 @@ typedef struct CPUWatchpoint {
/* user data */ \
void *opaque; \
\
- uint32_t stopped; /* Artificially stopped */ \
struct QemuCond *halt_cond; \
struct qemu_work_item *queued_work_first, *queued_work_last; \
const char *cpu_model_str; \
diff --git a/cpus.c b/cpus.c
index e26ef39..fca4eb2 100644
--- a/cpus.c
+++ b/cpus.c
@@ -406,7 +406,9 @@ void cpu_synchronize_all_post_init(void)
int cpu_is_stopped(CPUArchState *env)
{
- return !runstate_is_running() || env->stopped;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ return !runstate_is_running() || cpu->stopped;
}
static void do_vm_stop(RunState state)
@@ -429,7 +431,7 @@ static int cpu_can_run(CPUArchState *env)
if (cpu->stop) {
return 0;
}
- if (env->stopped || !runstate_is_running()) {
+ if (cpu->stopped || !runstate_is_running()) {
return 0;
}
return 1;
@@ -442,7 +444,7 @@ static bool cpu_thread_is_idle(CPUArchState *env)
if (cpu->stop || env->queued_work_first) {
return false;
}
- if (env->stopped || !runstate_is_running()) {
+ if (cpu->stopped || !runstate_is_running()) {
return true;
}
if (!env->halted || qemu_cpu_has_work(env) || kvm_irqchip_in_kernel()) {
@@ -465,9 +467,11 @@ bool all_cpu_threads_idle(void)
static void cpu_handle_guest_debug(CPUArchState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
gdb_set_stop_cpu(env);
qemu_system_debug_request();
- env->stopped = 1;
+ cpu->stopped = true;
}
static void cpu_signal(int sig)
@@ -695,7 +699,7 @@ static void qemu_wait_io_event_common(CPUArchState *env)
if (cpu->stop) {
cpu->stop = false;
- env->stopped = 1;
+ cpu->stopped = true;
qemu_cond_signal(&qemu_pause_cond);
}
flush_queued_work(env);
@@ -831,7 +835,7 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
qemu_cond_signal(&qemu_cpu_cond);
/* wait for initial kick-off after machine start */
- while (first_cpu->stopped) {
+ while (ENV_GET_CPU(first_cpu)->stopped) {
qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
/* process any pending work */
@@ -927,7 +931,8 @@ static int all_vcpus_paused(void)
CPUArchState *penv = first_cpu;
while (penv) {
- if (!penv->stopped) {
+ CPUState *pcpu = ENV_GET_CPU(penv);
+ if (!pcpu->stopped) {
return 0;
}
penv = penv->next_cpu;
@@ -954,7 +959,7 @@ void pause_all_vcpus(void)
while (penv) {
CPUState *pcpu = ENV_GET_CPU(penv);
pcpu->stop = 0;
- penv->stopped = 1;
+ pcpu->stopped = true;
penv = penv->next_cpu;
}
return;
@@ -979,7 +984,7 @@ void resume_all_vcpus(void)
while (penv) {
CPUState *pcpu = ENV_GET_CPU(penv);
pcpu->stop = false;
- penv->stopped = 0;
+ pcpu->stopped = false;
qemu_cpu_kick(penv);
penv = penv->next_cpu;
}
@@ -1042,10 +1047,11 @@ static void qemu_dummy_start_vcpu(CPUArchState *env)
void qemu_init_vcpu(void *_env)
{
CPUArchState *env = _env;
+ CPUState *cpu = ENV_GET_CPU(env);
env->nr_cores = smp_cores;
env->nr_threads = smp_threads;
- env->stopped = 1;
+ cpu->stopped = true;
if (kvm_enabled()) {
qemu_kvm_start_vcpu(env);
} else if (tcg_enabled()) {
@@ -1060,7 +1066,7 @@ void cpu_stop_current(void)
if (cpu_single_env) {
CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env);
cpu_single_cpu->stop = false;
- cpu_single_env->stopped = 1;
+ cpu_single_cpu->stopped = true;
cpu_exit(cpu_single_env);
qemu_cond_signal(&qemu_pause_cond);
}
@@ -1152,7 +1158,7 @@ static void tcg_exec_all(void)
cpu_handle_guest_debug(env);
break;
}
- } else if (cpu->stop || env->stopped) {
+ } else if (cpu->stop || cpu->stopped) {
break;
}
}
diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c
index 4c4a456..a03a4d3 100644
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@@ -92,6 +92,7 @@ static void mmubooke_create_initial_mapping(CPUPPCState *env,
static void spin_kick(void *data)
{
SpinKick *kick = data;
+ CPUState *cpu = CPU(kick->cpu);
CPUPPCState *env = &kick->cpu->env;
SpinInfo *curspin = kick->spin;
target_phys_addr_t map_size = 64 * 1024 * 1024;
@@ -113,7 +114,7 @@ static void spin_kick(void *data)
env->halted = 0;
env->exception_index = -1;
- env->stopped = 0;
+ cpu->stopped = false;
qemu_cpu_kick(env);
}
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 04c7848..83378c5 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -56,6 +56,7 @@ typedef struct CPUClass {
* CPUState:
* @created: Indicates whether the CPU thread has been successfully created.
* @stop: Indicates a pending stop request.
+ * @stopped: Indicates the CPU has been artificially stopped.
*
* State of one CPU core or thread.
*/
@@ -71,6 +72,7 @@ struct CPUState {
bool thread_kicked;
bool created;
bool stop;
+ bool stopped;
/* TODO Move common fields from CPUArchState here. */
};
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 15/59] cpus: Pass CPUState to cpu_is_stopped()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Avi Kivity, Marcelo Tosatti, open list:X86
CPUArchState is no longer needed there.
Also change the return type to bool.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-all.h | 1 -
cpus.c | 4 +---
include/qemu/cpu.h | 11 +++++++++++
target-i386/kvm.c | 4 ++--
4 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/cpu-all.h b/cpu-all.h
index 3a93c0c..af85e7d 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -443,7 +443,6 @@ void cpu_watchpoint_remove_all(CPUArchState *env, int mask);
#define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
void cpu_single_step(CPUArchState *env, int enabled);
-int cpu_is_stopped(CPUArchState *env);
void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data);
#define CPU_LOG_TB_OUT_ASM (1 << 0)
diff --git a/cpus.c b/cpus.c
index fca4eb2..753277d 100644
--- a/cpus.c
+++ b/cpus.c
@@ -404,10 +404,8 @@ void cpu_synchronize_all_post_init(void)
}
}
-int cpu_is_stopped(CPUArchState *env)
+bool cpu_is_stopped(CPUState *cpu)
{
- CPUState *cpu = ENV_GET_CPU(env);
-
return !runstate_is_running() || cpu->stopped;
}
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 83378c5..4e62032 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -94,5 +94,16 @@ void cpu_reset(CPUState *cpu);
*/
bool qemu_cpu_is_self(CPUState *cpu);
+/**
+ * cpu_is_stopped:
+ * @cpu: The CPU to check.
+ *
+ * Checks whether the CPU is stopped.
+ *
+ * Returns: %true if run state is not running or if artificially stopped;
+ * %false otherwise.
+ */
+bool cpu_is_stopped(CPUState *cpu);
+
#endif
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index e9e2241..92ad338 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1530,7 +1530,7 @@ int kvm_arch_put_registers(CPUX86State *env, int level)
CPUState *cpu = ENV_GET_CPU(env);
int ret;
- assert(cpu_is_stopped(env) || qemu_cpu_is_self(cpu));
+ assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu));
ret = kvm_getput_regs(env, 1);
if (ret < 0) {
@@ -1588,7 +1588,7 @@ int kvm_arch_get_registers(CPUX86State *env)
CPUState *cpu = ENV_GET_CPU(env);
int ret;
- assert(cpu_is_stopped(env) || qemu_cpu_is_self(cpu));
+ assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu));
ret = kvm_getput_regs(env, 0);
if (ret < 0) {
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 15/59] cpus: Pass CPUState to cpu_is_stopped()
@ 2012-05-23 3:07 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: Marcelo Tosatti, Andreas Färber, open list:X86, Avi Kivity
CPUArchState is no longer needed there.
Also change the return type to bool.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-all.h | 1 -
cpus.c | 4 +---
include/qemu/cpu.h | 11 +++++++++++
target-i386/kvm.c | 4 ++--
4 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/cpu-all.h b/cpu-all.h
index 3a93c0c..af85e7d 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -443,7 +443,6 @@ void cpu_watchpoint_remove_all(CPUArchState *env, int mask);
#define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
void cpu_single_step(CPUArchState *env, int enabled);
-int cpu_is_stopped(CPUArchState *env);
void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data);
#define CPU_LOG_TB_OUT_ASM (1 << 0)
diff --git a/cpus.c b/cpus.c
index fca4eb2..753277d 100644
--- a/cpus.c
+++ b/cpus.c
@@ -404,10 +404,8 @@ void cpu_synchronize_all_post_init(void)
}
}
-int cpu_is_stopped(CPUArchState *env)
+bool cpu_is_stopped(CPUState *cpu)
{
- CPUState *cpu = ENV_GET_CPU(env);
-
return !runstate_is_running() || cpu->stopped;
}
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 83378c5..4e62032 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -94,5 +94,16 @@ void cpu_reset(CPUState *cpu);
*/
bool qemu_cpu_is_self(CPUState *cpu);
+/**
+ * cpu_is_stopped:
+ * @cpu: The CPU to check.
+ *
+ * Checks whether the CPU is stopped.
+ *
+ * Returns: %true if run state is not running or if artificially stopped;
+ * %false otherwise.
+ */
+bool cpu_is_stopped(CPUState *cpu);
+
#endif
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index e9e2241..92ad338 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1530,7 +1530,7 @@ int kvm_arch_put_registers(CPUX86State *env, int level)
CPUState *cpu = ENV_GET_CPU(env);
int ret;
- assert(cpu_is_stopped(env) || qemu_cpu_is_self(cpu));
+ assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu));
ret = kvm_getput_regs(env, 1);
if (ret < 0) {
@@ -1588,7 +1588,7 @@ int kvm_arch_get_registers(CPUX86State *env)
CPUState *cpu = ENV_GET_CPU(env);
int ret;
- assert(cpu_is_stopped(env) || qemu_cpu_is_self(cpu));
+ assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu));
ret = kvm_getput_regs(env, 0);
if (ret < 0) {
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 16/59] cpus: Pass CPUState to cpu_can_run()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (15 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
CPUArchState is no longer needed there.
Also change its return type to bool.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpus.c | 14 ++++++--------
1 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/cpus.c b/cpus.c
index 753277d..c0f253e 100644
--- a/cpus.c
+++ b/cpus.c
@@ -422,17 +422,15 @@ static void do_vm_stop(RunState state)
}
}
-static int cpu_can_run(CPUArchState *env)
+static bool cpu_can_run(CPUState *cpu)
{
- CPUState *cpu = ENV_GET_CPU(env);
-
if (cpu->stop) {
- return 0;
+ return false;
}
if (cpu->stopped || !runstate_is_running()) {
- return 0;
+ return false;
}
- return 1;
+ return true;
}
static bool cpu_thread_is_idle(CPUArchState *env)
@@ -758,7 +756,7 @@ static void *qemu_kvm_cpu_thread_fn(void *arg)
qemu_cond_signal(&qemu_cpu_cond);
while (1) {
- if (cpu_can_run(env)) {
+ if (cpu_can_run(cpu)) {
r = kvm_cpu_exec(env);
if (r == EXCP_DEBUG) {
cpu_handle_guest_debug(env);
@@ -1150,7 +1148,7 @@ static void tcg_exec_all(void)
qemu_clock_enable(vm_clock,
(env->singlestep_enabled & SSTEP_NOTIMER) == 0);
- if (cpu_can_run(env)) {
+ if (cpu_can_run(cpu)) {
r = tcg_cpu_exec(env);
if (r == EXCP_DEBUG) {
cpu_handle_guest_debug(env);
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 17/59] cpu: Move halt_cond to CPUState
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (16 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-defs.h | 1 -
cpus.c | 22 ++++++++++++----------
include/qemu/cpu.h | 1 +
3 files changed, 13 insertions(+), 11 deletions(-)
diff --git a/cpu-defs.h b/cpu-defs.h
index 43af2ba..7c68c39 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -205,7 +205,6 @@ typedef struct CPUWatchpoint {
/* user data */ \
void *opaque; \
\
- struct QemuCond *halt_cond; \
struct qemu_work_item *queued_work_first, *queued_work_last; \
const char *cpu_model_str; \
struct KVMState *kvm_state; \
diff --git a/cpus.c b/cpus.c
index c0f253e..fcc0483 100644
--- a/cpus.c
+++ b/cpus.c
@@ -724,8 +724,10 @@ static void qemu_tcg_wait_io_event(void)
static void qemu_kvm_wait_io_event(CPUArchState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
while (cpu_thread_is_idle(env)) {
- qemu_cond_wait(env->halt_cond, &qemu_global_mutex);
+ qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex);
}
qemu_kvm_eat_signals(env);
@@ -875,7 +877,7 @@ void qemu_cpu_kick(void *_env)
CPUArchState *env = _env;
CPUState *cpu = ENV_GET_CPU(env);
- qemu_cond_broadcast(env->halt_cond);
+ qemu_cond_broadcast(cpu->halt_cond);
if (!tcg_enabled() && !cpu->thread_kicked) {
qemu_cpu_kick_thread(cpu);
cpu->thread_kicked = true;
@@ -994,9 +996,9 @@ static void qemu_tcg_init_vcpu(void *_env)
/* share a single thread for all cpus with TCG */
if (!tcg_cpu_thread) {
cpu->thread = g_malloc0(sizeof(QemuThread));
- env->halt_cond = g_malloc0(sizeof(QemuCond));
- qemu_cond_init(env->halt_cond);
- tcg_halt_cond = env->halt_cond;
+ cpu->halt_cond = g_malloc0(sizeof(QemuCond));
+ qemu_cond_init(cpu->halt_cond);
+ tcg_halt_cond = cpu->halt_cond;
qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, env,
QEMU_THREAD_JOINABLE);
#ifdef _WIN32
@@ -1008,7 +1010,7 @@ static void qemu_tcg_init_vcpu(void *_env)
tcg_cpu_thread = cpu->thread;
} else {
cpu->thread = tcg_cpu_thread;
- env->halt_cond = tcg_halt_cond;
+ cpu->halt_cond = tcg_halt_cond;
}
}
@@ -1017,8 +1019,8 @@ static void qemu_kvm_start_vcpu(CPUArchState *env)
CPUState *cpu = ENV_GET_CPU(env);
cpu->thread = g_malloc0(sizeof(QemuThread));
- env->halt_cond = g_malloc0(sizeof(QemuCond));
- qemu_cond_init(env->halt_cond);
+ cpu->halt_cond = g_malloc0(sizeof(QemuCond));
+ qemu_cond_init(cpu->halt_cond);
qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, env,
QEMU_THREAD_JOINABLE);
while (!cpu->created) {
@@ -1031,8 +1033,8 @@ static void qemu_dummy_start_vcpu(CPUArchState *env)
CPUState *cpu = ENV_GET_CPU(env);
cpu->thread = g_malloc0(sizeof(QemuThread));
- env->halt_cond = g_malloc0(sizeof(QemuCond));
- qemu_cond_init(env->halt_cond);
+ cpu->halt_cond = g_malloc0(sizeof(QemuCond));
+ qemu_cond_init(cpu->halt_cond);
qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, env,
QEMU_THREAD_JOINABLE);
while (!cpu->created) {
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 4e62032..75e0f8d 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -69,6 +69,7 @@ struct CPUState {
#ifdef _WIN32
HANDLE hThread;
#endif
+ struct QemuCond *halt_cond;
bool thread_kicked;
bool created;
bool stop;
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 18/59] cpus: Pass CPUState to qemu_tcg_cpu_thread_fn
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (17 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
CPUArchState is no longer needed except for iterating the CPUs.
Needed for qemu_tcg_init_vcpu().
KVM and dummy threads still need CPUArchState for cpu_single_env.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpus.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/cpus.c b/cpus.c
index fcc0483..7b87ad9 100644
--- a/cpus.c
+++ b/cpus.c
@@ -817,8 +817,8 @@ static void tcg_exec_all(void);
static void *qemu_tcg_cpu_thread_fn(void *arg)
{
- CPUArchState *env = arg;
- CPUState *cpu = ENV_GET_CPU(env);
+ CPUState *cpu = arg;
+ CPUArchState *env;
qemu_tcg_init_cpu_signals();
qemu_thread_get_self(cpu->thread);
@@ -999,7 +999,7 @@ static void qemu_tcg_init_vcpu(void *_env)
cpu->halt_cond = g_malloc0(sizeof(QemuCond));
qemu_cond_init(cpu->halt_cond);
tcg_halt_cond = cpu->halt_cond;
- qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, env,
+ qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, cpu,
QEMU_THREAD_JOINABLE);
#ifdef _WIN32
cpu->hThread = qemu_thread_get_handle(cpu->thread);
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 19/59] cpus: Pass CPUState to qemu_tcg_init_vcpu()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (18 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
CPUArchState is no longer needed.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpus.c | 7 ++-----
1 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/cpus.c b/cpus.c
index 7b87ad9..5bae5fc 100644
--- a/cpus.c
+++ b/cpus.c
@@ -988,11 +988,8 @@ void resume_all_vcpus(void)
}
}
-static void qemu_tcg_init_vcpu(void *_env)
+static void qemu_tcg_init_vcpu(CPUState *cpu)
{
- CPUArchState *env = _env;
- CPUState *cpu = ENV_GET_CPU(env);
-
/* share a single thread for all cpus with TCG */
if (!tcg_cpu_thread) {
cpu->thread = g_malloc0(sizeof(QemuThread));
@@ -1053,7 +1050,7 @@ void qemu_init_vcpu(void *_env)
if (kvm_enabled()) {
qemu_kvm_start_vcpu(env);
} else if (tcg_enabled()) {
- qemu_tcg_init_vcpu(env);
+ qemu_tcg_init_vcpu(cpu);
} else {
qemu_dummy_start_vcpu(env);
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 20/59] ppc: Pass PowerPCCPU to ppc6xx_set_irq()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (19 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Needed for moving halted field into CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/ppc.c | 11 +++++++----
1 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/ppc.c b/hw/ppc.c
index 98546de..f21aa40 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -75,9 +75,10 @@ void ppc_set_irq(CPUPPCState *env, int n_IRQ, int level)
}
/* PowerPC 6xx / 7xx internal IRQ controller */
-static void ppc6xx_set_irq (void *opaque, int pin, int level)
+static void ppc6xx_set_irq(void *opaque, int pin, int level)
{
- CPUPPCState *env = opaque;
+ PowerPCCPU *cpu = opaque;
+ CPUPPCState *env = &cpu->env;
int cur_level;
LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
@@ -151,9 +152,11 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
}
}
-void ppc6xx_irq_init (CPUPPCState *env)
+void ppc6xx_irq_init(CPUPPCState *env)
{
- env->irq_inputs = (void **)qemu_allocate_irqs(&ppc6xx_set_irq, env,
+ PowerPCCPU *cpu = ppc_env_get_cpu(env);
+
+ env->irq_inputs = (void **)qemu_allocate_irqs(&ppc6xx_set_irq, cpu,
PPC6xx_INPUT_NB);
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 21/59] ppc: Pass PowerPCCPU to ppc970_set_irq()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (20 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Needed for qemu_cpu_kick() and moving halted field into CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/ppc.c | 11 +++++++----
1 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/ppc.c b/hw/ppc.c
index f21aa40..bce24c6 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -162,9 +162,10 @@ void ppc6xx_irq_init(CPUPPCState *env)
#if defined(TARGET_PPC64)
/* PowerPC 970 internal IRQ controller */
-static void ppc970_set_irq (void *opaque, int pin, int level)
+static void ppc970_set_irq(void *opaque, int pin, int level)
{
- CPUPPCState *env = opaque;
+ PowerPCCPU *cpu = opaque;
+ CPUPPCState *env = &cpu->env;
int cur_level;
LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
@@ -236,9 +237,11 @@ static void ppc970_set_irq (void *opaque, int pin, int level)
}
}
-void ppc970_irq_init (CPUPPCState *env)
+void ppc970_irq_init(CPUPPCState *env)
{
- env->irq_inputs = (void **)qemu_allocate_irqs(&ppc970_set_irq, env,
+ PowerPCCPU *cpu = ppc_env_get_cpu(env);
+
+ env->irq_inputs = (void **)qemu_allocate_irqs(&ppc970_set_irq, cpu,
PPC970_INPUT_NB);
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 22/59] ppc: Pass PowerPCCPU to power7_set_irq()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (21 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Needed for consistency with surrounding _set_irq() functions.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/ppc.c | 11 +++++++----
1 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/ppc.c b/hw/ppc.c
index bce24c6..de1a33b 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -246,9 +246,10 @@ void ppc970_irq_init(CPUPPCState *env)
}
/* POWER7 internal IRQ controller */
-static void power7_set_irq (void *opaque, int pin, int level)
+static void power7_set_irq(void *opaque, int pin, int level)
{
- CPUPPCState *env = opaque;
+ PowerPCCPU *cpu = opaque;
+ CPUPPCState *env = &cpu->env;
LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
env, pin, level);
@@ -272,9 +273,11 @@ static void power7_set_irq (void *opaque, int pin, int level)
}
}
-void ppcPOWER7_irq_init (CPUPPCState *env)
+void ppcPOWER7_irq_init(CPUPPCState *env)
{
- env->irq_inputs = (void **)qemu_allocate_irqs(&power7_set_irq, env,
+ PowerPCCPU *cpu = ppc_env_get_cpu(env);
+
+ env->irq_inputs = (void **)qemu_allocate_irqs(&power7_set_irq, cpu,
POWER7_INPUT_NB);
}
#endif /* defined(TARGET_PPC64) */
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 23/59] ppc: Pass PowerPCCPU to ppc40x_set_irq()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (22 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Needed for qemu_cpu_kick() and moving halted field to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/ppc.c | 11 +++++++----
1 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/ppc.c b/hw/ppc.c
index de1a33b..fc3a65c 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -283,9 +283,10 @@ void ppcPOWER7_irq_init(CPUPPCState *env)
#endif /* defined(TARGET_PPC64) */
/* PowerPC 40x internal IRQ controller */
-static void ppc40x_set_irq (void *opaque, int pin, int level)
+static void ppc40x_set_irq(void *opaque, int pin, int level)
{
- CPUPPCState *env = opaque;
+ PowerPCCPU *cpu = opaque;
+ CPUPPCState *env = &cpu->env;
int cur_level;
LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
@@ -355,10 +356,12 @@ static void ppc40x_set_irq (void *opaque, int pin, int level)
}
}
-void ppc40x_irq_init (CPUPPCState *env)
+void ppc40x_irq_init(CPUPPCState *env)
{
+ PowerPCCPU *cpu = ppc_env_get_cpu(env);
+
env->irq_inputs = (void **)qemu_allocate_irqs(&ppc40x_set_irq,
- env, PPC40x_INPUT_NB);
+ cpu, PPC40x_INPUT_NB);
}
/* PowerPC E500 internal IRQ controller */
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 24/59] ppc: Pass PowerPCCPU to ppce500_set_irq()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (23 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Needed for consistency with preceding _set_irq() functions.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/ppc.c | 11 +++++++----
1 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/ppc.c b/hw/ppc.c
index fc3a65c..ada100b 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -365,9 +365,10 @@ void ppc40x_irq_init(CPUPPCState *env)
}
/* PowerPC E500 internal IRQ controller */
-static void ppce500_set_irq (void *opaque, int pin, int level)
+static void ppce500_set_irq(void *opaque, int pin, int level)
{
- CPUPPCState *env = opaque;
+ PowerPCCPU *cpu = opaque;
+ CPUPPCState *env = &cpu->env;
int cur_level;
LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
@@ -419,10 +420,12 @@ static void ppce500_set_irq (void *opaque, int pin, int level)
}
}
-void ppce500_irq_init (CPUPPCState *env)
+void ppce500_irq_init(CPUPPCState *env)
{
+ PowerPCCPU *cpu = ppc_env_get_cpu(env);
+
env->irq_inputs = (void **)qemu_allocate_irqs(&ppce500_set_irq,
- env, PPCE500_INPUT_NB);
+ cpu, PPCE500_INPUT_NB);
}
/*****************************************************************************/
/* PowerPC time base and decrementer emulation */
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 25/59] sun4m: Pass SPARCCPU to cpu_set_irq()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (24 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Blue Swirl, Andreas Färber
Needed for cpu_kick_irq().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/sun4m.c | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/sun4m.c b/hw/sun4m.c
index a959261..e9b9d9b 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -262,7 +262,8 @@ static void cpu_kick_irq(CPUSPARCState *env)
static void cpu_set_irq(void *opaque, int irq, int level)
{
- CPUSPARCState *env = opaque;
+ SPARCCPU *cpu = opaque;
+ CPUSPARCState *env = &cpu->env;
if (level) {
trace_sun4m_cpu_set_irq_raise(irq);
@@ -828,7 +829,7 @@ static void cpu_devinit(const char *cpu_model, unsigned int id,
qemu_register_reset(secondary_cpu_reset, cpu);
env->halted = 1;
}
- *cpu_irqs = qemu_allocate_irqs(cpu_set_irq, env, MAX_PILS);
+ *cpu_irqs = qemu_allocate_irqs(cpu_set_irq, cpu, MAX_PILS);
env->prom_addr = prom_addr;
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 26/59] sun4m: Pass SPARCCPU to cpu_kick_irq()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (25 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Blue Swirl, Andreas Färber
Needed for qemu_cpu_kick().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/sun4m.c | 6 ++++--
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/sun4m.c b/hw/sun4m.c
index e9b9d9b..8846f93 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -253,8 +253,10 @@ void cpu_check_irqs(CPUSPARCState *env)
}
}
-static void cpu_kick_irq(CPUSPARCState *env)
+static void cpu_kick_irq(SPARCCPU *cpu)
{
+ CPUSPARCState *env = &cpu->env;
+
env->halted = 0;
cpu_check_irqs(env);
qemu_cpu_kick(env);
@@ -268,7 +270,7 @@ static void cpu_set_irq(void *opaque, int irq, int level)
if (level) {
trace_sun4m_cpu_set_irq_raise(irq);
env->pil_in |= 1 << irq;
- cpu_kick_irq(env);
+ cpu_kick_irq(cpu);
} else {
trace_sun4m_cpu_set_irq_lower(irq);
env->pil_in &= ~(1 << irq);
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 27/59] sun4u: Pass SPARCCPU to {, s, hs}tick_irq() and cpu_timer_create()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (26 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Blue Swirl, Andreas Färber
Needed for cpu_kick_irq().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/sun4u.c | 19 +++++++++++--------
1 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 137a7c6..4cea102 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -366,7 +366,7 @@ void cpu_get_timer(QEMUFile *f, CPUTimer *s)
qemu_get_timer(f, s->qtimer);
}
-static CPUTimer* cpu_timer_create(const char* name, CPUSPARCState *env,
+static CPUTimer *cpu_timer_create(const char *name, SPARCCPU *cpu,
QEMUBHFunc *cb, uint32_t frequency,
uint64_t disabled_mask)
{
@@ -379,7 +379,7 @@ static CPUTimer* cpu_timer_create(const char* name, CPUSPARCState *env,
timer->disabled = 1;
timer->clock_offset = qemu_get_clock_ns(vm_clock);
- timer->qtimer = qemu_new_timer_ns(vm_clock, cb, env);
+ timer->qtimer = qemu_new_timer_ns(vm_clock, cb, cpu);
return timer;
}
@@ -418,7 +418,8 @@ static void main_cpu_reset(void *opaque)
static void tick_irq(void *opaque)
{
- CPUSPARCState *env = opaque;
+ SPARCCPU *cpu = opaque;
+ CPUSPARCState *env = &cpu->env;
CPUTimer* timer = env->tick;
@@ -435,7 +436,8 @@ static void tick_irq(void *opaque)
static void stick_irq(void *opaque)
{
- CPUSPARCState *env = opaque;
+ SPARCCPU *cpu = opaque;
+ CPUSPARCState *env = &cpu->env;
CPUTimer* timer = env->stick;
@@ -452,7 +454,8 @@ static void stick_irq(void *opaque)
static void hstick_irq(void *opaque)
{
- CPUSPARCState *env = opaque;
+ SPARCCPU *cpu = opaque;
+ CPUSPARCState *env = &cpu->env;
CPUTimer* timer = env->hstick;
@@ -772,13 +775,13 @@ static SPARCCPU *cpu_devinit(const char *cpu_model, const struct hwdef *hwdef)
}
env = &cpu->env;
- env->tick = cpu_timer_create("tick", env, tick_irq,
+ env->tick = cpu_timer_create("tick", cpu, tick_irq,
tick_frequency, TICK_NPT_MASK);
- env->stick = cpu_timer_create("stick", env, stick_irq,
+ env->stick = cpu_timer_create("stick", cpu, stick_irq,
stick_frequency, TICK_INT_DIS);
- env->hstick = cpu_timer_create("hstick", env, hstick_irq,
+ env->hstick = cpu_timer_create("hstick", cpu, hstick_irq,
hstick_frequency, TICK_INT_DIS);
reset_info = g_malloc0(sizeof(ResetData));
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 28/59] sun4u: Pass SPARCCPU to cpu_kick_irq()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (27 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Blue Swirl, Andreas Färber
Needed for qemu_cpu_kick().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/sun4u.c | 10 ++++++----
1 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 4cea102..0453522 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -310,8 +310,10 @@ void cpu_check_irqs(CPUSPARCState *env)
}
}
-static void cpu_kick_irq(CPUSPARCState *env)
+static void cpu_kick_irq(SPARCCPU *cpu)
{
+ CPUSPARCState *env = &cpu->env;
+
env->halted = 0;
cpu_check_irqs(env);
qemu_cpu_kick(env);
@@ -431,7 +433,7 @@ static void tick_irq(void *opaque)
}
env->softint |= SOFTINT_TIMER;
- cpu_kick_irq(env);
+ cpu_kick_irq(cpu);
}
static void stick_irq(void *opaque)
@@ -449,7 +451,7 @@ static void stick_irq(void *opaque)
}
env->softint |= SOFTINT_STIMER;
- cpu_kick_irq(env);
+ cpu_kick_irq(cpu);
}
static void hstick_irq(void *opaque)
@@ -467,7 +469,7 @@ static void hstick_irq(void *opaque)
}
env->softint |= SOFTINT_STIMER;
- cpu_kick_irq(env);
+ cpu_kick_irq(cpu);
}
static int64_t cpu_to_timer_ticks(int64_t cpu_ticks, uint32_t frequency)
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 29/59] target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Alexander Graf, Avi Kivity, Marcelo Tosatti,
open list:PowerPC, open list:Overall
Needed for qemu_cpu_kick().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-ppc/kvm.c | 8 ++++++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index c09cc39..f111e87 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -71,8 +71,11 @@ static int cap_spapr_tce;
*/
static QEMUTimer *idle_timer;
-static void kvm_kick_env(void *env)
+static void kvm_kick_cpu(void *opaque)
{
+ PowerPCCPU *cpu = opaque;
+ CPUPPCState *env = &cpu->env;
+
qemu_cpu_kick(env);
}
@@ -169,6 +172,7 @@ static int kvm_booke206_tlb_init(CPUPPCState *env)
int kvm_arch_init_vcpu(CPUPPCState *cenv)
{
+ PowerPCCPU *cpu = ppc_env_get_cpu(cenv);
int ret;
ret = kvm_arch_sync_sregs(cenv);
@@ -176,7 +180,7 @@ int kvm_arch_init_vcpu(CPUPPCState *cenv)
return ret;
}
- idle_timer = qemu_new_timer_ns(vm_clock, kvm_kick_env, cenv);
+ idle_timer = qemu_new_timer_ns(vm_clock, kvm_kick_cpu, cpu);
/* Some targets support access to KVM's guest TLB. */
switch (cenv->mmu_model) {
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 29/59] target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU
@ 2012-05-23 3:07 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: open list:Overall, Marcelo Tosatti, Alexander Graf,
open list:PowerPC, Avi Kivity, Andreas Färber
Needed for qemu_cpu_kick().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-ppc/kvm.c | 8 ++++++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index c09cc39..f111e87 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -71,8 +71,11 @@ static int cap_spapr_tce;
*/
static QEMUTimer *idle_timer;
-static void kvm_kick_env(void *env)
+static void kvm_kick_cpu(void *opaque)
{
+ PowerPCCPU *cpu = opaque;
+ CPUPPCState *env = &cpu->env;
+
qemu_cpu_kick(env);
}
@@ -169,6 +172,7 @@ static int kvm_booke206_tlb_init(CPUPPCState *env)
int kvm_arch_init_vcpu(CPUPPCState *cenv)
{
+ PowerPCCPU *cpu = ppc_env_get_cpu(cenv);
int ret;
ret = kvm_arch_sync_sregs(cenv);
@@ -176,7 +180,7 @@ int kvm_arch_init_vcpu(CPUPPCState *cenv)
return ret;
}
- idle_timer = qemu_new_timer_ns(vm_clock, kvm_kick_env, cenv);
+ idle_timer = qemu_new_timer_ns(vm_clock, kvm_kick_cpu, cpu);
/* Some targets support access to KVM's guest TLB. */
switch (cenv->mmu_model) {
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 30/59] target-s390x: Let cpu_s390x_init() return S390CPU
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (29 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber, Alexander Graf
Let cpu_init() return CPUS390XState for backwards compatibility.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-s390x/cpu.c | 2 +-
target-s390x/cpu.h | 8 ++++----
target-s390x/helper.c | 4 ++--
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c
index f183213..619b202 100644
--- a/target-s390x/cpu.c
+++ b/target-s390x/cpu.c
@@ -20,7 +20,7 @@
* <http://www.gnu.org/licenses/lgpl-2.1.html>
*/
-#include "cpu-qom.h"
+#include "cpu.h"
#include "qemu-common.h"
#include "qemu-timer.h"
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 2f3f394..10bfab0 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -105,6 +105,8 @@ typedef struct CPUS390XState {
QEMUTimer *cpu_timer;
} CPUS390XState;
+#include "cpu-qom.h"
+
#if defined(CONFIG_USER_ONLY)
static inline void cpu_clone_regs(CPUS390XState *env, target_ulong newsp)
{
@@ -271,7 +273,7 @@ static inline int get_ilc(uint8_t opc)
#define ILC_LATER_INC_2 0x22
-CPUS390XState *cpu_s390x_init(const char *cpu_model);
+S390CPU *cpu_s390x_init(const char *cpu_model);
void s390x_translate_init(void);
int cpu_s390x_exec(CPUS390XState *s);
void cpu_s390x_close(CPUS390XState *s);
@@ -340,7 +342,7 @@ static inline void cpu_set_tls(CPUS390XState *env, target_ulong newtls)
env->aregs[1] = newtls & 0xffffffffULL;
}
-#define cpu_init cpu_s390x_init
+#define cpu_init(model) (&cpu_s390x_init(model)->env)
#define cpu_exec cpu_s390x_exec
#define cpu_gen_code cpu_s390x_gen_code
#define cpu_signal_handler cpu_s390x_signal_handler
@@ -994,6 +996,4 @@ static inline void cpu_pc_from_tb(CPUS390XState *env, TranslationBlock* tb)
env->psw.addr = tb->pc;
}
-#include "cpu-qom.h"
-
#endif
diff --git a/target-s390x/helper.c b/target-s390x/helper.c
index a34a35b..d0a1180 100644
--- a/target-s390x/helper.c
+++ b/target-s390x/helper.c
@@ -70,7 +70,7 @@ void s390x_cpu_timer(void *opaque)
}
#endif
-CPUS390XState *cpu_s390x_init(const char *cpu_model)
+S390CPU *cpu_s390x_init(const char *cpu_model)
{
S390CPU *cpu;
CPUS390XState *env;
@@ -86,7 +86,7 @@ CPUS390XState *cpu_s390x_init(const char *cpu_model)
env->cpu_model_str = cpu_model;
qemu_init_vcpu(env);
- return env;
+ return cpu;
}
#if defined(CONFIG_USER_ONLY)
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 31/59] s390-virtio: Use cpu_s390x_init() to obtain S390CPU
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (30 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber, Alexander Graf
Needed to store S390CPU in ipi_states[].
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/s390-virtio.c | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/hw/s390-virtio.c b/hw/s390-virtio.c
index c0e19fd..49b3495 100644
--- a/hw/s390-virtio.c
+++ b/hw/s390-virtio.c
@@ -209,9 +209,11 @@ static void s390_init(ram_addr_t my_ram_size,
ipi_states = g_malloc(sizeof(CPUS390XState *) * smp_cpus);
for (i = 0; i < smp_cpus; i++) {
+ S390CPU *cpu;
CPUS390XState *tmp_env;
- tmp_env = cpu_init(cpu_model);
+ cpu = cpu_s390x_init(cpu_model);
+ tmp_env = &cpu->env;
if (!env) {
env = tmp_env;
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 32/59] s390-virtio: Let s390_cpu_addr2state() return S390CPU
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Alexander Graf, Avi Kivity, Marcelo Tosatti,
open list:Overall
Convert ipi_states to S390CPU**.
Needed for s390_cpu_restart() in handle_sigp().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/s390-virtio-bus.c | 6 ++++--
hw/s390-virtio.c | 8 ++++----
target-s390x/cpu.h | 2 +-
target-s390x/kvm.c | 6 ++++--
4 files changed, 13 insertions(+), 9 deletions(-)
diff --git a/hw/s390-virtio-bus.c b/hw/s390-virtio-bus.c
index 1d38a8f..23ef35b 100644
--- a/hw/s390-virtio-bus.c
+++ b/hw/s390-virtio-bus.c
@@ -140,7 +140,8 @@ static int s390_virtio_device_init(VirtIOS390Device *dev, VirtIODevice *vdev)
s390_virtio_device_sync(dev);
s390_virtio_reset_idx(dev);
if (dev->qdev.hotplugged) {
- CPUS390XState *env = s390_cpu_addr2state(0);
+ S390CPU *cpu = s390_cpu_addr2state(0);
+ CPUS390XState *env = &cpu->env;
s390_virtio_irq(env, VIRTIO_PARAM_DEV_ADD, dev->dev_offs);
}
@@ -354,7 +355,8 @@ static void virtio_s390_notify(void *opaque, uint16_t vector)
{
VirtIOS390Device *dev = (VirtIOS390Device*)opaque;
uint64_t token = s390_virtio_device_vq_token(dev, vector);
- CPUS390XState *env = s390_cpu_addr2state(0);
+ S390CPU *cpu = s390_cpu_addr2state(0);
+ CPUS390XState *env = &cpu->env;
s390_virtio_irq(env, 0, token);
}
diff --git a/hw/s390-virtio.c b/hw/s390-virtio.c
index 49b3495..47eed35 100644
--- a/hw/s390-virtio.c
+++ b/hw/s390-virtio.c
@@ -61,9 +61,9 @@
#define MAX_BLK_DEVS 10
static VirtIOS390Bus *s390_bus;
-static CPUS390XState **ipi_states;
+static S390CPU **ipi_states;
-CPUS390XState *s390_cpu_addr2state(uint16_t cpu_addr)
+S390CPU *s390_cpu_addr2state(uint16_t cpu_addr)
{
if (cpu_addr >= smp_cpus) {
return NULL;
@@ -206,7 +206,7 @@ static void s390_init(ram_addr_t my_ram_size,
cpu_model = "host";
}
- ipi_states = g_malloc(sizeof(CPUS390XState *) * smp_cpus);
+ ipi_states = g_malloc(sizeof(S390CPU *) * smp_cpus);
for (i = 0; i < smp_cpus; i++) {
S390CPU *cpu;
@@ -217,7 +217,7 @@ static void s390_init(ram_addr_t my_ram_size,
if (!env) {
env = tmp_env;
}
- ipi_states[i] = tmp_env;
+ ipi_states[i] = cpu;
tmp_env->halted = 1;
tmp_env->exception_index = EXCP_HLT;
tmp_env->storage_keys = storage_keys;
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 10bfab0..c30ac3a 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -316,7 +316,7 @@ static inline void kvm_s390_interrupt_internal(CPUS390XState *env, int type,
{
}
#endif
-CPUS390XState *s390_cpu_addr2state(uint16_t cpu_addr);
+S390CPU *s390_cpu_addr2state(uint16_t cpu_addr);
void s390_add_running_cpu(CPUS390XState *env);
unsigned s390_del_running_cpu(CPUS390XState *env);
diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
index 90aad61..2153e38 100644
--- a/target-s390x/kvm.c
+++ b/target-s390x/kvm.c
@@ -333,6 +333,7 @@ static int handle_sigp(CPUS390XState *env, struct kvm_run *run, uint8_t ipa1)
uint16_t cpu_addr;
uint8_t t;
int r = -1;
+ S390CPU *target_cpu;
CPUS390XState *target_env;
cpu_synchronize_state(env);
@@ -353,10 +354,11 @@ static int handle_sigp(CPUS390XState *env, struct kvm_run *run, uint8_t ipa1)
parameter = env->regs[t] & 0x7ffffe00;
cpu_addr = env->regs[ipa1 & 0x0f];
- target_env = s390_cpu_addr2state(cpu_addr);
- if (!target_env) {
+ target_cpu = s390_cpu_addr2state(cpu_addr);
+ if (target_cpu == NULL) {
goto out;
}
+ target_env = &target_cpu->env;
switch (order_code) {
case SIGP_RESTART:
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 32/59] s390-virtio: Let s390_cpu_addr2state() return S390CPU
@ 2012-05-23 3:07 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: Avi Kivity, Marcelo Tosatti, Andreas Färber,
open list:Overall, Alexander Graf
Convert ipi_states to S390CPU**.
Needed for s390_cpu_restart() in handle_sigp().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/s390-virtio-bus.c | 6 ++++--
hw/s390-virtio.c | 8 ++++----
target-s390x/cpu.h | 2 +-
target-s390x/kvm.c | 6 ++++--
4 files changed, 13 insertions(+), 9 deletions(-)
diff --git a/hw/s390-virtio-bus.c b/hw/s390-virtio-bus.c
index 1d38a8f..23ef35b 100644
--- a/hw/s390-virtio-bus.c
+++ b/hw/s390-virtio-bus.c
@@ -140,7 +140,8 @@ static int s390_virtio_device_init(VirtIOS390Device *dev, VirtIODevice *vdev)
s390_virtio_device_sync(dev);
s390_virtio_reset_idx(dev);
if (dev->qdev.hotplugged) {
- CPUS390XState *env = s390_cpu_addr2state(0);
+ S390CPU *cpu = s390_cpu_addr2state(0);
+ CPUS390XState *env = &cpu->env;
s390_virtio_irq(env, VIRTIO_PARAM_DEV_ADD, dev->dev_offs);
}
@@ -354,7 +355,8 @@ static void virtio_s390_notify(void *opaque, uint16_t vector)
{
VirtIOS390Device *dev = (VirtIOS390Device*)opaque;
uint64_t token = s390_virtio_device_vq_token(dev, vector);
- CPUS390XState *env = s390_cpu_addr2state(0);
+ S390CPU *cpu = s390_cpu_addr2state(0);
+ CPUS390XState *env = &cpu->env;
s390_virtio_irq(env, 0, token);
}
diff --git a/hw/s390-virtio.c b/hw/s390-virtio.c
index 49b3495..47eed35 100644
--- a/hw/s390-virtio.c
+++ b/hw/s390-virtio.c
@@ -61,9 +61,9 @@
#define MAX_BLK_DEVS 10
static VirtIOS390Bus *s390_bus;
-static CPUS390XState **ipi_states;
+static S390CPU **ipi_states;
-CPUS390XState *s390_cpu_addr2state(uint16_t cpu_addr)
+S390CPU *s390_cpu_addr2state(uint16_t cpu_addr)
{
if (cpu_addr >= smp_cpus) {
return NULL;
@@ -206,7 +206,7 @@ static void s390_init(ram_addr_t my_ram_size,
cpu_model = "host";
}
- ipi_states = g_malloc(sizeof(CPUS390XState *) * smp_cpus);
+ ipi_states = g_malloc(sizeof(S390CPU *) * smp_cpus);
for (i = 0; i < smp_cpus; i++) {
S390CPU *cpu;
@@ -217,7 +217,7 @@ static void s390_init(ram_addr_t my_ram_size,
if (!env) {
env = tmp_env;
}
- ipi_states[i] = tmp_env;
+ ipi_states[i] = cpu;
tmp_env->halted = 1;
tmp_env->exception_index = EXCP_HLT;
tmp_env->storage_keys = storage_keys;
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 10bfab0..c30ac3a 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -316,7 +316,7 @@ static inline void kvm_s390_interrupt_internal(CPUS390XState *env, int type,
{
}
#endif
-CPUS390XState *s390_cpu_addr2state(uint16_t cpu_addr);
+S390CPU *s390_cpu_addr2state(uint16_t cpu_addr);
void s390_add_running_cpu(CPUS390XState *env);
unsigned s390_del_running_cpu(CPUS390XState *env);
diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
index 90aad61..2153e38 100644
--- a/target-s390x/kvm.c
+++ b/target-s390x/kvm.c
@@ -333,6 +333,7 @@ static int handle_sigp(CPUS390XState *env, struct kvm_run *run, uint8_t ipa1)
uint16_t cpu_addr;
uint8_t t;
int r = -1;
+ S390CPU *target_cpu;
CPUS390XState *target_env;
cpu_synchronize_state(env);
@@ -353,10 +354,11 @@ static int handle_sigp(CPUS390XState *env, struct kvm_run *run, uint8_t ipa1)
parameter = env->regs[t] & 0x7ffffe00;
cpu_addr = env->regs[ipa1 & 0x0f];
- target_env = s390_cpu_addr2state(cpu_addr);
- if (!target_env) {
+ target_cpu = s390_cpu_addr2state(cpu_addr);
+ if (target_cpu == NULL) {
goto out;
}
+ target_env = &target_cpu->env;
switch (order_code) {
case SIGP_RESTART:
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 33/59] target-s390x: Pass S390CPU to s390_cpu_restart()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Alexander Graf, Avi Kivity, Marcelo Tosatti,
open list:Overall
Needed for qemu_cpu_kick().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-s390x/kvm.c | 6 ++++--
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
index 2153e38..5800fd6 100644
--- a/target-s390x/kvm.c
+++ b/target-s390x/kvm.c
@@ -292,8 +292,10 @@ static int handle_diag(CPUS390XState *env, struct kvm_run *run, int ipb_code)
return r;
}
-static int s390_cpu_restart(CPUS390XState *env)
+static int s390_cpu_restart(S390CPU *cpu)
{
+ CPUS390XState *env = &cpu->env;
+
kvm_s390_interrupt(env, KVM_S390_RESTART, 0);
s390_add_running_cpu(env);
qemu_cpu_kick(env);
@@ -362,7 +364,7 @@ static int handle_sigp(CPUS390XState *env, struct kvm_run *run, uint8_t ipa1)
switch (order_code) {
case SIGP_RESTART:
- r = s390_cpu_restart(target_env);
+ r = s390_cpu_restart(target_cpu);
break;
case SIGP_STORE_STATUS_ADDR:
r = s390_store_status(target_env, parameter);
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 33/59] target-s390x: Pass S390CPU to s390_cpu_restart()
@ 2012-05-23 3:07 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: Avi Kivity, Marcelo Tosatti, Andreas Färber,
open list:Overall, Alexander Graf
Needed for qemu_cpu_kick().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-s390x/kvm.c | 6 ++++--
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
index 2153e38..5800fd6 100644
--- a/target-s390x/kvm.c
+++ b/target-s390x/kvm.c
@@ -292,8 +292,10 @@ static int handle_diag(CPUS390XState *env, struct kvm_run *run, int ipb_code)
return r;
}
-static int s390_cpu_restart(CPUS390XState *env)
+static int s390_cpu_restart(S390CPU *cpu)
{
+ CPUS390XState *env = &cpu->env;
+
kvm_s390_interrupt(env, KVM_S390_RESTART, 0);
s390_add_running_cpu(env);
qemu_cpu_kick(env);
@@ -362,7 +364,7 @@ static int handle_sigp(CPUS390XState *env, struct kvm_run *run, uint8_t ipa1)
switch (order_code) {
case SIGP_RESTART:
- r = s390_cpu_restart(target_env);
+ r = s390_cpu_restart(target_cpu);
break;
case SIGP_STORE_STATUS_ADDR:
r = s390_store_status(target_env, parameter);
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 34/59] cpus: Pass CPUState to qemu_cpu_kick()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Blue Swirl, Avi Kivity, Marcelo Tosatti,
Alexander Graf, open list:Overall, open list:PowerPC
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpus.c | 13 +++++--------
exec.c | 2 +-
hw/ppc.c | 4 ++--
hw/ppce500_spin.c | 2 +-
hw/spapr_rtas.c | 5 ++++-
hw/sun4m.c | 2 +-
hw/sun4u.c | 2 +-
include/qemu/cpu.h | 8 ++++++++
kvm-all.c | 2 +-
qemu-common.h | 1 -
target-ppc/kvm.c | 3 +--
target-s390x/kvm.c | 2 +-
12 files changed, 26 insertions(+), 20 deletions(-)
diff --git a/cpus.c b/cpus.c
index 5bae5fc..3873da1 100644
--- a/cpus.c
+++ b/cpus.c
@@ -663,7 +663,7 @@ void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
wi.next = NULL;
wi.done = false;
- qemu_cpu_kick(env);
+ qemu_cpu_kick(cpu);
while (!wi.done) {
CPUArchState *self_env = cpu_single_env;
@@ -872,11 +872,8 @@ static void qemu_cpu_kick_thread(CPUState *cpu)
#endif
}
-void qemu_cpu_kick(void *_env)
+void qemu_cpu_kick(CPUState *cpu)
{
- CPUArchState *env = _env;
- CPUState *cpu = ENV_GET_CPU(env);
-
qemu_cond_broadcast(cpu->halt_cond);
if (!tcg_enabled() && !cpu->thread_kicked) {
qemu_cpu_kick_thread(cpu);
@@ -947,7 +944,7 @@ void pause_all_vcpus(void)
while (penv) {
CPUState *pcpu = ENV_GET_CPU(penv);
pcpu->stop = true;
- qemu_cpu_kick(penv);
+ qemu_cpu_kick(pcpu);
penv = penv->next_cpu;
}
@@ -968,7 +965,7 @@ void pause_all_vcpus(void)
qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex);
penv = first_cpu;
while (penv) {
- qemu_cpu_kick(penv);
+ qemu_cpu_kick(ENV_GET_CPU(penv));
penv = penv->next_cpu;
}
}
@@ -983,7 +980,7 @@ void resume_all_vcpus(void)
CPUState *pcpu = ENV_GET_CPU(penv);
pcpu->stop = false;
pcpu->stopped = false;
- qemu_cpu_kick(penv);
+ qemu_cpu_kick(pcpu);
penv = penv->next_cpu;
}
}
diff --git a/exec.c b/exec.c
index 79e553c..6e5ac67 100644
--- a/exec.c
+++ b/exec.c
@@ -1745,7 +1745,7 @@ static void tcg_handle_interrupt(CPUArchState *env, int mask)
* case its halted.
*/
if (!qemu_cpu_is_self(cpu)) {
- qemu_cpu_kick(env);
+ qemu_cpu_kick(cpu);
return;
}
diff --git a/hw/ppc.c b/hw/ppc.c
index ada100b..fa7ae74 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -206,7 +206,7 @@ static void ppc970_set_irq(void *opaque, int pin, int level)
} else {
LOG_IRQ("%s: restart the CPU\n", __func__);
env->halted = 0;
- qemu_cpu_kick(env);
+ qemu_cpu_kick(CPU(cpu));
}
break;
case PPC970_INPUT_HRESET:
@@ -335,7 +335,7 @@ static void ppc40x_set_irq(void *opaque, int pin, int level)
} else {
LOG_IRQ("%s: restart the CPU\n", __func__);
env->halted = 0;
- qemu_cpu_kick(env);
+ qemu_cpu_kick(CPU(cpu));
}
break;
case PPC40x_INPUT_DEBUG:
diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c
index a03a4d3..1c0d8b6 100644
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@@ -115,7 +115,7 @@ static void spin_kick(void *data)
env->halted = 0;
env->exception_index = -1;
cpu->stopped = false;
- qemu_cpu_kick(env);
+ qemu_cpu_kick(cpu);
}
static void spin_write(void *opaque, target_phys_addr_t addr, uint64_t value,
diff --git a/hw/spapr_rtas.c b/hw/spapr_rtas.c
index ae18595..a343055 100644
--- a/hw/spapr_rtas.c
+++ b/hw/spapr_rtas.c
@@ -163,6 +163,7 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
uint32_t nret, target_ulong rets)
{
target_ulong id, start, r3;
+ CPUState *cpu;
CPUPPCState *env;
if (nargs != 3 || nret != 1) {
@@ -175,6 +176,8 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
r3 = rtas_ld(args, 2);
for (env = first_cpu; env; env = env->next_cpu) {
+ cpu = ENV_GET_CPU(env);
+
if (env->cpu_index != id) {
continue;
}
@@ -189,7 +192,7 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
env->gpr[3] = r3;
env->halted = 0;
- qemu_cpu_kick(env);
+ qemu_cpu_kick(cpu);
rtas_st(rets, 0, 0);
return;
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 8846f93..4929677 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -259,7 +259,7 @@ static void cpu_kick_irq(SPARCCPU *cpu)
env->halted = 0;
cpu_check_irqs(env);
- qemu_cpu_kick(env);
+ qemu_cpu_kick(CPU(cpu));
}
static void cpu_set_irq(void *opaque, int irq, int level)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 0453522..d41e80a 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -316,7 +316,7 @@ static void cpu_kick_irq(SPARCCPU *cpu)
env->halted = 0;
cpu_check_irqs(env);
- qemu_cpu_kick(env);
+ qemu_cpu_kick(CPU(cpu));
}
static void cpu_set_ivec_irq(void *opaque, int irq, int level)
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 75e0f8d..bfeb224 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -96,6 +96,14 @@ void cpu_reset(CPUState *cpu);
bool qemu_cpu_is_self(CPUState *cpu);
/**
+ * qemu_cpu_kick:
+ * @cpu: The vCPU to kick.
+ *
+ * Kicks @cpu's thread.
+ */
+void qemu_cpu_kick(CPUState *cpu);
+
+/**
* cpu_is_stopped:
* @cpu: The CPU to check.
*
diff --git a/kvm-all.c b/kvm-all.c
index f25cf6d..3b247a0 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -836,7 +836,7 @@ static void kvm_handle_interrupt(CPUArchState *env, int mask)
env->interrupt_request |= mask;
if (!qemu_cpu_is_self(cpu)) {
- qemu_cpu_kick(env);
+ qemu_cpu_kick(cpu);
}
}
diff --git a/qemu-common.h b/qemu-common.h
index 653e0e5..bfd7943 100644
--- a/qemu-common.h
+++ b/qemu-common.h
@@ -283,7 +283,6 @@ void cpu_save(QEMUFile *f, void *opaque);
int cpu_load(QEMUFile *f, void *opaque, int version_id);
/* Unblock cpu */
-void qemu_cpu_kick(void *env);
void qemu_cpu_kick_self(void);
bool all_cpu_threads_idle(void);
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index f111e87..a5bdbef 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -74,9 +74,8 @@ static QEMUTimer *idle_timer;
static void kvm_kick_cpu(void *opaque)
{
PowerPCCPU *cpu = opaque;
- CPUPPCState *env = &cpu->env;
- qemu_cpu_kick(env);
+ qemu_cpu_kick(CPU(cpu));
}
int kvm_arch_init(KVMState *s)
diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
index 5800fd6..e09709d 100644
--- a/target-s390x/kvm.c
+++ b/target-s390x/kvm.c
@@ -298,7 +298,7 @@ static int s390_cpu_restart(S390CPU *cpu)
kvm_s390_interrupt(env, KVM_S390_RESTART, 0);
s390_add_running_cpu(env);
- qemu_cpu_kick(env);
+ qemu_cpu_kick(CPU(cpu));
dprintf("DONE: SIGP cpu restart: %p\n", env);
return 0;
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 34/59] cpus: Pass CPUState to qemu_cpu_kick()
@ 2012-05-23 3:07 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel
Cc: open list:Overall, Marcelo Tosatti, Alexander Graf, Blue Swirl,
open list:PowerPC, Avi Kivity, Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpus.c | 13 +++++--------
exec.c | 2 +-
hw/ppc.c | 4 ++--
hw/ppce500_spin.c | 2 +-
hw/spapr_rtas.c | 5 ++++-
hw/sun4m.c | 2 +-
hw/sun4u.c | 2 +-
include/qemu/cpu.h | 8 ++++++++
kvm-all.c | 2 +-
qemu-common.h | 1 -
target-ppc/kvm.c | 3 +--
target-s390x/kvm.c | 2 +-
12 files changed, 26 insertions(+), 20 deletions(-)
diff --git a/cpus.c b/cpus.c
index 5bae5fc..3873da1 100644
--- a/cpus.c
+++ b/cpus.c
@@ -663,7 +663,7 @@ void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
wi.next = NULL;
wi.done = false;
- qemu_cpu_kick(env);
+ qemu_cpu_kick(cpu);
while (!wi.done) {
CPUArchState *self_env = cpu_single_env;
@@ -872,11 +872,8 @@ static void qemu_cpu_kick_thread(CPUState *cpu)
#endif
}
-void qemu_cpu_kick(void *_env)
+void qemu_cpu_kick(CPUState *cpu)
{
- CPUArchState *env = _env;
- CPUState *cpu = ENV_GET_CPU(env);
-
qemu_cond_broadcast(cpu->halt_cond);
if (!tcg_enabled() && !cpu->thread_kicked) {
qemu_cpu_kick_thread(cpu);
@@ -947,7 +944,7 @@ void pause_all_vcpus(void)
while (penv) {
CPUState *pcpu = ENV_GET_CPU(penv);
pcpu->stop = true;
- qemu_cpu_kick(penv);
+ qemu_cpu_kick(pcpu);
penv = penv->next_cpu;
}
@@ -968,7 +965,7 @@ void pause_all_vcpus(void)
qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex);
penv = first_cpu;
while (penv) {
- qemu_cpu_kick(penv);
+ qemu_cpu_kick(ENV_GET_CPU(penv));
penv = penv->next_cpu;
}
}
@@ -983,7 +980,7 @@ void resume_all_vcpus(void)
CPUState *pcpu = ENV_GET_CPU(penv);
pcpu->stop = false;
pcpu->stopped = false;
- qemu_cpu_kick(penv);
+ qemu_cpu_kick(pcpu);
penv = penv->next_cpu;
}
}
diff --git a/exec.c b/exec.c
index 79e553c..6e5ac67 100644
--- a/exec.c
+++ b/exec.c
@@ -1745,7 +1745,7 @@ static void tcg_handle_interrupt(CPUArchState *env, int mask)
* case its halted.
*/
if (!qemu_cpu_is_self(cpu)) {
- qemu_cpu_kick(env);
+ qemu_cpu_kick(cpu);
return;
}
diff --git a/hw/ppc.c b/hw/ppc.c
index ada100b..fa7ae74 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -206,7 +206,7 @@ static void ppc970_set_irq(void *opaque, int pin, int level)
} else {
LOG_IRQ("%s: restart the CPU\n", __func__);
env->halted = 0;
- qemu_cpu_kick(env);
+ qemu_cpu_kick(CPU(cpu));
}
break;
case PPC970_INPUT_HRESET:
@@ -335,7 +335,7 @@ static void ppc40x_set_irq(void *opaque, int pin, int level)
} else {
LOG_IRQ("%s: restart the CPU\n", __func__);
env->halted = 0;
- qemu_cpu_kick(env);
+ qemu_cpu_kick(CPU(cpu));
}
break;
case PPC40x_INPUT_DEBUG:
diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c
index a03a4d3..1c0d8b6 100644
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@@ -115,7 +115,7 @@ static void spin_kick(void *data)
env->halted = 0;
env->exception_index = -1;
cpu->stopped = false;
- qemu_cpu_kick(env);
+ qemu_cpu_kick(cpu);
}
static void spin_write(void *opaque, target_phys_addr_t addr, uint64_t value,
diff --git a/hw/spapr_rtas.c b/hw/spapr_rtas.c
index ae18595..a343055 100644
--- a/hw/spapr_rtas.c
+++ b/hw/spapr_rtas.c
@@ -163,6 +163,7 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
uint32_t nret, target_ulong rets)
{
target_ulong id, start, r3;
+ CPUState *cpu;
CPUPPCState *env;
if (nargs != 3 || nret != 1) {
@@ -175,6 +176,8 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
r3 = rtas_ld(args, 2);
for (env = first_cpu; env; env = env->next_cpu) {
+ cpu = ENV_GET_CPU(env);
+
if (env->cpu_index != id) {
continue;
}
@@ -189,7 +192,7 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
env->gpr[3] = r3;
env->halted = 0;
- qemu_cpu_kick(env);
+ qemu_cpu_kick(cpu);
rtas_st(rets, 0, 0);
return;
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 8846f93..4929677 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -259,7 +259,7 @@ static void cpu_kick_irq(SPARCCPU *cpu)
env->halted = 0;
cpu_check_irqs(env);
- qemu_cpu_kick(env);
+ qemu_cpu_kick(CPU(cpu));
}
static void cpu_set_irq(void *opaque, int irq, int level)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 0453522..d41e80a 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -316,7 +316,7 @@ static void cpu_kick_irq(SPARCCPU *cpu)
env->halted = 0;
cpu_check_irqs(env);
- qemu_cpu_kick(env);
+ qemu_cpu_kick(CPU(cpu));
}
static void cpu_set_ivec_irq(void *opaque, int irq, int level)
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 75e0f8d..bfeb224 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -96,6 +96,14 @@ void cpu_reset(CPUState *cpu);
bool qemu_cpu_is_self(CPUState *cpu);
/**
+ * qemu_cpu_kick:
+ * @cpu: The vCPU to kick.
+ *
+ * Kicks @cpu's thread.
+ */
+void qemu_cpu_kick(CPUState *cpu);
+
+/**
* cpu_is_stopped:
* @cpu: The CPU to check.
*
diff --git a/kvm-all.c b/kvm-all.c
index f25cf6d..3b247a0 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -836,7 +836,7 @@ static void kvm_handle_interrupt(CPUArchState *env, int mask)
env->interrupt_request |= mask;
if (!qemu_cpu_is_self(cpu)) {
- qemu_cpu_kick(env);
+ qemu_cpu_kick(cpu);
}
}
diff --git a/qemu-common.h b/qemu-common.h
index 653e0e5..bfd7943 100644
--- a/qemu-common.h
+++ b/qemu-common.h
@@ -283,7 +283,6 @@ void cpu_save(QEMUFile *f, void *opaque);
int cpu_load(QEMUFile *f, void *opaque, int version_id);
/* Unblock cpu */
-void qemu_cpu_kick(void *env);
void qemu_cpu_kick_self(void);
bool all_cpu_threads_idle(void);
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index f111e87..a5bdbef 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -74,9 +74,8 @@ static QEMUTimer *idle_timer;
static void kvm_kick_cpu(void *opaque)
{
PowerPCCPU *cpu = opaque;
- CPUPPCState *env = &cpu->env;
- qemu_cpu_kick(env);
+ qemu_cpu_kick(CPU(cpu));
}
int kvm_arch_init(KVMState *s)
diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
index 5800fd6..e09709d 100644
--- a/target-s390x/kvm.c
+++ b/target-s390x/kvm.c
@@ -298,7 +298,7 @@ static int s390_cpu_restart(S390CPU *cpu)
kvm_s390_interrupt(env, KVM_S390_RESTART, 0);
s390_add_running_cpu(env);
- qemu_cpu_kick(env);
+ qemu_cpu_kick(CPU(cpu));
dprintf("DONE: SIGP cpu restart: %p\n", env);
return 0;
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 35/59] cpu: Move queued_work_{first, last} to CPUState
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (34 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-defs.h | 1 -
cpus.c | 19 ++++++++++---------
include/qemu/cpu.h | 1 +
3 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/cpu-defs.h b/cpu-defs.h
index 7c68c39..54807f5 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -205,7 +205,6 @@ typedef struct CPUWatchpoint {
/* user data */ \
void *opaque; \
\
- struct qemu_work_item *queued_work_first, *queued_work_last; \
const char *cpu_model_str; \
struct KVMState *kvm_state; \
struct kvm_run *kvm_run; \
diff --git a/cpus.c b/cpus.c
index 3873da1..e493218 100644
--- a/cpus.c
+++ b/cpus.c
@@ -437,7 +437,7 @@ static bool cpu_thread_is_idle(CPUArchState *env)
{
CPUState *cpu = ENV_GET_CPU(env);
- if (cpu->stop || env->queued_work_first) {
+ if (cpu->stop || cpu->queued_work_first != NULL) {
return false;
}
if (cpu->stopped || !runstate_is_running()) {
@@ -654,12 +654,12 @@ void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
wi.func = func;
wi.data = data;
- if (!env->queued_work_first) {
- env->queued_work_first = &wi;
+ if (cpu->queued_work_first == NULL) {
+ cpu->queued_work_first = &wi;
} else {
- env->queued_work_last->next = &wi;
+ cpu->queued_work_last->next = &wi;
}
- env->queued_work_last = &wi;
+ cpu->queued_work_last = &wi;
wi.next = NULL;
wi.done = false;
@@ -674,18 +674,19 @@ void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
static void flush_queued_work(CPUArchState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
struct qemu_work_item *wi;
- if (!env->queued_work_first) {
+ if (cpu->queued_work_first == NULL) {
return;
}
- while ((wi = env->queued_work_first)) {
- env->queued_work_first = wi->next;
+ while ((wi = cpu->queued_work_first)) {
+ cpu->queued_work_first = wi->next;
wi->func(wi->data);
wi->done = true;
}
- env->queued_work_last = NULL;
+ cpu->queued_work_last = NULL;
qemu_cond_broadcast(&qemu_work_cond);
}
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index bfeb224..eea6175 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -70,6 +70,7 @@ struct CPUState {
HANDLE hThread;
#endif
struct QemuCond *halt_cond;
+ struct qemu_work_item *queued_work_first, *queued_work_last;
bool thread_kicked;
bool created;
bool stop;
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 36/59] cpus: Pass CPUState to flush_queued_work()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (35 preceding siblings ...)
(?)
@ 2012-05-23 3:07 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:07 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
CPUArchState is no longer needed there.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpus.c | 5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/cpus.c b/cpus.c
index e493218..2e7eafb 100644
--- a/cpus.c
+++ b/cpus.c
@@ -672,9 +672,8 @@ void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
}
}
-static void flush_queued_work(CPUArchState *env)
+static void flush_queued_work(CPUState *cpu)
{
- CPUState *cpu = ENV_GET_CPU(env);
struct qemu_work_item *wi;
if (cpu->queued_work_first == NULL) {
@@ -699,7 +698,7 @@ static void qemu_wait_io_event_common(CPUArchState *env)
cpu->stopped = true;
qemu_cond_signal(&qemu_pause_cond);
}
- flush_queued_work(env);
+ flush_queued_work(cpu);
cpu->thread_kicked = false;
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 37/59] cpus: Pass CPUState to qemu_wait_io_event_common()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (36 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
CPUArchState is no longer needed there.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpus.c | 12 +++++-------
1 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/cpus.c b/cpus.c
index 2e7eafb..83880e7 100644
--- a/cpus.c
+++ b/cpus.c
@@ -689,10 +689,8 @@ static void flush_queued_work(CPUState *cpu)
qemu_cond_broadcast(&qemu_work_cond);
}
-static void qemu_wait_io_event_common(CPUArchState *env)
+static void qemu_wait_io_event_common(CPUState *cpu)
{
- CPUState *cpu = ENV_GET_CPU(env);
-
if (cpu->stop) {
cpu->stop = false;
cpu->stopped = true;
@@ -718,7 +716,7 @@ static void qemu_tcg_wait_io_event(void)
}
for (env = first_cpu; env != NULL; env = env->next_cpu) {
- qemu_wait_io_event_common(env);
+ qemu_wait_io_event_common(ENV_GET_CPU(env));
}
}
@@ -731,7 +729,7 @@ static void qemu_kvm_wait_io_event(CPUArchState *env)
}
qemu_kvm_eat_signals(env);
- qemu_wait_io_event_common(env);
+ qemu_wait_io_event_common(cpu);
}
static void *qemu_kvm_cpu_thread_fn(void *arg)
@@ -806,7 +804,7 @@ static void *qemu_dummy_cpu_thread_fn(void *arg)
}
qemu_mutex_lock_iothread();
cpu_single_env = env;
- qemu_wait_io_event_common(env);
+ qemu_wait_io_event_common(cpu);
}
return NULL;
@@ -838,7 +836,7 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
/* process any pending work */
for (env = first_cpu; env != NULL; env = env->next_cpu) {
- qemu_wait_io_event_common(env);
+ qemu_wait_io_event_common(ENV_GET_CPU(env));
}
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 38/59] target-ppc: Pass PowerPCCPU to powerpc_excp()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (37 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: open list:PowerPC, Andreas Färber, Alexander Graf
Needed for cpu_ppc_hypercall().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-ppc/helper.c | 40 ++++++++++++++++++++++------------------
1 files changed, 22 insertions(+), 18 deletions(-)
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index f556f85..f947684 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -2509,8 +2509,9 @@ static inline void dump_syscall(CPUPPCState *env)
/* Note that this function should be greatly optimized
* when called with a constant excp, from ppc_hw_interrupt
*/
-static inline void powerpc_excp(CPUPPCState *env, int excp_model, int excp)
+static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
{
+ CPUPPCState *env = &cpu->env;
target_ulong msr, new_msr, vector;
int srr0, srr1, asrr0, asrr1;
int lpes0, lpes1, lev;
@@ -3058,13 +3059,16 @@ static inline void powerpc_excp(CPUPPCState *env, int excp_model, int excp)
}
}
-void do_interrupt (CPUPPCState *env)
+void do_interrupt(CPUPPCState *env)
{
- powerpc_excp(env, env->excp_model, env->exception_index);
+ PowerPCCPU *cpu = ppc_env_get_cpu(env);
+
+ powerpc_excp(cpu, env->excp_model, env->exception_index);
}
-void ppc_hw_interrupt (CPUPPCState *env)
+void ppc_hw_interrupt(CPUPPCState *env)
{
+ PowerPCCPU *cpu = ppc_env_get_cpu(env);
int hdice;
#if 0
@@ -3075,20 +3079,20 @@ void ppc_hw_interrupt (CPUPPCState *env)
/* External reset */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_RESET)) {
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_RESET);
- powerpc_excp(env, env->excp_model, POWERPC_EXCP_RESET);
+ powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_RESET);
return;
}
/* Machine check exception */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_MCK)) {
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_MCK);
- powerpc_excp(env, env->excp_model, POWERPC_EXCP_MCHECK);
+ powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_MCHECK);
return;
}
#if 0 /* TODO */
/* External debug exception */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_DEBUG)) {
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_DEBUG);
- powerpc_excp(env, env->excp_model, POWERPC_EXCP_DEBUG);
+ powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_DEBUG);
return;
}
#endif
@@ -3102,7 +3106,7 @@ void ppc_hw_interrupt (CPUPPCState *env)
/* Hypervisor decrementer exception */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_HDECR)) {
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_HDECR);
- powerpc_excp(env, env->excp_model, POWERPC_EXCP_HDECR);
+ powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_HDECR);
return;
}
}
@@ -3115,7 +3119,7 @@ void ppc_hw_interrupt (CPUPPCState *env)
#if 0
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_CEXT);
#endif
- powerpc_excp(env, env->excp_model, POWERPC_EXCP_CRITICAL);
+ powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_CRITICAL);
return;
}
}
@@ -3123,30 +3127,30 @@ void ppc_hw_interrupt (CPUPPCState *env)
/* Watchdog timer on embedded PowerPC */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_WDT)) {
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_WDT);
- powerpc_excp(env, env->excp_model, POWERPC_EXCP_WDT);
+ powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_WDT);
return;
}
if (env->pending_interrupts & (1 << PPC_INTERRUPT_CDOORBELL)) {
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_CDOORBELL);
- powerpc_excp(env, env->excp_model, POWERPC_EXCP_DOORCI);
+ powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_DOORCI);
return;
}
/* Fixed interval timer on embedded PowerPC */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_FIT)) {
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_FIT);
- powerpc_excp(env, env->excp_model, POWERPC_EXCP_FIT);
+ powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_FIT);
return;
}
/* Programmable interval timer on embedded PowerPC */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_PIT)) {
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_PIT);
- powerpc_excp(env, env->excp_model, POWERPC_EXCP_PIT);
+ powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_PIT);
return;
}
/* Decrementer exception */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_DECR)) {
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_DECR);
- powerpc_excp(env, env->excp_model, POWERPC_EXCP_DECR);
+ powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_DECR);
return;
}
/* External interrupt */
@@ -3157,23 +3161,23 @@ void ppc_hw_interrupt (CPUPPCState *env)
#if 0
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_EXT);
#endif
- powerpc_excp(env, env->excp_model, POWERPC_EXCP_EXTERNAL);
+ powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_EXTERNAL);
return;
}
if (env->pending_interrupts & (1 << PPC_INTERRUPT_DOORBELL)) {
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_DOORBELL);
- powerpc_excp(env, env->excp_model, POWERPC_EXCP_DOORI);
+ powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_DOORI);
return;
}
if (env->pending_interrupts & (1 << PPC_INTERRUPT_PERFM)) {
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_PERFM);
- powerpc_excp(env, env->excp_model, POWERPC_EXCP_PERFM);
+ powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_PERFM);
return;
}
/* Thermal interrupt */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_THERM)) {
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_THERM);
- powerpc_excp(env, env->excp_model, POWERPC_EXCP_THERM);
+ powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_THERM);
return;
}
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 39/59] target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (38 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: open list:PowerPC, Andreas Färber, Alexander Graf
Adapt emulate_spapr_hypercall() accordingly.
Needed for spapr_hypercall().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/spapr.c | 4 +++-
target-ppc/cpu.h | 2 +-
target-ppc/helper.c | 4 ++--
3 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/spapr.c b/hw/spapr.c
index d0bddbc..70068b4 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -477,8 +477,10 @@ static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
}
-static void emulate_spapr_hypercall(CPUPPCState *env)
+static void emulate_spapr_hypercall(PowerPCCPU *cpu)
{
+ CPUPPCState *env = &cpu->env;
+
env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
}
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 77a2858..9b38529 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -2182,7 +2182,7 @@ static inline uint32_t booke206_tlbnps(CPUPPCState *env, const int tlbn)
#endif
-extern void (*cpu_ppc_hypercall)(CPUPPCState *);
+extern void (*cpu_ppc_hypercall)(PowerPCCPU *);
static inline bool cpu_has_work(CPUPPCState *env)
{
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index f947684..7747674 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -67,7 +67,7 @@
/*****************************************************************************/
/* PowerPC Hypercall emulation */
-void (*cpu_ppc_hypercall)(CPUPPCState *);
+void (*cpu_ppc_hypercall)(PowerPCCPU *);
/*****************************************************************************/
/* PowerPC MMU emulation */
@@ -2674,7 +2674,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
dump_syscall(env);
lev = env->error_code;
if ((lev == 1) && cpu_ppc_hypercall) {
- cpu_ppc_hypercall(env);
+ cpu_ppc_hypercall(cpu);
return;
}
if (lev == 1 || (lpes0 == 0 && lpes1 == 0))
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 40/59] spapr: Pass PowerPCCPU to spapr_hypercall()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Alexander Graf, Avi Kivity, Marcelo Tosatti,
open list:PowerPC, open list:Overall
Needed for the hypercall handlers.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/spapr.c | 2 +-
hw/spapr.h | 2 +-
hw/spapr_hcall.c | 4 +++-
target-ppc/kvm.c | 3 ++-
4 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/spapr.c b/hw/spapr.c
index 70068b4..f9c3631 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -481,7 +481,7 @@ static void emulate_spapr_hypercall(PowerPCCPU *cpu)
{
CPUPPCState *env = &cpu->env;
- env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
+ env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]);
}
static void spapr_reset(void *opaque)
diff --git a/hw/spapr.h b/hw/spapr.h
index 654a7a8..ad901ae 100644
--- a/hw/spapr.h
+++ b/hw/spapr.h
@@ -283,7 +283,7 @@ typedef target_ulong (*spapr_hcall_fn)(CPUPPCState *env, sPAPREnvironment *spapr
target_ulong *args);
void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn);
-target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,
+target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
target_ulong *args);
qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num,
diff --git a/hw/spapr_hcall.c b/hw/spapr_hcall.c
index 94bb504..5d39316 100644
--- a/hw/spapr_hcall.c
+++ b/hw/spapr_hcall.c
@@ -644,9 +644,11 @@ void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn)
*slot = fn;
}
-target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,
+target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
target_ulong *args)
{
+ CPUPPCState *env = &cpu->env;
+
if (msr_pr) {
hcall_dprintf("Hypercall made with MSR[PR]=1\n");
return H_PRIVILEGE;
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index a5bdbef..148c095 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -559,7 +559,8 @@ int kvm_arch_handle_exit(CPUPPCState *env, struct kvm_run *run)
#ifdef CONFIG_PSERIES
case KVM_EXIT_PAPR_HCALL:
dprintf("handle PAPR hypercall\n");
- run->papr_hcall.ret = spapr_hypercall(env, run->papr_hcall.nr,
+ run->papr_hcall.ret = spapr_hypercall(ppc_env_get_cpu(env),
+ run->papr_hcall.nr,
run->papr_hcall.args);
ret = 1;
break;
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 40/59] spapr: Pass PowerPCCPU to spapr_hypercall()
@ 2012-05-23 3:08 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: open list:Overall, Marcelo Tosatti, Alexander Graf,
open list:PowerPC, Avi Kivity, Andreas Färber
Needed for the hypercall handlers.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/spapr.c | 2 +-
hw/spapr.h | 2 +-
hw/spapr_hcall.c | 4 +++-
target-ppc/kvm.c | 3 ++-
4 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/spapr.c b/hw/spapr.c
index 70068b4..f9c3631 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -481,7 +481,7 @@ static void emulate_spapr_hypercall(PowerPCCPU *cpu)
{
CPUPPCState *env = &cpu->env;
- env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
+ env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]);
}
static void spapr_reset(void *opaque)
diff --git a/hw/spapr.h b/hw/spapr.h
index 654a7a8..ad901ae 100644
--- a/hw/spapr.h
+++ b/hw/spapr.h
@@ -283,7 +283,7 @@ typedef target_ulong (*spapr_hcall_fn)(CPUPPCState *env, sPAPREnvironment *spapr
target_ulong *args);
void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn);
-target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,
+target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
target_ulong *args);
qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num,
diff --git a/hw/spapr_hcall.c b/hw/spapr_hcall.c
index 94bb504..5d39316 100644
--- a/hw/spapr_hcall.c
+++ b/hw/spapr_hcall.c
@@ -644,9 +644,11 @@ void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn)
*slot = fn;
}
-target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,
+target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
target_ulong *args)
{
+ CPUPPCState *env = &cpu->env;
+
if (msr_pr) {
hcall_dprintf("Hypercall made with MSR[PR]=1\n");
return H_PRIVILEGE;
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index a5bdbef..148c095 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -559,7 +559,8 @@ int kvm_arch_handle_exit(CPUPPCState *env, struct kvm_run *run)
#ifdef CONFIG_PSERIES
case KVM_EXIT_PAPR_HCALL:
dprintf("handle PAPR hypercall\n");
- run->papr_hcall.ret = spapr_hypercall(env, run->papr_hcall.nr,
+ run->papr_hcall.ret = spapr_hypercall(ppc_env_get_cpu(env),
+ run->papr_hcall.nr,
run->papr_hcall.args);
ret = 1;
break;
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 41/59] spapr: Pass PowerPCCPU to hypercalls
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (40 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Needed for cpu_has_work() in h_cede().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/spapr.h | 2 +-
hw/spapr_hcall.c | 34 ++++++++++++++++++++--------------
hw/spapr_llan.c | 10 +++++-----
hw/spapr_vio.c | 12 ++++++------
hw/spapr_vty.c | 4 ++--
hw/xics.c | 11 +++++++----
6 files changed, 41 insertions(+), 32 deletions(-)
diff --git a/hw/spapr.h b/hw/spapr.h
index ad901ae..25aa40c 100644
--- a/hw/spapr.h
+++ b/hw/spapr.h
@@ -278,7 +278,7 @@ extern sPAPREnvironment *spapr;
do { } while (0)
#endif
-typedef target_ulong (*spapr_hcall_fn)(CPUPPCState *env, sPAPREnvironment *spapr,
+typedef target_ulong (*spapr_hcall_fn)(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode,
target_ulong *args);
diff --git a/hw/spapr_hcall.c b/hw/spapr_hcall.c
index 5d39316..47fca58 100644
--- a/hw/spapr_hcall.c
+++ b/hw/spapr_hcall.c
@@ -92,9 +92,10 @@ static target_ulong compute_tlbie_rb(target_ulong v, target_ulong r,
return rb;
}
-static target_ulong h_enter(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_enter(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
+ CPUPPCState *env = &cpu->env;
target_ulong flags = args[0];
target_ulong pte_index = args[1];
target_ulong pteh = args[2];
@@ -219,9 +220,10 @@ static target_ulong remove_hpte(CPUPPCState *env, target_ulong ptex,
return REMOVE_SUCCESS;
}
-static target_ulong h_remove(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_remove(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
+ CPUPPCState *env = &cpu->env;
target_ulong flags = args[0];
target_ulong pte_index = args[1];
target_ulong avpn = args[2];
@@ -265,9 +267,10 @@ static target_ulong h_remove(CPUPPCState *env, sPAPREnvironment *spapr,
#define H_BULK_REMOVE_MAX_BATCH 4
-static target_ulong h_bulk_remove(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_bulk_remove(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
+ CPUPPCState *env = &cpu->env;
int i;
for (i = 0; i < H_BULK_REMOVE_MAX_BATCH; i++) {
@@ -311,9 +314,10 @@ static target_ulong h_bulk_remove(CPUPPCState *env, sPAPREnvironment *spapr,
return H_SUCCESS;
}
-static target_ulong h_protect(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_protect(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
+ CPUPPCState *env = &cpu->env;
target_ulong flags = args[0];
target_ulong pte_index = args[1];
target_ulong avpn = args[2];
@@ -356,7 +360,7 @@ static target_ulong h_protect(CPUPPCState *env, sPAPREnvironment *spapr,
return H_SUCCESS;
}
-static target_ulong h_set_dabr(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_set_dabr(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
/* FIXME: actually implement this */
@@ -490,7 +494,7 @@ static target_ulong deregister_dtl(CPUPPCState *env, target_ulong addr)
return H_SUCCESS;
}
-static target_ulong h_register_vpa(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_register_vpa(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong flags = args[0];
@@ -538,9 +542,11 @@ static target_ulong h_register_vpa(CPUPPCState *env, sPAPREnvironment *spapr,
return ret;
}
-static target_ulong h_cede(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_cede(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
+ CPUPPCState *env = &cpu->env;
+
env->msr |= (1ULL << MSR_EE);
hreg_compute_hflags(env);
if (!cpu_has_work(env)) {
@@ -549,7 +555,7 @@ static target_ulong h_cede(CPUPPCState *env, sPAPREnvironment *spapr,
return H_SUCCESS;
}
-static target_ulong h_rtas(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_rtas(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong rtas_r3 = args[0];
@@ -561,7 +567,7 @@ static target_ulong h_rtas(CPUPPCState *env, sPAPREnvironment *spapr,
nret, rtas_r3 + 12 + 4*nargs);
}
-static target_ulong h_logical_load(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_logical_load(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong size = args[0];
@@ -584,7 +590,7 @@ static target_ulong h_logical_load(CPUPPCState *env, sPAPREnvironment *spapr,
return H_PARAMETER;
}
-static target_ulong h_logical_store(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_logical_store(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong size = args[0];
@@ -608,14 +614,14 @@ static target_ulong h_logical_store(CPUPPCState *env, sPAPREnvironment *spapr,
return H_PARAMETER;
}
-static target_ulong h_logical_icbi(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_logical_icbi(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
/* Nothing to do on emulation, KVM will trap this in the kernel */
return H_SUCCESS;
}
-static target_ulong h_logical_dcbf(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_logical_dcbf(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
/* Nothing to do on emulation, KVM will trap this in the kernel */
@@ -659,14 +665,14 @@ target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
spapr_hcall_fn fn = papr_hypercall_table[opcode / 4];
if (fn) {
- return fn(env, spapr, opcode, args);
+ return fn(cpu, spapr, opcode, args);
}
} else if ((opcode >= KVMPPC_HCALL_BASE) &&
(opcode <= KVMPPC_HCALL_MAX)) {
spapr_hcall_fn fn = kvmppc_hypercall_table[opcode - KVMPPC_HCALL_BASE];
if (fn) {
- return fn(env, spapr, opcode, args);
+ return fn(cpu, spapr, opcode, args);
}
}
diff --git a/hw/spapr_llan.c b/hw/spapr_llan.c
index 8313043..0d31147 100644
--- a/hw/spapr_llan.c
+++ b/hw/spapr_llan.c
@@ -262,7 +262,7 @@ static int check_bd(VIOsPAPRVLANDevice *dev, vlan_bd_t bd,
return 0;
}
-static target_ulong h_register_logical_lan(CPUPPCState *env,
+static target_ulong h_register_logical_lan(PowerPCCPU *cpu,
sPAPREnvironment *spapr,
target_ulong opcode,
target_ulong *args)
@@ -326,7 +326,7 @@ static target_ulong h_register_logical_lan(CPUPPCState *env,
}
-static target_ulong h_free_logical_lan(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_free_logical_lan(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong reg = args[0];
@@ -347,7 +347,7 @@ static target_ulong h_free_logical_lan(CPUPPCState *env, sPAPREnvironment *spapr
return H_SUCCESS;
}
-static target_ulong h_add_logical_lan_buffer(CPUPPCState *env,
+static target_ulong h_add_logical_lan_buffer(PowerPCCPU *cpu,
sPAPREnvironment *spapr,
target_ulong opcode,
target_ulong *args)
@@ -396,7 +396,7 @@ static target_ulong h_add_logical_lan_buffer(CPUPPCState *env,
return H_SUCCESS;
}
-static target_ulong h_send_logical_lan(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_send_logical_lan(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong reg = args[0];
@@ -465,7 +465,7 @@ static target_ulong h_send_logical_lan(CPUPPCState *env, sPAPREnvironment *spapr
return H_SUCCESS;
}
-static target_ulong h_multicast_ctrl(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_multicast_ctrl(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong reg = args[0];
diff --git a/hw/spapr_vio.c b/hw/spapr_vio.c
index 315ab80..94de609 100644
--- a/hw/spapr_vio.c
+++ b/hw/spapr_vio.c
@@ -194,7 +194,7 @@ static void rtce_init(VIOsPAPRDevice *dev)
}
}
-static target_ulong h_put_tce(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_put_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong liobn = args[0];
@@ -403,7 +403,7 @@ uint64_t ldq_tce(VIOsPAPRDevice *dev, uint64_t taddr)
/*
* CRQ handling
*/
-static target_ulong h_reg_crq(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_reg_crq(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong reg = args[0];
@@ -461,7 +461,7 @@ static target_ulong free_crq(VIOsPAPRDevice *dev)
return H_SUCCESS;
}
-static target_ulong h_free_crq(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_free_crq(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong reg = args[0];
@@ -475,7 +475,7 @@ static target_ulong h_free_crq(CPUPPCState *env, sPAPREnvironment *spapr,
return free_crq(dev);
}
-static target_ulong h_send_crq(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_send_crq(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong reg = args[0];
@@ -498,7 +498,7 @@ static target_ulong h_send_crq(CPUPPCState *env, sPAPREnvironment *spapr,
return H_HARDWARE;
}
-static target_ulong h_enable_crq(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_enable_crq(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong reg = args[0];
@@ -706,7 +706,7 @@ static int spapr_vio_busdev_init(DeviceState *qdev)
return pc->init(dev);
}
-static target_ulong h_vio_signal(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_vio_signal(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode,
target_ulong *args)
{
diff --git a/hw/spapr_vty.c b/hw/spapr_vty.c
index c9674f3..700283e 100644
--- a/hw/spapr_vty.c
+++ b/hw/spapr_vty.c
@@ -70,7 +70,7 @@ static int spapr_vty_init(VIOsPAPRDevice *sdev)
}
/* Forward declaration */
-static target_ulong h_put_term_char(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_put_term_char(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong reg = args[0];
@@ -97,7 +97,7 @@ static target_ulong h_put_term_char(CPUPPCState *env, sPAPREnvironment *spapr,
return H_SUCCESS;
}
-static target_ulong h_get_term_char(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_get_term_char(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong reg = args[0];
diff --git a/hw/xics.c b/hw/xics.c
index 668a0d6..67782c0 100644
--- a/hw/xics.c
+++ b/hw/xics.c
@@ -329,16 +329,17 @@ qemu_irq xics_assign_irq(struct icp_state *icp, int irq,
return icp->ics->qirqs[irq - icp->ics->offset];
}
-static target_ulong h_cppr(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_cppr(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
+ CPUPPCState *env = &cpu->env;
target_ulong cppr = args[0];
icp_set_cppr(spapr->icp, env->cpu_index, cppr);
return H_SUCCESS;
}
-static target_ulong h_ipi(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_ipi(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
target_ulong server = args[0];
@@ -353,18 +354,20 @@ static target_ulong h_ipi(CPUPPCState *env, sPAPREnvironment *spapr,
}
-static target_ulong h_xirr(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_xirr(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
+ CPUPPCState *env = &cpu->env;
uint32_t xirr = icp_accept(spapr->icp->ss + env->cpu_index);
args[0] = xirr;
return H_SUCCESS;
}
-static target_ulong h_eoi(CPUPPCState *env, sPAPREnvironment *spapr,
+static target_ulong h_eoi(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
+ CPUPPCState *env = &cpu->env;
target_ulong xirr = args[0];
icp_eoi(spapr->icp, env->cpu_index, xirr);
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 42/59] xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (41 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
2012-10-10 15:15 ` Andreas Färber
-1 siblings, 1 reply; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Needed for cpu_has_work().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/xtensa_pic.c | 7 +++++--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/xtensa_pic.c b/hw/xtensa_pic.c
index 653ded6..8b9c051 100644
--- a/hw/xtensa_pic.c
+++ b/hw/xtensa_pic.c
@@ -125,7 +125,8 @@ void xtensa_rearm_ccompare_timer(CPUXtensaState *env)
static void xtensa_ccompare_cb(void *opaque)
{
- CPUXtensaState *env = opaque;
+ XtensaCPU *cpu = opaque;
+ CPUXtensaState *env = &cpu->env;
if (env->halted) {
env->halt_clock = qemu_get_clock_ns(vm_clock);
@@ -139,12 +140,14 @@ static void xtensa_ccompare_cb(void *opaque)
void xtensa_irq_init(CPUXtensaState *env)
{
+ XtensaCPU *cpu = xtensa_env_get_cpu(env);
+
env->irq_inputs = (void **)qemu_allocate_irqs(
xtensa_set_irq, env, env->config->ninterrupt);
if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT) &&
env->config->nccompare > 0) {
env->ccompare_timer =
- qemu_new_timer_ns(vm_clock, &xtensa_ccompare_cb, env);
+ qemu_new_timer_ns(vm_clock, &xtensa_ccompare_cb, cpu);
}
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 43/59] cpus: Pass CPUState to [qemu_]cpu_has_work()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (42 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Alexander Graf, Blue Swirl, Max Filippov,
Michael Walle, open list:PowerPC, Paul Brook, Edgar E. Iglesias,
Guan Xuetao, Andreas Färber, Aurelien Jarno,
Richard Henderson
For target-mips also change the return type to bool.
Make include paths for cpu-qom.h consistent for alpha and unicore32.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-all.h | 2 --
cpu-exec.c | 8 +++-----
cpus.c | 2 +-
hw/spapr_hcall.c | 2 +-
hw/xtensa_pic.c | 2 +-
include/qemu/cpu.h | 10 ++++++++++
target-alpha/cpu.c | 2 +-
target-alpha/cpu.h | 4 +++-
target-arm/cpu.h | 4 +++-
target-cris/cpu.h | 4 +++-
target-i386/cpu.h | 4 +++-
target-lm32/cpu.h | 4 +++-
target-m68k/cpu.h | 4 +++-
target-microblaze/cpu.h | 4 +++-
target-mips/cpu.h | 11 ++++++-----
target-ppc/cpu.h | 4 +++-
target-s390x/cpu.h | 4 +++-
target-sh4/cpu.h | 4 +++-
target-sparc/cpu.h | 4 +++-
target-unicore32/cpu.c | 2 +-
target-unicore32/cpu.h | 4 +++-
target-xtensa/cpu.h | 4 +++-
22 files changed, 63 insertions(+), 30 deletions(-)
diff --git a/cpu-all.h b/cpu-all.h
index af85e7d..0adfcf5 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -415,8 +415,6 @@ void cpu_reset_interrupt(CPUArchState *env, int mask);
void cpu_exit(CPUArchState *s);
-bool qemu_cpu_has_work(CPUArchState *env);
-
/* Breakpoint/watchpoint flags */
#define BP_MEM_READ 0x01
#define BP_MEM_WRITE 0x02
diff --git a/cpu-exec.c b/cpu-exec.c
index 83cac93..da0c17a 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -27,9 +27,9 @@ int tb_invalidated_flag;
//#define CONFIG_DEBUG_EXEC
-bool qemu_cpu_has_work(CPUArchState *env)
+bool qemu_cpu_has_work(CPUState *cpu)
{
- return cpu_has_work(env);
+ return cpu_has_work(cpu);
}
void cpu_loop_exit(CPUArchState *env)
@@ -184,16 +184,14 @@ volatile sig_atomic_t exit_request;
int cpu_exec(CPUArchState *env)
{
-#ifdef TARGET_PPC
CPUState *cpu = ENV_GET_CPU(env);
-#endif
int ret, interrupt_request;
TranslationBlock *tb;
uint8_t *tc_ptr;
tcg_target_ulong next_tb;
if (env->halted) {
- if (!cpu_has_work(env)) {
+ if (!cpu_has_work(cpu)) {
return EXCP_HALTED;
}
diff --git a/cpus.c b/cpus.c
index 83880e7..ba7fb1c 100644
--- a/cpus.c
+++ b/cpus.c
@@ -443,7 +443,7 @@ static bool cpu_thread_is_idle(CPUArchState *env)
if (cpu->stopped || !runstate_is_running()) {
return true;
}
- if (!env->halted || qemu_cpu_has_work(env) || kvm_irqchip_in_kernel()) {
+ if (!env->halted || qemu_cpu_has_work(cpu) || kvm_irqchip_in_kernel()) {
return false;
}
return true;
diff --git a/hw/spapr_hcall.c b/hw/spapr_hcall.c
index 47fca58..ebb271c 100644
--- a/hw/spapr_hcall.c
+++ b/hw/spapr_hcall.c
@@ -549,7 +549,7 @@ static target_ulong h_cede(PowerPCCPU *cpu, sPAPREnvironment *spapr,
env->msr |= (1ULL << MSR_EE);
hreg_compute_hflags(env);
- if (!cpu_has_work(env)) {
+ if (!cpu_has_work(CPU(cpu))) {
env->halted = 1;
}
return H_SUCCESS;
diff --git a/hw/xtensa_pic.c b/hw/xtensa_pic.c
index 8b9c051..1ec70cd 100644
--- a/hw/xtensa_pic.c
+++ b/hw/xtensa_pic.c
@@ -131,7 +131,7 @@ static void xtensa_ccompare_cb(void *opaque)
if (env->halted) {
env->halt_clock = qemu_get_clock_ns(vm_clock);
xtensa_advance_ccount(env, env->wake_ccount - env->sregs[CCOUNT]);
- if (!cpu_has_work(env)) {
+ if (!cpu_has_work(CPU(cpu))) {
env->sregs[CCOUNT] = env->wake_ccount + 1;
xtensa_rearm_ccompare_timer(env);
}
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index eea6175..f04da6e 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -87,6 +87,16 @@ struct CPUState {
void cpu_reset(CPUState *cpu);
/**
+ * qemu_cpu_has_work:
+ * @cpu: The vCPU to check.
+ *
+ * Checks whether the CPU has work to do.
+ *
+ * Returns: %true if the CPU has work, %false otherwise.
+ */
+bool qemu_cpu_has_work(CPUState *cpu);
+
+/**
* qemu_cpu_is_self:
* @cpu: The vCPU to check against.
*
diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c
index 62d2a66..11a19eb 100644
--- a/target-alpha/cpu.c
+++ b/target-alpha/cpu.c
@@ -19,7 +19,7 @@
* <http://www.gnu.org/licenses/lgpl-2.1.html>
*/
-#include "cpu-qom.h"
+#include "cpu.h"
#include "qemu-common.h"
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 99f9ee1..a43fb94 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -499,8 +499,10 @@ static inline void cpu_set_tls(CPUAlphaState *env, target_ulong newtls)
}
#endif
-static inline bool cpu_has_work(CPUAlphaState *env)
+static inline bool cpu_has_work(CPUState *cpu)
{
+ CPUAlphaState *env = &ALPHA_CPU(cpu)->env;
+
/* Here we are checking to see if the CPU should wake up from HALT.
We will have gotten into this state only for WTINT from PALmode. */
/* ??? I'm not sure how the IPL state works with WTINT to keep a CPU
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index d01285f..d4a19be 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -551,8 +551,10 @@ static inline void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
}
}
-static inline bool cpu_has_work(CPUARMState *env)
+static inline bool cpu_has_work(CPUState *cpu)
{
+ CPUARMState *env = &ARM_CPU(cpu)->env;
+
return env->interrupt_request &
(CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
}
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index a760367..2f71f63 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -283,8 +283,10 @@ static inline void cpu_get_tb_cpu_state(CPUCRISState *env, target_ulong *pc,
#define cpu_list cris_cpu_list
void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf);
-static inline bool cpu_has_work(CPUCRISState *env)
+static inline bool cpu_has_work(CPUState *cpu)
{
+ CPUCRISState *env = &CRIS_CPU(cpu)->env;
+
return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
}
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index adc569c..bbe8de4 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1033,8 +1033,10 @@ static inline void cpu_clone_regs(CPUX86State *env, target_ulong newsp)
#include "hw/apic.h"
#endif
-static inline bool cpu_has_work(CPUX86State *env)
+static inline bool cpu_has_work(CPUState *cpu)
{
+ CPUX86State *env = &X86_CPU(cpu)->env;
+
return ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) ||
(env->interrupt_request & (CPU_INTERRUPT_NMI |
diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index da80469..7243b4f 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -253,8 +253,10 @@ static inline void cpu_get_tb_cpu_state(CPULM32State *env, target_ulong *pc,
*flags = 0;
}
-static inline bool cpu_has_work(CPULM32State *env)
+static inline bool cpu_has_work(CPUState *cpu)
{
+ CPULM32State *env = &LM32_CPU(cpu)->env;
+
return env->interrupt_request & CPU_INTERRUPT_HARD;
}
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 5e6ee50..780e2c9 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -257,8 +257,10 @@ static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc,
| ((env->macsr >> 4) & 0xf); /* Bits 0-3 */
}
-static inline bool cpu_has_work(CPUM68KState *env)
+static inline bool cpu_has_work(CPUState *cpu)
{
+ CPUM68KState *env = &M68K_CPU(cpu)->env;
+
return env->interrupt_request & CPU_INTERRUPT_HARD;
}
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index a570678..6131287 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -369,8 +369,10 @@ void cpu_unassigned_access(CPUMBState *env1, target_phys_addr_t addr,
int is_write, int is_exec, int is_asi, int size);
#endif
-static inline bool cpu_has_work(CPUMBState *env)
+static inline bool cpu_has_work(CPUState *cpu)
{
+ CPUMBState *env = &MICROBLAZE_CPU(cpu)->env;
+
return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
}
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index ce3467f..9ce53da 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -706,16 +706,17 @@ static inline int mips_vpe_active(CPUMIPSState *env)
return active;
}
-static inline int cpu_has_work(CPUMIPSState *env)
+static inline bool cpu_has_work(CPUState *cpu)
{
- int has_work = 0;
+ CPUMIPSState *env = &MIPS_CPU(cpu)->env;
+ bool has_work = false;
/* It is implementation dependent if non-enabled interrupts
wake-up the CPU, however most of the implementations only
check for interrupts that can be taken. */
if ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
cpu_mips_hw_interrupts_pending(env)) {
- has_work = 1;
+ has_work = true;
}
/* MIPS-MT has the ability to halt the CPU. */
@@ -723,11 +724,11 @@ static inline int cpu_has_work(CPUMIPSState *env)
/* The QEMU model will issue an _WAKE request whenever the CPUs
should be woken up. */
if (env->interrupt_request & CPU_INTERRUPT_WAKE) {
- has_work = 1;
+ has_work = true;
}
if (!mips_vpe_active(env)) {
- has_work = 0;
+ has_work = false;
}
}
return has_work;
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 9b38529..f1927d5 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -2184,8 +2184,10 @@ static inline uint32_t booke206_tlbnps(CPUPPCState *env, const int tlbn)
extern void (*cpu_ppc_hypercall)(PowerPCCPU *);
-static inline bool cpu_has_work(CPUPPCState *env)
+static inline bool cpu_has_work(CPUState *cpu)
{
+ CPUPPCState *env = &POWERPC_CPU(cpu)->env;
+
return msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD);
}
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index c30ac3a..be13348 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -985,8 +985,10 @@ static inline void cpu_inject_ext(CPUS390XState *env, uint32_t code, uint32_t pa
cpu_interrupt(env, CPU_INTERRUPT_HARD);
}
-static inline bool cpu_has_work(CPUS390XState *env)
+static inline bool cpu_has_work(CPUState *cpu)
{
+ CPUS390XState *env = &S390_CPU(cpu)->env;
+
return (env->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->psw.mask & PSW_MASK_EXT);
}
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index bf59222..fd6fb86 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -371,8 +371,10 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc,
| (env->movcal_backup ? TB_FLAG_PENDING_MOVCA : 0); /* Bit 4 */
}
-static inline bool cpu_has_work(CPUSH4State *env)
+static inline bool cpu_has_work(CPUState *cpu)
{
+ CPUSH4State *env = &SUPERH_CPU(cpu)->env;
+
return env->interrupt_request & CPU_INTERRUPT_HARD;
}
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index e16b7b3..e3b3b44 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -763,8 +763,10 @@ static inline bool tb_am_enabled(int tb_flags)
#endif
}
-static inline bool cpu_has_work(CPUSPARCState *env1)
+static inline bool cpu_has_work(CPUState *cpu)
{
+ CPUSPARCState *env1 = &SPARC_CPU(cpu)->env;
+
return (env1->interrupt_request & CPU_INTERRUPT_HARD) &&
cpu_interrupts_enabled(env1);
}
diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c
index de63f58..5467728 100644
--- a/target-unicore32/cpu.c
+++ b/target-unicore32/cpu.c
@@ -12,7 +12,7 @@
* or (at your option) any later version.
*/
-#include "cpu-qom.h"
+#include "cpu.h"
#include "qemu-common.h"
static inline void set_feature(CPUUniCore32State *env, int feature)
diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index 81c14ff..2843a97 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -183,8 +183,10 @@ void uc32_translate_init(void);
void do_interrupt(CPUUniCore32State *);
void switch_mode(CPUUniCore32State *, int);
-static inline bool cpu_has_work(CPUUniCore32State *env)
+static inline bool cpu_has_work(CPUState *cpu)
{
+ CPUUniCore32State *env = &UNICORE32_CPU(cpu)->env;
+
return env->interrupt_request &
(CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
}
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 81f7833..fe4bd07 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -484,8 +484,10 @@ static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc,
#include "cpu-all.h"
#include "exec-all.h"
-static inline int cpu_has_work(CPUXtensaState *env)
+static inline int cpu_has_work(CPUState *cpu)
{
+ CPUXtensaState *env = &XTENSA_CPU(cpu)->env;
+
return env->pending_irq_level;
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 44/59] target-i386: Pass X86CPU to kvm_mce_inject()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Avi Kivity, Marcelo Tosatti, open list:X86
Needed for cpu_x86_inject_mce().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-i386/kvm.c | 8 +++++---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 92ad338..758bf8f 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -221,8 +221,9 @@ static int kvm_get_mce_cap_supported(KVMState *s, uint64_t *mce_cap,
return -ENOSYS;
}
-static void kvm_mce_inject(CPUX86State *env, target_phys_addr_t paddr, int code)
+static void kvm_mce_inject(X86CPU *cpu, target_phys_addr_t paddr, int code)
{
+ CPUX86State *env = &cpu->env;
uint64_t status = MCI_STATUS_VAL | MCI_STATUS_UC | MCI_STATUS_EN |
MCI_STATUS_MISCV | MCI_STATUS_ADDRV | MCI_STATUS_S;
uint64_t mcg_status = MCG_STATUS_MCIP;
@@ -248,6 +249,7 @@ static void hardware_memory_error(void)
int kvm_arch_on_sigbus_vcpu(CPUX86State *env, int code, void *addr)
{
+ X86CPU *cpu = x86_env_get_cpu(env);
ram_addr_t ram_addr;
target_phys_addr_t paddr;
@@ -265,7 +267,7 @@ int kvm_arch_on_sigbus_vcpu(CPUX86State *env, int code, void *addr)
}
}
kvm_hwpoison_page_add(ram_addr);
- kvm_mce_inject(env, paddr, code);
+ kvm_mce_inject(cpu, paddr, code);
} else {
if (code == BUS_MCEERR_AO) {
return 0;
@@ -293,7 +295,7 @@ int kvm_arch_on_sigbus(int code, void *addr)
return 0;
}
kvm_hwpoison_page_add(ram_addr);
- kvm_mce_inject(first_cpu, paddr, code);
+ kvm_mce_inject(x86_env_get_cpu(first_cpu), paddr, code);
} else {
if (code == BUS_MCEERR_AO) {
return 0;
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 44/59] target-i386: Pass X86CPU to kvm_mce_inject()
@ 2012-05-23 3:08 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Marcelo Tosatti, Andreas Färber, open list:X86, Avi Kivity
Needed for cpu_x86_inject_mce().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-i386/kvm.c | 8 +++++---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 92ad338..758bf8f 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -221,8 +221,9 @@ static int kvm_get_mce_cap_supported(KVMState *s, uint64_t *mce_cap,
return -ENOSYS;
}
-static void kvm_mce_inject(CPUX86State *env, target_phys_addr_t paddr, int code)
+static void kvm_mce_inject(X86CPU *cpu, target_phys_addr_t paddr, int code)
{
+ CPUX86State *env = &cpu->env;
uint64_t status = MCI_STATUS_VAL | MCI_STATUS_UC | MCI_STATUS_EN |
MCI_STATUS_MISCV | MCI_STATUS_ADDRV | MCI_STATUS_S;
uint64_t mcg_status = MCG_STATUS_MCIP;
@@ -248,6 +249,7 @@ static void hardware_memory_error(void)
int kvm_arch_on_sigbus_vcpu(CPUX86State *env, int code, void *addr)
{
+ X86CPU *cpu = x86_env_get_cpu(env);
ram_addr_t ram_addr;
target_phys_addr_t paddr;
@@ -265,7 +267,7 @@ int kvm_arch_on_sigbus_vcpu(CPUX86State *env, int code, void *addr)
}
}
kvm_hwpoison_page_add(ram_addr);
- kvm_mce_inject(env, paddr, code);
+ kvm_mce_inject(cpu, paddr, code);
} else {
if (code == BUS_MCEERR_AO) {
return 0;
@@ -293,7 +295,7 @@ int kvm_arch_on_sigbus(int code, void *addr)
return 0;
}
kvm_hwpoison_page_add(ram_addr);
- kvm_mce_inject(first_cpu, paddr, code);
+ kvm_mce_inject(x86_env_get_cpu(first_cpu), paddr, code);
} else {
if (code == BUS_MCEERR_AO) {
return 0;
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 45/59] target-i386: Pass X86CPU to cpu_x86_inject_mce()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Luiz Capitulino, Markus Armbruster,
Avi Kivity, Marcelo Tosatti, open list:X86
Needed for run_on_cpu().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
monitor.c | 6 ++++--
target-i386/cpu.h | 2 +-
target-i386/helper.c | 3 ++-
target-i386/kvm.c | 2 +-
4 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/monitor.c b/monitor.c
index 12a6fe2..07d24f8 100644
--- a/monitor.c
+++ b/monitor.c
@@ -2177,7 +2177,8 @@ static void do_acl_remove(Monitor *mon, const QDict *qdict)
#if defined(TARGET_I386)
static void do_inject_mce(Monitor *mon, const QDict *qdict)
{
- CPUArchState *cenv;
+ X86CPU *cpu;
+ CPUX86State *cenv;
int cpu_index = qdict_get_int(qdict, "cpu_index");
int bank = qdict_get_int(qdict, "bank");
uint64_t status = qdict_get_int(qdict, "status");
@@ -2190,8 +2191,9 @@ static void do_inject_mce(Monitor *mon, const QDict *qdict)
flags |= MCE_INJECT_BROADCAST;
}
for (cenv = first_cpu; cenv != NULL; cenv = cenv->next_cpu) {
+ cpu = x86_env_get_cpu(cenv);
if (cenv->cpu_index == cpu_index) {
- cpu_x86_inject_mce(mon, cenv, bank, status, mcg_status, addr, misc,
+ cpu_x86_inject_mce(mon, cpu, bank, status, mcg_status, addr, misc,
flags);
break;
}
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index bbe8de4..5169bb0 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1067,7 +1067,7 @@ void do_cpu_sipi(X86CPU *cpu);
#define MCE_INJECT_BROADCAST 1
#define MCE_INJECT_UNCOND_AO 2
-void cpu_x86_inject_mce(Monitor *mon, CPUX86State *cenv, int bank,
+void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
uint64_t status, uint64_t mcg_status, uint64_t addr,
uint64_t misc, int flags);
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 018a98f..bfd314b 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1053,10 +1053,11 @@ static void do_inject_x86_mce(void *data)
}
}
-void cpu_x86_inject_mce(Monitor *mon, CPUX86State *cenv, int bank,
+void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
uint64_t status, uint64_t mcg_status, uint64_t addr,
uint64_t misc, int flags)
{
+ CPUX86State *cenv = &cpu->env;
MCEInjectionParams params = {
.mon = mon,
.env = cenv,
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 758bf8f..f611a96 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -235,7 +235,7 @@ static void kvm_mce_inject(X86CPU *cpu, target_phys_addr_t paddr, int code)
status |= 0xc0;
mcg_status |= MCG_STATUS_RIPV;
}
- cpu_x86_inject_mce(NULL, env, 9, status, mcg_status, paddr,
+ cpu_x86_inject_mce(NULL, cpu, 9, status, mcg_status, paddr,
(MCM_ADDR_PHYS << 6) | 0xc,
cpu_x86_support_mca_broadcast(env) ?
MCE_INJECT_BROADCAST : 0);
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 45/59] target-i386: Pass X86CPU to cpu_x86_inject_mce()
@ 2012-05-23 3:08 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: open list:X86, Marcelo Tosatti, Markus Armbruster,
Luiz Capitulino, Avi Kivity, Andreas Färber
Needed for run_on_cpu().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
monitor.c | 6 ++++--
target-i386/cpu.h | 2 +-
target-i386/helper.c | 3 ++-
target-i386/kvm.c | 2 +-
4 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/monitor.c b/monitor.c
index 12a6fe2..07d24f8 100644
--- a/monitor.c
+++ b/monitor.c
@@ -2177,7 +2177,8 @@ static void do_acl_remove(Monitor *mon, const QDict *qdict)
#if defined(TARGET_I386)
static void do_inject_mce(Monitor *mon, const QDict *qdict)
{
- CPUArchState *cenv;
+ X86CPU *cpu;
+ CPUX86State *cenv;
int cpu_index = qdict_get_int(qdict, "cpu_index");
int bank = qdict_get_int(qdict, "bank");
uint64_t status = qdict_get_int(qdict, "status");
@@ -2190,8 +2191,9 @@ static void do_inject_mce(Monitor *mon, const QDict *qdict)
flags |= MCE_INJECT_BROADCAST;
}
for (cenv = first_cpu; cenv != NULL; cenv = cenv->next_cpu) {
+ cpu = x86_env_get_cpu(cenv);
if (cenv->cpu_index == cpu_index) {
- cpu_x86_inject_mce(mon, cenv, bank, status, mcg_status, addr, misc,
+ cpu_x86_inject_mce(mon, cpu, bank, status, mcg_status, addr, misc,
flags);
break;
}
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index bbe8de4..5169bb0 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1067,7 +1067,7 @@ void do_cpu_sipi(X86CPU *cpu);
#define MCE_INJECT_BROADCAST 1
#define MCE_INJECT_UNCOND_AO 2
-void cpu_x86_inject_mce(Monitor *mon, CPUX86State *cenv, int bank,
+void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
uint64_t status, uint64_t mcg_status, uint64_t addr,
uint64_t misc, int flags);
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 018a98f..bfd314b 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1053,10 +1053,11 @@ static void do_inject_x86_mce(void *data)
}
}
-void cpu_x86_inject_mce(Monitor *mon, CPUX86State *cenv, int bank,
+void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
uint64_t status, uint64_t mcg_status, uint64_t addr,
uint64_t misc, int flags)
{
+ CPUX86State *cenv = &cpu->env;
MCEInjectionParams params = {
.mon = mon,
.env = cenv,
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 758bf8f..f611a96 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -235,7 +235,7 @@ static void kvm_mce_inject(X86CPU *cpu, target_phys_addr_t paddr, int code)
status |= 0xc0;
mcg_status |= MCG_STATUS_RIPV;
}
- cpu_x86_inject_mce(NULL, env, 9, status, mcg_status, paddr,
+ cpu_x86_inject_mce(NULL, cpu, 9, status, mcg_status, paddr,
(MCM_ADDR_PHYS << 6) | 0xc,
cpu_x86_support_mca_broadcast(env) ?
MCE_INJECT_BROADCAST : 0);
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 46/59] cpus: Pass CPUState to run_on_cpu()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Avi Kivity, Marcelo Tosatti, open list:Overall
CPUArchState is no longer needed.
Move the declaration to include/qemu/cpu.h and add documentation.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-all.h | 1 -
cpus.c | 3 +--
hw/kvm/apic.c | 2 +-
hw/kvmvapic.c | 6 ++++--
hw/ppce500_spin.c | 2 +-
include/qemu/cpu.h | 10 ++++++++++
kvm-all.c | 7 +++++--
target-i386/helper.c | 4 ++--
8 files changed, 24 insertions(+), 11 deletions(-)
diff --git a/cpu-all.h b/cpu-all.h
index 0adfcf5..82d3b90 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -441,7 +441,6 @@ void cpu_watchpoint_remove_all(CPUArchState *env, int mask);
#define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
void cpu_single_step(CPUArchState *env, int enabled);
-void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data);
#define CPU_LOG_TB_OUT_ASM (1 << 0)
#define CPU_LOG_TB_IN_ASM (1 << 1)
diff --git a/cpus.c b/cpus.c
index ba7fb1c..06743e4 100644
--- a/cpus.c
+++ b/cpus.c
@@ -642,9 +642,8 @@ void qemu_init_cpu_loop(void)
qemu_thread_get_self(&io_thread);
}
-void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
+void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data)
{
- CPUState *cpu = ENV_GET_CPU(env);
struct qemu_work_item wi;
if (qemu_cpu_is_self(cpu)) {
diff --git a/hw/kvm/apic.c b/hw/kvm/apic.c
index cf52bb2..2eba616 100644
--- a/hw/kvm/apic.c
+++ b/hw/kvm/apic.c
@@ -143,7 +143,7 @@ static void do_inject_external_nmi(void *data)
static void kvm_apic_external_nmi(APICCommonState *s)
{
- run_on_cpu(&s->cpu->env, do_inject_external_nmi, s);
+ run_on_cpu(CPU(s->cpu), do_inject_external_nmi, s);
}
static void kvm_apic_init(APICCommonState *s)
diff --git a/hw/kvmvapic.c b/hw/kvmvapic.c
index 5d83625..399a742 100644
--- a/hw/kvmvapic.c
+++ b/hw/kvmvapic.c
@@ -475,11 +475,13 @@ static void vapic_enable_tpr_reporting(bool enable)
VAPICEnableTPRReporting info = {
.enable = enable,
};
+ X86CPU *cpu;
CPUX86State *env;
for (env = first_cpu; env != NULL; env = env->next_cpu) {
+ cpu = x86_env_get_cpu(env);
info.apic = env->apic_state;
- run_on_cpu(env, vapic_do_enable_tpr_reporting, &info);
+ run_on_cpu(CPU(cpu), vapic_do_enable_tpr_reporting, &info);
}
}
@@ -717,7 +719,7 @@ static int vapic_post_load(void *opaque, int version_id)
}
if (s->state == VAPIC_ACTIVE) {
if (smp_cpus == 1) {
- run_on_cpu(first_cpu, do_vapic_enable, s);
+ run_on_cpu(ENV_GET_CPU(first_cpu), do_vapic_enable, s);
} else {
zero = g_malloc0(s->rom_state.vapic_size);
cpu_physical_memory_rw(s->vapic_paddr, zero,
diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c
index 1c0d8b6..a4b49e6 100644
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@@ -163,7 +163,7 @@ static void spin_write(void *opaque, target_phys_addr_t addr, uint64_t value,
.spin = curspin,
};
- run_on_cpu(env, spin_kick, &kick);
+ run_on_cpu(CPU(kick.cpu), spin_kick, &kick);
}
}
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index f04da6e..33f01d9 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -125,5 +125,15 @@ void qemu_cpu_kick(CPUState *cpu);
*/
bool cpu_is_stopped(CPUState *cpu);
+/**
+ * run_on_cpu:
+ * @cpu: The vCPU to run on.
+ * @func: The function to be executed.
+ * @data: Data to pass to the function.
+ *
+ * Schedules the function @func for execution on the vCPU @cpu.
+ */
+void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
+
#endif
diff --git a/kvm-all.c b/kvm-all.c
index 3b247a0..bbd2049 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -1209,8 +1209,10 @@ static void do_kvm_cpu_synchronize_state(void *_env)
void kvm_cpu_synchronize_state(CPUArchState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
if (!env->kvm_vcpu_dirty) {
- run_on_cpu(env, do_kvm_cpu_synchronize_state, env);
+ run_on_cpu(cpu, do_kvm_cpu_synchronize_state, env);
}
}
@@ -1482,6 +1484,7 @@ static void kvm_invoke_set_guest_debug(void *data)
int kvm_update_guest_debug(CPUArchState *env, unsigned long reinject_trap)
{
+ CPUState *cpu = ENV_GET_CPU(env);
struct kvm_set_guest_debug_data data;
data.dbg.control = reinject_trap;
@@ -1492,7 +1495,7 @@ int kvm_update_guest_debug(CPUArchState *env, unsigned long reinject_trap)
kvm_arch_update_guest_debug(env, &data.dbg);
data.env = env;
- run_on_cpu(env, kvm_invoke_set_guest_debug, &data);
+ run_on_cpu(cpu, kvm_invoke_set_guest_debug, &data);
return data.err;
}
diff --git a/target-i386/helper.c b/target-i386/helper.c
index bfd314b..2d5ca8c 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1089,7 +1089,7 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
return;
}
- run_on_cpu(cenv, do_inject_x86_mce, ¶ms);
+ run_on_cpu(CPU(cpu), do_inject_x86_mce, ¶ms);
if (flags & MCE_INJECT_BROADCAST) {
params.bank = 1;
params.status = MCI_STATUS_VAL | MCI_STATUS_UC;
@@ -1101,7 +1101,7 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
continue;
}
params.env = env;
- run_on_cpu(cenv, do_inject_x86_mce, ¶ms);
+ run_on_cpu(CPU(cpu), do_inject_x86_mce, ¶ms);
}
}
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 46/59] cpus: Pass CPUState to run_on_cpu()
@ 2012-05-23 3:08 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Marcelo Tosatti, Andreas Färber, open list:Overall, Avi Kivity
CPUArchState is no longer needed.
Move the declaration to include/qemu/cpu.h and add documentation.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-all.h | 1 -
cpus.c | 3 +--
hw/kvm/apic.c | 2 +-
hw/kvmvapic.c | 6 ++++--
hw/ppce500_spin.c | 2 +-
include/qemu/cpu.h | 10 ++++++++++
kvm-all.c | 7 +++++--
target-i386/helper.c | 4 ++--
8 files changed, 24 insertions(+), 11 deletions(-)
diff --git a/cpu-all.h b/cpu-all.h
index 0adfcf5..82d3b90 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -441,7 +441,6 @@ void cpu_watchpoint_remove_all(CPUArchState *env, int mask);
#define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
void cpu_single_step(CPUArchState *env, int enabled);
-void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data);
#define CPU_LOG_TB_OUT_ASM (1 << 0)
#define CPU_LOG_TB_IN_ASM (1 << 1)
diff --git a/cpus.c b/cpus.c
index ba7fb1c..06743e4 100644
--- a/cpus.c
+++ b/cpus.c
@@ -642,9 +642,8 @@ void qemu_init_cpu_loop(void)
qemu_thread_get_self(&io_thread);
}
-void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
+void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data)
{
- CPUState *cpu = ENV_GET_CPU(env);
struct qemu_work_item wi;
if (qemu_cpu_is_self(cpu)) {
diff --git a/hw/kvm/apic.c b/hw/kvm/apic.c
index cf52bb2..2eba616 100644
--- a/hw/kvm/apic.c
+++ b/hw/kvm/apic.c
@@ -143,7 +143,7 @@ static void do_inject_external_nmi(void *data)
static void kvm_apic_external_nmi(APICCommonState *s)
{
- run_on_cpu(&s->cpu->env, do_inject_external_nmi, s);
+ run_on_cpu(CPU(s->cpu), do_inject_external_nmi, s);
}
static void kvm_apic_init(APICCommonState *s)
diff --git a/hw/kvmvapic.c b/hw/kvmvapic.c
index 5d83625..399a742 100644
--- a/hw/kvmvapic.c
+++ b/hw/kvmvapic.c
@@ -475,11 +475,13 @@ static void vapic_enable_tpr_reporting(bool enable)
VAPICEnableTPRReporting info = {
.enable = enable,
};
+ X86CPU *cpu;
CPUX86State *env;
for (env = first_cpu; env != NULL; env = env->next_cpu) {
+ cpu = x86_env_get_cpu(env);
info.apic = env->apic_state;
- run_on_cpu(env, vapic_do_enable_tpr_reporting, &info);
+ run_on_cpu(CPU(cpu), vapic_do_enable_tpr_reporting, &info);
}
}
@@ -717,7 +719,7 @@ static int vapic_post_load(void *opaque, int version_id)
}
if (s->state == VAPIC_ACTIVE) {
if (smp_cpus == 1) {
- run_on_cpu(first_cpu, do_vapic_enable, s);
+ run_on_cpu(ENV_GET_CPU(first_cpu), do_vapic_enable, s);
} else {
zero = g_malloc0(s->rom_state.vapic_size);
cpu_physical_memory_rw(s->vapic_paddr, zero,
diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c
index 1c0d8b6..a4b49e6 100644
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@@ -163,7 +163,7 @@ static void spin_write(void *opaque, target_phys_addr_t addr, uint64_t value,
.spin = curspin,
};
- run_on_cpu(env, spin_kick, &kick);
+ run_on_cpu(CPU(kick.cpu), spin_kick, &kick);
}
}
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index f04da6e..33f01d9 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -125,5 +125,15 @@ void qemu_cpu_kick(CPUState *cpu);
*/
bool cpu_is_stopped(CPUState *cpu);
+/**
+ * run_on_cpu:
+ * @cpu: The vCPU to run on.
+ * @func: The function to be executed.
+ * @data: Data to pass to the function.
+ *
+ * Schedules the function @func for execution on the vCPU @cpu.
+ */
+void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
+
#endif
diff --git a/kvm-all.c b/kvm-all.c
index 3b247a0..bbd2049 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -1209,8 +1209,10 @@ static void do_kvm_cpu_synchronize_state(void *_env)
void kvm_cpu_synchronize_state(CPUArchState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
if (!env->kvm_vcpu_dirty) {
- run_on_cpu(env, do_kvm_cpu_synchronize_state, env);
+ run_on_cpu(cpu, do_kvm_cpu_synchronize_state, env);
}
}
@@ -1482,6 +1484,7 @@ static void kvm_invoke_set_guest_debug(void *data)
int kvm_update_guest_debug(CPUArchState *env, unsigned long reinject_trap)
{
+ CPUState *cpu = ENV_GET_CPU(env);
struct kvm_set_guest_debug_data data;
data.dbg.control = reinject_trap;
@@ -1492,7 +1495,7 @@ int kvm_update_guest_debug(CPUArchState *env, unsigned long reinject_trap)
kvm_arch_update_guest_debug(env, &data.dbg);
data.env = env;
- run_on_cpu(env, kvm_invoke_set_guest_debug, &data);
+ run_on_cpu(cpu, kvm_invoke_set_guest_debug, &data);
return data.err;
}
diff --git a/target-i386/helper.c b/target-i386/helper.c
index bfd314b..2d5ca8c 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1089,7 +1089,7 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
return;
}
- run_on_cpu(cenv, do_inject_x86_mce, ¶ms);
+ run_on_cpu(CPU(cpu), do_inject_x86_mce, ¶ms);
if (flags & MCE_INJECT_BROADCAST) {
params.bank = 1;
params.status = MCI_STATUS_VAL | MCI_STATUS_UC;
@@ -1101,7 +1101,7 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
continue;
}
params.env = env;
- run_on_cpu(cenv, do_inject_x86_mce, ¶ms);
+ run_on_cpu(CPU(cpu), do_inject_x86_mce, ¶ms);
}
}
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 47/59] cpu: Move thread_id to CPUState
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (46 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-defs.h | 1 -
cpus.c | 11 ++++++-----
exec.c | 5 ++++-
include/qemu/cpu.h | 1 +
4 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/cpu-defs.h b/cpu-defs.h
index 54807f5..d846674 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -201,7 +201,6 @@ typedef struct CPUWatchpoint {
int nr_cores; /* number of cores within this CPU package */ \
int nr_threads;/* number of threads within this CPU */ \
int running; /* Nonzero if cpu is currently running(usermode). */ \
- int thread_id; \
/* user data */ \
void *opaque; \
\
diff --git a/cpus.c b/cpus.c
index 06743e4..a403629 100644
--- a/cpus.c
+++ b/cpus.c
@@ -739,7 +739,7 @@ static void *qemu_kvm_cpu_thread_fn(void *arg)
qemu_mutex_lock(&qemu_global_mutex);
qemu_thread_get_self(cpu->thread);
- env->thread_id = qemu_get_thread_id();
+ cpu->thread_id = qemu_get_thread_id();
cpu_single_env = env;
r = kvm_init_vcpu(env);
@@ -780,7 +780,7 @@ static void *qemu_dummy_cpu_thread_fn(void *arg)
qemu_mutex_lock_iothread();
qemu_thread_get_self(cpu->thread);
- env->thread_id = qemu_get_thread_id();
+ cpu->thread_id = qemu_get_thread_id();
sigemptyset(&waitset);
sigaddset(&waitset, SIG_IPI);
@@ -824,7 +824,7 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
qemu_mutex_lock(&qemu_global_mutex);
for (env = first_cpu; env != NULL; env = env->next_cpu) {
cpu = ENV_GET_CPU(env);
- env->thread_id = qemu_get_thread_id();
+ cpu->thread_id = qemu_get_thread_id();
cpu->created = true;
}
qemu_cond_signal(&qemu_cpu_cond);
@@ -1204,7 +1204,8 @@ CpuInfoList *qmp_query_cpus(Error **errp)
CpuInfoList *head = NULL, *cur_item = NULL;
CPUArchState *env;
- for(env = first_cpu; env != NULL; env = env->next_cpu) {
+ for (env = first_cpu; env != NULL; env = env->next_cpu) {
+ CPUState *cpu = ENV_GET_CPU(env);
CpuInfoList *info;
cpu_synchronize_state(env);
@@ -1214,7 +1215,7 @@ CpuInfoList *qmp_query_cpus(Error **errp)
info->value->CPU = env->cpu_index;
info->value->current = (env == first_cpu);
info->value->halted = env->halted;
- info->value->thread_id = env->thread_id;
+ info->value->thread_id = cpu->thread_id;
#if defined(TARGET_I386)
info->value->has_pc = true;
info->value->pc = env->eip + env->segs[R_CS].base;
diff --git a/exec.c b/exec.c
index 6e5ac67..8d2fa7a 100644
--- a/exec.c
+++ b/exec.c
@@ -693,6 +693,9 @@ CPUArchState *qemu_get_cpu(int cpu)
void cpu_exec_init(CPUArchState *env)
{
+#ifndef CONFIG_USER_ONLY
+ CPUState *cpu = ENV_GET_CPU(env);
+#endif
CPUArchState **penv;
int cpu_index;
@@ -711,7 +714,7 @@ void cpu_exec_init(CPUArchState *env)
QTAILQ_INIT(&env->breakpoints);
QTAILQ_INIT(&env->watchpoints);
#ifndef CONFIG_USER_ONLY
- env->thread_id = qemu_get_thread_id();
+ cpu->thread_id = qemu_get_thread_id();
#endif
*penv = env;
#if defined(CONFIG_USER_ONLY)
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 33f01d9..61b7698 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -69,6 +69,7 @@ struct CPUState {
#ifdef _WIN32
HANDLE hThread;
#endif
+ int thread_id;
struct QemuCond *halt_cond;
struct qemu_work_item *queued_work_first, *queued_work_last;
bool thread_kicked;
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 48/59] target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (47 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Simplifies the call in apic_sipi() again and needed for moving halted
field to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/apic.c | 2 +-
target-i386/cpu.h | 4 +++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/apic.c b/hw/apic.c
index b14635d..2f642b0 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -495,7 +495,7 @@ void apic_sipi(DeviceState *d)
if (!s->wait_for_sipi)
return;
- cpu_x86_load_seg_cache_sipi(&s->cpu->env, s->sipi_vector);
+ cpu_x86_load_seg_cache_sipi(s->cpu, s->sipi_vector);
s->wait_for_sipi = 0;
}
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 5169bb0..36e7911 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -854,9 +854,11 @@ static inline void cpu_x86_load_seg_cache(CPUX86State *env,
}
}
-static inline void cpu_x86_load_seg_cache_sipi(CPUX86State *env,
+static inline void cpu_x86_load_seg_cache_sipi(X86CPU *cpu,
int sipi_vector)
{
+ CPUX86State *env = &cpu->env;
+
env->eip = 0;
cpu_x86_load_seg_cache(env, R_CS, sipi_vector << 8,
sipi_vector << 12,
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 49/59] target-i386: Drop version 5 CPU VMState support
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (48 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
2012-05-24 11:32 ` Juan Quintela
-1 siblings, 1 reply; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber, Juan Quintela
Version 5 contained the halted field, that we are about to move from
CPUX86State to CPUState. To avoid inventing new VMSTATE macros for
calculating a negative offset from CPUX86State to the field in CPUState,
rather bump the minimum version from 3 to 6. We're at 12 currently.
Suggested-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Juan Quintela <quintela@redhat.com>
---
target-i386/machine.c | 10 ++--------
1 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/target-i386/machine.c b/target-i386/machine.c
index a8be058..e6e150b 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -201,11 +201,6 @@ static bool fpregs_is_1_no_mmx(void *opaque, int version_id)
VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_mmx, vmstate_fpreg_1_mmx, FPReg), \
VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_no_mmx, vmstate_fpreg_1_no_mmx, FPReg)
-static bool version_is_5(void *opaque, int version_id)
-{
- return version_id == 5;
-}
-
#ifdef TARGET_X86_64
static bool less_than_7(void *opaque, int version_id)
{
@@ -349,8 +344,8 @@ static const VMStateDescription vmstate_msr_ia32_misc_enable = {
static const VMStateDescription vmstate_cpu = {
.name = "cpu",
.version_id = CPU_SAVE_VERSION,
- .minimum_version_id = 3,
- .minimum_version_id_old = 3,
+ .minimum_version_id = 6,
+ .minimum_version_id_old = 6,
.pre_save = cpu_pre_save,
.post_load = cpu_post_load,
.fields = (VMStateField []) {
@@ -407,7 +402,6 @@ static const VMStateDescription vmstate_cpu = {
VMSTATE_UINT64_V(pat, CPUX86State, 5),
VMSTATE_UINT32_V(hflags2, CPUX86State, 5),
- VMSTATE_UINT32_TEST(halted, CPUX86State, version_is_5),
VMSTATE_UINT64_V(vm_hsave, CPUX86State, 5),
VMSTATE_UINT64_V(vm_vmcb, CPUX86State, 5),
VMSTATE_UINT64_V(tsc_offset, CPUX86State, 5),
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 50/59] target-i386: Pass X86CPU to kvm_get_mp_state()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Avi Kivity, Marcelo Tosatti, open list:X86
Needed for moving halted field to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-i386/kvm.c | 9 +++++----
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index f611a96..21de2e1 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1342,8 +1342,9 @@ static int kvm_put_mp_state(CPUX86State *env)
return kvm_vcpu_ioctl(env, KVM_SET_MP_STATE, &mp_state);
}
-static int kvm_get_mp_state(CPUX86State *env)
+static int kvm_get_mp_state(X86CPU *cpu)
{
+ CPUX86State *env = &cpu->env;
struct kvm_mp_state mp_state;
int ret;
@@ -1587,10 +1588,10 @@ int kvm_arch_put_registers(CPUX86State *env, int level)
int kvm_arch_get_registers(CPUX86State *env)
{
- CPUState *cpu = ENV_GET_CPU(env);
+ X86CPU *cpu = x86_env_get_cpu(env);
int ret;
- assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu));
+ assert(cpu_is_stopped(CPU(cpu)) || qemu_cpu_is_self(CPU(cpu)));
ret = kvm_getput_regs(env, 0);
if (ret < 0) {
@@ -1612,7 +1613,7 @@ int kvm_arch_get_registers(CPUX86State *env)
if (ret < 0) {
return ret;
}
- ret = kvm_get_mp_state(env);
+ ret = kvm_get_mp_state(cpu);
if (ret < 0) {
return ret;
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 50/59] target-i386: Pass X86CPU to kvm_get_mp_state()
@ 2012-05-23 3:08 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Marcelo Tosatti, Andreas Färber, open list:X86, Avi Kivity
Needed for moving halted field to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-i386/kvm.c | 9 +++++----
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index f611a96..21de2e1 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1342,8 +1342,9 @@ static int kvm_put_mp_state(CPUX86State *env)
return kvm_vcpu_ioctl(env, KVM_SET_MP_STATE, &mp_state);
}
-static int kvm_get_mp_state(CPUX86State *env)
+static int kvm_get_mp_state(X86CPU *cpu)
{
+ CPUX86State *env = &cpu->env;
struct kvm_mp_state mp_state;
int ret;
@@ -1587,10 +1588,10 @@ int kvm_arch_put_registers(CPUX86State *env, int level)
int kvm_arch_get_registers(CPUX86State *env)
{
- CPUState *cpu = ENV_GET_CPU(env);
+ X86CPU *cpu = x86_env_get_cpu(env);
int ret;
- assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu));
+ assert(cpu_is_stopped(CPU(cpu)) || qemu_cpu_is_self(CPU(cpu)));
ret = kvm_getput_regs(env, 0);
if (ret < 0) {
@@ -1612,7 +1613,7 @@ int kvm_arch_get_registers(CPUX86State *env)
if (ret < 0) {
return ret;
}
- ret = kvm_get_mp_state(env);
+ ret = kvm_get_mp_state(cpu);
if (ret < 0) {
return ret;
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 51/59] target-i386: Pass X86CPU to kvm_handle_halt()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Avi Kivity, Marcelo Tosatti, open list:X86
Needed for moving interrupt_request and halted fields to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-i386/kvm.c | 7 +++++--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 21de2e1..f7651bf 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1757,8 +1757,10 @@ int kvm_arch_process_async_events(CPUX86State *env)
return env->halted;
}
-static int kvm_handle_halt(CPUX86State *env)
+static int kvm_handle_halt(X86CPU *cpu)
{
+ CPUX86State *env = &cpu->env;
+
if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) &&
!(env->interrupt_request & CPU_INTERRUPT_NMI)) {
@@ -1972,13 +1974,14 @@ static bool host_supports_vmx(void)
int kvm_arch_handle_exit(CPUX86State *env, struct kvm_run *run)
{
+ X86CPU *cpu = x86_env_get_cpu(env);
uint64_t code;
int ret;
switch (run->exit_reason) {
case KVM_EXIT_HLT:
DPRINTF("handle_hlt\n");
- ret = kvm_handle_halt(env);
+ ret = kvm_handle_halt(cpu);
break;
case KVM_EXIT_SET_TPR:
ret = 0;
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 51/59] target-i386: Pass X86CPU to kvm_handle_halt()
@ 2012-05-23 3:08 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Marcelo Tosatti, Andreas Färber, open list:X86, Avi Kivity
Needed for moving interrupt_request and halted fields to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-i386/kvm.c | 7 +++++--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 21de2e1..f7651bf 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1757,8 +1757,10 @@ int kvm_arch_process_async_events(CPUX86State *env)
return env->halted;
}
-static int kvm_handle_halt(CPUX86State *env)
+static int kvm_handle_halt(X86CPU *cpu)
{
+ CPUX86State *env = &cpu->env;
+
if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) &&
!(env->interrupt_request & CPU_INTERRUPT_NMI)) {
@@ -1972,13 +1974,14 @@ static bool host_supports_vmx(void)
int kvm_arch_handle_exit(CPUX86State *env, struct kvm_run *run)
{
+ X86CPU *cpu = x86_env_get_cpu(env);
uint64_t code;
int ret;
switch (run->exit_reason) {
case KVM_EXIT_HLT:
DPRINTF("handle_hlt\n");
- ret = kvm_handle_halt(env);
+ ret = kvm_handle_halt(cpu);
break;
case KVM_EXIT_SET_TPR:
ret = 0;
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 52/59] target-mips: Pass MIPSCPU to mips_tc_wake()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (51 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber, Aurelien Jarno
Needed for mips_vpe_is_wfi().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-mips/op_helper.c | 8 +++++---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 66037ac..50e2dd7 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -766,8 +766,10 @@ static inline void mips_vpe_sleep(CPUMIPSState *c)
cpu_reset_interrupt(c, CPU_INTERRUPT_WAKE);
}
-static inline void mips_tc_wake(CPUMIPSState *c, int tc)
+static inline void mips_tc_wake(MIPSCPU *cpu, int tc)
{
+ CPUMIPSState *c = &cpu->env;
+
/* FIXME: TC reschedule. */
if (mips_vpe_active(c) && !mips_vpe_is_wfi(c)) {
mips_vpe_wake(c);
@@ -1376,7 +1378,7 @@ void helper_mtc0_tchalt (target_ulong arg1)
if (env->active_tc.CP0_TCHalt & 1) {
mips_tc_sleep(env, env->current_tc);
} else {
- mips_tc_wake(env, env->current_tc);
+ mips_tc_wake(mips_env_get_cpu(env), env->current_tc);
}
}
@@ -1395,7 +1397,7 @@ void helper_mttc0_tchalt (target_ulong arg1)
if (arg1 & 1) {
mips_tc_sleep(other, other_tc);
} else {
- mips_tc_wake(other, other_tc);
+ mips_tc_wake(mips_env_get_cpu(other), other_tc);
}
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 53/59] target-mips: Pass MIPSCPU to mips_vpe_is_wfi()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (52 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber, Aurelien Jarno
Needed for moving halted field to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-mips/op_helper.c | 12 ++++++++----
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 50e2dd7..af62c8b 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -743,11 +743,13 @@ void helper_sdm (target_ulong addr, target_ulong reglist, uint32_t mem_idx)
#ifndef CONFIG_USER_ONLY
/* SMP helpers. */
-static int mips_vpe_is_wfi(CPUMIPSState *c)
+static bool mips_vpe_is_wfi(MIPSCPU *c)
{
+ CPUMIPSState *env = &c->env;
+
/* If the VPE is halted but otherwise active, it means it's waiting for
an interrupt. */
- return c->halted && mips_vpe_active(c);
+ return env->halted && mips_vpe_active(env);
}
static inline void mips_vpe_wake(CPUMIPSState *c)
@@ -771,7 +773,7 @@ static inline void mips_tc_wake(MIPSCPU *cpu, int tc)
CPUMIPSState *c = &cpu->env;
/* FIXME: TC reschedule. */
- if (mips_vpe_active(c) && !mips_vpe_is_wfi(c)) {
+ if (mips_vpe_active(c) && !mips_vpe_is_wfi(cpu)) {
mips_vpe_wake(c);
}
}
@@ -1921,12 +1923,14 @@ target_ulong helper_dvpe(void)
target_ulong helper_evpe(void)
{
CPUMIPSState *other_cpu = first_cpu;
+ MIPSCPU *cpu;
target_ulong prev = env->mvp->CP0_MVPControl;
do {
+ cpu = mips_env_get_cpu(other_cpu);
if (other_cpu != env
/* If the VPE is WFI, don't disturb its sleep. */
- && !mips_vpe_is_wfi(other_cpu)) {
+ && !mips_vpe_is_wfi(cpu)) {
/* Enable the VPE. */
other_cpu->mvp->CP0_MVPControl |= (1 << CP0MVPCo_EVP);
mips_vpe_wake(other_cpu); /* And wake it up. */
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 54/59] target-mips: Pass MIPSCPU to mips_tc_sleep()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (53 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber, Aurelien Jarno
Needed for mips_vpe_sleep().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-mips/op_helper.c | 8 +++++---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index af62c8b..bfced36 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -778,8 +778,10 @@ static inline void mips_tc_wake(MIPSCPU *cpu, int tc)
}
}
-static inline void mips_tc_sleep(CPUMIPSState *c, int tc)
+static inline void mips_tc_sleep(MIPSCPU *cpu, int tc)
{
+ CPUMIPSState *c = &cpu->env;
+
/* FIXME: TC reschedule. */
if (!mips_vpe_active(c)) {
mips_vpe_sleep(c);
@@ -1378,7 +1380,7 @@ void helper_mtc0_tchalt (target_ulong arg1)
// TODO: Halt TC / Restart (if allocated+active) TC.
if (env->active_tc.CP0_TCHalt & 1) {
- mips_tc_sleep(env, env->current_tc);
+ mips_tc_sleep(mips_env_get_cpu(env), env->current_tc);
} else {
mips_tc_wake(mips_env_get_cpu(env), env->current_tc);
}
@@ -1397,7 +1399,7 @@ void helper_mttc0_tchalt (target_ulong arg1)
other->tcs[other_tc].CP0_TCHalt = arg1;
if (arg1 & 1) {
- mips_tc_sleep(other, other_tc);
+ mips_tc_sleep(mips_env_get_cpu(other), other_tc);
} else {
mips_tc_wake(mips_env_get_cpu(other), other_tc);
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 55/59] target-mips: Pass MIPSCPU to mips_vpe_sleep()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (54 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber, Aurelien Jarno
Needed for moving halted field to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-mips/op_helper.c | 8 +++++---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index bfced36..d26c9fb 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -760,8 +760,10 @@ static inline void mips_vpe_wake(CPUMIPSState *c)
cpu_interrupt(c, CPU_INTERRUPT_WAKE);
}
-static inline void mips_vpe_sleep(CPUMIPSState *c)
+static inline void mips_vpe_sleep(MIPSCPU *cpu)
{
+ CPUMIPSState *c = &cpu->env;
+
/* The VPE was shut off, really go to bed.
Reset any old _WAKE requests. */
c->halted = 1;
@@ -784,7 +786,7 @@ static inline void mips_tc_sleep(MIPSCPU *cpu, int tc)
/* FIXME: TC reschedule. */
if (!mips_vpe_active(c)) {
- mips_vpe_sleep(c);
+ mips_vpe_sleep(cpu);
}
}
@@ -1915,7 +1917,7 @@ target_ulong helper_dvpe(void)
/* Turn off all VPEs except the one executing the dvpe. */
if (other_cpu != env) {
other_cpu->mvp->CP0_MVPControl &= ~(1 << CP0MVPCo_EVP);
- mips_vpe_sleep(other_cpu);
+ mips_vpe_sleep(mips_env_get_cpu(other_cpu));
}
other_cpu = other_cpu->next_cpu;
} while (other_cpu);
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 56/59] sun4u: Pass SPARCCPU to cpu_set_ivec_irq()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (55 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: Blue Swirl, Andreas Färber
Needed for moving halted field to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/sun4u.c | 7 +++----
1 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index d41e80a..56c3ddf 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -321,7 +321,8 @@ static void cpu_kick_irq(SPARCCPU *cpu)
static void cpu_set_ivec_irq(void *opaque, int irq, int level)
{
- CPUSPARCState *env = opaque;
+ SPARCCPU *cpu = opaque;
+ CPUSPARCState *env = &cpu->env;
if (level) {
if (!(env->ivec_status & 0x20)) {
@@ -802,7 +803,6 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
const struct hwdef *hwdef)
{
SPARCCPU *cpu;
- CPUSPARCState *env;
M48t59State *nvram;
unsigned int i;
uint64_t initrd_addr, initrd_size, kernel_addr, kernel_size, kernel_entry;
@@ -815,14 +815,13 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
/* init CPUs */
cpu = cpu_devinit(cpu_model, hwdef);
- env = &cpu->env;
/* set up devices */
ram_init(0, RAM_size);
prom_init(hwdef->prom_addr, bios_name);
- ivec_irqs = qemu_allocate_irqs(cpu_set_ivec_irq, env, IVEC_MAX);
+ ivec_irqs = qemu_allocate_irqs(cpu_set_ivec_irq, cpu, IVEC_MAX);
pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, ivec_irqs, &pci_bus2,
&pci_bus3, &pbm_irqs);
pci_vga_init(pci_bus);
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 57/59] cpu: Introduce mandatory tlb_flush callback
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
` (56 preceding siblings ...)
(?)
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Alexander Graf, Blue Swirl, Max Filippov,
Michael Walle, open list:PowerPC, Paul Brook, Edgar E. Iglesias,
Guan Xuetao, Andreas Färber, Aurelien Jarno,
Richard Henderson
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
include/qemu/cpu.h | 12 ++++++++++++
qom/cpu.c | 9 +++++++++
target-alpha/cpu.c | 16 ++++++++++++++++
target-arm/cpu.c | 10 ++++++++++
target-cris/cpu.c | 10 ++++++++++
target-i386/cpu.c | 10 ++++++++++
target-lm32/cpu.c | 10 ++++++++++
target-m68k/cpu.c | 10 ++++++++++
target-microblaze/cpu.c | 10 ++++++++++
target-mips/cpu.c | 10 ++++++++++
target-ppc/translate_init.c | 10 ++++++++++
target-s390x/cpu.c | 10 ++++++++++
target-sh4/cpu.c | 10 ++++++++++
target-sparc/cpu.c | 10 ++++++++++
target-unicore32/cpu.c | 16 ++++++++++++++++
target-xtensa/cpu.c | 10 ++++++++++
16 files changed, 173 insertions(+), 0 deletions(-)
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 61b7698..7d03369 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -41,6 +41,7 @@ typedef struct CPUState CPUState;
/**
* CPUClass:
* @reset: Callback to reset the #CPUState to its initial state.
+ * @tlb_flush: Callback to flush the TLB.
*
* Represents a CPU family or model.
*/
@@ -50,6 +51,8 @@ typedef struct CPUClass {
/*< public >*/
void (*reset)(CPUState *cpu);
+
+ void (*tlb_flush)(CPUState *cpu, bool flush_global);
} CPUClass;
/**
@@ -88,6 +91,15 @@ struct CPUState {
void cpu_reset(CPUState *cpu);
/**
+ * cpu_tlb_flush:
+ * @cpu: The CPU whose TLB is to be flushed.
+ * @flush_global: Whether to flush TLB entries marked as global.
+ *
+ * Flushes the TLB of the CPU.
+ */
+void cpu_tlb_flush(CPUState *cpu, bool flush_global);
+
+/**
* qemu_cpu_has_work:
* @cpu: The vCPU to check.
*
diff --git a/qom/cpu.c b/qom/cpu.c
index 5b36046..729f4cf 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -34,6 +34,15 @@ static void cpu_common_reset(CPUState *cpu)
{
}
+void cpu_tlb_flush(CPUState *cpu, bool flush_global)
+{
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+
+ g_assert(cc->tlb_flush != NULL);
+
+ cc->tlb_flush(cpu, flush_global);
+}
+
static void cpu_class_init(ObjectClass *klass, void *data)
{
CPUClass *k = CPU_CLASS(klass);
diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c
index 11a19eb..d20f367 100644
--- a/target-alpha/cpu.c
+++ b/target-alpha/cpu.c
@@ -23,6 +23,14 @@
#include "qemu-common.h"
+/* CPUClass::tlb_flush() */
+static void alpha_cpu_tlb_flush(CPUState *c, bool flush_global)
+{
+ AlphaCPU *cpu = ALPHA_CPU(c);
+
+ tlb_flush(&cpu->env, flush_global);
+}
+
static void alpha_cpu_initfn(Object *obj)
{
AlphaCPU *cpu = ALPHA_CPU(obj);
@@ -41,6 +49,13 @@ static void alpha_cpu_initfn(Object *obj)
env->fen = 1;
}
+static void alpha_cpu_class_init(ObjectClass *oc, void *data)
+{
+ CPUClass *cc = CPU_CLASS(oc);
+
+ cc->tlb_flush = alpha_cpu_tlb_flush;
+}
+
static const TypeInfo alpha_cpu_type_info = {
.name = TYPE_ALPHA_CPU,
.parent = TYPE_CPU,
@@ -48,6 +63,7 @@ static const TypeInfo alpha_cpu_type_info = {
.instance_init = alpha_cpu_initfn,
.abstract = false,
.class_size = sizeof(AlphaCPUClass),
+ .class_init = alpha_cpu_class_init,
};
static void alpha_cpu_register_types(void)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 7eb323a..abcf158 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -120,6 +120,14 @@ static void arm_cpu_reset(CPUState *s)
tb_flush(env);
}
+/* CPUClass::tlb_flush() */
+static void arm_cpu_tlb_flush(CPUState *c, bool flush_global)
+{
+ ARMCPU *cpu = ARM_CPU(c);
+
+ tlb_flush(&cpu->env, flush_global);
+}
+
static inline void set_feature(CPUARMState *env, int feature)
{
env->features |= 1u << feature;
@@ -637,6 +645,8 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
acc->parent_reset = cc->reset;
cc->reset = arm_cpu_reset;
+
+ cc->tlb_flush = arm_cpu_tlb_flush;
}
static void cpu_register(const ARMCPUInfo *info)
diff --git a/target-cris/cpu.c b/target-cris/cpu.c
index c596609..167ba30 100644
--- a/target-cris/cpu.c
+++ b/target-cris/cpu.c
@@ -55,6 +55,14 @@ static void cris_cpu_reset(CPUState *s)
#endif
}
+/* CPUClass::tlb_flush() */
+static void cris_cpu_tlb_flush(CPUState *c, bool flush_global)
+{
+ CRISCPU *cpu = CRIS_CPU(c);
+
+ tlb_flush(&cpu->env, flush_global);
+}
+
static void cris_cpu_initfn(Object *obj)
{
CRISCPU *cpu = CRIS_CPU(obj);
@@ -70,6 +78,8 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data)
ccc->parent_reset = cc->reset;
cc->reset = cris_cpu_reset;
+
+ cc->tlb_flush = cris_cpu_tlb_flush;
}
static const TypeInfo cris_cpu_type_info = {
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 89b4ac7..c8e6b80 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1706,6 +1706,14 @@ static void x86_cpu_reset(CPUState *s)
cpu_watchpoint_remove_all(env, BP_CPU);
}
+/* CPUClass::tlb_flush() */
+static void x86_cpu_tlb_flush(CPUState *c, bool flush_global)
+{
+ X86CPU *cpu = X86_CPU(c);
+
+ tlb_flush(&cpu->env, flush_global);
+}
+
static void mce_init(X86CPU *cpu)
{
CPUX86State *cenv = &cpu->env;
@@ -1772,6 +1780,8 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
xcc->parent_reset = cc->reset;
cc->reset = x86_cpu_reset;
+
+ cc->tlb_flush = x86_cpu_tlb_flush;
}
static const TypeInfo x86_cpu_type_info = {
diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c
index caa4834..a58369e 100644
--- a/target-lm32/cpu.c
+++ b/target-lm32/cpu.c
@@ -42,6 +42,14 @@ static void lm32_cpu_reset(CPUState *s)
memset(env, 0, offsetof(CPULM32State, breakpoints));
}
+/* CPUClass::tlb_flush() */
+static void lm32_cpu_tlb_flush(CPUState *c, bool flush_global)
+{
+ LM32CPU *cpu = LM32_CPU(c);
+
+ tlb_flush(&cpu->env, flush_global);
+}
+
static void lm32_cpu_initfn(Object *obj)
{
LM32CPU *cpu = LM32_CPU(obj);
@@ -61,6 +69,8 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data)
lcc->parent_reset = cc->reset;
cc->reset = lm32_cpu_reset;
+
+ cc->tlb_flush = lm32_cpu_tlb_flush;
}
static const TypeInfo lm32_cpu_type_info = {
diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c
index 3e70bb0..e1daeff 100644
--- a/target-m68k/cpu.c
+++ b/target-m68k/cpu.c
@@ -53,6 +53,14 @@ static void m68k_cpu_reset(CPUState *s)
tlb_flush(env, 1);
}
+/* CPUClass::tlb_flush() */
+static void m68k_cpu_tlb_flush(CPUState *c, bool flush_global)
+{
+ M68kCPU *cpu = M68K_CPU(c);
+
+ tlb_flush(&cpu->env, flush_global);
+}
+
/* CPU models */
static void m5206_cpu_initfn(Object *obj)
@@ -134,6 +142,8 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
mcc->parent_reset = cc->reset;
cc->reset = m68k_cpu_reset;
+
+ cc->tlb_flush = m68k_cpu_tlb_flush;
}
static void register_cpu_type(const M68kCPUInfo *info)
diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c
index 9c3b74e..a850d8f 100644
--- a/target-microblaze/cpu.c
+++ b/target-microblaze/cpu.c
@@ -83,6 +83,14 @@ static void mb_cpu_reset(CPUState *s)
#endif
}
+/* CPUClass::tlb_flush() */
+static void mb_cpu_tlb_flush(CPUState *c, bool flush_global)
+{
+ MicroBlazeCPU *cpu = MICROBLAZE_CPU(c);
+
+ tlb_flush(&cpu->env, flush_global);
+}
+
static void mb_cpu_initfn(Object *obj)
{
MicroBlazeCPU *cpu = MICROBLAZE_CPU(obj);
@@ -100,6 +108,8 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
mcc->parent_reset = cc->reset;
cc->reset = mb_cpu_reset;
+
+ cc->tlb_flush = mb_cpu_tlb_flush;
}
static const TypeInfo mb_cpu_type_info = {
diff --git a/target-mips/cpu.c b/target-mips/cpu.c
index 0044062..7e51a2b 100644
--- a/target-mips/cpu.c
+++ b/target-mips/cpu.c
@@ -34,6 +34,14 @@ static void mips_cpu_reset(CPUState *s)
cpu_state_reset(env);
}
+/* CPUClass::tlb_flush() */
+static void mips_cpu_tlb_flush(CPUState *c, bool flush_global)
+{
+ MIPSCPU *cpu = MIPS_CPU(c);
+
+ tlb_flush(&cpu->env, flush_global);
+}
+
static void mips_cpu_initfn(Object *obj)
{
MIPSCPU *cpu = MIPS_CPU(obj);
@@ -49,6 +57,8 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
mcc->parent_reset = cc->reset;
cc->reset = mips_cpu_reset;
+
+ cc->tlb_flush = mips_cpu_tlb_flush;
}
static const TypeInfo mips_cpu_type_info = {
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 6f61175..5bebd84 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -10266,6 +10266,14 @@ static void ppc_cpu_reset(CPUState *s)
tlb_flush(env, 1);
}
+/* CPUClass::tlb_flush() */
+static void ppc_cpu_tlb_flush(CPUState *c, bool flush_global)
+{
+ PowerPCCPU *cpu = POWERPC_CPU(c);
+
+ tlb_flush(&cpu->env, flush_global);
+}
+
static void ppc_cpu_initfn(Object *obj)
{
PowerPCCPU *cpu = POWERPC_CPU(obj);
@@ -10281,6 +10289,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
pcc->parent_reset = cc->reset;
cc->reset = ppc_cpu_reset;
+
+ cc->tlb_flush = ppc_cpu_tlb_flush;
}
static const TypeInfo ppc_cpu_type_info = {
diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c
index 619b202..b87e307 100644
--- a/target-s390x/cpu.c
+++ b/target-s390x/cpu.c
@@ -45,6 +45,14 @@ static void s390_cpu_reset(CPUState *s)
s390_add_running_cpu(env);
}
+/* CPUClass::tlb_flush() */
+static void s390_cpu_tlb_flush(CPUState *c, bool flush_global)
+{
+ S390CPU *cpu = S390_CPU(c);
+
+ tlb_flush(&cpu->env, flush_global);
+}
+
static void s390_cpu_initfn(Object *obj)
{
S390CPU *cpu = S390_CPU(obj);
@@ -76,6 +84,8 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
scc->parent_reset = cc->reset;
cc->reset = s390_cpu_reset;
+
+ cc->tlb_flush = s390_cpu_tlb_flush;
}
static const TypeInfo s390_cpu_type_info = {
diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c
index a1a177f..a0727bc 100644
--- a/target-sh4/cpu.c
+++ b/target-sh4/cpu.c
@@ -53,6 +53,14 @@ static void superh_cpu_reset(CPUState *s)
set_default_nan_mode(1, &env->fp_status);
}
+/* CPUClass::tlb_flush() */
+static void superh_cpu_tlb_flush(CPUState *c, bool flush_global)
+{
+ SuperHCPU *cpu = SUPERH_CPU(c);
+
+ tlb_flush(&cpu->env, flush_global);
+}
+
static void superh_cpu_initfn(Object *obj)
{
SuperHCPU *cpu = SUPERH_CPU(obj);
@@ -70,6 +78,8 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data)
scc->parent_reset = cc->reset;
cc->reset = superh_cpu_reset;
+
+ cc->tlb_flush = superh_cpu_tlb_flush;
}
static const TypeInfo superh_cpu_type_info = {
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index f7c004c..7216b42 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -74,6 +74,14 @@ static void sparc_cpu_reset(CPUState *s)
env->cache_control = 0;
}
+/* CPUClass::tlb_flush() */
+static void sparc_cpu_tlb_flush(CPUState *c, bool flush_global)
+{
+ SPARCCPU *cpu = SPARC_CPU(c);
+
+ tlb_flush(&cpu->env, flush_global);
+}
+
static int cpu_sparc_register(CPUSPARCState *env, const char *cpu_model)
{
sparc_def_t def1, *def = &def1;
@@ -875,6 +883,8 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
scc->parent_reset = cc->reset;
cc->reset = sparc_cpu_reset;
+
+ cc->tlb_flush = sparc_cpu_tlb_flush;
}
static const TypeInfo sparc_cpu_type_info = {
diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c
index 5467728..cc00bc2 100644
--- a/target-unicore32/cpu.c
+++ b/target-unicore32/cpu.c
@@ -20,6 +20,14 @@ static inline void set_feature(CPUUniCore32State *env, int feature)
env->features |= feature;
}
+/* CPUClass::tlb_flush() */
+static void uc32_cpu_tlb_flush(CPUState *c, bool flush_global)
+{
+ UniCore32CPU *cpu = UNICORE32_CPU(c);
+
+ tlb_flush(&cpu->env, flush_global);
+}
+
/* CPU models */
typedef struct UniCore32CPUInfo {
@@ -71,6 +79,13 @@ static void uc32_cpu_initfn(Object *obj)
tlb_flush(env, 1);
}
+static void uc32_cpu_class_init(ObjectClass *oc, void *data)
+{
+ CPUClass *cc = CPU_CLASS(oc);
+
+ cc->tlb_flush = uc32_cpu_tlb_flush;
+}
+
static void uc32_register_cpu_type(const UniCore32CPUInfo *info)
{
TypeInfo type_info = {
@@ -89,6 +104,7 @@ static const TypeInfo uc32_cpu_type_info = {
.instance_init = uc32_cpu_initfn,
.abstract = true,
.class_size = sizeof(UniCore32CPUClass),
+ .class_init = uc32_cpu_class_init,
};
static void uc32_cpu_register_types(void)
diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c
index 9d01983..59671c1 100644
--- a/target-xtensa/cpu.c
+++ b/target-xtensa/cpu.c
@@ -53,6 +53,14 @@ static void xtensa_cpu_reset(CPUState *s)
reset_mmu(env);
}
+/* CPUClass::tlb_flush() */
+static void xtensa_cpu_tlb_flush(CPUState *c, bool flush_global)
+{
+ XtensaCPU *cpu = XTENSA_CPU(c);
+
+ tlb_flush(&cpu->env, flush_global);
+}
+
static void xtensa_cpu_initfn(Object *obj)
{
XtensaCPU *cpu = XTENSA_CPU(obj);
@@ -68,6 +76,8 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
xcc->parent_reset = cc->reset;
cc->reset = xtensa_cpu_reset;
+
+ cc->tlb_flush = xtensa_cpu_tlb_flush;
}
static const TypeInfo xtensa_cpu_type_info = {
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 58/59] xen_machine_pv: Use cpu_x86_init() to obtain X86CPU
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: open list:X86, Andreas Färber, Stefano Stabellini
Needed for moving halted field to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/xen_machine_pv.c | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/hw/xen_machine_pv.c b/hw/xen_machine_pv.c
index 7eee770..4b72aa7 100644
--- a/hw/xen_machine_pv.c
+++ b/hw/xen_machine_pv.c
@@ -36,6 +36,7 @@ static void xen_init_pv(ram_addr_t ram_size,
const char *initrd_filename,
const char *cpu_model)
{
+ X86CPU *cpu;
CPUX86State *env;
DriveInfo *dinfo;
int i;
@@ -48,7 +49,8 @@ static void xen_init_pv(ram_addr_t ram_size,
cpu_model = "qemu32";
#endif
}
- env = cpu_init(cpu_model);
+ cpu = cpu_x86_init(cpu_model);
+ env = &cpu->env;
env->halted = 1;
/* Initialize backend core & drivers */
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 58/59] xen_machine_pv: Use cpu_x86_init() to obtain X86CPU
@ 2012-05-23 3:08 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel; +Cc: open list:X86, Andreas Färber, Stefano Stabellini
Needed for moving halted field to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
hw/xen_machine_pv.c | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/hw/xen_machine_pv.c b/hw/xen_machine_pv.c
index 7eee770..4b72aa7 100644
--- a/hw/xen_machine_pv.c
+++ b/hw/xen_machine_pv.c
@@ -36,6 +36,7 @@ static void xen_init_pv(ram_addr_t ram_size,
const char *initrd_filename,
const char *cpu_model)
{
+ X86CPU *cpu;
CPUX86State *env;
DriveInfo *dinfo;
int i;
@@ -48,7 +49,8 @@ static void xen_init_pv(ram_addr_t ram_size,
cpu_model = "qemu32";
#endif
}
- env = cpu_init(cpu_model);
+ cpu = cpu_x86_init(cpu_model);
+ env = &cpu->env;
env->halted = 1;
/* Initialize backend core & drivers */
--
1.7.7
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 59/59] cpu: Move halted and interrupt_request to CPUState
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
(?)
@ 2012-05-23 3:08 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Peter Maydell, Anthony Liguori,
Alexander Graf, Blue Swirl, Stefano Stabellini, Avi Kivity,
Marcelo Tosatti, Richard Henderson, Paul Brook,
Edgar E. Iglesias, Michael Walle, Aurelien Jarno, Guan Xuetao,
Max Filippov, xen-devel
For target-cris use i32 for halted instead of tl. This effectively makes
no difference since it is 32-bit.
For Xen pass CPUState to xen_reset_vcpu().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-defs.h | 2 -
cpu-exec.c | 32 +++++++++++++++-------------
cpus.c | 4 +-
exec.c | 34 ++++++++++++++++++++-----------
gdbstub.c | 4 ++-
hw/leon3.c | 2 +-
hw/omap1.c | 4 +-
hw/pc.c | 6 ++--
hw/ppc.c | 10 ++++----
hw/ppce500_mpc8544ds.c | 4 +-
hw/ppce500_spin.c | 2 +-
hw/pxa2xx_gpio.c | 3 +-
hw/pxa2xx_pic.c | 2 +-
hw/s390-virtio.c | 14 ++++++++----
hw/spapr.c | 4 +-
hw/spapr_hcall.c | 2 +-
hw/spapr_rtas.c | 8 ++++--
hw/sun4m.c | 18 +++++++---------
hw/sun4u.c | 9 ++++---
hw/xen_machine_pv.c | 4 +--
hw/xtensa_pic.c | 5 ++-
include/qemu/cpu.h | 4 +++
kvm-all.c | 2 +-
qom/cpu.c | 2 +
target-alpha/cpu.h | 4 +--
target-alpha/translate.c | 3 +-
target-arm/cpu.h | 4 +--
target-arm/helper.c | 3 +-
target-arm/op_helper.c | 4 ++-
target-cris/cpu.h | 4 +--
target-cris/translate.c | 4 ++-
target-i386/cpu.h | 6 ++--
target-i386/helper.c | 14 +++++++-----
target-i386/kvm.c | 49 +++++++++++++++++++++++---------------------
target-i386/op_helper.c | 13 ++++++++---
target-lm32/cpu.h | 4 +--
target-lm32/op_helper.c | 4 ++-
target-m68k/cpu.h | 4 +--
target-m68k/op_helper.c | 3 +-
target-m68k/qregs.def | 1 -
target-m68k/translate.c | 6 +++++
target-microblaze/cpu.h | 4 +--
target-mips/cpu.h | 4 +-
target-mips/op_helper.c | 11 ++++++---
target-mips/translate.c | 8 +++++-
target-ppc/cpu.h | 2 +-
target-ppc/helper.c | 4 +-
target-ppc/helper_regs.h | 7 ++++-
target-ppc/kvm.c | 13 ++++++++---
target-ppc/op_helper.c | 8 +++++-
target-ppc/translate.c | 3 +-
target-s390x/cpu.h | 2 +-
target-s390x/helper.c | 10 ++++++--
target-s390x/kvm.c | 4 ++-
target-sh4/cpu.h | 4 +--
target-sh4/helper.c | 5 ++-
target-sh4/op_helper.c | 4 ++-
target-sparc/cpu.h | 2 +-
target-unicore32/cpu.h | 4 +--
target-xtensa/op_helper.c | 4 ++-
xen-all.c | 10 +++++---
61 files changed, 244 insertions(+), 180 deletions(-)
diff --git a/cpu-defs.h b/cpu-defs.h
index d846674..bc851fd 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -162,8 +162,6 @@ typedef struct CPUWatchpoint {
accessed */ \
target_ulong mem_io_vaddr; /* target virtual addr at which the \
memory was accessed */ \
- uint32_t halted; /* Nonzero if the CPU is in suspend state */ \
- uint32_t interrupt_request; \
volatile sig_atomic_t exit_request; \
CPU_COMMON_TLB \
struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \
diff --git a/cpu-exec.c b/cpu-exec.c
index da0c17a..5674bac 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -190,12 +190,12 @@ int cpu_exec(CPUArchState *env)
uint8_t *tc_ptr;
tcg_target_ulong next_tb;
- if (env->halted) {
+ if (cpu->halted) {
if (!cpu_has_work(cpu)) {
return EXCP_HALTED;
}
- env->halted = 0;
+ cpu->halted = 0;
}
cpu_single_env = env;
@@ -264,14 +264,14 @@ int cpu_exec(CPUArchState *env)
next_tb = 0; /* force lookup of first TB */
for(;;) {
- interrupt_request = env->interrupt_request;
+ interrupt_request = cpu->interrupt_request;
if (unlikely(interrupt_request)) {
if (unlikely(env->singlestep_enabled & SSTEP_NOIRQ)) {
/* Mask out external interrupts for this step. */
interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
}
if (interrupt_request & CPU_INTERRUPT_DEBUG) {
- env->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
env->exception_index = EXCP_DEBUG;
cpu_loop_exit(env);
}
@@ -279,8 +279,8 @@ int cpu_exec(CPUArchState *env)
defined(TARGET_PPC) || defined(TARGET_ALPHA) || defined(TARGET_CRIS) || \
defined(TARGET_MICROBLAZE) || defined(TARGET_LM32) || defined(TARGET_UNICORE32)
if (interrupt_request & CPU_INTERRUPT_HALT) {
- env->interrupt_request &= ~CPU_INTERRUPT_HALT;
- env->halted = 1;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
cpu_loop_exit(env);
}
@@ -297,17 +297,17 @@ int cpu_exec(CPUArchState *env)
if ((interrupt_request & CPU_INTERRUPT_SMI) &&
!(env->hflags & HF_SMM_MASK)) {
svm_check_intercept(env, SVM_EXIT_SMI);
- env->interrupt_request &= ~CPU_INTERRUPT_SMI;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_SMI;
do_smm_enter(env);
next_tb = 0;
} else if ((interrupt_request & CPU_INTERRUPT_NMI) &&
!(env->hflags2 & HF2_NMI_MASK)) {
- env->interrupt_request &= ~CPU_INTERRUPT_NMI;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_NMI;
env->hflags2 |= HF2_NMI_MASK;
do_interrupt_x86_hardirq(env, EXCP02_NMI, 1);
next_tb = 0;
} else if (interrupt_request & CPU_INTERRUPT_MCE) {
- env->interrupt_request &= ~CPU_INTERRUPT_MCE;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_MCE;
do_interrupt_x86_hardirq(env, EXCP12_MCHK, 0);
next_tb = 0;
} else if ((interrupt_request & CPU_INTERRUPT_HARD) &&
@@ -318,7 +318,8 @@ int cpu_exec(CPUArchState *env)
!(env->hflags & HF_INHIBIT_IRQ_MASK))))) {
int intno;
svm_check_intercept(env, SVM_EXIT_INTR);
- env->interrupt_request &= ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIRQ);
+ cpu->interrupt_request &= ~(CPU_INTERRUPT_HARD |
+ CPU_INTERRUPT_VIRQ);
intno = cpu_get_pic_interrupt(env);
qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=0x%02x\n", intno);
do_interrupt_x86_hardirq(env, intno, 1);
@@ -335,7 +336,7 @@ int cpu_exec(CPUArchState *env)
intno = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_vector));
qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing virtual hardware INT=0x%02x\n", intno);
do_interrupt_x86_hardirq(env, intno, 1);
- env->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
next_tb = 0;
#endif
}
@@ -346,8 +347,9 @@ int cpu_exec(CPUArchState *env)
}
if (interrupt_request & CPU_INTERRUPT_HARD) {
ppc_hw_interrupt(env);
- if (env->pending_interrupts == 0)
- env->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ if (env->pending_interrupts == 0) {
+ cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ }
next_tb = 0;
}
#elif defined(TARGET_LM32)
@@ -499,8 +501,8 @@ int cpu_exec(CPUArchState *env)
#endif
/* Don't use the cached interrupt_request value,
do_interrupt may have updated the EXITTB flag. */
- if (env->interrupt_request & CPU_INTERRUPT_EXITTB) {
- env->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
+ if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
+ cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
/* ensure that no TB jump will be modified as
the program flow was changed */
next_tb = 0;
diff --git a/cpus.c b/cpus.c
index a403629..227ef2f 100644
--- a/cpus.c
+++ b/cpus.c
@@ -443,7 +443,7 @@ static bool cpu_thread_is_idle(CPUArchState *env)
if (cpu->stopped || !runstate_is_running()) {
return true;
}
- if (!env->halted || qemu_cpu_has_work(cpu) || kvm_irqchip_in_kernel()) {
+ if (!cpu->halted || qemu_cpu_has_work(cpu) || kvm_irqchip_in_kernel()) {
return false;
}
return true;
@@ -1214,7 +1214,7 @@ CpuInfoList *qmp_query_cpus(Error **errp)
info->value = g_malloc0(sizeof(*info->value));
info->value->CPU = env->cpu_index;
info->value->current = (env == first_cpu);
- info->value->halted = env->halted;
+ info->value->halted = cpu->halted;
info->value->thread_id = cpu->thread_id;
#if defined(TARGET_I386)
info->value->has_pc = true;
diff --git a/exec.c b/exec.c
index 8d2fa7a..f62e643 100644
--- a/exec.c
+++ b/exec.c
@@ -654,12 +654,12 @@ void cpu_exec_init_all(void)
static int cpu_common_post_load(void *opaque, int version_id)
{
- CPUArchState *env = opaque;
+ CPUState *cpu = opaque;
/* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
version_id is increased. */
- env->interrupt_request &= ~0x01;
- tlb_flush(env, 1);
+ cpu->interrupt_request &= ~0x01;
+ cpu_tlb_flush(cpu, true);
return 0;
}
@@ -671,8 +671,8 @@ static const VMStateDescription vmstate_cpu_common = {
.minimum_version_id_old = 1,
.post_load = cpu_common_post_load,
.fields = (VMStateField []) {
- VMSTATE_UINT32(halted, CPUArchState),
- VMSTATE_UINT32(interrupt_request, CPUArchState),
+ VMSTATE_UINT32(halted, CPUState),
+ VMSTATE_UINT32(interrupt_request, CPUState),
VMSTATE_END_OF_LIST()
}
};
@@ -721,7 +721,7 @@ void cpu_exec_init(CPUArchState *env)
cpu_list_unlock();
#endif
#if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)
- vmstate_register(NULL, cpu_index, &vmstate_cpu_common, env);
+ vmstate_register(NULL, cpu_index, &vmstate_cpu_common, ENV_GET_CPU(env));
register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION,
cpu_save, cpu_load, env);
#endif
@@ -1104,6 +1104,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
int is_cpu_write_access)
{
TranslationBlock *tb, *tb_next, *saved_tb;
+ CPUState *cpu = NULL;
CPUArchState *env = cpu_single_env;
tb_page_addr_t tb_start, tb_end;
PageDesc *p;
@@ -1117,6 +1118,10 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
int current_flags = 0;
#endif /* TARGET_HAS_PRECISE_SMC */
+ if (env != NULL) {
+ cpu = ENV_GET_CPU(env);
+ }
+
p = page_find(start >> TARGET_PAGE_BITS);
if (!p)
return;
@@ -1178,8 +1183,9 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
tb_phys_invalidate(tb, -1);
if (env) {
env->current_tb = saved_tb;
- if (env->interrupt_request && env->current_tb)
- cpu_interrupt(env, env->interrupt_request);
+ if (cpu->interrupt_request && env->current_tb) {
+ cpu_interrupt(env, cpu->interrupt_request);
+ }
}
}
tb = tb_next;
@@ -1740,8 +1746,8 @@ static void tcg_handle_interrupt(CPUArchState *env, int mask)
CPUState *cpu = ENV_GET_CPU(env);
int old_mask;
- old_mask = env->interrupt_request;
- env->interrupt_request |= mask;
+ old_mask = cpu->interrupt_request;
+ cpu->interrupt_request |= mask;
/*
* If called from iothread context, wake the target cpu in
@@ -1769,14 +1775,18 @@ CPUInterruptHandler cpu_interrupt_handler = tcg_handle_interrupt;
void cpu_interrupt(CPUArchState *env, int mask)
{
- env->interrupt_request |= mask;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->interrupt_request |= mask;
cpu_unlink_tb(env);
}
#endif /* CONFIG_USER_ONLY */
void cpu_reset_interrupt(CPUArchState *env, int mask)
{
- env->interrupt_request &= ~mask;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->interrupt_request &= ~mask;
}
void cpu_exit(CPUArchState *env)
diff --git a/gdbstub.c b/gdbstub.c
index 6a77a66..47cbfdd 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -2284,10 +2284,12 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
thread = strtoull(p+16, (char **)&p, 16);
env = find_cpu(thread);
if (env != NULL) {
+ CPUState *cpu = ENV_GET_CPU(env);
+
cpu_synchronize_state(env);
len = snprintf((char *)mem_buf, sizeof(mem_buf),
"CPU#%d [%s]", env->cpu_index,
- env->halted ? "halted " : "running");
+ cpu->halted ? "halted " : "running");
memtohex(buf, mem_buf, len);
put_packet(s, buf);
}
diff --git a/hw/leon3.c b/hw/leon3.c
index 878d3aa..8d44f83 100644
--- a/hw/leon3.c
+++ b/hw/leon3.c
@@ -53,7 +53,7 @@ static void main_cpu_reset(void *opaque)
cpu_reset(CPU(s->cpu));
- env->halted = 0;
+ CPU(s->cpu)->halted = 0;
env->pc = s->entry;
env->npc = s->entry + 4;
}
diff --git a/hw/omap1.c b/hw/omap1.c
index ad60cc4..e90aed4 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -1735,7 +1735,7 @@ static uint64_t omap_clkdsp_read(void *opaque, target_phys_addr_t addr,
case 0x18: /* DSP_SYSST */
return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start |
- (s->cpu->env.halted << 6); /* Quite useless... */
+ (CPU(s->cpu)->halted << 6); /* Quite useless... */
}
OMAP_BAD_REG(addr);
@@ -3752,7 +3752,7 @@ void omap_mpu_wakeup(void *opaque, int irq, int req)
{
struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque;
- if (mpu->cpu->env.halted) {
+ if (CPU(mpu->cpu)->halted) {
cpu_interrupt(&mpu->cpu->env, CPU_INTERRUPT_EXITTB);
}
}
diff --git a/hw/pc.c b/hw/pc.c
index f0cbfef..c8caada 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -942,10 +942,10 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
static void pc_cpu_reset(void *opaque)
{
X86CPU *cpu = opaque;
- CPUX86State *env = &cpu->env;
+ CPUState *c = CPU(cpu);
- cpu_reset(CPU(cpu));
- env->halted = !cpu_is_bsp(cpu);
+ cpu_reset(c);
+ c->halted = !cpu_is_bsp(cpu);
}
static X86CPU *pc_new_cpu(const char *cpu_model)
diff --git a/hw/ppc.c b/hw/ppc.c
index fa7ae74..02c5e3e 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -125,7 +125,7 @@ static void ppc6xx_set_irq(void *opaque, int pin, int level)
/* XXX: Note that the only way to restart the CPU is to reset it */
if (level) {
LOG_IRQ("%s: stop the CPU\n", __func__);
- env->halted = 1;
+ CPU(cpu)->halted = 1;
}
break;
case PPC6xx_INPUT_HRESET:
@@ -202,10 +202,10 @@ static void ppc970_set_irq(void *opaque, int pin, int level)
/* XXX: TODO: relay the signal to CKSTP_OUT pin */
if (level) {
LOG_IRQ("%s: stop the CPU\n", __func__);
- env->halted = 1;
+ CPU(cpu)->halted = 1;
} else {
LOG_IRQ("%s: restart the CPU\n", __func__);
- env->halted = 0;
+ CPU(cpu)->halted = 0;
qemu_cpu_kick(CPU(cpu));
}
break;
@@ -331,10 +331,10 @@ static void ppc40x_set_irq(void *opaque, int pin, int level)
/* Level sensitive - active low */
if (level) {
LOG_IRQ("%s: stop the CPU\n", __func__);
- env->halted = 1;
+ CPU(cpu)->halted = 1;
} else {
LOG_IRQ("%s: restart the CPU\n", __func__);
- env->halted = 0;
+ CPU(cpu)->halted = 0;
qemu_cpu_kick(CPU(cpu));
}
break;
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 3eb8a23..ab826de 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -203,7 +203,7 @@ static void mpc8544ds_cpu_reset_sec(void *opaque)
/* Secondary CPU starts in halted state for now. Needs to change when
implementing non-kernel boot. */
- env->halted = 1;
+ CPU(cpu)->halted = 1;
env->exception_index = EXCP_HLT;
}
@@ -216,7 +216,7 @@ static void mpc8544ds_cpu_reset(void *opaque)
cpu_reset(CPU(cpu));
/* Set initial guest state. */
- env->halted = 0;
+ CPU(cpu)->halted = 0;
env->gpr[1] = (16<<20) - 8;
env->gpr[3] = bi->dt_base;
env->nip = bi->entry;
diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c
index a4b49e6..65f0b6f 100644
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@@ -112,7 +112,7 @@ static void spin_kick(void *data)
map_start = ldq_p(&curspin->addr) & ~(map_size - 1);
mmubooke_create_initial_mapping(env, 0, map_start, map_size);
- env->halted = 0;
+ cpu->halted = 0;
env->exception_index = -1;
cpu->stopped = false;
qemu_cpu_kick(cpu);
diff --git a/hw/pxa2xx_gpio.c b/hw/pxa2xx_gpio.c
index 3c90c9c..5fcb992 100644
--- a/hw/pxa2xx_gpio.c
+++ b/hw/pxa2xx_gpio.c
@@ -118,7 +118,8 @@ static void pxa2xx_gpio_set(void *opaque, int line, int level)
pxa2xx_gpio_irq_update(s);
/* Wake-up GPIOs */
- if (s->cpu->env.halted && (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])) {
+ if (CPU(s->cpu)->halted &&
+ (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])) {
cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_EXITTB);
}
}
diff --git a/hw/pxa2xx_pic.c b/hw/pxa2xx_pic.c
index c560133..c8f01e8 100644
--- a/hw/pxa2xx_pic.c
+++ b/hw/pxa2xx_pic.c
@@ -47,7 +47,7 @@ static void pxa2xx_pic_update(void *opaque)
uint32_t mask[2];
PXA2xxPICState *s = (PXA2xxPICState *) opaque;
- if (s->cpu->env.halted) {
+ if (CPU(s->cpu)->halted) {
mask[0] = s->int_pending[0] & (s->int_enabled[0] | s->int_idle);
mask[1] = s->int_pending[1] & (s->int_enabled[1] | s->int_idle);
if (mask[0] || mask[1]) {
diff --git a/hw/s390-virtio.c b/hw/s390-virtio.c
index 47eed35..566760e 100644
--- a/hw/s390-virtio.c
+++ b/hw/s390-virtio.c
@@ -132,19 +132,23 @@ static unsigned s390_running_cpus;
void s390_add_running_cpu(CPUS390XState *env)
{
- if (env->halted) {
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ if (cpu->halted) {
s390_running_cpus++;
- env->halted = 0;
+ cpu->halted = 0;
env->exception_index = -1;
}
}
unsigned s390_del_running_cpu(CPUS390XState *env)
{
- if (env->halted == 0) {
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ if (cpu->halted == 0) {
assert(s390_running_cpus >= 1);
s390_running_cpus--;
- env->halted = 1;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
}
return s390_running_cpus;
@@ -218,7 +222,7 @@ static void s390_init(ram_addr_t my_ram_size,
env = tmp_env;
}
ipi_states[i] = cpu;
- tmp_env->halted = 1;
+ CPU(cpu)->halted = 1;
tmp_env->exception_index = EXCP_HLT;
tmp_env->storage_keys = storage_keys;
}
diff --git a/hw/spapr.c b/hw/spapr.c
index f9c3631..d553951 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -500,7 +500,7 @@ static void spapr_reset(void *opaque)
/* Set up the entry state */
first_cpu->gpr[3] = spapr->fdt_addr;
first_cpu->gpr[5] = 0;
- first_cpu->halted = 0;
+ ENV_GET_CPU(first_cpu)->halted = 0;
first_cpu->nip = spapr->entry_point;
}
@@ -732,7 +732,7 @@ static void ppc_spapr_init(ram_addr_t ram_size,
/* SLOF will startup the secondary CPUs using RTAS */
for (env = first_cpu; env != NULL; env = env->next_cpu) {
- env->halted = 1;
+ ENV_GET_CPU(env)->halted = 1;
}
/* Prepare the device tree */
diff --git a/hw/spapr_hcall.c b/hw/spapr_hcall.c
index ebb271c..7165796 100644
--- a/hw/spapr_hcall.c
+++ b/hw/spapr_hcall.c
@@ -550,7 +550,7 @@ static target_ulong h_cede(PowerPCCPU *cpu, sPAPREnvironment *spapr,
env->msr |= (1ULL << MSR_EE);
hreg_compute_hflags(env);
if (!cpu_has_work(CPU(cpu))) {
- env->halted = 1;
+ CPU(cpu)->halted = 1;
}
return H_SUCCESS;
}
diff --git a/hw/spapr_rtas.c b/hw/spapr_rtas.c
index a343055..d3c503c 100644
--- a/hw/spapr_rtas.c
+++ b/hw/spapr_rtas.c
@@ -131,6 +131,7 @@ static void rtas_query_cpu_stopped_state(sPAPREnvironment *spapr,
{
target_ulong id;
CPUPPCState *env;
+ CPUState *cpu;
if (nargs != 1 || nret != 2) {
rtas_st(rets, 0, -3);
@@ -139,11 +140,12 @@ static void rtas_query_cpu_stopped_state(sPAPREnvironment *spapr,
id = rtas_ld(args, 0);
for (env = first_cpu; env; env = env->next_cpu) {
+ cpu = ENV_GET_CPU(env);
if (env->cpu_index != id) {
continue;
}
- if (env->halted) {
+ if (cpu->halted) {
rtas_st(rets, 1, 0);
} else {
rtas_st(rets, 1, 2);
@@ -182,7 +184,7 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
continue;
}
- if (!env->halted) {
+ if (!cpu->halted) {
rtas_st(rets, 0, -1);
return;
}
@@ -190,7 +192,7 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
env->nip = start;
env->gpr[3] = r3;
- env->halted = 0;
+ cpu->halted = 0;
qemu_cpu_kick(cpu);
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 4929677..7bb0bce 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -257,7 +257,7 @@ static void cpu_kick_irq(SPARCCPU *cpu)
{
CPUSPARCState *env = &cpu->env;
- env->halted = 0;
+ CPU(cpu)->halted = 0;
cpu_check_irqs(env);
qemu_cpu_kick(CPU(cpu));
}
@@ -284,20 +284,18 @@ static void dummy_cpu_set_irq(void *opaque, int irq, int level)
static void main_cpu_reset(void *opaque)
{
- SPARCCPU *cpu = opaque;
- CPUSPARCState *env = &cpu->env;
+ CPUState *cpu = CPU(opaque);
- cpu_reset(CPU(cpu));
- env->halted = 0;
+ cpu_reset(cpu);
+ cpu->halted = 0;
}
static void secondary_cpu_reset(void *opaque)
{
- SPARCCPU *cpu = opaque;
- CPUSPARCState *env = &cpu->env;
+ CPUState *cpu = CPU(opaque);
- cpu_reset(CPU(cpu));
- env->halted = 1;
+ cpu_reset(cpu);
+ cpu->halted = 1;
}
static void cpu_halt_signal(void *opaque, int irq, int level)
@@ -829,7 +827,7 @@ static void cpu_devinit(const char *cpu_model, unsigned int id,
qemu_register_reset(main_cpu_reset, cpu);
} else {
qemu_register_reset(secondary_cpu_reset, cpu);
- env->halted = 1;
+ CPU(cpu)->halted = 1;
}
*cpu_irqs = qemu_allocate_irqs(cpu_set_irq, cpu, MAX_PILS);
env->prom_addr = prom_addr;
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 56c3ddf..affd7bc 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -253,6 +253,7 @@ static uint64_t sun4u_load_kernel(const char *kernel_filename,
void cpu_check_irqs(CPUSPARCState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
uint32_t pil = env->pil_in |
(env->softint & ~(SOFTINT_TIMER | SOFTINT_STIMER));
@@ -269,7 +270,7 @@ void cpu_check_irqs(CPUSPARCState *env)
/* The bit corresponding to psrpil is (1<< psrpil), the next bit
is (2 << psrpil). */
if (pil < (2 << env->psrpil)){
- if (env->interrupt_request & CPU_INTERRUPT_HARD) {
+ if (cpu->interrupt_request & CPU_INTERRUPT_HARD) {
CPUIRQ_DPRINTF("Reset CPU IRQ (current interrupt %x)\n",
env->interrupt_index);
env->interrupt_index = 0;
@@ -301,7 +302,7 @@ void cpu_check_irqs(CPUSPARCState *env)
break;
}
}
- } else if (env->interrupt_request & CPU_INTERRUPT_HARD) {
+ } else if (cpu->interrupt_request & CPU_INTERRUPT_HARD) {
CPUIRQ_DPRINTF("Interrupts disabled, pil=%08x pil_in=%08x softint=%08x "
"current interrupt %x\n",
pil, env->pil_in, env->softint, env->interrupt_index);
@@ -314,7 +315,7 @@ static void cpu_kick_irq(SPARCCPU *cpu)
{
CPUSPARCState *env = &cpu->env;
- env->halted = 0;
+ CPU(cpu)->halted = 0;
cpu_check_irqs(env);
qemu_cpu_kick(CPU(cpu));
}
@@ -327,7 +328,7 @@ static void cpu_set_ivec_irq(void *opaque, int irq, int level)
if (level) {
if (!(env->ivec_status & 0x20)) {
CPUIRQ_DPRINTF("Raise IVEC IRQ %d\n", irq);
- env->halted = 0;
+ CPU(cpu)->halted = 0;
env->interrupt_index = TT_IVEC;
env->ivec_status |= 0x20;
env->ivec_data[0] = (0x1f << 6) | irq;
diff --git a/hw/xen_machine_pv.c b/hw/xen_machine_pv.c
index 4b72aa7..c387fdf 100644
--- a/hw/xen_machine_pv.c
+++ b/hw/xen_machine_pv.c
@@ -37,7 +37,6 @@ static void xen_init_pv(ram_addr_t ram_size,
const char *cpu_model)
{
X86CPU *cpu;
- CPUX86State *env;
DriveInfo *dinfo;
int i;
@@ -50,8 +49,7 @@ static void xen_init_pv(ram_addr_t ram_size,
#endif
}
cpu = cpu_x86_init(cpu_model);
- env = &cpu->env;
- env->halted = 1;
+ CPU(cpu)->halted = 1;
/* Initialize backend core & drivers */
if (xen_be_init() != 0) {
diff --git a/hw/xtensa_pic.c b/hw/xtensa_pic.c
index 1ec70cd..8a65b92 100644
--- a/hw/xtensa_pic.c
+++ b/hw/xtensa_pic.c
@@ -47,6 +47,7 @@ void xtensa_advance_ccount(CPUXtensaState *env, uint32_t d)
void check_interrupts(CPUXtensaState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int minlevel = xtensa_get_cintlevel(env);
uint32_t int_set_enabled = env->sregs[INTSET] & env->sregs[INTENABLE];
int level;
@@ -54,7 +55,7 @@ void check_interrupts(CPUXtensaState *env)
/* If the CPU is halted advance CCOUNT according to the vm_clock time
* elapsed since the moment when it was advanced last time.
*/
- if (env->halted) {
+ if (cpu->halted) {
int64_t now = qemu_get_clock_ns(vm_clock);
xtensa_advance_ccount(env,
@@ -128,7 +129,7 @@ static void xtensa_ccompare_cb(void *opaque)
XtensaCPU *cpu = opaque;
CPUXtensaState *env = &cpu->env;
- if (env->halted) {
+ if (CPU(cpu)->halted) {
env->halt_clock = qemu_get_clock_ns(vm_clock);
xtensa_advance_ccount(env, env->wake_ccount - env->sregs[CCOUNT]);
if (!cpu_has_work(CPU(cpu))) {
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 7d03369..5399593 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -58,6 +58,8 @@ typedef struct CPUClass {
/**
* CPUState:
* @created: Indicates whether the CPU thread has been successfully created.
+ * @interrupt_request: Indicates a pending interrupt request.
+ * @halted: Nonzero if the CPU is in suspended state.
* @stop: Indicates a pending stop request.
* @stopped: Indicates the CPU has been artificially stopped.
*
@@ -77,6 +79,8 @@ struct CPUState {
struct qemu_work_item *queued_work_first, *queued_work_last;
bool thread_kicked;
bool created;
+ uint32_t interrupt_request;
+ uint32_t halted;
bool stop;
bool stopped;
diff --git a/kvm-all.c b/kvm-all.c
index bbd2049..b4b8a14 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -833,7 +833,7 @@ static void kvm_handle_interrupt(CPUArchState *env, int mask)
{
CPUState *cpu = ENV_GET_CPU(env);
- env->interrupt_request |= mask;
+ cpu->interrupt_request |= mask;
if (!qemu_cpu_is_self(cpu)) {
qemu_cpu_kick(cpu);
diff --git a/qom/cpu.c b/qom/cpu.c
index 729f4cf..9ae9a3c 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -32,6 +32,8 @@ void cpu_reset(CPUState *cpu)
static void cpu_common_reset(CPUState *cpu)
{
+ cpu->halted = 0;
+ cpu->interrupt_request = 0;
}
void cpu_tlb_flush(CPUState *cpu, bool flush_global)
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index a43fb94..3f321e2 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -501,8 +501,6 @@ static inline void cpu_set_tls(CPUAlphaState *env, target_ulong newtls)
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUAlphaState *env = &ALPHA_CPU(cpu)->env;
-
/* Here we are checking to see if the CPU should wake up from HALT.
We will have gotten into this state only for WTINT from PALmode. */
/* ??? I'm not sure how the IPL state works with WTINT to keep a CPU
@@ -510,7 +508,7 @@ static inline bool cpu_has_work(CPUState *cpu)
assume that if a CPU really wants to stay asleep, it will mask
interrupts at the chipset level, which will prevent these bits
from being set in the first place. */
- return env->interrupt_request & (CPU_INTERRUPT_HARD
+ return cpu->interrupt_request & (CPU_INTERRUPT_HARD
| CPU_INTERRUPT_TIMER
| CPU_INTERRUPT_SMP
| CPU_INTERRUPT_MCHK);
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 12de6a3..4ec7a7d 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -1693,7 +1693,8 @@ static ExitStatus gen_mtpr(DisasContext *ctx, int rb, int regno)
case 253:
/* WAIT */
tmp = tcg_const_i64(1);
- tcg_gen_st32_i64(tmp, cpu_env, offsetof(CPUAlphaState, halted));
+ tcg_gen_st32_i64(tmp, cpu_env, offsetof(CPUState, halted)
+ - offsetof(AlphaCPU, env));
return gen_excp(ctx, EXCP_HLT, 0);
case 252:
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index d4a19be..0cf883f 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -553,9 +553,7 @@ static inline void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUARMState *env = &ARM_CPU(cpu)->env;
-
- return env->interrupt_request &
+ return cpu->interrupt_request &
(CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
}
diff --git a/target-arm/helper.c b/target-arm/helper.c
index bbb1d05..39a455d 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -527,6 +527,7 @@ static void do_interrupt_v7m(CPUARMState *env)
/* Handle a CPU exception. */
void do_interrupt(CPUARMState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
uint32_t addr;
uint32_t mask;
int new_mode;
@@ -632,7 +633,7 @@ void do_interrupt(CPUARMState *env)
}
env->regs[14] = env->regs[15] + offset;
env->regs[15] = addr;
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ cpu->interrupt_request |= CPU_INTERRUPT_EXITTB;
}
/* Check section/page access permissions.
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index b53369d..2714021 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -234,8 +234,10 @@ uint32_t HELPER(usat16)(uint32_t x, uint32_t shift)
void HELPER(wfi)(void)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
env->exception_index = EXCP_HLT;
- env->halted = 1;
+ cpu->halted = 1;
cpu_loop_exit(env);
}
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 2f71f63..566129c 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -285,9 +285,7 @@ void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf);
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUCRISState *env = &CRIS_CPU(cpu)->env;
-
- return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
+ return cpu->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
}
#include "exec-all.h"
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 1ad9ec7..14c3795 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -2895,7 +2895,9 @@ static int dec_rfe_etc(DisasContext *dc)
cris_cc_mask(dc, 0);
if (dc->op2 == 15) {
- t_gen_mov_env_TN(halted, tcg_const_tl(1));
+ tcg_gen_st_i32(tcg_const_i32(1), cpu_env,
+ offsetof(CPUState, halted) -
+ offsetof(CRISCPU, env));
tcg_gen_movi_tl(env_pc, dc->pc + 2);
t_gen_raise_exception(EXCP_HLT);
return 2;
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 36e7911..1ee6e6b 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -864,7 +864,7 @@ static inline void cpu_x86_load_seg_cache_sipi(X86CPU *cpu,
sipi_vector << 12,
env->segs[R_CS].limit,
env->segs[R_CS].flags);
- env->halted = 0;
+ CPU(cpu)->halted = 0;
}
int cpu_x86_get_descr_debug(CPUX86State *env, unsigned int selector,
@@ -1039,9 +1039,9 @@ static inline bool cpu_has_work(CPUState *cpu)
{
CPUX86State *env = &X86_CPU(cpu)->env;
- return ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ return ((cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) ||
- (env->interrupt_request & (CPU_INTERRUPT_NMI |
+ (cpu->interrupt_request & (CPU_INTERRUPT_NMI |
CPU_INTERRUPT_INIT |
CPU_INTERRUPT_SIPI |
CPU_INTERRUPT_MCE));
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 2d5ca8c..9f5b3ad 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -171,6 +171,7 @@ done:
void cpu_dump_state(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int eflags, i, nb;
char cc_op_name[32];
static const char *seg_name[6] = { "ES", "CS", "SS", "DS", "FS", "GS" };
@@ -214,7 +215,7 @@ void cpu_dump_state(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf,
(env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1,
(env->a20_mask >> 20) & 1,
(env->hflags >> HF_SMM_SHIFT) & 1,
- env->halted);
+ cpu->halted);
} else
#endif
{
@@ -241,7 +242,7 @@ void cpu_dump_state(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf,
(env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1,
(env->a20_mask >> 20) & 1,
(env->hflags >> HF_SMM_SHIFT) & 1,
- env->halted);
+ cpu->halted);
}
for(i = 0; i < 6; i++) {
@@ -1185,14 +1186,15 @@ X86CPU *cpu_x86_init(const char *cpu_model)
void do_cpu_init(X86CPU *cpu)
{
CPUX86State *env = &cpu->env;
- int sipi = env->interrupt_request & CPU_INTERRUPT_SIPI;
+ CPUState *c = CPU(cpu);
+ int sipi = c->interrupt_request & CPU_INTERRUPT_SIPI;
uint64_t pat = env->pat;
- cpu_reset(CPU(cpu));
- env->interrupt_request = sipi;
+ cpu_reset(c);
+ c->interrupt_request = sipi;
env->pat = pat;
apic_init_reset(env->apic_state);
- env->halted = !cpu_is_bsp(cpu);
+ c->halted = !cpu_is_bsp(cpu);
}
void do_cpu_sipi(X86CPU *cpu)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index f7651bf..088daca 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1354,7 +1354,7 @@ static int kvm_get_mp_state(X86CPU *cpu)
}
env->mp_state = mp_state.mp_state;
if (kvm_irqchip_in_kernel()) {
- env->halted = (mp_state.mp_state == KVM_MP_STATE_HALTED);
+ CPU(cpu)->halted = (mp_state.mp_state == KVM_MP_STATE_HALTED);
}
return 0;
}
@@ -1634,11 +1634,12 @@ int kvm_arch_get_registers(CPUX86State *env)
void kvm_arch_pre_run(CPUX86State *env, struct kvm_run *run)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int ret;
/* Inject NMI */
- if (env->interrupt_request & CPU_INTERRUPT_NMI) {
- env->interrupt_request &= ~CPU_INTERRUPT_NMI;
+ if (cpu->interrupt_request & CPU_INTERRUPT_NMI) {
+ cpu->interrupt_request &= ~CPU_INTERRUPT_NMI;
DPRINTF("injected NMI\n");
ret = kvm_vcpu_ioctl(env, KVM_NMI);
if (ret < 0) {
@@ -1650,18 +1651,18 @@ void kvm_arch_pre_run(CPUX86State *env, struct kvm_run *run)
if (!kvm_irqchip_in_kernel()) {
/* Force the VCPU out of its inner loop to process any INIT requests
* or pending TPR access reports. */
- if (env->interrupt_request &
+ if (cpu->interrupt_request &
(CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) {
env->exit_request = 1;
}
/* Try to inject an interrupt if the guest can accept it */
if (run->ready_for_interrupt_injection &&
- (env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) {
int irq;
- env->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;
irq = cpu_get_pic_interrupt(env);
if (irq >= 0) {
struct kvm_interrupt intr;
@@ -1681,7 +1682,7 @@ void kvm_arch_pre_run(CPUX86State *env, struct kvm_run *run)
* interrupt, request an interrupt window exit. This will
* cause a return to userspace as soon as the guest is ready to
* receive interrupts. */
- if ((env->interrupt_request & CPU_INTERRUPT_HARD)) {
+ if ((cpu->interrupt_request & CPU_INTERRUPT_HARD)) {
run->request_interrupt_window = 1;
} else {
run->request_interrupt_window = 0;
@@ -1706,12 +1707,13 @@ void kvm_arch_post_run(CPUX86State *env, struct kvm_run *run)
int kvm_arch_process_async_events(CPUX86State *env)
{
X86CPU *cpu = x86_env_get_cpu(env);
+ CPUState *c = CPU(cpu);
- if (env->interrupt_request & CPU_INTERRUPT_MCE) {
+ if (c->interrupt_request & CPU_INTERRUPT_MCE) {
/* We must not raise CPU_INTERRUPT_MCE if it's not supported. */
assert(env->mcg_cap);
- env->interrupt_request &= ~CPU_INTERRUPT_MCE;
+ c->interrupt_request &= ~CPU_INTERRUPT_MCE;
kvm_cpu_synchronize_state(env);
@@ -1724,7 +1726,7 @@ int kvm_arch_process_async_events(CPUX86State *env)
env->exception_injected = EXCP12_MCHK;
env->has_error_code = 0;
- env->halted = 0;
+ c->halted = 0;
if (kvm_irqchip_in_kernel() && env->mp_state == KVM_MP_STATE_HALTED) {
env->mp_state = KVM_MP_STATE_RUNNABLE;
}
@@ -1734,37 +1736,38 @@ int kvm_arch_process_async_events(CPUX86State *env)
return 0;
}
- if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ if (((c->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) ||
- (env->interrupt_request & CPU_INTERRUPT_NMI)) {
- env->halted = 0;
+ (c->interrupt_request & CPU_INTERRUPT_NMI)) {
+ c->halted = 0;
}
- if (env->interrupt_request & CPU_INTERRUPT_INIT) {
+ if (c->interrupt_request & CPU_INTERRUPT_INIT) {
kvm_cpu_synchronize_state(env);
do_cpu_init(cpu);
}
- if (env->interrupt_request & CPU_INTERRUPT_SIPI) {
+ if (c->interrupt_request & CPU_INTERRUPT_SIPI) {
kvm_cpu_synchronize_state(env);
do_cpu_sipi(cpu);
}
- if (env->interrupt_request & CPU_INTERRUPT_TPR) {
- env->interrupt_request &= ~CPU_INTERRUPT_TPR;
+ if (c->interrupt_request & CPU_INTERRUPT_TPR) {
+ c->interrupt_request &= ~CPU_INTERRUPT_TPR;
kvm_cpu_synchronize_state(env);
apic_handle_tpr_access_report(env->apic_state, env->eip,
env->tpr_access_type);
}
- return env->halted;
+ return c->halted;
}
-static int kvm_handle_halt(X86CPU *cpu)
+static int kvm_handle_halt(X86CPU *c)
{
- CPUX86State *env = &cpu->env;
+ CPUState *cpu = CPU(c);
+ CPUX86State *env = &c->env;
- if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ if (!((cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) &&
- !(env->interrupt_request & CPU_INTERRUPT_NMI)) {
- env->halted = 1;
+ !(cpu->interrupt_request & CPU_INTERRUPT_NMI)) {
+ cpu->halted = 1;
return EXCP_HLT;
}
diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c
index bc3b94e..6da14b9 100644
--- a/target-i386/op_helper.c
+++ b/target-i386/op_helper.c
@@ -4863,8 +4863,10 @@ void helper_idivq_EAX(target_ulong t0)
static void do_hlt(void)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
- env->halted = 1;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
cpu_loop_exit(env);
}
@@ -5109,6 +5111,7 @@ static inline void svm_load_seg_cache(target_phys_addr_t addr,
void helper_vmrun(int aflag, int next_eip_addend)
{
+ CPUState *cpu = ENV_GET_CPU(env);
target_ulong addr;
uint32_t event_inj;
uint32_t int_ctl;
@@ -5229,7 +5232,7 @@ void helper_vmrun(int aflag, int next_eip_addend)
env->hflags2 |= HF2_GIF_MASK;
if (int_ctl & V_IRQ_MASK) {
- env->interrupt_request |= CPU_INTERRUPT_VIRQ;
+ cpu->interrupt_request |= CPU_INTERRUPT_VIRQ;
}
/* maybe we need to inject an event */
@@ -5487,6 +5490,7 @@ void helper_svm_check_io(uint32_t port, uint32_t param,
/* Note: currently only 32 bits of exit_code are used */
void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
{
+ CPUState *cpu = ENV_GET_CPU(env);
uint32_t int_ctl;
qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016" PRIx64 ", " TARGET_FMT_lx ")!\n",
@@ -5526,8 +5530,9 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
int_ctl = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl));
int_ctl &= ~(V_TPR_MASK | V_IRQ_MASK);
int_ctl |= env->v_tpr & V_TPR_MASK;
- if (env->interrupt_request & CPU_INTERRUPT_VIRQ)
+ if (cpu->interrupt_request & CPU_INTERRUPT_VIRQ) {
int_ctl |= V_IRQ_MASK;
+ }
stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl), int_ctl);
stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rflags), compute_eflags());
@@ -5543,7 +5548,7 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
env->hflags &= ~HF_SVMI_MASK;
env->intercept = 0;
env->intercept_exceptions = 0;
- env->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
env->tsc_offset = 0;
env->gdt.base = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.base));
diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index 7243b4f..559890b 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -255,9 +255,7 @@ static inline void cpu_get_tb_cpu_state(CPULM32State *env, target_ulong *pc,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPULM32State *env = &LM32_CPU(cpu)->env;
-
- return env->interrupt_request & CPU_INTERRUPT_HARD;
+ return cpu->interrupt_request & CPU_INTERRUPT_HARD;
}
#include "exec-all.h"
diff --git a/target-lm32/op_helper.c b/target-lm32/op_helper.c
index 51edc1a..7f49c2b 100644
--- a/target-lm32/op_helper.c
+++ b/target-lm32/op_helper.c
@@ -26,7 +26,9 @@ void helper_raise_exception(uint32_t index)
void helper_hlt(void)
{
- env->halted = 1;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
cpu_loop_exit(env);
}
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 780e2c9..d334352 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -259,9 +259,7 @@ static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUM68KState *env = &M68K_CPU(cpu)->env;
-
- return env->interrupt_request & CPU_INTERRUPT_HARD;
+ return cpu->interrupt_request & CPU_INTERRUPT_HARD;
}
#include "exec-all.h"
diff --git a/target-m68k/op_helper.c b/target-m68k/op_helper.c
index 1971a57..4413b3a 100644
--- a/target-m68k/op_helper.c
+++ b/target-m68k/op_helper.c
@@ -96,6 +96,7 @@ static void do_rte(void)
static void do_interrupt_all(int is_hw)
{
+ CPUState *cpu = ENV_GET_CPU(env);
uint32_t sp;
uint32_t fmt;
uint32_t retaddr;
@@ -120,7 +121,7 @@ static void do_interrupt_all(int is_hw)
do_m68k_semihosting(env, env->dregs[0]);
return;
}
- env->halted = 1;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
cpu_loop_exit(env);
return;
diff --git a/target-m68k/qregs.def b/target-m68k/qregs.def
index 49400c4..4235b02 100644
--- a/target-m68k/qregs.def
+++ b/target-m68k/qregs.def
@@ -8,6 +8,5 @@ DEFO32(CC_X, cc_x)
DEFO32(DIV1, div1)
DEFO32(DIV2, div2)
DEFO32(EXCEPTION, exception_index)
-DEFO32(HALTED, halted)
DEFO32(MACSR, macsr)
DEFO32(MAC_MASK, mac_mask)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 9fc1e31..fef0c79 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -42,6 +42,8 @@
#undef DEFO64
#undef DEFF64
+static TCGv QREG_HALTED;
+
static TCGv_ptr cpu_env;
static char cpu_reg_names[3*8*3 + 5*4];
@@ -76,6 +78,10 @@ void m68k_tcg_init(void)
#undef DEFO64
#undef DEFF64
+ QREG_HALTED = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, halted)
+ - offsetof(M68kCPU, env),
+ "HALTED");
+
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
p = cpu_reg_names;
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 6131287..e17a0db 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -371,9 +371,7 @@ void cpu_unassigned_access(CPUMBState *env1, target_phys_addr_t addr,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUMBState *env = &MICROBLAZE_CPU(cpu)->env;
-
- return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
+ return cpu->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
}
#include "exec-all.h"
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 9ce53da..9ac5733 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -714,7 +714,7 @@ static inline bool cpu_has_work(CPUState *cpu)
/* It is implementation dependent if non-enabled interrupts
wake-up the CPU, however most of the implementations only
check for interrupts that can be taken. */
- if ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ if ((cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
cpu_mips_hw_interrupts_pending(env)) {
has_work = true;
}
@@ -723,7 +723,7 @@ static inline bool cpu_has_work(CPUState *cpu)
if (env->CP0_Config3 & (1 << CP0C3_MT)) {
/* The QEMU model will issue an _WAKE request whenever the CPUs
should be woken up. */
- if (env->interrupt_request & CPU_INTERRUPT_WAKE) {
+ if (cpu->interrupt_request & CPU_INTERRUPT_WAKE) {
has_work = true;
}
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index d26c9fb..fd4125e 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -746,10 +746,11 @@ void helper_sdm (target_ulong addr, target_ulong reglist, uint32_t mem_idx)
static bool mips_vpe_is_wfi(MIPSCPU *c)
{
CPUMIPSState *env = &c->env;
+ CPUState *cpu = CPU(c);
/* If the VPE is halted but otherwise active, it means it's waiting for
an interrupt. */
- return env->halted && mips_vpe_active(env);
+ return cpu->halted && mips_vpe_active(env);
}
static inline void mips_vpe_wake(CPUMIPSState *c)
@@ -766,7 +767,7 @@ static inline void mips_vpe_sleep(MIPSCPU *cpu)
/* The VPE was shut off, really go to bed.
Reset any old _WAKE requests. */
- c->halted = 1;
+ CPU(cpu)->halted = 1;
cpu_reset_interrupt(c, CPU_INTERRUPT_WAKE);
}
@@ -2286,9 +2287,11 @@ void helper_pmon (int function)
}
}
-void helper_wait (void)
+void helper_wait(void)
{
- env->halted = 1;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->halted = 1;
cpu_reset_interrupt(env, CPU_INTERRUPT_WAKE);
helper_raise_exception(EXCP_HLT);
}
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 4e15ee3..793f72b 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12716,6 +12716,10 @@ MIPSCPU *cpu_mips_init(const char *cpu_model)
void cpu_state_reset(CPUMIPSState *env)
{
+#ifndef CONFIG_USER_ONLY
+ CPUState *cpu = ENV_GET_CPU(env);
+#endif
+
if (qemu_loglevel_mask(CPU_LOG_RESET)) {
qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
log_cpu_state(env, 0);
@@ -12817,7 +12821,7 @@ void cpu_state_reset(CPUMIPSState *env)
env->tcs[i].CP0_TCHalt = 1;
}
env->active_tc.CP0_TCHalt = 1;
- env->halted = 1;
+ cpu->halted = 1;
if (!env->cpu_index) {
/* VPE0 starts up enabled. */
@@ -12825,7 +12829,7 @@ void cpu_state_reset(CPUMIPSState *env)
env->CP0_VPEConf0 |= (1 << CP0VPEC0_MVP) | (1 << CP0VPEC0_VPA);
/* TC0 starts up unhalted. */
- env->halted = 0;
+ cpu->halted = 0;
env->active_tc.CP0_TCHalt = 0;
env->tcs[0].CP0_TCHalt = 0;
/* With thread 0 active. */
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index f1927d5..935c347 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -2188,7 +2188,7 @@ static inline bool cpu_has_work(CPUState *cpu)
{
CPUPPCState *env = &POWERPC_CPU(cpu)->env;
- return msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD);
+ return msr_ee && (cpu->interrupt_request & CPU_INTERRUPT_HARD);
}
#include "exec-all.h"
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 7747674..8059654 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -2573,8 +2573,8 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
fprintf(stderr, "Machine check while not allowed. "
"Entering checkstop state\n");
}
- env->halted = 1;
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ CPU(cpu)->halted = 1;
+ CPU(cpu)->interrupt_request |= CPU_INTERRUPT_EXITTB;
}
if (0) {
/* XXX: find a suitable condition to enable the hypervisor mode */
diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h
index 3c98850..02a7f79 100644
--- a/target-ppc/helper_regs.h
+++ b/target-ppc/helper_regs.h
@@ -67,6 +67,9 @@ static inline void hreg_compute_hflags(CPUPPCState *env)
static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
int alter_hv)
{
+#if !defined(CONFIG_USER_ONLY)
+ CPUState *cpu = ENV_GET_CPU(env);
+#endif
int excp;
excp = 0;
@@ -82,7 +85,7 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
/* Flush all tlb when changing translation mode */
tlb_flush(env, 1);
excp = POWERPC_EXCP_NONE;
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ cpu->interrupt_request |= CPU_INTERRUPT_EXITTB;
}
if (unlikely((env->flags & POWERPC_FLAG_TGPR) &&
((value ^ env->msr) & (1 << MSR_TGPR)))) {
@@ -99,7 +102,7 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
#if !defined (CONFIG_USER_ONLY)
if (unlikely(msr_pow == 1)) {
if ((*env->check_pow)(env)) {
- env->halted = 1;
+ cpu->halted = 1;
excp = EXCP_HALTED;
}
}
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 148c095..126a018 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -471,6 +471,7 @@ int kvmppc_set_interrupt(CPUPPCState *env, int irq, int level)
void kvm_arch_pre_run(CPUPPCState *env, struct kvm_run *run)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int r;
unsigned irq;
@@ -478,7 +479,7 @@ void kvm_arch_pre_run(CPUPPCState *env, struct kvm_run *run)
* interrupt, reset, etc) in PPC-specific env->irq_input_state. */
if (!cap_interrupt_level &&
run->ready_for_interrupt_injection &&
- (env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->irq_input_state & (1<<PPC_INPUT_INT)))
{
/* For now KVM disregards the 'irq' argument. However, in the
@@ -508,13 +509,17 @@ void kvm_arch_post_run(CPUPPCState *env, struct kvm_run *run)
int kvm_arch_process_async_events(CPUPPCState *env)
{
- return env->halted;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ return cpu->halted;
}
static int kvmppc_handle_halt(CPUPPCState *env)
{
- if (!(env->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
- env->halted = 1;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ if (!(cpu->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
}
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index 4ef2332..0f8d3f0 100644
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -1594,9 +1594,11 @@ void helper_fcmpo (uint64_t arg1, uint64_t arg2, uint32_t crfD)
#if !defined (CONFIG_USER_ONLY)
void helper_store_msr (target_ulong val)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
val = hreg_store_msr(env, val, 0);
if (val != 0) {
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ cpu->interrupt_request |= CPU_INTERRUPT_EXITTB;
helper_raise_exception(val);
}
}
@@ -1604,6 +1606,8 @@ void helper_store_msr (target_ulong val)
static inline void do_rfi(target_ulong nip, target_ulong msr,
target_ulong msrm, int keep_msrh)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
#if defined(TARGET_PPC64)
if (msr & (1ULL << MSR_SF)) {
nip = (uint64_t)nip;
@@ -1627,7 +1631,7 @@ static inline void do_rfi(target_ulong nip, target_ulong msr,
/* No need to raise an exception here,
* as rfi is always the last insn of a TB
*/
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ cpu->interrupt_request |= CPU_INTERRUPT_EXITTB;
}
void helper_rfi (void)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index cf59765..57b63ac 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -3213,7 +3213,8 @@ static void gen_sync(DisasContext *ctx)
static void gen_wait(DisasContext *ctx)
{
TCGv_i32 t0 = tcg_temp_new_i32();
- tcg_gen_st_i32(t0, cpu_env, offsetof(CPUPPCState, halted));
+ tcg_gen_st_i32(t0, cpu_env, offsetof(CPUState, halted)
+ - offsetof(PowerPCCPU, env));
tcg_temp_free_i32(t0);
/* Stop translation, as the CPU is supposed to sleep from now */
gen_exception_err(ctx, EXCP_HLT, 1);
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index be13348..ecda9e6 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -989,7 +989,7 @@ static inline bool cpu_has_work(CPUState *cpu)
{
CPUS390XState *env = &S390_CPU(cpu)->env;
- return (env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ return (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->psw.mask & PSW_MASK_EXT);
}
diff --git a/target-s390x/helper.c b/target-s390x/helper.c
index d0a1180..7bf9554 100644
--- a/target-s390x/helper.c
+++ b/target-s390x/helper.c
@@ -438,6 +438,8 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUS390XState *env, target_ulong vadd
void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
if (mask & PSW_MASK_WAIT) {
if (!(mask & (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK))) {
if (s390_del_running_cpu(env) == 0) {
@@ -446,7 +448,7 @@ void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr)
#endif
}
}
- env->halted = 1;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
}
@@ -571,8 +573,10 @@ static void do_ext_interrupt(CPUS390XState *env)
load_psw(env, mask, addr);
}
-void do_interrupt (CPUS390XState *env)
+void do_interrupt(CPUS390XState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
qemu_log("%s: %d at pc=%" PRIx64 "\n", __FUNCTION__, env->exception_index,
env->psw.addr);
@@ -610,7 +614,7 @@ void do_interrupt (CPUS390XState *env)
env->exception_index = -1;
if (!env->pending_int) {
- env->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;
}
}
diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
index e09709d..722511e 100644
--- a/target-s390x/kvm.c
+++ b/target-s390x/kvm.c
@@ -172,7 +172,9 @@ void kvm_arch_post_run(CPUS390XState *env, struct kvm_run *run)
int kvm_arch_process_async_events(CPUS390XState *env)
{
- return env->halted;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ return cpu->halted;
}
void kvm_s390_interrupt_internal(CPUS390XState *env, int type, uint32_t parm,
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index fd6fb86..ba66479 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -373,9 +373,7 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUSH4State *env = &SUPERH_CPU(cpu)->env;
-
- return env->interrupt_request & CPU_INTERRUPT_HARD;
+ return cpu->interrupt_request & CPU_INTERRUPT_HARD;
}
#include "exec-all.h"
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index 5c57380..fe3063d 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -78,9 +78,10 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr)
#define MMU_DADDR_ERROR_READ (-12)
#define MMU_DADDR_ERROR_WRITE (-13)
-void do_interrupt(CPUSH4State * env)
+void do_interrupt(CPUSH4State *env)
{
- int do_irq = env->interrupt_request & CPU_INTERRUPT_HARD;
+ CPUState *cpu = ENV_GET_CPU(env);
+ int do_irq = cpu->interrupt_request & CPU_INTERRUPT_HARD;
int do_exp, irq_vector = env->exception_index;
/* prioritize exceptions over interrupts */
diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c
index 4054791..4226671 100644
--- a/target-sh4/op_helper.c
+++ b/target-sh4/op_helper.c
@@ -117,7 +117,9 @@ void helper_debug(void)
void helper_sleep(uint32_t next_pc)
{
- env->halted = 1;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->halted = 1;
env->in_sleep = 1;
env->exception_index = EXCP_HLT;
env->pc = next_pc;
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index e3b3b44..31cd9f6 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -767,7 +767,7 @@ static inline bool cpu_has_work(CPUState *cpu)
{
CPUSPARCState *env1 = &SPARC_CPU(cpu)->env;
- return (env1->interrupt_request & CPU_INTERRUPT_HARD) &&
+ return (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
cpu_interrupts_enabled(env1);
}
diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index 2843a97..48431cd 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -185,9 +185,7 @@ void switch_mode(CPUUniCore32State *, int);
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUUniCore32State *env = &UNICORE32_CPU(cpu)->env;
-
- return env->interrupt_request &
+ return cpu->interrupt_request &
(CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
}
diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c
index 364dc19..8eb02a5 100644
--- a/target-xtensa/op_helper.c
+++ b/target-xtensa/op_helper.c
@@ -390,6 +390,8 @@ void HELPER(dump_state)(void)
void HELPER(waiti)(uint32_t pc, uint32_t intlevel)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
env->pc = pc;
env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) |
(intlevel << PS_INTLEVEL_SHIFT);
@@ -400,7 +402,7 @@ void HELPER(waiti)(uint32_t pc, uint32_t intlevel)
}
env->halt_clock = qemu_get_clock_ns(vm_clock);
- env->halted = 1;
+ cpu->halted = 1;
if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT)) {
xtensa_rearm_ccompare_timer(env);
}
diff --git a/xen-all.c b/xen-all.c
index bdf9c0f..33ebb72 100644
--- a/xen-all.c
+++ b/xen-all.c
@@ -590,9 +590,9 @@ static MemoryListener xen_memory_listener = {
static void xen_reset_vcpu(void *opaque)
{
- CPUArchState *env = opaque;
+ CPUState *cpu = opaque;
- env->halted = 1;
+ cpu->halted = 1;
}
void xen_vcpu_init(void)
@@ -600,8 +600,10 @@ void xen_vcpu_init(void)
CPUArchState *first_cpu;
if ((first_cpu = qemu_get_cpu(0))) {
- qemu_register_reset(xen_reset_vcpu, first_cpu);
- xen_reset_vcpu(first_cpu);
+ CPUState *cpu = ENV_GET_CPU(first_cpu);
+
+ qemu_register_reset(xen_reset_vcpu, cpu);
+ xen_reset_vcpu(cpu);
}
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [Qemu-devel] [PATCH qom-next 59/59] cpu: Move halted and interrupt_request to CPUState
@ 2012-05-23 3:08 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Anthony Liguori, open list:X86, open list:Overall,
Stefano Stabellini, Paul Brook, Marcelo Tosatti, Alexander Graf,
Blue Swirl, Max Filippov, Michael Walle, open list:PowerPC,
Avi Kivity, Edgar E. Iglesias, Guan Xuetao, Andreas Färber,
Aurelien Jarno, Richard Henderson
For target-cris use i32 for halted instead of tl. This effectively makes
no difference since it is 32-bit.
For Xen pass CPUState to xen_reset_vcpu().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-defs.h | 2 -
cpu-exec.c | 32 +++++++++++++++-------------
cpus.c | 4 +-
exec.c | 34 ++++++++++++++++++++-----------
gdbstub.c | 4 ++-
hw/leon3.c | 2 +-
hw/omap1.c | 4 +-
hw/pc.c | 6 ++--
hw/ppc.c | 10 ++++----
hw/ppce500_mpc8544ds.c | 4 +-
hw/ppce500_spin.c | 2 +-
hw/pxa2xx_gpio.c | 3 +-
hw/pxa2xx_pic.c | 2 +-
hw/s390-virtio.c | 14 ++++++++----
hw/spapr.c | 4 +-
hw/spapr_hcall.c | 2 +-
hw/spapr_rtas.c | 8 ++++--
hw/sun4m.c | 18 +++++++---------
hw/sun4u.c | 9 ++++---
hw/xen_machine_pv.c | 4 +--
hw/xtensa_pic.c | 5 ++-
include/qemu/cpu.h | 4 +++
kvm-all.c | 2 +-
qom/cpu.c | 2 +
target-alpha/cpu.h | 4 +--
target-alpha/translate.c | 3 +-
target-arm/cpu.h | 4 +--
target-arm/helper.c | 3 +-
target-arm/op_helper.c | 4 ++-
target-cris/cpu.h | 4 +--
target-cris/translate.c | 4 ++-
target-i386/cpu.h | 6 ++--
target-i386/helper.c | 14 +++++++-----
target-i386/kvm.c | 49 +++++++++++++++++++++++---------------------
target-i386/op_helper.c | 13 ++++++++---
target-lm32/cpu.h | 4 +--
target-lm32/op_helper.c | 4 ++-
target-m68k/cpu.h | 4 +--
target-m68k/op_helper.c | 3 +-
target-m68k/qregs.def | 1 -
target-m68k/translate.c | 6 +++++
target-microblaze/cpu.h | 4 +--
target-mips/cpu.h | 4 +-
target-mips/op_helper.c | 11 ++++++---
target-mips/translate.c | 8 +++++-
target-ppc/cpu.h | 2 +-
target-ppc/helper.c | 4 +-
target-ppc/helper_regs.h | 7 ++++-
target-ppc/kvm.c | 13 ++++++++---
target-ppc/op_helper.c | 8 +++++-
target-ppc/translate.c | 3 +-
target-s390x/cpu.h | 2 +-
target-s390x/helper.c | 10 ++++++--
target-s390x/kvm.c | 4 ++-
target-sh4/cpu.h | 4 +--
target-sh4/helper.c | 5 ++-
target-sh4/op_helper.c | 4 ++-
target-sparc/cpu.h | 2 +-
target-unicore32/cpu.h | 4 +--
target-xtensa/op_helper.c | 4 ++-
xen-all.c | 10 +++++---
61 files changed, 244 insertions(+), 180 deletions(-)
diff --git a/cpu-defs.h b/cpu-defs.h
index d846674..bc851fd 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -162,8 +162,6 @@ typedef struct CPUWatchpoint {
accessed */ \
target_ulong mem_io_vaddr; /* target virtual addr at which the \
memory was accessed */ \
- uint32_t halted; /* Nonzero if the CPU is in suspend state */ \
- uint32_t interrupt_request; \
volatile sig_atomic_t exit_request; \
CPU_COMMON_TLB \
struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \
diff --git a/cpu-exec.c b/cpu-exec.c
index da0c17a..5674bac 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -190,12 +190,12 @@ int cpu_exec(CPUArchState *env)
uint8_t *tc_ptr;
tcg_target_ulong next_tb;
- if (env->halted) {
+ if (cpu->halted) {
if (!cpu_has_work(cpu)) {
return EXCP_HALTED;
}
- env->halted = 0;
+ cpu->halted = 0;
}
cpu_single_env = env;
@@ -264,14 +264,14 @@ int cpu_exec(CPUArchState *env)
next_tb = 0; /* force lookup of first TB */
for(;;) {
- interrupt_request = env->interrupt_request;
+ interrupt_request = cpu->interrupt_request;
if (unlikely(interrupt_request)) {
if (unlikely(env->singlestep_enabled & SSTEP_NOIRQ)) {
/* Mask out external interrupts for this step. */
interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
}
if (interrupt_request & CPU_INTERRUPT_DEBUG) {
- env->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
env->exception_index = EXCP_DEBUG;
cpu_loop_exit(env);
}
@@ -279,8 +279,8 @@ int cpu_exec(CPUArchState *env)
defined(TARGET_PPC) || defined(TARGET_ALPHA) || defined(TARGET_CRIS) || \
defined(TARGET_MICROBLAZE) || defined(TARGET_LM32) || defined(TARGET_UNICORE32)
if (interrupt_request & CPU_INTERRUPT_HALT) {
- env->interrupt_request &= ~CPU_INTERRUPT_HALT;
- env->halted = 1;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
cpu_loop_exit(env);
}
@@ -297,17 +297,17 @@ int cpu_exec(CPUArchState *env)
if ((interrupt_request & CPU_INTERRUPT_SMI) &&
!(env->hflags & HF_SMM_MASK)) {
svm_check_intercept(env, SVM_EXIT_SMI);
- env->interrupt_request &= ~CPU_INTERRUPT_SMI;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_SMI;
do_smm_enter(env);
next_tb = 0;
} else if ((interrupt_request & CPU_INTERRUPT_NMI) &&
!(env->hflags2 & HF2_NMI_MASK)) {
- env->interrupt_request &= ~CPU_INTERRUPT_NMI;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_NMI;
env->hflags2 |= HF2_NMI_MASK;
do_interrupt_x86_hardirq(env, EXCP02_NMI, 1);
next_tb = 0;
} else if (interrupt_request & CPU_INTERRUPT_MCE) {
- env->interrupt_request &= ~CPU_INTERRUPT_MCE;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_MCE;
do_interrupt_x86_hardirq(env, EXCP12_MCHK, 0);
next_tb = 0;
} else if ((interrupt_request & CPU_INTERRUPT_HARD) &&
@@ -318,7 +318,8 @@ int cpu_exec(CPUArchState *env)
!(env->hflags & HF_INHIBIT_IRQ_MASK))))) {
int intno;
svm_check_intercept(env, SVM_EXIT_INTR);
- env->interrupt_request &= ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIRQ);
+ cpu->interrupt_request &= ~(CPU_INTERRUPT_HARD |
+ CPU_INTERRUPT_VIRQ);
intno = cpu_get_pic_interrupt(env);
qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=0x%02x\n", intno);
do_interrupt_x86_hardirq(env, intno, 1);
@@ -335,7 +336,7 @@ int cpu_exec(CPUArchState *env)
intno = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_vector));
qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing virtual hardware INT=0x%02x\n", intno);
do_interrupt_x86_hardirq(env, intno, 1);
- env->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
next_tb = 0;
#endif
}
@@ -346,8 +347,9 @@ int cpu_exec(CPUArchState *env)
}
if (interrupt_request & CPU_INTERRUPT_HARD) {
ppc_hw_interrupt(env);
- if (env->pending_interrupts == 0)
- env->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ if (env->pending_interrupts == 0) {
+ cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ }
next_tb = 0;
}
#elif defined(TARGET_LM32)
@@ -499,8 +501,8 @@ int cpu_exec(CPUArchState *env)
#endif
/* Don't use the cached interrupt_request value,
do_interrupt may have updated the EXITTB flag. */
- if (env->interrupt_request & CPU_INTERRUPT_EXITTB) {
- env->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
+ if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
+ cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
/* ensure that no TB jump will be modified as
the program flow was changed */
next_tb = 0;
diff --git a/cpus.c b/cpus.c
index a403629..227ef2f 100644
--- a/cpus.c
+++ b/cpus.c
@@ -443,7 +443,7 @@ static bool cpu_thread_is_idle(CPUArchState *env)
if (cpu->stopped || !runstate_is_running()) {
return true;
}
- if (!env->halted || qemu_cpu_has_work(cpu) || kvm_irqchip_in_kernel()) {
+ if (!cpu->halted || qemu_cpu_has_work(cpu) || kvm_irqchip_in_kernel()) {
return false;
}
return true;
@@ -1214,7 +1214,7 @@ CpuInfoList *qmp_query_cpus(Error **errp)
info->value = g_malloc0(sizeof(*info->value));
info->value->CPU = env->cpu_index;
info->value->current = (env == first_cpu);
- info->value->halted = env->halted;
+ info->value->halted = cpu->halted;
info->value->thread_id = cpu->thread_id;
#if defined(TARGET_I386)
info->value->has_pc = true;
diff --git a/exec.c b/exec.c
index 8d2fa7a..f62e643 100644
--- a/exec.c
+++ b/exec.c
@@ -654,12 +654,12 @@ void cpu_exec_init_all(void)
static int cpu_common_post_load(void *opaque, int version_id)
{
- CPUArchState *env = opaque;
+ CPUState *cpu = opaque;
/* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
version_id is increased. */
- env->interrupt_request &= ~0x01;
- tlb_flush(env, 1);
+ cpu->interrupt_request &= ~0x01;
+ cpu_tlb_flush(cpu, true);
return 0;
}
@@ -671,8 +671,8 @@ static const VMStateDescription vmstate_cpu_common = {
.minimum_version_id_old = 1,
.post_load = cpu_common_post_load,
.fields = (VMStateField []) {
- VMSTATE_UINT32(halted, CPUArchState),
- VMSTATE_UINT32(interrupt_request, CPUArchState),
+ VMSTATE_UINT32(halted, CPUState),
+ VMSTATE_UINT32(interrupt_request, CPUState),
VMSTATE_END_OF_LIST()
}
};
@@ -721,7 +721,7 @@ void cpu_exec_init(CPUArchState *env)
cpu_list_unlock();
#endif
#if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)
- vmstate_register(NULL, cpu_index, &vmstate_cpu_common, env);
+ vmstate_register(NULL, cpu_index, &vmstate_cpu_common, ENV_GET_CPU(env));
register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION,
cpu_save, cpu_load, env);
#endif
@@ -1104,6 +1104,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
int is_cpu_write_access)
{
TranslationBlock *tb, *tb_next, *saved_tb;
+ CPUState *cpu = NULL;
CPUArchState *env = cpu_single_env;
tb_page_addr_t tb_start, tb_end;
PageDesc *p;
@@ -1117,6 +1118,10 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
int current_flags = 0;
#endif /* TARGET_HAS_PRECISE_SMC */
+ if (env != NULL) {
+ cpu = ENV_GET_CPU(env);
+ }
+
p = page_find(start >> TARGET_PAGE_BITS);
if (!p)
return;
@@ -1178,8 +1183,9 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
tb_phys_invalidate(tb, -1);
if (env) {
env->current_tb = saved_tb;
- if (env->interrupt_request && env->current_tb)
- cpu_interrupt(env, env->interrupt_request);
+ if (cpu->interrupt_request && env->current_tb) {
+ cpu_interrupt(env, cpu->interrupt_request);
+ }
}
}
tb = tb_next;
@@ -1740,8 +1746,8 @@ static void tcg_handle_interrupt(CPUArchState *env, int mask)
CPUState *cpu = ENV_GET_CPU(env);
int old_mask;
- old_mask = env->interrupt_request;
- env->interrupt_request |= mask;
+ old_mask = cpu->interrupt_request;
+ cpu->interrupt_request |= mask;
/*
* If called from iothread context, wake the target cpu in
@@ -1769,14 +1775,18 @@ CPUInterruptHandler cpu_interrupt_handler = tcg_handle_interrupt;
void cpu_interrupt(CPUArchState *env, int mask)
{
- env->interrupt_request |= mask;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->interrupt_request |= mask;
cpu_unlink_tb(env);
}
#endif /* CONFIG_USER_ONLY */
void cpu_reset_interrupt(CPUArchState *env, int mask)
{
- env->interrupt_request &= ~mask;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->interrupt_request &= ~mask;
}
void cpu_exit(CPUArchState *env)
diff --git a/gdbstub.c b/gdbstub.c
index 6a77a66..47cbfdd 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -2284,10 +2284,12 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
thread = strtoull(p+16, (char **)&p, 16);
env = find_cpu(thread);
if (env != NULL) {
+ CPUState *cpu = ENV_GET_CPU(env);
+
cpu_synchronize_state(env);
len = snprintf((char *)mem_buf, sizeof(mem_buf),
"CPU#%d [%s]", env->cpu_index,
- env->halted ? "halted " : "running");
+ cpu->halted ? "halted " : "running");
memtohex(buf, mem_buf, len);
put_packet(s, buf);
}
diff --git a/hw/leon3.c b/hw/leon3.c
index 878d3aa..8d44f83 100644
--- a/hw/leon3.c
+++ b/hw/leon3.c
@@ -53,7 +53,7 @@ static void main_cpu_reset(void *opaque)
cpu_reset(CPU(s->cpu));
- env->halted = 0;
+ CPU(s->cpu)->halted = 0;
env->pc = s->entry;
env->npc = s->entry + 4;
}
diff --git a/hw/omap1.c b/hw/omap1.c
index ad60cc4..e90aed4 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -1735,7 +1735,7 @@ static uint64_t omap_clkdsp_read(void *opaque, target_phys_addr_t addr,
case 0x18: /* DSP_SYSST */
return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start |
- (s->cpu->env.halted << 6); /* Quite useless... */
+ (CPU(s->cpu)->halted << 6); /* Quite useless... */
}
OMAP_BAD_REG(addr);
@@ -3752,7 +3752,7 @@ void omap_mpu_wakeup(void *opaque, int irq, int req)
{
struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque;
- if (mpu->cpu->env.halted) {
+ if (CPU(mpu->cpu)->halted) {
cpu_interrupt(&mpu->cpu->env, CPU_INTERRUPT_EXITTB);
}
}
diff --git a/hw/pc.c b/hw/pc.c
index f0cbfef..c8caada 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -942,10 +942,10 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
static void pc_cpu_reset(void *opaque)
{
X86CPU *cpu = opaque;
- CPUX86State *env = &cpu->env;
+ CPUState *c = CPU(cpu);
- cpu_reset(CPU(cpu));
- env->halted = !cpu_is_bsp(cpu);
+ cpu_reset(c);
+ c->halted = !cpu_is_bsp(cpu);
}
static X86CPU *pc_new_cpu(const char *cpu_model)
diff --git a/hw/ppc.c b/hw/ppc.c
index fa7ae74..02c5e3e 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -125,7 +125,7 @@ static void ppc6xx_set_irq(void *opaque, int pin, int level)
/* XXX: Note that the only way to restart the CPU is to reset it */
if (level) {
LOG_IRQ("%s: stop the CPU\n", __func__);
- env->halted = 1;
+ CPU(cpu)->halted = 1;
}
break;
case PPC6xx_INPUT_HRESET:
@@ -202,10 +202,10 @@ static void ppc970_set_irq(void *opaque, int pin, int level)
/* XXX: TODO: relay the signal to CKSTP_OUT pin */
if (level) {
LOG_IRQ("%s: stop the CPU\n", __func__);
- env->halted = 1;
+ CPU(cpu)->halted = 1;
} else {
LOG_IRQ("%s: restart the CPU\n", __func__);
- env->halted = 0;
+ CPU(cpu)->halted = 0;
qemu_cpu_kick(CPU(cpu));
}
break;
@@ -331,10 +331,10 @@ static void ppc40x_set_irq(void *opaque, int pin, int level)
/* Level sensitive - active low */
if (level) {
LOG_IRQ("%s: stop the CPU\n", __func__);
- env->halted = 1;
+ CPU(cpu)->halted = 1;
} else {
LOG_IRQ("%s: restart the CPU\n", __func__);
- env->halted = 0;
+ CPU(cpu)->halted = 0;
qemu_cpu_kick(CPU(cpu));
}
break;
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 3eb8a23..ab826de 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -203,7 +203,7 @@ static void mpc8544ds_cpu_reset_sec(void *opaque)
/* Secondary CPU starts in halted state for now. Needs to change when
implementing non-kernel boot. */
- env->halted = 1;
+ CPU(cpu)->halted = 1;
env->exception_index = EXCP_HLT;
}
@@ -216,7 +216,7 @@ static void mpc8544ds_cpu_reset(void *opaque)
cpu_reset(CPU(cpu));
/* Set initial guest state. */
- env->halted = 0;
+ CPU(cpu)->halted = 0;
env->gpr[1] = (16<<20) - 8;
env->gpr[3] = bi->dt_base;
env->nip = bi->entry;
diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c
index a4b49e6..65f0b6f 100644
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@@ -112,7 +112,7 @@ static void spin_kick(void *data)
map_start = ldq_p(&curspin->addr) & ~(map_size - 1);
mmubooke_create_initial_mapping(env, 0, map_start, map_size);
- env->halted = 0;
+ cpu->halted = 0;
env->exception_index = -1;
cpu->stopped = false;
qemu_cpu_kick(cpu);
diff --git a/hw/pxa2xx_gpio.c b/hw/pxa2xx_gpio.c
index 3c90c9c..5fcb992 100644
--- a/hw/pxa2xx_gpio.c
+++ b/hw/pxa2xx_gpio.c
@@ -118,7 +118,8 @@ static void pxa2xx_gpio_set(void *opaque, int line, int level)
pxa2xx_gpio_irq_update(s);
/* Wake-up GPIOs */
- if (s->cpu->env.halted && (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])) {
+ if (CPU(s->cpu)->halted &&
+ (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])) {
cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_EXITTB);
}
}
diff --git a/hw/pxa2xx_pic.c b/hw/pxa2xx_pic.c
index c560133..c8f01e8 100644
--- a/hw/pxa2xx_pic.c
+++ b/hw/pxa2xx_pic.c
@@ -47,7 +47,7 @@ static void pxa2xx_pic_update(void *opaque)
uint32_t mask[2];
PXA2xxPICState *s = (PXA2xxPICState *) opaque;
- if (s->cpu->env.halted) {
+ if (CPU(s->cpu)->halted) {
mask[0] = s->int_pending[0] & (s->int_enabled[0] | s->int_idle);
mask[1] = s->int_pending[1] & (s->int_enabled[1] | s->int_idle);
if (mask[0] || mask[1]) {
diff --git a/hw/s390-virtio.c b/hw/s390-virtio.c
index 47eed35..566760e 100644
--- a/hw/s390-virtio.c
+++ b/hw/s390-virtio.c
@@ -132,19 +132,23 @@ static unsigned s390_running_cpus;
void s390_add_running_cpu(CPUS390XState *env)
{
- if (env->halted) {
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ if (cpu->halted) {
s390_running_cpus++;
- env->halted = 0;
+ cpu->halted = 0;
env->exception_index = -1;
}
}
unsigned s390_del_running_cpu(CPUS390XState *env)
{
- if (env->halted == 0) {
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ if (cpu->halted == 0) {
assert(s390_running_cpus >= 1);
s390_running_cpus--;
- env->halted = 1;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
}
return s390_running_cpus;
@@ -218,7 +222,7 @@ static void s390_init(ram_addr_t my_ram_size,
env = tmp_env;
}
ipi_states[i] = cpu;
- tmp_env->halted = 1;
+ CPU(cpu)->halted = 1;
tmp_env->exception_index = EXCP_HLT;
tmp_env->storage_keys = storage_keys;
}
diff --git a/hw/spapr.c b/hw/spapr.c
index f9c3631..d553951 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -500,7 +500,7 @@ static void spapr_reset(void *opaque)
/* Set up the entry state */
first_cpu->gpr[3] = spapr->fdt_addr;
first_cpu->gpr[5] = 0;
- first_cpu->halted = 0;
+ ENV_GET_CPU(first_cpu)->halted = 0;
first_cpu->nip = spapr->entry_point;
}
@@ -732,7 +732,7 @@ static void ppc_spapr_init(ram_addr_t ram_size,
/* SLOF will startup the secondary CPUs using RTAS */
for (env = first_cpu; env != NULL; env = env->next_cpu) {
- env->halted = 1;
+ ENV_GET_CPU(env)->halted = 1;
}
/* Prepare the device tree */
diff --git a/hw/spapr_hcall.c b/hw/spapr_hcall.c
index ebb271c..7165796 100644
--- a/hw/spapr_hcall.c
+++ b/hw/spapr_hcall.c
@@ -550,7 +550,7 @@ static target_ulong h_cede(PowerPCCPU *cpu, sPAPREnvironment *spapr,
env->msr |= (1ULL << MSR_EE);
hreg_compute_hflags(env);
if (!cpu_has_work(CPU(cpu))) {
- env->halted = 1;
+ CPU(cpu)->halted = 1;
}
return H_SUCCESS;
}
diff --git a/hw/spapr_rtas.c b/hw/spapr_rtas.c
index a343055..d3c503c 100644
--- a/hw/spapr_rtas.c
+++ b/hw/spapr_rtas.c
@@ -131,6 +131,7 @@ static void rtas_query_cpu_stopped_state(sPAPREnvironment *spapr,
{
target_ulong id;
CPUPPCState *env;
+ CPUState *cpu;
if (nargs != 1 || nret != 2) {
rtas_st(rets, 0, -3);
@@ -139,11 +140,12 @@ static void rtas_query_cpu_stopped_state(sPAPREnvironment *spapr,
id = rtas_ld(args, 0);
for (env = first_cpu; env; env = env->next_cpu) {
+ cpu = ENV_GET_CPU(env);
if (env->cpu_index != id) {
continue;
}
- if (env->halted) {
+ if (cpu->halted) {
rtas_st(rets, 1, 0);
} else {
rtas_st(rets, 1, 2);
@@ -182,7 +184,7 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
continue;
}
- if (!env->halted) {
+ if (!cpu->halted) {
rtas_st(rets, 0, -1);
return;
}
@@ -190,7 +192,7 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
env->nip = start;
env->gpr[3] = r3;
- env->halted = 0;
+ cpu->halted = 0;
qemu_cpu_kick(cpu);
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 4929677..7bb0bce 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -257,7 +257,7 @@ static void cpu_kick_irq(SPARCCPU *cpu)
{
CPUSPARCState *env = &cpu->env;
- env->halted = 0;
+ CPU(cpu)->halted = 0;
cpu_check_irqs(env);
qemu_cpu_kick(CPU(cpu));
}
@@ -284,20 +284,18 @@ static void dummy_cpu_set_irq(void *opaque, int irq, int level)
static void main_cpu_reset(void *opaque)
{
- SPARCCPU *cpu = opaque;
- CPUSPARCState *env = &cpu->env;
+ CPUState *cpu = CPU(opaque);
- cpu_reset(CPU(cpu));
- env->halted = 0;
+ cpu_reset(cpu);
+ cpu->halted = 0;
}
static void secondary_cpu_reset(void *opaque)
{
- SPARCCPU *cpu = opaque;
- CPUSPARCState *env = &cpu->env;
+ CPUState *cpu = CPU(opaque);
- cpu_reset(CPU(cpu));
- env->halted = 1;
+ cpu_reset(cpu);
+ cpu->halted = 1;
}
static void cpu_halt_signal(void *opaque, int irq, int level)
@@ -829,7 +827,7 @@ static void cpu_devinit(const char *cpu_model, unsigned int id,
qemu_register_reset(main_cpu_reset, cpu);
} else {
qemu_register_reset(secondary_cpu_reset, cpu);
- env->halted = 1;
+ CPU(cpu)->halted = 1;
}
*cpu_irqs = qemu_allocate_irqs(cpu_set_irq, cpu, MAX_PILS);
env->prom_addr = prom_addr;
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 56c3ddf..affd7bc 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -253,6 +253,7 @@ static uint64_t sun4u_load_kernel(const char *kernel_filename,
void cpu_check_irqs(CPUSPARCState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
uint32_t pil = env->pil_in |
(env->softint & ~(SOFTINT_TIMER | SOFTINT_STIMER));
@@ -269,7 +270,7 @@ void cpu_check_irqs(CPUSPARCState *env)
/* The bit corresponding to psrpil is (1<< psrpil), the next bit
is (2 << psrpil). */
if (pil < (2 << env->psrpil)){
- if (env->interrupt_request & CPU_INTERRUPT_HARD) {
+ if (cpu->interrupt_request & CPU_INTERRUPT_HARD) {
CPUIRQ_DPRINTF("Reset CPU IRQ (current interrupt %x)\n",
env->interrupt_index);
env->interrupt_index = 0;
@@ -301,7 +302,7 @@ void cpu_check_irqs(CPUSPARCState *env)
break;
}
}
- } else if (env->interrupt_request & CPU_INTERRUPT_HARD) {
+ } else if (cpu->interrupt_request & CPU_INTERRUPT_HARD) {
CPUIRQ_DPRINTF("Interrupts disabled, pil=%08x pil_in=%08x softint=%08x "
"current interrupt %x\n",
pil, env->pil_in, env->softint, env->interrupt_index);
@@ -314,7 +315,7 @@ static void cpu_kick_irq(SPARCCPU *cpu)
{
CPUSPARCState *env = &cpu->env;
- env->halted = 0;
+ CPU(cpu)->halted = 0;
cpu_check_irqs(env);
qemu_cpu_kick(CPU(cpu));
}
@@ -327,7 +328,7 @@ static void cpu_set_ivec_irq(void *opaque, int irq, int level)
if (level) {
if (!(env->ivec_status & 0x20)) {
CPUIRQ_DPRINTF("Raise IVEC IRQ %d\n", irq);
- env->halted = 0;
+ CPU(cpu)->halted = 0;
env->interrupt_index = TT_IVEC;
env->ivec_status |= 0x20;
env->ivec_data[0] = (0x1f << 6) | irq;
diff --git a/hw/xen_machine_pv.c b/hw/xen_machine_pv.c
index 4b72aa7..c387fdf 100644
--- a/hw/xen_machine_pv.c
+++ b/hw/xen_machine_pv.c
@@ -37,7 +37,6 @@ static void xen_init_pv(ram_addr_t ram_size,
const char *cpu_model)
{
X86CPU *cpu;
- CPUX86State *env;
DriveInfo *dinfo;
int i;
@@ -50,8 +49,7 @@ static void xen_init_pv(ram_addr_t ram_size,
#endif
}
cpu = cpu_x86_init(cpu_model);
- env = &cpu->env;
- env->halted = 1;
+ CPU(cpu)->halted = 1;
/* Initialize backend core & drivers */
if (xen_be_init() != 0) {
diff --git a/hw/xtensa_pic.c b/hw/xtensa_pic.c
index 1ec70cd..8a65b92 100644
--- a/hw/xtensa_pic.c
+++ b/hw/xtensa_pic.c
@@ -47,6 +47,7 @@ void xtensa_advance_ccount(CPUXtensaState *env, uint32_t d)
void check_interrupts(CPUXtensaState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int minlevel = xtensa_get_cintlevel(env);
uint32_t int_set_enabled = env->sregs[INTSET] & env->sregs[INTENABLE];
int level;
@@ -54,7 +55,7 @@ void check_interrupts(CPUXtensaState *env)
/* If the CPU is halted advance CCOUNT according to the vm_clock time
* elapsed since the moment when it was advanced last time.
*/
- if (env->halted) {
+ if (cpu->halted) {
int64_t now = qemu_get_clock_ns(vm_clock);
xtensa_advance_ccount(env,
@@ -128,7 +129,7 @@ static void xtensa_ccompare_cb(void *opaque)
XtensaCPU *cpu = opaque;
CPUXtensaState *env = &cpu->env;
- if (env->halted) {
+ if (CPU(cpu)->halted) {
env->halt_clock = qemu_get_clock_ns(vm_clock);
xtensa_advance_ccount(env, env->wake_ccount - env->sregs[CCOUNT]);
if (!cpu_has_work(CPU(cpu))) {
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 7d03369..5399593 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -58,6 +58,8 @@ typedef struct CPUClass {
/**
* CPUState:
* @created: Indicates whether the CPU thread has been successfully created.
+ * @interrupt_request: Indicates a pending interrupt request.
+ * @halted: Nonzero if the CPU is in suspended state.
* @stop: Indicates a pending stop request.
* @stopped: Indicates the CPU has been artificially stopped.
*
@@ -77,6 +79,8 @@ struct CPUState {
struct qemu_work_item *queued_work_first, *queued_work_last;
bool thread_kicked;
bool created;
+ uint32_t interrupt_request;
+ uint32_t halted;
bool stop;
bool stopped;
diff --git a/kvm-all.c b/kvm-all.c
index bbd2049..b4b8a14 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -833,7 +833,7 @@ static void kvm_handle_interrupt(CPUArchState *env, int mask)
{
CPUState *cpu = ENV_GET_CPU(env);
- env->interrupt_request |= mask;
+ cpu->interrupt_request |= mask;
if (!qemu_cpu_is_self(cpu)) {
qemu_cpu_kick(cpu);
diff --git a/qom/cpu.c b/qom/cpu.c
index 729f4cf..9ae9a3c 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -32,6 +32,8 @@ void cpu_reset(CPUState *cpu)
static void cpu_common_reset(CPUState *cpu)
{
+ cpu->halted = 0;
+ cpu->interrupt_request = 0;
}
void cpu_tlb_flush(CPUState *cpu, bool flush_global)
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index a43fb94..3f321e2 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -501,8 +501,6 @@ static inline void cpu_set_tls(CPUAlphaState *env, target_ulong newtls)
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUAlphaState *env = &ALPHA_CPU(cpu)->env;
-
/* Here we are checking to see if the CPU should wake up from HALT.
We will have gotten into this state only for WTINT from PALmode. */
/* ??? I'm not sure how the IPL state works with WTINT to keep a CPU
@@ -510,7 +508,7 @@ static inline bool cpu_has_work(CPUState *cpu)
assume that if a CPU really wants to stay asleep, it will mask
interrupts at the chipset level, which will prevent these bits
from being set in the first place. */
- return env->interrupt_request & (CPU_INTERRUPT_HARD
+ return cpu->interrupt_request & (CPU_INTERRUPT_HARD
| CPU_INTERRUPT_TIMER
| CPU_INTERRUPT_SMP
| CPU_INTERRUPT_MCHK);
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 12de6a3..4ec7a7d 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -1693,7 +1693,8 @@ static ExitStatus gen_mtpr(DisasContext *ctx, int rb, int regno)
case 253:
/* WAIT */
tmp = tcg_const_i64(1);
- tcg_gen_st32_i64(tmp, cpu_env, offsetof(CPUAlphaState, halted));
+ tcg_gen_st32_i64(tmp, cpu_env, offsetof(CPUState, halted)
+ - offsetof(AlphaCPU, env));
return gen_excp(ctx, EXCP_HLT, 0);
case 252:
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index d4a19be..0cf883f 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -553,9 +553,7 @@ static inline void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUARMState *env = &ARM_CPU(cpu)->env;
-
- return env->interrupt_request &
+ return cpu->interrupt_request &
(CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
}
diff --git a/target-arm/helper.c b/target-arm/helper.c
index bbb1d05..39a455d 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -527,6 +527,7 @@ static void do_interrupt_v7m(CPUARMState *env)
/* Handle a CPU exception. */
void do_interrupt(CPUARMState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
uint32_t addr;
uint32_t mask;
int new_mode;
@@ -632,7 +633,7 @@ void do_interrupt(CPUARMState *env)
}
env->regs[14] = env->regs[15] + offset;
env->regs[15] = addr;
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ cpu->interrupt_request |= CPU_INTERRUPT_EXITTB;
}
/* Check section/page access permissions.
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index b53369d..2714021 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -234,8 +234,10 @@ uint32_t HELPER(usat16)(uint32_t x, uint32_t shift)
void HELPER(wfi)(void)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
env->exception_index = EXCP_HLT;
- env->halted = 1;
+ cpu->halted = 1;
cpu_loop_exit(env);
}
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 2f71f63..566129c 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -285,9 +285,7 @@ void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf);
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUCRISState *env = &CRIS_CPU(cpu)->env;
-
- return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
+ return cpu->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
}
#include "exec-all.h"
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 1ad9ec7..14c3795 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -2895,7 +2895,9 @@ static int dec_rfe_etc(DisasContext *dc)
cris_cc_mask(dc, 0);
if (dc->op2 == 15) {
- t_gen_mov_env_TN(halted, tcg_const_tl(1));
+ tcg_gen_st_i32(tcg_const_i32(1), cpu_env,
+ offsetof(CPUState, halted) -
+ offsetof(CRISCPU, env));
tcg_gen_movi_tl(env_pc, dc->pc + 2);
t_gen_raise_exception(EXCP_HLT);
return 2;
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 36e7911..1ee6e6b 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -864,7 +864,7 @@ static inline void cpu_x86_load_seg_cache_sipi(X86CPU *cpu,
sipi_vector << 12,
env->segs[R_CS].limit,
env->segs[R_CS].flags);
- env->halted = 0;
+ CPU(cpu)->halted = 0;
}
int cpu_x86_get_descr_debug(CPUX86State *env, unsigned int selector,
@@ -1039,9 +1039,9 @@ static inline bool cpu_has_work(CPUState *cpu)
{
CPUX86State *env = &X86_CPU(cpu)->env;
- return ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ return ((cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) ||
- (env->interrupt_request & (CPU_INTERRUPT_NMI |
+ (cpu->interrupt_request & (CPU_INTERRUPT_NMI |
CPU_INTERRUPT_INIT |
CPU_INTERRUPT_SIPI |
CPU_INTERRUPT_MCE));
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 2d5ca8c..9f5b3ad 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -171,6 +171,7 @@ done:
void cpu_dump_state(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int eflags, i, nb;
char cc_op_name[32];
static const char *seg_name[6] = { "ES", "CS", "SS", "DS", "FS", "GS" };
@@ -214,7 +215,7 @@ void cpu_dump_state(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf,
(env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1,
(env->a20_mask >> 20) & 1,
(env->hflags >> HF_SMM_SHIFT) & 1,
- env->halted);
+ cpu->halted);
} else
#endif
{
@@ -241,7 +242,7 @@ void cpu_dump_state(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf,
(env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1,
(env->a20_mask >> 20) & 1,
(env->hflags >> HF_SMM_SHIFT) & 1,
- env->halted);
+ cpu->halted);
}
for(i = 0; i < 6; i++) {
@@ -1185,14 +1186,15 @@ X86CPU *cpu_x86_init(const char *cpu_model)
void do_cpu_init(X86CPU *cpu)
{
CPUX86State *env = &cpu->env;
- int sipi = env->interrupt_request & CPU_INTERRUPT_SIPI;
+ CPUState *c = CPU(cpu);
+ int sipi = c->interrupt_request & CPU_INTERRUPT_SIPI;
uint64_t pat = env->pat;
- cpu_reset(CPU(cpu));
- env->interrupt_request = sipi;
+ cpu_reset(c);
+ c->interrupt_request = sipi;
env->pat = pat;
apic_init_reset(env->apic_state);
- env->halted = !cpu_is_bsp(cpu);
+ c->halted = !cpu_is_bsp(cpu);
}
void do_cpu_sipi(X86CPU *cpu)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index f7651bf..088daca 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1354,7 +1354,7 @@ static int kvm_get_mp_state(X86CPU *cpu)
}
env->mp_state = mp_state.mp_state;
if (kvm_irqchip_in_kernel()) {
- env->halted = (mp_state.mp_state == KVM_MP_STATE_HALTED);
+ CPU(cpu)->halted = (mp_state.mp_state == KVM_MP_STATE_HALTED);
}
return 0;
}
@@ -1634,11 +1634,12 @@ int kvm_arch_get_registers(CPUX86State *env)
void kvm_arch_pre_run(CPUX86State *env, struct kvm_run *run)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int ret;
/* Inject NMI */
- if (env->interrupt_request & CPU_INTERRUPT_NMI) {
- env->interrupt_request &= ~CPU_INTERRUPT_NMI;
+ if (cpu->interrupt_request & CPU_INTERRUPT_NMI) {
+ cpu->interrupt_request &= ~CPU_INTERRUPT_NMI;
DPRINTF("injected NMI\n");
ret = kvm_vcpu_ioctl(env, KVM_NMI);
if (ret < 0) {
@@ -1650,18 +1651,18 @@ void kvm_arch_pre_run(CPUX86State *env, struct kvm_run *run)
if (!kvm_irqchip_in_kernel()) {
/* Force the VCPU out of its inner loop to process any INIT requests
* or pending TPR access reports. */
- if (env->interrupt_request &
+ if (cpu->interrupt_request &
(CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) {
env->exit_request = 1;
}
/* Try to inject an interrupt if the guest can accept it */
if (run->ready_for_interrupt_injection &&
- (env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) {
int irq;
- env->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;
irq = cpu_get_pic_interrupt(env);
if (irq >= 0) {
struct kvm_interrupt intr;
@@ -1681,7 +1682,7 @@ void kvm_arch_pre_run(CPUX86State *env, struct kvm_run *run)
* interrupt, request an interrupt window exit. This will
* cause a return to userspace as soon as the guest is ready to
* receive interrupts. */
- if ((env->interrupt_request & CPU_INTERRUPT_HARD)) {
+ if ((cpu->interrupt_request & CPU_INTERRUPT_HARD)) {
run->request_interrupt_window = 1;
} else {
run->request_interrupt_window = 0;
@@ -1706,12 +1707,13 @@ void kvm_arch_post_run(CPUX86State *env, struct kvm_run *run)
int kvm_arch_process_async_events(CPUX86State *env)
{
X86CPU *cpu = x86_env_get_cpu(env);
+ CPUState *c = CPU(cpu);
- if (env->interrupt_request & CPU_INTERRUPT_MCE) {
+ if (c->interrupt_request & CPU_INTERRUPT_MCE) {
/* We must not raise CPU_INTERRUPT_MCE if it's not supported. */
assert(env->mcg_cap);
- env->interrupt_request &= ~CPU_INTERRUPT_MCE;
+ c->interrupt_request &= ~CPU_INTERRUPT_MCE;
kvm_cpu_synchronize_state(env);
@@ -1724,7 +1726,7 @@ int kvm_arch_process_async_events(CPUX86State *env)
env->exception_injected = EXCP12_MCHK;
env->has_error_code = 0;
- env->halted = 0;
+ c->halted = 0;
if (kvm_irqchip_in_kernel() && env->mp_state == KVM_MP_STATE_HALTED) {
env->mp_state = KVM_MP_STATE_RUNNABLE;
}
@@ -1734,37 +1736,38 @@ int kvm_arch_process_async_events(CPUX86State *env)
return 0;
}
- if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ if (((c->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) ||
- (env->interrupt_request & CPU_INTERRUPT_NMI)) {
- env->halted = 0;
+ (c->interrupt_request & CPU_INTERRUPT_NMI)) {
+ c->halted = 0;
}
- if (env->interrupt_request & CPU_INTERRUPT_INIT) {
+ if (c->interrupt_request & CPU_INTERRUPT_INIT) {
kvm_cpu_synchronize_state(env);
do_cpu_init(cpu);
}
- if (env->interrupt_request & CPU_INTERRUPT_SIPI) {
+ if (c->interrupt_request & CPU_INTERRUPT_SIPI) {
kvm_cpu_synchronize_state(env);
do_cpu_sipi(cpu);
}
- if (env->interrupt_request & CPU_INTERRUPT_TPR) {
- env->interrupt_request &= ~CPU_INTERRUPT_TPR;
+ if (c->interrupt_request & CPU_INTERRUPT_TPR) {
+ c->interrupt_request &= ~CPU_INTERRUPT_TPR;
kvm_cpu_synchronize_state(env);
apic_handle_tpr_access_report(env->apic_state, env->eip,
env->tpr_access_type);
}
- return env->halted;
+ return c->halted;
}
-static int kvm_handle_halt(X86CPU *cpu)
+static int kvm_handle_halt(X86CPU *c)
{
- CPUX86State *env = &cpu->env;
+ CPUState *cpu = CPU(c);
+ CPUX86State *env = &c->env;
- if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ if (!((cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) &&
- !(env->interrupt_request & CPU_INTERRUPT_NMI)) {
- env->halted = 1;
+ !(cpu->interrupt_request & CPU_INTERRUPT_NMI)) {
+ cpu->halted = 1;
return EXCP_HLT;
}
diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c
index bc3b94e..6da14b9 100644
--- a/target-i386/op_helper.c
+++ b/target-i386/op_helper.c
@@ -4863,8 +4863,10 @@ void helper_idivq_EAX(target_ulong t0)
static void do_hlt(void)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
- env->halted = 1;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
cpu_loop_exit(env);
}
@@ -5109,6 +5111,7 @@ static inline void svm_load_seg_cache(target_phys_addr_t addr,
void helper_vmrun(int aflag, int next_eip_addend)
{
+ CPUState *cpu = ENV_GET_CPU(env);
target_ulong addr;
uint32_t event_inj;
uint32_t int_ctl;
@@ -5229,7 +5232,7 @@ void helper_vmrun(int aflag, int next_eip_addend)
env->hflags2 |= HF2_GIF_MASK;
if (int_ctl & V_IRQ_MASK) {
- env->interrupt_request |= CPU_INTERRUPT_VIRQ;
+ cpu->interrupt_request |= CPU_INTERRUPT_VIRQ;
}
/* maybe we need to inject an event */
@@ -5487,6 +5490,7 @@ void helper_svm_check_io(uint32_t port, uint32_t param,
/* Note: currently only 32 bits of exit_code are used */
void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
{
+ CPUState *cpu = ENV_GET_CPU(env);
uint32_t int_ctl;
qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016" PRIx64 ", " TARGET_FMT_lx ")!\n",
@@ -5526,8 +5530,9 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
int_ctl = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl));
int_ctl &= ~(V_TPR_MASK | V_IRQ_MASK);
int_ctl |= env->v_tpr & V_TPR_MASK;
- if (env->interrupt_request & CPU_INTERRUPT_VIRQ)
+ if (cpu->interrupt_request & CPU_INTERRUPT_VIRQ) {
int_ctl |= V_IRQ_MASK;
+ }
stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl), int_ctl);
stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rflags), compute_eflags());
@@ -5543,7 +5548,7 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
env->hflags &= ~HF_SVMI_MASK;
env->intercept = 0;
env->intercept_exceptions = 0;
- env->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
env->tsc_offset = 0;
env->gdt.base = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.base));
diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index 7243b4f..559890b 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -255,9 +255,7 @@ static inline void cpu_get_tb_cpu_state(CPULM32State *env, target_ulong *pc,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPULM32State *env = &LM32_CPU(cpu)->env;
-
- return env->interrupt_request & CPU_INTERRUPT_HARD;
+ return cpu->interrupt_request & CPU_INTERRUPT_HARD;
}
#include "exec-all.h"
diff --git a/target-lm32/op_helper.c b/target-lm32/op_helper.c
index 51edc1a..7f49c2b 100644
--- a/target-lm32/op_helper.c
+++ b/target-lm32/op_helper.c
@@ -26,7 +26,9 @@ void helper_raise_exception(uint32_t index)
void helper_hlt(void)
{
- env->halted = 1;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
cpu_loop_exit(env);
}
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 780e2c9..d334352 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -259,9 +259,7 @@ static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUM68KState *env = &M68K_CPU(cpu)->env;
-
- return env->interrupt_request & CPU_INTERRUPT_HARD;
+ return cpu->interrupt_request & CPU_INTERRUPT_HARD;
}
#include "exec-all.h"
diff --git a/target-m68k/op_helper.c b/target-m68k/op_helper.c
index 1971a57..4413b3a 100644
--- a/target-m68k/op_helper.c
+++ b/target-m68k/op_helper.c
@@ -96,6 +96,7 @@ static void do_rte(void)
static void do_interrupt_all(int is_hw)
{
+ CPUState *cpu = ENV_GET_CPU(env);
uint32_t sp;
uint32_t fmt;
uint32_t retaddr;
@@ -120,7 +121,7 @@ static void do_interrupt_all(int is_hw)
do_m68k_semihosting(env, env->dregs[0]);
return;
}
- env->halted = 1;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
cpu_loop_exit(env);
return;
diff --git a/target-m68k/qregs.def b/target-m68k/qregs.def
index 49400c4..4235b02 100644
--- a/target-m68k/qregs.def
+++ b/target-m68k/qregs.def
@@ -8,6 +8,5 @@ DEFO32(CC_X, cc_x)
DEFO32(DIV1, div1)
DEFO32(DIV2, div2)
DEFO32(EXCEPTION, exception_index)
-DEFO32(HALTED, halted)
DEFO32(MACSR, macsr)
DEFO32(MAC_MASK, mac_mask)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 9fc1e31..fef0c79 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -42,6 +42,8 @@
#undef DEFO64
#undef DEFF64
+static TCGv QREG_HALTED;
+
static TCGv_ptr cpu_env;
static char cpu_reg_names[3*8*3 + 5*4];
@@ -76,6 +78,10 @@ void m68k_tcg_init(void)
#undef DEFO64
#undef DEFF64
+ QREG_HALTED = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, halted)
+ - offsetof(M68kCPU, env),
+ "HALTED");
+
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
p = cpu_reg_names;
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 6131287..e17a0db 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -371,9 +371,7 @@ void cpu_unassigned_access(CPUMBState *env1, target_phys_addr_t addr,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUMBState *env = &MICROBLAZE_CPU(cpu)->env;
-
- return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
+ return cpu->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
}
#include "exec-all.h"
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 9ce53da..9ac5733 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -714,7 +714,7 @@ static inline bool cpu_has_work(CPUState *cpu)
/* It is implementation dependent if non-enabled interrupts
wake-up the CPU, however most of the implementations only
check for interrupts that can be taken. */
- if ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ if ((cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
cpu_mips_hw_interrupts_pending(env)) {
has_work = true;
}
@@ -723,7 +723,7 @@ static inline bool cpu_has_work(CPUState *cpu)
if (env->CP0_Config3 & (1 << CP0C3_MT)) {
/* The QEMU model will issue an _WAKE request whenever the CPUs
should be woken up. */
- if (env->interrupt_request & CPU_INTERRUPT_WAKE) {
+ if (cpu->interrupt_request & CPU_INTERRUPT_WAKE) {
has_work = true;
}
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index d26c9fb..fd4125e 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -746,10 +746,11 @@ void helper_sdm (target_ulong addr, target_ulong reglist, uint32_t mem_idx)
static bool mips_vpe_is_wfi(MIPSCPU *c)
{
CPUMIPSState *env = &c->env;
+ CPUState *cpu = CPU(c);
/* If the VPE is halted but otherwise active, it means it's waiting for
an interrupt. */
- return env->halted && mips_vpe_active(env);
+ return cpu->halted && mips_vpe_active(env);
}
static inline void mips_vpe_wake(CPUMIPSState *c)
@@ -766,7 +767,7 @@ static inline void mips_vpe_sleep(MIPSCPU *cpu)
/* The VPE was shut off, really go to bed.
Reset any old _WAKE requests. */
- c->halted = 1;
+ CPU(cpu)->halted = 1;
cpu_reset_interrupt(c, CPU_INTERRUPT_WAKE);
}
@@ -2286,9 +2287,11 @@ void helper_pmon (int function)
}
}
-void helper_wait (void)
+void helper_wait(void)
{
- env->halted = 1;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->halted = 1;
cpu_reset_interrupt(env, CPU_INTERRUPT_WAKE);
helper_raise_exception(EXCP_HLT);
}
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 4e15ee3..793f72b 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12716,6 +12716,10 @@ MIPSCPU *cpu_mips_init(const char *cpu_model)
void cpu_state_reset(CPUMIPSState *env)
{
+#ifndef CONFIG_USER_ONLY
+ CPUState *cpu = ENV_GET_CPU(env);
+#endif
+
if (qemu_loglevel_mask(CPU_LOG_RESET)) {
qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
log_cpu_state(env, 0);
@@ -12817,7 +12821,7 @@ void cpu_state_reset(CPUMIPSState *env)
env->tcs[i].CP0_TCHalt = 1;
}
env->active_tc.CP0_TCHalt = 1;
- env->halted = 1;
+ cpu->halted = 1;
if (!env->cpu_index) {
/* VPE0 starts up enabled. */
@@ -12825,7 +12829,7 @@ void cpu_state_reset(CPUMIPSState *env)
env->CP0_VPEConf0 |= (1 << CP0VPEC0_MVP) | (1 << CP0VPEC0_VPA);
/* TC0 starts up unhalted. */
- env->halted = 0;
+ cpu->halted = 0;
env->active_tc.CP0_TCHalt = 0;
env->tcs[0].CP0_TCHalt = 0;
/* With thread 0 active. */
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index f1927d5..935c347 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -2188,7 +2188,7 @@ static inline bool cpu_has_work(CPUState *cpu)
{
CPUPPCState *env = &POWERPC_CPU(cpu)->env;
- return msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD);
+ return msr_ee && (cpu->interrupt_request & CPU_INTERRUPT_HARD);
}
#include "exec-all.h"
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 7747674..8059654 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -2573,8 +2573,8 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
fprintf(stderr, "Machine check while not allowed. "
"Entering checkstop state\n");
}
- env->halted = 1;
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ CPU(cpu)->halted = 1;
+ CPU(cpu)->interrupt_request |= CPU_INTERRUPT_EXITTB;
}
if (0) {
/* XXX: find a suitable condition to enable the hypervisor mode */
diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h
index 3c98850..02a7f79 100644
--- a/target-ppc/helper_regs.h
+++ b/target-ppc/helper_regs.h
@@ -67,6 +67,9 @@ static inline void hreg_compute_hflags(CPUPPCState *env)
static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
int alter_hv)
{
+#if !defined(CONFIG_USER_ONLY)
+ CPUState *cpu = ENV_GET_CPU(env);
+#endif
int excp;
excp = 0;
@@ -82,7 +85,7 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
/* Flush all tlb when changing translation mode */
tlb_flush(env, 1);
excp = POWERPC_EXCP_NONE;
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ cpu->interrupt_request |= CPU_INTERRUPT_EXITTB;
}
if (unlikely((env->flags & POWERPC_FLAG_TGPR) &&
((value ^ env->msr) & (1 << MSR_TGPR)))) {
@@ -99,7 +102,7 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
#if !defined (CONFIG_USER_ONLY)
if (unlikely(msr_pow == 1)) {
if ((*env->check_pow)(env)) {
- env->halted = 1;
+ cpu->halted = 1;
excp = EXCP_HALTED;
}
}
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 148c095..126a018 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -471,6 +471,7 @@ int kvmppc_set_interrupt(CPUPPCState *env, int irq, int level)
void kvm_arch_pre_run(CPUPPCState *env, struct kvm_run *run)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int r;
unsigned irq;
@@ -478,7 +479,7 @@ void kvm_arch_pre_run(CPUPPCState *env, struct kvm_run *run)
* interrupt, reset, etc) in PPC-specific env->irq_input_state. */
if (!cap_interrupt_level &&
run->ready_for_interrupt_injection &&
- (env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->irq_input_state & (1<<PPC_INPUT_INT)))
{
/* For now KVM disregards the 'irq' argument. However, in the
@@ -508,13 +509,17 @@ void kvm_arch_post_run(CPUPPCState *env, struct kvm_run *run)
int kvm_arch_process_async_events(CPUPPCState *env)
{
- return env->halted;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ return cpu->halted;
}
static int kvmppc_handle_halt(CPUPPCState *env)
{
- if (!(env->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
- env->halted = 1;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ if (!(cpu->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
}
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index 4ef2332..0f8d3f0 100644
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -1594,9 +1594,11 @@ void helper_fcmpo (uint64_t arg1, uint64_t arg2, uint32_t crfD)
#if !defined (CONFIG_USER_ONLY)
void helper_store_msr (target_ulong val)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
val = hreg_store_msr(env, val, 0);
if (val != 0) {
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ cpu->interrupt_request |= CPU_INTERRUPT_EXITTB;
helper_raise_exception(val);
}
}
@@ -1604,6 +1606,8 @@ void helper_store_msr (target_ulong val)
static inline void do_rfi(target_ulong nip, target_ulong msr,
target_ulong msrm, int keep_msrh)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
#if defined(TARGET_PPC64)
if (msr & (1ULL << MSR_SF)) {
nip = (uint64_t)nip;
@@ -1627,7 +1631,7 @@ static inline void do_rfi(target_ulong nip, target_ulong msr,
/* No need to raise an exception here,
* as rfi is always the last insn of a TB
*/
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ cpu->interrupt_request |= CPU_INTERRUPT_EXITTB;
}
void helper_rfi (void)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index cf59765..57b63ac 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -3213,7 +3213,8 @@ static void gen_sync(DisasContext *ctx)
static void gen_wait(DisasContext *ctx)
{
TCGv_i32 t0 = tcg_temp_new_i32();
- tcg_gen_st_i32(t0, cpu_env, offsetof(CPUPPCState, halted));
+ tcg_gen_st_i32(t0, cpu_env, offsetof(CPUState, halted)
+ - offsetof(PowerPCCPU, env));
tcg_temp_free_i32(t0);
/* Stop translation, as the CPU is supposed to sleep from now */
gen_exception_err(ctx, EXCP_HLT, 1);
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index be13348..ecda9e6 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -989,7 +989,7 @@ static inline bool cpu_has_work(CPUState *cpu)
{
CPUS390XState *env = &S390_CPU(cpu)->env;
- return (env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ return (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->psw.mask & PSW_MASK_EXT);
}
diff --git a/target-s390x/helper.c b/target-s390x/helper.c
index d0a1180..7bf9554 100644
--- a/target-s390x/helper.c
+++ b/target-s390x/helper.c
@@ -438,6 +438,8 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUS390XState *env, target_ulong vadd
void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
if (mask & PSW_MASK_WAIT) {
if (!(mask & (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK))) {
if (s390_del_running_cpu(env) == 0) {
@@ -446,7 +448,7 @@ void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr)
#endif
}
}
- env->halted = 1;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
}
@@ -571,8 +573,10 @@ static void do_ext_interrupt(CPUS390XState *env)
load_psw(env, mask, addr);
}
-void do_interrupt (CPUS390XState *env)
+void do_interrupt(CPUS390XState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
qemu_log("%s: %d at pc=%" PRIx64 "\n", __FUNCTION__, env->exception_index,
env->psw.addr);
@@ -610,7 +614,7 @@ void do_interrupt (CPUS390XState *env)
env->exception_index = -1;
if (!env->pending_int) {
- env->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;
}
}
diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
index e09709d..722511e 100644
--- a/target-s390x/kvm.c
+++ b/target-s390x/kvm.c
@@ -172,7 +172,9 @@ void kvm_arch_post_run(CPUS390XState *env, struct kvm_run *run)
int kvm_arch_process_async_events(CPUS390XState *env)
{
- return env->halted;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ return cpu->halted;
}
void kvm_s390_interrupt_internal(CPUS390XState *env, int type, uint32_t parm,
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index fd6fb86..ba66479 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -373,9 +373,7 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUSH4State *env = &SUPERH_CPU(cpu)->env;
-
- return env->interrupt_request & CPU_INTERRUPT_HARD;
+ return cpu->interrupt_request & CPU_INTERRUPT_HARD;
}
#include "exec-all.h"
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index 5c57380..fe3063d 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -78,9 +78,10 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr)
#define MMU_DADDR_ERROR_READ (-12)
#define MMU_DADDR_ERROR_WRITE (-13)
-void do_interrupt(CPUSH4State * env)
+void do_interrupt(CPUSH4State *env)
{
- int do_irq = env->interrupt_request & CPU_INTERRUPT_HARD;
+ CPUState *cpu = ENV_GET_CPU(env);
+ int do_irq = cpu->interrupt_request & CPU_INTERRUPT_HARD;
int do_exp, irq_vector = env->exception_index;
/* prioritize exceptions over interrupts */
diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c
index 4054791..4226671 100644
--- a/target-sh4/op_helper.c
+++ b/target-sh4/op_helper.c
@@ -117,7 +117,9 @@ void helper_debug(void)
void helper_sleep(uint32_t next_pc)
{
- env->halted = 1;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->halted = 1;
env->in_sleep = 1;
env->exception_index = EXCP_HLT;
env->pc = next_pc;
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index e3b3b44..31cd9f6 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -767,7 +767,7 @@ static inline bool cpu_has_work(CPUState *cpu)
{
CPUSPARCState *env1 = &SPARC_CPU(cpu)->env;
- return (env1->interrupt_request & CPU_INTERRUPT_HARD) &&
+ return (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
cpu_interrupts_enabled(env1);
}
diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index 2843a97..48431cd 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -185,9 +185,7 @@ void switch_mode(CPUUniCore32State *, int);
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUUniCore32State *env = &UNICORE32_CPU(cpu)->env;
-
- return env->interrupt_request &
+ return cpu->interrupt_request &
(CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
}
diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c
index 364dc19..8eb02a5 100644
--- a/target-xtensa/op_helper.c
+++ b/target-xtensa/op_helper.c
@@ -390,6 +390,8 @@ void HELPER(dump_state)(void)
void HELPER(waiti)(uint32_t pc, uint32_t intlevel)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
env->pc = pc;
env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) |
(intlevel << PS_INTLEVEL_SHIFT);
@@ -400,7 +402,7 @@ void HELPER(waiti)(uint32_t pc, uint32_t intlevel)
}
env->halt_clock = qemu_get_clock_ns(vm_clock);
- env->halted = 1;
+ cpu->halted = 1;
if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT)) {
xtensa_rearm_ccompare_timer(env);
}
diff --git a/xen-all.c b/xen-all.c
index bdf9c0f..33ebb72 100644
--- a/xen-all.c
+++ b/xen-all.c
@@ -590,9 +590,9 @@ static MemoryListener xen_memory_listener = {
static void xen_reset_vcpu(void *opaque)
{
- CPUArchState *env = opaque;
+ CPUState *cpu = opaque;
- env->halted = 1;
+ cpu->halted = 1;
}
void xen_vcpu_init(void)
@@ -600,8 +600,10 @@ void xen_vcpu_init(void)
CPUArchState *first_cpu;
if ((first_cpu = qemu_get_cpu(0))) {
- qemu_register_reset(xen_reset_vcpu, first_cpu);
- xen_reset_vcpu(first_cpu);
+ CPUState *cpu = ENV_GET_CPU(first_cpu);
+
+ qemu_register_reset(xen_reset_vcpu, cpu);
+ xen_reset_vcpu(cpu);
}
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* [PATCH qom-next 59/59] cpu: Move halted and interrupt_request to CPUState
@ 2012-05-23 3:08 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 3:08 UTC (permalink / raw)
To: qemu-devel
Cc: Andreas Färber, Peter Maydell, Anthony Liguori,
Alexander Graf, Blue Swirl, Stefano Stabellini, Avi Kivity,
Marcelo Tosatti, Richard Henderson, Paul Brook,
Edgar E. Iglesias, Michael Walle, Aurelien Jarno, Guan Xuetao,
Max Filippov, xen-devel
For target-cris use i32 for halted instead of tl. This effectively makes
no difference since it is 32-bit.
For Xen pass CPUState to xen_reset_vcpu().
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
cpu-defs.h | 2 -
cpu-exec.c | 32 +++++++++++++++-------------
cpus.c | 4 +-
exec.c | 34 ++++++++++++++++++++-----------
gdbstub.c | 4 ++-
hw/leon3.c | 2 +-
hw/omap1.c | 4 +-
hw/pc.c | 6 ++--
hw/ppc.c | 10 ++++----
hw/ppce500_mpc8544ds.c | 4 +-
hw/ppce500_spin.c | 2 +-
hw/pxa2xx_gpio.c | 3 +-
hw/pxa2xx_pic.c | 2 +-
hw/s390-virtio.c | 14 ++++++++----
hw/spapr.c | 4 +-
hw/spapr_hcall.c | 2 +-
hw/spapr_rtas.c | 8 ++++--
hw/sun4m.c | 18 +++++++---------
hw/sun4u.c | 9 ++++---
hw/xen_machine_pv.c | 4 +--
hw/xtensa_pic.c | 5 ++-
include/qemu/cpu.h | 4 +++
kvm-all.c | 2 +-
qom/cpu.c | 2 +
target-alpha/cpu.h | 4 +--
target-alpha/translate.c | 3 +-
target-arm/cpu.h | 4 +--
target-arm/helper.c | 3 +-
target-arm/op_helper.c | 4 ++-
target-cris/cpu.h | 4 +--
target-cris/translate.c | 4 ++-
target-i386/cpu.h | 6 ++--
target-i386/helper.c | 14 +++++++-----
target-i386/kvm.c | 49 +++++++++++++++++++++++---------------------
target-i386/op_helper.c | 13 ++++++++---
target-lm32/cpu.h | 4 +--
target-lm32/op_helper.c | 4 ++-
target-m68k/cpu.h | 4 +--
target-m68k/op_helper.c | 3 +-
target-m68k/qregs.def | 1 -
target-m68k/translate.c | 6 +++++
target-microblaze/cpu.h | 4 +--
target-mips/cpu.h | 4 +-
target-mips/op_helper.c | 11 ++++++---
target-mips/translate.c | 8 +++++-
target-ppc/cpu.h | 2 +-
target-ppc/helper.c | 4 +-
target-ppc/helper_regs.h | 7 ++++-
target-ppc/kvm.c | 13 ++++++++---
target-ppc/op_helper.c | 8 +++++-
target-ppc/translate.c | 3 +-
target-s390x/cpu.h | 2 +-
target-s390x/helper.c | 10 ++++++--
target-s390x/kvm.c | 4 ++-
target-sh4/cpu.h | 4 +--
target-sh4/helper.c | 5 ++-
target-sh4/op_helper.c | 4 ++-
target-sparc/cpu.h | 2 +-
target-unicore32/cpu.h | 4 +--
target-xtensa/op_helper.c | 4 ++-
xen-all.c | 10 +++++---
61 files changed, 244 insertions(+), 180 deletions(-)
diff --git a/cpu-defs.h b/cpu-defs.h
index d846674..bc851fd 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -162,8 +162,6 @@ typedef struct CPUWatchpoint {
accessed */ \
target_ulong mem_io_vaddr; /* target virtual addr at which the \
memory was accessed */ \
- uint32_t halted; /* Nonzero if the CPU is in suspend state */ \
- uint32_t interrupt_request; \
volatile sig_atomic_t exit_request; \
CPU_COMMON_TLB \
struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \
diff --git a/cpu-exec.c b/cpu-exec.c
index da0c17a..5674bac 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -190,12 +190,12 @@ int cpu_exec(CPUArchState *env)
uint8_t *tc_ptr;
tcg_target_ulong next_tb;
- if (env->halted) {
+ if (cpu->halted) {
if (!cpu_has_work(cpu)) {
return EXCP_HALTED;
}
- env->halted = 0;
+ cpu->halted = 0;
}
cpu_single_env = env;
@@ -264,14 +264,14 @@ int cpu_exec(CPUArchState *env)
next_tb = 0; /* force lookup of first TB */
for(;;) {
- interrupt_request = env->interrupt_request;
+ interrupt_request = cpu->interrupt_request;
if (unlikely(interrupt_request)) {
if (unlikely(env->singlestep_enabled & SSTEP_NOIRQ)) {
/* Mask out external interrupts for this step. */
interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
}
if (interrupt_request & CPU_INTERRUPT_DEBUG) {
- env->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
env->exception_index = EXCP_DEBUG;
cpu_loop_exit(env);
}
@@ -279,8 +279,8 @@ int cpu_exec(CPUArchState *env)
defined(TARGET_PPC) || defined(TARGET_ALPHA) || defined(TARGET_CRIS) || \
defined(TARGET_MICROBLAZE) || defined(TARGET_LM32) || defined(TARGET_UNICORE32)
if (interrupt_request & CPU_INTERRUPT_HALT) {
- env->interrupt_request &= ~CPU_INTERRUPT_HALT;
- env->halted = 1;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
cpu_loop_exit(env);
}
@@ -297,17 +297,17 @@ int cpu_exec(CPUArchState *env)
if ((interrupt_request & CPU_INTERRUPT_SMI) &&
!(env->hflags & HF_SMM_MASK)) {
svm_check_intercept(env, SVM_EXIT_SMI);
- env->interrupt_request &= ~CPU_INTERRUPT_SMI;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_SMI;
do_smm_enter(env);
next_tb = 0;
} else if ((interrupt_request & CPU_INTERRUPT_NMI) &&
!(env->hflags2 & HF2_NMI_MASK)) {
- env->interrupt_request &= ~CPU_INTERRUPT_NMI;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_NMI;
env->hflags2 |= HF2_NMI_MASK;
do_interrupt_x86_hardirq(env, EXCP02_NMI, 1);
next_tb = 0;
} else if (interrupt_request & CPU_INTERRUPT_MCE) {
- env->interrupt_request &= ~CPU_INTERRUPT_MCE;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_MCE;
do_interrupt_x86_hardirq(env, EXCP12_MCHK, 0);
next_tb = 0;
} else if ((interrupt_request & CPU_INTERRUPT_HARD) &&
@@ -318,7 +318,8 @@ int cpu_exec(CPUArchState *env)
!(env->hflags & HF_INHIBIT_IRQ_MASK))))) {
int intno;
svm_check_intercept(env, SVM_EXIT_INTR);
- env->interrupt_request &= ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIRQ);
+ cpu->interrupt_request &= ~(CPU_INTERRUPT_HARD |
+ CPU_INTERRUPT_VIRQ);
intno = cpu_get_pic_interrupt(env);
qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=0x%02x\n", intno);
do_interrupt_x86_hardirq(env, intno, 1);
@@ -335,7 +336,7 @@ int cpu_exec(CPUArchState *env)
intno = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_vector));
qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing virtual hardware INT=0x%02x\n", intno);
do_interrupt_x86_hardirq(env, intno, 1);
- env->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
next_tb = 0;
#endif
}
@@ -346,8 +347,9 @@ int cpu_exec(CPUArchState *env)
}
if (interrupt_request & CPU_INTERRUPT_HARD) {
ppc_hw_interrupt(env);
- if (env->pending_interrupts == 0)
- env->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ if (env->pending_interrupts == 0) {
+ cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ }
next_tb = 0;
}
#elif defined(TARGET_LM32)
@@ -499,8 +501,8 @@ int cpu_exec(CPUArchState *env)
#endif
/* Don't use the cached interrupt_request value,
do_interrupt may have updated the EXITTB flag. */
- if (env->interrupt_request & CPU_INTERRUPT_EXITTB) {
- env->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
+ if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
+ cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
/* ensure that no TB jump will be modified as
the program flow was changed */
next_tb = 0;
diff --git a/cpus.c b/cpus.c
index a403629..227ef2f 100644
--- a/cpus.c
+++ b/cpus.c
@@ -443,7 +443,7 @@ static bool cpu_thread_is_idle(CPUArchState *env)
if (cpu->stopped || !runstate_is_running()) {
return true;
}
- if (!env->halted || qemu_cpu_has_work(cpu) || kvm_irqchip_in_kernel()) {
+ if (!cpu->halted || qemu_cpu_has_work(cpu) || kvm_irqchip_in_kernel()) {
return false;
}
return true;
@@ -1214,7 +1214,7 @@ CpuInfoList *qmp_query_cpus(Error **errp)
info->value = g_malloc0(sizeof(*info->value));
info->value->CPU = env->cpu_index;
info->value->current = (env == first_cpu);
- info->value->halted = env->halted;
+ info->value->halted = cpu->halted;
info->value->thread_id = cpu->thread_id;
#if defined(TARGET_I386)
info->value->has_pc = true;
diff --git a/exec.c b/exec.c
index 8d2fa7a..f62e643 100644
--- a/exec.c
+++ b/exec.c
@@ -654,12 +654,12 @@ void cpu_exec_init_all(void)
static int cpu_common_post_load(void *opaque, int version_id)
{
- CPUArchState *env = opaque;
+ CPUState *cpu = opaque;
/* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
version_id is increased. */
- env->interrupt_request &= ~0x01;
- tlb_flush(env, 1);
+ cpu->interrupt_request &= ~0x01;
+ cpu_tlb_flush(cpu, true);
return 0;
}
@@ -671,8 +671,8 @@ static const VMStateDescription vmstate_cpu_common = {
.minimum_version_id_old = 1,
.post_load = cpu_common_post_load,
.fields = (VMStateField []) {
- VMSTATE_UINT32(halted, CPUArchState),
- VMSTATE_UINT32(interrupt_request, CPUArchState),
+ VMSTATE_UINT32(halted, CPUState),
+ VMSTATE_UINT32(interrupt_request, CPUState),
VMSTATE_END_OF_LIST()
}
};
@@ -721,7 +721,7 @@ void cpu_exec_init(CPUArchState *env)
cpu_list_unlock();
#endif
#if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)
- vmstate_register(NULL, cpu_index, &vmstate_cpu_common, env);
+ vmstate_register(NULL, cpu_index, &vmstate_cpu_common, ENV_GET_CPU(env));
register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION,
cpu_save, cpu_load, env);
#endif
@@ -1104,6 +1104,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
int is_cpu_write_access)
{
TranslationBlock *tb, *tb_next, *saved_tb;
+ CPUState *cpu = NULL;
CPUArchState *env = cpu_single_env;
tb_page_addr_t tb_start, tb_end;
PageDesc *p;
@@ -1117,6 +1118,10 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
int current_flags = 0;
#endif /* TARGET_HAS_PRECISE_SMC */
+ if (env != NULL) {
+ cpu = ENV_GET_CPU(env);
+ }
+
p = page_find(start >> TARGET_PAGE_BITS);
if (!p)
return;
@@ -1178,8 +1183,9 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
tb_phys_invalidate(tb, -1);
if (env) {
env->current_tb = saved_tb;
- if (env->interrupt_request && env->current_tb)
- cpu_interrupt(env, env->interrupt_request);
+ if (cpu->interrupt_request && env->current_tb) {
+ cpu_interrupt(env, cpu->interrupt_request);
+ }
}
}
tb = tb_next;
@@ -1740,8 +1746,8 @@ static void tcg_handle_interrupt(CPUArchState *env, int mask)
CPUState *cpu = ENV_GET_CPU(env);
int old_mask;
- old_mask = env->interrupt_request;
- env->interrupt_request |= mask;
+ old_mask = cpu->interrupt_request;
+ cpu->interrupt_request |= mask;
/*
* If called from iothread context, wake the target cpu in
@@ -1769,14 +1775,18 @@ CPUInterruptHandler cpu_interrupt_handler = tcg_handle_interrupt;
void cpu_interrupt(CPUArchState *env, int mask)
{
- env->interrupt_request |= mask;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->interrupt_request |= mask;
cpu_unlink_tb(env);
}
#endif /* CONFIG_USER_ONLY */
void cpu_reset_interrupt(CPUArchState *env, int mask)
{
- env->interrupt_request &= ~mask;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->interrupt_request &= ~mask;
}
void cpu_exit(CPUArchState *env)
diff --git a/gdbstub.c b/gdbstub.c
index 6a77a66..47cbfdd 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -2284,10 +2284,12 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
thread = strtoull(p+16, (char **)&p, 16);
env = find_cpu(thread);
if (env != NULL) {
+ CPUState *cpu = ENV_GET_CPU(env);
+
cpu_synchronize_state(env);
len = snprintf((char *)mem_buf, sizeof(mem_buf),
"CPU#%d [%s]", env->cpu_index,
- env->halted ? "halted " : "running");
+ cpu->halted ? "halted " : "running");
memtohex(buf, mem_buf, len);
put_packet(s, buf);
}
diff --git a/hw/leon3.c b/hw/leon3.c
index 878d3aa..8d44f83 100644
--- a/hw/leon3.c
+++ b/hw/leon3.c
@@ -53,7 +53,7 @@ static void main_cpu_reset(void *opaque)
cpu_reset(CPU(s->cpu));
- env->halted = 0;
+ CPU(s->cpu)->halted = 0;
env->pc = s->entry;
env->npc = s->entry + 4;
}
diff --git a/hw/omap1.c b/hw/omap1.c
index ad60cc4..e90aed4 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -1735,7 +1735,7 @@ static uint64_t omap_clkdsp_read(void *opaque, target_phys_addr_t addr,
case 0x18: /* DSP_SYSST */
return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start |
- (s->cpu->env.halted << 6); /* Quite useless... */
+ (CPU(s->cpu)->halted << 6); /* Quite useless... */
}
OMAP_BAD_REG(addr);
@@ -3752,7 +3752,7 @@ void omap_mpu_wakeup(void *opaque, int irq, int req)
{
struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque;
- if (mpu->cpu->env.halted) {
+ if (CPU(mpu->cpu)->halted) {
cpu_interrupt(&mpu->cpu->env, CPU_INTERRUPT_EXITTB);
}
}
diff --git a/hw/pc.c b/hw/pc.c
index f0cbfef..c8caada 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -942,10 +942,10 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
static void pc_cpu_reset(void *opaque)
{
X86CPU *cpu = opaque;
- CPUX86State *env = &cpu->env;
+ CPUState *c = CPU(cpu);
- cpu_reset(CPU(cpu));
- env->halted = !cpu_is_bsp(cpu);
+ cpu_reset(c);
+ c->halted = !cpu_is_bsp(cpu);
}
static X86CPU *pc_new_cpu(const char *cpu_model)
diff --git a/hw/ppc.c b/hw/ppc.c
index fa7ae74..02c5e3e 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -125,7 +125,7 @@ static void ppc6xx_set_irq(void *opaque, int pin, int level)
/* XXX: Note that the only way to restart the CPU is to reset it */
if (level) {
LOG_IRQ("%s: stop the CPU\n", __func__);
- env->halted = 1;
+ CPU(cpu)->halted = 1;
}
break;
case PPC6xx_INPUT_HRESET:
@@ -202,10 +202,10 @@ static void ppc970_set_irq(void *opaque, int pin, int level)
/* XXX: TODO: relay the signal to CKSTP_OUT pin */
if (level) {
LOG_IRQ("%s: stop the CPU\n", __func__);
- env->halted = 1;
+ CPU(cpu)->halted = 1;
} else {
LOG_IRQ("%s: restart the CPU\n", __func__);
- env->halted = 0;
+ CPU(cpu)->halted = 0;
qemu_cpu_kick(CPU(cpu));
}
break;
@@ -331,10 +331,10 @@ static void ppc40x_set_irq(void *opaque, int pin, int level)
/* Level sensitive - active low */
if (level) {
LOG_IRQ("%s: stop the CPU\n", __func__);
- env->halted = 1;
+ CPU(cpu)->halted = 1;
} else {
LOG_IRQ("%s: restart the CPU\n", __func__);
- env->halted = 0;
+ CPU(cpu)->halted = 0;
qemu_cpu_kick(CPU(cpu));
}
break;
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 3eb8a23..ab826de 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -203,7 +203,7 @@ static void mpc8544ds_cpu_reset_sec(void *opaque)
/* Secondary CPU starts in halted state for now. Needs to change when
implementing non-kernel boot. */
- env->halted = 1;
+ CPU(cpu)->halted = 1;
env->exception_index = EXCP_HLT;
}
@@ -216,7 +216,7 @@ static void mpc8544ds_cpu_reset(void *opaque)
cpu_reset(CPU(cpu));
/* Set initial guest state. */
- env->halted = 0;
+ CPU(cpu)->halted = 0;
env->gpr[1] = (16<<20) - 8;
env->gpr[3] = bi->dt_base;
env->nip = bi->entry;
diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c
index a4b49e6..65f0b6f 100644
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@@ -112,7 +112,7 @@ static void spin_kick(void *data)
map_start = ldq_p(&curspin->addr) & ~(map_size - 1);
mmubooke_create_initial_mapping(env, 0, map_start, map_size);
- env->halted = 0;
+ cpu->halted = 0;
env->exception_index = -1;
cpu->stopped = false;
qemu_cpu_kick(cpu);
diff --git a/hw/pxa2xx_gpio.c b/hw/pxa2xx_gpio.c
index 3c90c9c..5fcb992 100644
--- a/hw/pxa2xx_gpio.c
+++ b/hw/pxa2xx_gpio.c
@@ -118,7 +118,8 @@ static void pxa2xx_gpio_set(void *opaque, int line, int level)
pxa2xx_gpio_irq_update(s);
/* Wake-up GPIOs */
- if (s->cpu->env.halted && (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])) {
+ if (CPU(s->cpu)->halted &&
+ (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])) {
cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_EXITTB);
}
}
diff --git a/hw/pxa2xx_pic.c b/hw/pxa2xx_pic.c
index c560133..c8f01e8 100644
--- a/hw/pxa2xx_pic.c
+++ b/hw/pxa2xx_pic.c
@@ -47,7 +47,7 @@ static void pxa2xx_pic_update(void *opaque)
uint32_t mask[2];
PXA2xxPICState *s = (PXA2xxPICState *) opaque;
- if (s->cpu->env.halted) {
+ if (CPU(s->cpu)->halted) {
mask[0] = s->int_pending[0] & (s->int_enabled[0] | s->int_idle);
mask[1] = s->int_pending[1] & (s->int_enabled[1] | s->int_idle);
if (mask[0] || mask[1]) {
diff --git a/hw/s390-virtio.c b/hw/s390-virtio.c
index 47eed35..566760e 100644
--- a/hw/s390-virtio.c
+++ b/hw/s390-virtio.c
@@ -132,19 +132,23 @@ static unsigned s390_running_cpus;
void s390_add_running_cpu(CPUS390XState *env)
{
- if (env->halted) {
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ if (cpu->halted) {
s390_running_cpus++;
- env->halted = 0;
+ cpu->halted = 0;
env->exception_index = -1;
}
}
unsigned s390_del_running_cpu(CPUS390XState *env)
{
- if (env->halted == 0) {
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ if (cpu->halted == 0) {
assert(s390_running_cpus >= 1);
s390_running_cpus--;
- env->halted = 1;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
}
return s390_running_cpus;
@@ -218,7 +222,7 @@ static void s390_init(ram_addr_t my_ram_size,
env = tmp_env;
}
ipi_states[i] = cpu;
- tmp_env->halted = 1;
+ CPU(cpu)->halted = 1;
tmp_env->exception_index = EXCP_HLT;
tmp_env->storage_keys = storage_keys;
}
diff --git a/hw/spapr.c b/hw/spapr.c
index f9c3631..d553951 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -500,7 +500,7 @@ static void spapr_reset(void *opaque)
/* Set up the entry state */
first_cpu->gpr[3] = spapr->fdt_addr;
first_cpu->gpr[5] = 0;
- first_cpu->halted = 0;
+ ENV_GET_CPU(first_cpu)->halted = 0;
first_cpu->nip = spapr->entry_point;
}
@@ -732,7 +732,7 @@ static void ppc_spapr_init(ram_addr_t ram_size,
/* SLOF will startup the secondary CPUs using RTAS */
for (env = first_cpu; env != NULL; env = env->next_cpu) {
- env->halted = 1;
+ ENV_GET_CPU(env)->halted = 1;
}
/* Prepare the device tree */
diff --git a/hw/spapr_hcall.c b/hw/spapr_hcall.c
index ebb271c..7165796 100644
--- a/hw/spapr_hcall.c
+++ b/hw/spapr_hcall.c
@@ -550,7 +550,7 @@ static target_ulong h_cede(PowerPCCPU *cpu, sPAPREnvironment *spapr,
env->msr |= (1ULL << MSR_EE);
hreg_compute_hflags(env);
if (!cpu_has_work(CPU(cpu))) {
- env->halted = 1;
+ CPU(cpu)->halted = 1;
}
return H_SUCCESS;
}
diff --git a/hw/spapr_rtas.c b/hw/spapr_rtas.c
index a343055..d3c503c 100644
--- a/hw/spapr_rtas.c
+++ b/hw/spapr_rtas.c
@@ -131,6 +131,7 @@ static void rtas_query_cpu_stopped_state(sPAPREnvironment *spapr,
{
target_ulong id;
CPUPPCState *env;
+ CPUState *cpu;
if (nargs != 1 || nret != 2) {
rtas_st(rets, 0, -3);
@@ -139,11 +140,12 @@ static void rtas_query_cpu_stopped_state(sPAPREnvironment *spapr,
id = rtas_ld(args, 0);
for (env = first_cpu; env; env = env->next_cpu) {
+ cpu = ENV_GET_CPU(env);
if (env->cpu_index != id) {
continue;
}
- if (env->halted) {
+ if (cpu->halted) {
rtas_st(rets, 1, 0);
} else {
rtas_st(rets, 1, 2);
@@ -182,7 +184,7 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
continue;
}
- if (!env->halted) {
+ if (!cpu->halted) {
rtas_st(rets, 0, -1);
return;
}
@@ -190,7 +192,7 @@ static void rtas_start_cpu(sPAPREnvironment *spapr,
env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
env->nip = start;
env->gpr[3] = r3;
- env->halted = 0;
+ cpu->halted = 0;
qemu_cpu_kick(cpu);
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 4929677..7bb0bce 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -257,7 +257,7 @@ static void cpu_kick_irq(SPARCCPU *cpu)
{
CPUSPARCState *env = &cpu->env;
- env->halted = 0;
+ CPU(cpu)->halted = 0;
cpu_check_irqs(env);
qemu_cpu_kick(CPU(cpu));
}
@@ -284,20 +284,18 @@ static void dummy_cpu_set_irq(void *opaque, int irq, int level)
static void main_cpu_reset(void *opaque)
{
- SPARCCPU *cpu = opaque;
- CPUSPARCState *env = &cpu->env;
+ CPUState *cpu = CPU(opaque);
- cpu_reset(CPU(cpu));
- env->halted = 0;
+ cpu_reset(cpu);
+ cpu->halted = 0;
}
static void secondary_cpu_reset(void *opaque)
{
- SPARCCPU *cpu = opaque;
- CPUSPARCState *env = &cpu->env;
+ CPUState *cpu = CPU(opaque);
- cpu_reset(CPU(cpu));
- env->halted = 1;
+ cpu_reset(cpu);
+ cpu->halted = 1;
}
static void cpu_halt_signal(void *opaque, int irq, int level)
@@ -829,7 +827,7 @@ static void cpu_devinit(const char *cpu_model, unsigned int id,
qemu_register_reset(main_cpu_reset, cpu);
} else {
qemu_register_reset(secondary_cpu_reset, cpu);
- env->halted = 1;
+ CPU(cpu)->halted = 1;
}
*cpu_irqs = qemu_allocate_irqs(cpu_set_irq, cpu, MAX_PILS);
env->prom_addr = prom_addr;
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 56c3ddf..affd7bc 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -253,6 +253,7 @@ static uint64_t sun4u_load_kernel(const char *kernel_filename,
void cpu_check_irqs(CPUSPARCState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
uint32_t pil = env->pil_in |
(env->softint & ~(SOFTINT_TIMER | SOFTINT_STIMER));
@@ -269,7 +270,7 @@ void cpu_check_irqs(CPUSPARCState *env)
/* The bit corresponding to psrpil is (1<< psrpil), the next bit
is (2 << psrpil). */
if (pil < (2 << env->psrpil)){
- if (env->interrupt_request & CPU_INTERRUPT_HARD) {
+ if (cpu->interrupt_request & CPU_INTERRUPT_HARD) {
CPUIRQ_DPRINTF("Reset CPU IRQ (current interrupt %x)\n",
env->interrupt_index);
env->interrupt_index = 0;
@@ -301,7 +302,7 @@ void cpu_check_irqs(CPUSPARCState *env)
break;
}
}
- } else if (env->interrupt_request & CPU_INTERRUPT_HARD) {
+ } else if (cpu->interrupt_request & CPU_INTERRUPT_HARD) {
CPUIRQ_DPRINTF("Interrupts disabled, pil=%08x pil_in=%08x softint=%08x "
"current interrupt %x\n",
pil, env->pil_in, env->softint, env->interrupt_index);
@@ -314,7 +315,7 @@ static void cpu_kick_irq(SPARCCPU *cpu)
{
CPUSPARCState *env = &cpu->env;
- env->halted = 0;
+ CPU(cpu)->halted = 0;
cpu_check_irqs(env);
qemu_cpu_kick(CPU(cpu));
}
@@ -327,7 +328,7 @@ static void cpu_set_ivec_irq(void *opaque, int irq, int level)
if (level) {
if (!(env->ivec_status & 0x20)) {
CPUIRQ_DPRINTF("Raise IVEC IRQ %d\n", irq);
- env->halted = 0;
+ CPU(cpu)->halted = 0;
env->interrupt_index = TT_IVEC;
env->ivec_status |= 0x20;
env->ivec_data[0] = (0x1f << 6) | irq;
diff --git a/hw/xen_machine_pv.c b/hw/xen_machine_pv.c
index 4b72aa7..c387fdf 100644
--- a/hw/xen_machine_pv.c
+++ b/hw/xen_machine_pv.c
@@ -37,7 +37,6 @@ static void xen_init_pv(ram_addr_t ram_size,
const char *cpu_model)
{
X86CPU *cpu;
- CPUX86State *env;
DriveInfo *dinfo;
int i;
@@ -50,8 +49,7 @@ static void xen_init_pv(ram_addr_t ram_size,
#endif
}
cpu = cpu_x86_init(cpu_model);
- env = &cpu->env;
- env->halted = 1;
+ CPU(cpu)->halted = 1;
/* Initialize backend core & drivers */
if (xen_be_init() != 0) {
diff --git a/hw/xtensa_pic.c b/hw/xtensa_pic.c
index 1ec70cd..8a65b92 100644
--- a/hw/xtensa_pic.c
+++ b/hw/xtensa_pic.c
@@ -47,6 +47,7 @@ void xtensa_advance_ccount(CPUXtensaState *env, uint32_t d)
void check_interrupts(CPUXtensaState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int minlevel = xtensa_get_cintlevel(env);
uint32_t int_set_enabled = env->sregs[INTSET] & env->sregs[INTENABLE];
int level;
@@ -54,7 +55,7 @@ void check_interrupts(CPUXtensaState *env)
/* If the CPU is halted advance CCOUNT according to the vm_clock time
* elapsed since the moment when it was advanced last time.
*/
- if (env->halted) {
+ if (cpu->halted) {
int64_t now = qemu_get_clock_ns(vm_clock);
xtensa_advance_ccount(env,
@@ -128,7 +129,7 @@ static void xtensa_ccompare_cb(void *opaque)
XtensaCPU *cpu = opaque;
CPUXtensaState *env = &cpu->env;
- if (env->halted) {
+ if (CPU(cpu)->halted) {
env->halt_clock = qemu_get_clock_ns(vm_clock);
xtensa_advance_ccount(env, env->wake_ccount - env->sregs[CCOUNT]);
if (!cpu_has_work(CPU(cpu))) {
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index 7d03369..5399593 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -58,6 +58,8 @@ typedef struct CPUClass {
/**
* CPUState:
* @created: Indicates whether the CPU thread has been successfully created.
+ * @interrupt_request: Indicates a pending interrupt request.
+ * @halted: Nonzero if the CPU is in suspended state.
* @stop: Indicates a pending stop request.
* @stopped: Indicates the CPU has been artificially stopped.
*
@@ -77,6 +79,8 @@ struct CPUState {
struct qemu_work_item *queued_work_first, *queued_work_last;
bool thread_kicked;
bool created;
+ uint32_t interrupt_request;
+ uint32_t halted;
bool stop;
bool stopped;
diff --git a/kvm-all.c b/kvm-all.c
index bbd2049..b4b8a14 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -833,7 +833,7 @@ static void kvm_handle_interrupt(CPUArchState *env, int mask)
{
CPUState *cpu = ENV_GET_CPU(env);
- env->interrupt_request |= mask;
+ cpu->interrupt_request |= mask;
if (!qemu_cpu_is_self(cpu)) {
qemu_cpu_kick(cpu);
diff --git a/qom/cpu.c b/qom/cpu.c
index 729f4cf..9ae9a3c 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -32,6 +32,8 @@ void cpu_reset(CPUState *cpu)
static void cpu_common_reset(CPUState *cpu)
{
+ cpu->halted = 0;
+ cpu->interrupt_request = 0;
}
void cpu_tlb_flush(CPUState *cpu, bool flush_global)
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index a43fb94..3f321e2 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -501,8 +501,6 @@ static inline void cpu_set_tls(CPUAlphaState *env, target_ulong newtls)
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUAlphaState *env = &ALPHA_CPU(cpu)->env;
-
/* Here we are checking to see if the CPU should wake up from HALT.
We will have gotten into this state only for WTINT from PALmode. */
/* ??? I'm not sure how the IPL state works with WTINT to keep a CPU
@@ -510,7 +508,7 @@ static inline bool cpu_has_work(CPUState *cpu)
assume that if a CPU really wants to stay asleep, it will mask
interrupts at the chipset level, which will prevent these bits
from being set in the first place. */
- return env->interrupt_request & (CPU_INTERRUPT_HARD
+ return cpu->interrupt_request & (CPU_INTERRUPT_HARD
| CPU_INTERRUPT_TIMER
| CPU_INTERRUPT_SMP
| CPU_INTERRUPT_MCHK);
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 12de6a3..4ec7a7d 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -1693,7 +1693,8 @@ static ExitStatus gen_mtpr(DisasContext *ctx, int rb, int regno)
case 253:
/* WAIT */
tmp = tcg_const_i64(1);
- tcg_gen_st32_i64(tmp, cpu_env, offsetof(CPUAlphaState, halted));
+ tcg_gen_st32_i64(tmp, cpu_env, offsetof(CPUState, halted)
+ - offsetof(AlphaCPU, env));
return gen_excp(ctx, EXCP_HLT, 0);
case 252:
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index d4a19be..0cf883f 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -553,9 +553,7 @@ static inline void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUARMState *env = &ARM_CPU(cpu)->env;
-
- return env->interrupt_request &
+ return cpu->interrupt_request &
(CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
}
diff --git a/target-arm/helper.c b/target-arm/helper.c
index bbb1d05..39a455d 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -527,6 +527,7 @@ static void do_interrupt_v7m(CPUARMState *env)
/* Handle a CPU exception. */
void do_interrupt(CPUARMState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
uint32_t addr;
uint32_t mask;
int new_mode;
@@ -632,7 +633,7 @@ void do_interrupt(CPUARMState *env)
}
env->regs[14] = env->regs[15] + offset;
env->regs[15] = addr;
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ cpu->interrupt_request |= CPU_INTERRUPT_EXITTB;
}
/* Check section/page access permissions.
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index b53369d..2714021 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -234,8 +234,10 @@ uint32_t HELPER(usat16)(uint32_t x, uint32_t shift)
void HELPER(wfi)(void)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
env->exception_index = EXCP_HLT;
- env->halted = 1;
+ cpu->halted = 1;
cpu_loop_exit(env);
}
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 2f71f63..566129c 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -285,9 +285,7 @@ void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf);
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUCRISState *env = &CRIS_CPU(cpu)->env;
-
- return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
+ return cpu->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
}
#include "exec-all.h"
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 1ad9ec7..14c3795 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -2895,7 +2895,9 @@ static int dec_rfe_etc(DisasContext *dc)
cris_cc_mask(dc, 0);
if (dc->op2 == 15) {
- t_gen_mov_env_TN(halted, tcg_const_tl(1));
+ tcg_gen_st_i32(tcg_const_i32(1), cpu_env,
+ offsetof(CPUState, halted) -
+ offsetof(CRISCPU, env));
tcg_gen_movi_tl(env_pc, dc->pc + 2);
t_gen_raise_exception(EXCP_HLT);
return 2;
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 36e7911..1ee6e6b 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -864,7 +864,7 @@ static inline void cpu_x86_load_seg_cache_sipi(X86CPU *cpu,
sipi_vector << 12,
env->segs[R_CS].limit,
env->segs[R_CS].flags);
- env->halted = 0;
+ CPU(cpu)->halted = 0;
}
int cpu_x86_get_descr_debug(CPUX86State *env, unsigned int selector,
@@ -1039,9 +1039,9 @@ static inline bool cpu_has_work(CPUState *cpu)
{
CPUX86State *env = &X86_CPU(cpu)->env;
- return ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ return ((cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) ||
- (env->interrupt_request & (CPU_INTERRUPT_NMI |
+ (cpu->interrupt_request & (CPU_INTERRUPT_NMI |
CPU_INTERRUPT_INIT |
CPU_INTERRUPT_SIPI |
CPU_INTERRUPT_MCE));
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 2d5ca8c..9f5b3ad 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -171,6 +171,7 @@ done:
void cpu_dump_state(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf,
int flags)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int eflags, i, nb;
char cc_op_name[32];
static const char *seg_name[6] = { "ES", "CS", "SS", "DS", "FS", "GS" };
@@ -214,7 +215,7 @@ void cpu_dump_state(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf,
(env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1,
(env->a20_mask >> 20) & 1,
(env->hflags >> HF_SMM_SHIFT) & 1,
- env->halted);
+ cpu->halted);
} else
#endif
{
@@ -241,7 +242,7 @@ void cpu_dump_state(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf,
(env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1,
(env->a20_mask >> 20) & 1,
(env->hflags >> HF_SMM_SHIFT) & 1,
- env->halted);
+ cpu->halted);
}
for(i = 0; i < 6; i++) {
@@ -1185,14 +1186,15 @@ X86CPU *cpu_x86_init(const char *cpu_model)
void do_cpu_init(X86CPU *cpu)
{
CPUX86State *env = &cpu->env;
- int sipi = env->interrupt_request & CPU_INTERRUPT_SIPI;
+ CPUState *c = CPU(cpu);
+ int sipi = c->interrupt_request & CPU_INTERRUPT_SIPI;
uint64_t pat = env->pat;
- cpu_reset(CPU(cpu));
- env->interrupt_request = sipi;
+ cpu_reset(c);
+ c->interrupt_request = sipi;
env->pat = pat;
apic_init_reset(env->apic_state);
- env->halted = !cpu_is_bsp(cpu);
+ c->halted = !cpu_is_bsp(cpu);
}
void do_cpu_sipi(X86CPU *cpu)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index f7651bf..088daca 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -1354,7 +1354,7 @@ static int kvm_get_mp_state(X86CPU *cpu)
}
env->mp_state = mp_state.mp_state;
if (kvm_irqchip_in_kernel()) {
- env->halted = (mp_state.mp_state == KVM_MP_STATE_HALTED);
+ CPU(cpu)->halted = (mp_state.mp_state == KVM_MP_STATE_HALTED);
}
return 0;
}
@@ -1634,11 +1634,12 @@ int kvm_arch_get_registers(CPUX86State *env)
void kvm_arch_pre_run(CPUX86State *env, struct kvm_run *run)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int ret;
/* Inject NMI */
- if (env->interrupt_request & CPU_INTERRUPT_NMI) {
- env->interrupt_request &= ~CPU_INTERRUPT_NMI;
+ if (cpu->interrupt_request & CPU_INTERRUPT_NMI) {
+ cpu->interrupt_request &= ~CPU_INTERRUPT_NMI;
DPRINTF("injected NMI\n");
ret = kvm_vcpu_ioctl(env, KVM_NMI);
if (ret < 0) {
@@ -1650,18 +1651,18 @@ void kvm_arch_pre_run(CPUX86State *env, struct kvm_run *run)
if (!kvm_irqchip_in_kernel()) {
/* Force the VCPU out of its inner loop to process any INIT requests
* or pending TPR access reports. */
- if (env->interrupt_request &
+ if (cpu->interrupt_request &
(CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) {
env->exit_request = 1;
}
/* Try to inject an interrupt if the guest can accept it */
if (run->ready_for_interrupt_injection &&
- (env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) {
int irq;
- env->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;
irq = cpu_get_pic_interrupt(env);
if (irq >= 0) {
struct kvm_interrupt intr;
@@ -1681,7 +1682,7 @@ void kvm_arch_pre_run(CPUX86State *env, struct kvm_run *run)
* interrupt, request an interrupt window exit. This will
* cause a return to userspace as soon as the guest is ready to
* receive interrupts. */
- if ((env->interrupt_request & CPU_INTERRUPT_HARD)) {
+ if ((cpu->interrupt_request & CPU_INTERRUPT_HARD)) {
run->request_interrupt_window = 1;
} else {
run->request_interrupt_window = 0;
@@ -1706,12 +1707,13 @@ void kvm_arch_post_run(CPUX86State *env, struct kvm_run *run)
int kvm_arch_process_async_events(CPUX86State *env)
{
X86CPU *cpu = x86_env_get_cpu(env);
+ CPUState *c = CPU(cpu);
- if (env->interrupt_request & CPU_INTERRUPT_MCE) {
+ if (c->interrupt_request & CPU_INTERRUPT_MCE) {
/* We must not raise CPU_INTERRUPT_MCE if it's not supported. */
assert(env->mcg_cap);
- env->interrupt_request &= ~CPU_INTERRUPT_MCE;
+ c->interrupt_request &= ~CPU_INTERRUPT_MCE;
kvm_cpu_synchronize_state(env);
@@ -1724,7 +1726,7 @@ int kvm_arch_process_async_events(CPUX86State *env)
env->exception_injected = EXCP12_MCHK;
env->has_error_code = 0;
- env->halted = 0;
+ c->halted = 0;
if (kvm_irqchip_in_kernel() && env->mp_state == KVM_MP_STATE_HALTED) {
env->mp_state = KVM_MP_STATE_RUNNABLE;
}
@@ -1734,37 +1736,38 @@ int kvm_arch_process_async_events(CPUX86State *env)
return 0;
}
- if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ if (((c->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) ||
- (env->interrupt_request & CPU_INTERRUPT_NMI)) {
- env->halted = 0;
+ (c->interrupt_request & CPU_INTERRUPT_NMI)) {
+ c->halted = 0;
}
- if (env->interrupt_request & CPU_INTERRUPT_INIT) {
+ if (c->interrupt_request & CPU_INTERRUPT_INIT) {
kvm_cpu_synchronize_state(env);
do_cpu_init(cpu);
}
- if (env->interrupt_request & CPU_INTERRUPT_SIPI) {
+ if (c->interrupt_request & CPU_INTERRUPT_SIPI) {
kvm_cpu_synchronize_state(env);
do_cpu_sipi(cpu);
}
- if (env->interrupt_request & CPU_INTERRUPT_TPR) {
- env->interrupt_request &= ~CPU_INTERRUPT_TPR;
+ if (c->interrupt_request & CPU_INTERRUPT_TPR) {
+ c->interrupt_request &= ~CPU_INTERRUPT_TPR;
kvm_cpu_synchronize_state(env);
apic_handle_tpr_access_report(env->apic_state, env->eip,
env->tpr_access_type);
}
- return env->halted;
+ return c->halted;
}
-static int kvm_handle_halt(X86CPU *cpu)
+static int kvm_handle_halt(X86CPU *c)
{
- CPUX86State *env = &cpu->env;
+ CPUState *cpu = CPU(c);
+ CPUX86State *env = &c->env;
- if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ if (!((cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) &&
- !(env->interrupt_request & CPU_INTERRUPT_NMI)) {
- env->halted = 1;
+ !(cpu->interrupt_request & CPU_INTERRUPT_NMI)) {
+ cpu->halted = 1;
return EXCP_HLT;
}
diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c
index bc3b94e..6da14b9 100644
--- a/target-i386/op_helper.c
+++ b/target-i386/op_helper.c
@@ -4863,8 +4863,10 @@ void helper_idivq_EAX(target_ulong t0)
static void do_hlt(void)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
- env->halted = 1;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
cpu_loop_exit(env);
}
@@ -5109,6 +5111,7 @@ static inline void svm_load_seg_cache(target_phys_addr_t addr,
void helper_vmrun(int aflag, int next_eip_addend)
{
+ CPUState *cpu = ENV_GET_CPU(env);
target_ulong addr;
uint32_t event_inj;
uint32_t int_ctl;
@@ -5229,7 +5232,7 @@ void helper_vmrun(int aflag, int next_eip_addend)
env->hflags2 |= HF2_GIF_MASK;
if (int_ctl & V_IRQ_MASK) {
- env->interrupt_request |= CPU_INTERRUPT_VIRQ;
+ cpu->interrupt_request |= CPU_INTERRUPT_VIRQ;
}
/* maybe we need to inject an event */
@@ -5487,6 +5490,7 @@ void helper_svm_check_io(uint32_t port, uint32_t param,
/* Note: currently only 32 bits of exit_code are used */
void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
{
+ CPUState *cpu = ENV_GET_CPU(env);
uint32_t int_ctl;
qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016" PRIx64 ", " TARGET_FMT_lx ")!\n",
@@ -5526,8 +5530,9 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
int_ctl = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl));
int_ctl &= ~(V_TPR_MASK | V_IRQ_MASK);
int_ctl |= env->v_tpr & V_TPR_MASK;
- if (env->interrupt_request & CPU_INTERRUPT_VIRQ)
+ if (cpu->interrupt_request & CPU_INTERRUPT_VIRQ) {
int_ctl |= V_IRQ_MASK;
+ }
stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl), int_ctl);
stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rflags), compute_eflags());
@@ -5543,7 +5548,7 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
env->hflags &= ~HF_SVMI_MASK;
env->intercept = 0;
env->intercept_exceptions = 0;
- env->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
env->tsc_offset = 0;
env->gdt.base = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.base));
diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index 7243b4f..559890b 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -255,9 +255,7 @@ static inline void cpu_get_tb_cpu_state(CPULM32State *env, target_ulong *pc,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPULM32State *env = &LM32_CPU(cpu)->env;
-
- return env->interrupt_request & CPU_INTERRUPT_HARD;
+ return cpu->interrupt_request & CPU_INTERRUPT_HARD;
}
#include "exec-all.h"
diff --git a/target-lm32/op_helper.c b/target-lm32/op_helper.c
index 51edc1a..7f49c2b 100644
--- a/target-lm32/op_helper.c
+++ b/target-lm32/op_helper.c
@@ -26,7 +26,9 @@ void helper_raise_exception(uint32_t index)
void helper_hlt(void)
{
- env->halted = 1;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
cpu_loop_exit(env);
}
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 780e2c9..d334352 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -259,9 +259,7 @@ static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUM68KState *env = &M68K_CPU(cpu)->env;
-
- return env->interrupt_request & CPU_INTERRUPT_HARD;
+ return cpu->interrupt_request & CPU_INTERRUPT_HARD;
}
#include "exec-all.h"
diff --git a/target-m68k/op_helper.c b/target-m68k/op_helper.c
index 1971a57..4413b3a 100644
--- a/target-m68k/op_helper.c
+++ b/target-m68k/op_helper.c
@@ -96,6 +96,7 @@ static void do_rte(void)
static void do_interrupt_all(int is_hw)
{
+ CPUState *cpu = ENV_GET_CPU(env);
uint32_t sp;
uint32_t fmt;
uint32_t retaddr;
@@ -120,7 +121,7 @@ static void do_interrupt_all(int is_hw)
do_m68k_semihosting(env, env->dregs[0]);
return;
}
- env->halted = 1;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
cpu_loop_exit(env);
return;
diff --git a/target-m68k/qregs.def b/target-m68k/qregs.def
index 49400c4..4235b02 100644
--- a/target-m68k/qregs.def
+++ b/target-m68k/qregs.def
@@ -8,6 +8,5 @@ DEFO32(CC_X, cc_x)
DEFO32(DIV1, div1)
DEFO32(DIV2, div2)
DEFO32(EXCEPTION, exception_index)
-DEFO32(HALTED, halted)
DEFO32(MACSR, macsr)
DEFO32(MAC_MASK, mac_mask)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 9fc1e31..fef0c79 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -42,6 +42,8 @@
#undef DEFO64
#undef DEFF64
+static TCGv QREG_HALTED;
+
static TCGv_ptr cpu_env;
static char cpu_reg_names[3*8*3 + 5*4];
@@ -76,6 +78,10 @@ void m68k_tcg_init(void)
#undef DEFO64
#undef DEFF64
+ QREG_HALTED = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, halted)
+ - offsetof(M68kCPU, env),
+ "HALTED");
+
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
p = cpu_reg_names;
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 6131287..e17a0db 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -371,9 +371,7 @@ void cpu_unassigned_access(CPUMBState *env1, target_phys_addr_t addr,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUMBState *env = &MICROBLAZE_CPU(cpu)->env;
-
- return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
+ return cpu->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
}
#include "exec-all.h"
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 9ce53da..9ac5733 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -714,7 +714,7 @@ static inline bool cpu_has_work(CPUState *cpu)
/* It is implementation dependent if non-enabled interrupts
wake-up the CPU, however most of the implementations only
check for interrupts that can be taken. */
- if ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ if ((cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
cpu_mips_hw_interrupts_pending(env)) {
has_work = true;
}
@@ -723,7 +723,7 @@ static inline bool cpu_has_work(CPUState *cpu)
if (env->CP0_Config3 & (1 << CP0C3_MT)) {
/* The QEMU model will issue an _WAKE request whenever the CPUs
should be woken up. */
- if (env->interrupt_request & CPU_INTERRUPT_WAKE) {
+ if (cpu->interrupt_request & CPU_INTERRUPT_WAKE) {
has_work = true;
}
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index d26c9fb..fd4125e 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -746,10 +746,11 @@ void helper_sdm (target_ulong addr, target_ulong reglist, uint32_t mem_idx)
static bool mips_vpe_is_wfi(MIPSCPU *c)
{
CPUMIPSState *env = &c->env;
+ CPUState *cpu = CPU(c);
/* If the VPE is halted but otherwise active, it means it's waiting for
an interrupt. */
- return env->halted && mips_vpe_active(env);
+ return cpu->halted && mips_vpe_active(env);
}
static inline void mips_vpe_wake(CPUMIPSState *c)
@@ -766,7 +767,7 @@ static inline void mips_vpe_sleep(MIPSCPU *cpu)
/* The VPE was shut off, really go to bed.
Reset any old _WAKE requests. */
- c->halted = 1;
+ CPU(cpu)->halted = 1;
cpu_reset_interrupt(c, CPU_INTERRUPT_WAKE);
}
@@ -2286,9 +2287,11 @@ void helper_pmon (int function)
}
}
-void helper_wait (void)
+void helper_wait(void)
{
- env->halted = 1;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->halted = 1;
cpu_reset_interrupt(env, CPU_INTERRUPT_WAKE);
helper_raise_exception(EXCP_HLT);
}
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 4e15ee3..793f72b 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12716,6 +12716,10 @@ MIPSCPU *cpu_mips_init(const char *cpu_model)
void cpu_state_reset(CPUMIPSState *env)
{
+#ifndef CONFIG_USER_ONLY
+ CPUState *cpu = ENV_GET_CPU(env);
+#endif
+
if (qemu_loglevel_mask(CPU_LOG_RESET)) {
qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
log_cpu_state(env, 0);
@@ -12817,7 +12821,7 @@ void cpu_state_reset(CPUMIPSState *env)
env->tcs[i].CP0_TCHalt = 1;
}
env->active_tc.CP0_TCHalt = 1;
- env->halted = 1;
+ cpu->halted = 1;
if (!env->cpu_index) {
/* VPE0 starts up enabled. */
@@ -12825,7 +12829,7 @@ void cpu_state_reset(CPUMIPSState *env)
env->CP0_VPEConf0 |= (1 << CP0VPEC0_MVP) | (1 << CP0VPEC0_VPA);
/* TC0 starts up unhalted. */
- env->halted = 0;
+ cpu->halted = 0;
env->active_tc.CP0_TCHalt = 0;
env->tcs[0].CP0_TCHalt = 0;
/* With thread 0 active. */
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index f1927d5..935c347 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -2188,7 +2188,7 @@ static inline bool cpu_has_work(CPUState *cpu)
{
CPUPPCState *env = &POWERPC_CPU(cpu)->env;
- return msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD);
+ return msr_ee && (cpu->interrupt_request & CPU_INTERRUPT_HARD);
}
#include "exec-all.h"
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 7747674..8059654 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -2573,8 +2573,8 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
fprintf(stderr, "Machine check while not allowed. "
"Entering checkstop state\n");
}
- env->halted = 1;
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ CPU(cpu)->halted = 1;
+ CPU(cpu)->interrupt_request |= CPU_INTERRUPT_EXITTB;
}
if (0) {
/* XXX: find a suitable condition to enable the hypervisor mode */
diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h
index 3c98850..02a7f79 100644
--- a/target-ppc/helper_regs.h
+++ b/target-ppc/helper_regs.h
@@ -67,6 +67,9 @@ static inline void hreg_compute_hflags(CPUPPCState *env)
static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
int alter_hv)
{
+#if !defined(CONFIG_USER_ONLY)
+ CPUState *cpu = ENV_GET_CPU(env);
+#endif
int excp;
excp = 0;
@@ -82,7 +85,7 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
/* Flush all tlb when changing translation mode */
tlb_flush(env, 1);
excp = POWERPC_EXCP_NONE;
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ cpu->interrupt_request |= CPU_INTERRUPT_EXITTB;
}
if (unlikely((env->flags & POWERPC_FLAG_TGPR) &&
((value ^ env->msr) & (1 << MSR_TGPR)))) {
@@ -99,7 +102,7 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
#if !defined (CONFIG_USER_ONLY)
if (unlikely(msr_pow == 1)) {
if ((*env->check_pow)(env)) {
- env->halted = 1;
+ cpu->halted = 1;
excp = EXCP_HALTED;
}
}
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 148c095..126a018 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -471,6 +471,7 @@ int kvmppc_set_interrupt(CPUPPCState *env, int irq, int level)
void kvm_arch_pre_run(CPUPPCState *env, struct kvm_run *run)
{
+ CPUState *cpu = ENV_GET_CPU(env);
int r;
unsigned irq;
@@ -478,7 +479,7 @@ void kvm_arch_pre_run(CPUPPCState *env, struct kvm_run *run)
* interrupt, reset, etc) in PPC-specific env->irq_input_state. */
if (!cap_interrupt_level &&
run->ready_for_interrupt_injection &&
- (env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->irq_input_state & (1<<PPC_INPUT_INT)))
{
/* For now KVM disregards the 'irq' argument. However, in the
@@ -508,13 +509,17 @@ void kvm_arch_post_run(CPUPPCState *env, struct kvm_run *run)
int kvm_arch_process_async_events(CPUPPCState *env)
{
- return env->halted;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ return cpu->halted;
}
static int kvmppc_handle_halt(CPUPPCState *env)
{
- if (!(env->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
- env->halted = 1;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ if (!(cpu->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
}
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index 4ef2332..0f8d3f0 100644
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -1594,9 +1594,11 @@ void helper_fcmpo (uint64_t arg1, uint64_t arg2, uint32_t crfD)
#if !defined (CONFIG_USER_ONLY)
void helper_store_msr (target_ulong val)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
val = hreg_store_msr(env, val, 0);
if (val != 0) {
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ cpu->interrupt_request |= CPU_INTERRUPT_EXITTB;
helper_raise_exception(val);
}
}
@@ -1604,6 +1606,8 @@ void helper_store_msr (target_ulong val)
static inline void do_rfi(target_ulong nip, target_ulong msr,
target_ulong msrm, int keep_msrh)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
#if defined(TARGET_PPC64)
if (msr & (1ULL << MSR_SF)) {
nip = (uint64_t)nip;
@@ -1627,7 +1631,7 @@ static inline void do_rfi(target_ulong nip, target_ulong msr,
/* No need to raise an exception here,
* as rfi is always the last insn of a TB
*/
- env->interrupt_request |= CPU_INTERRUPT_EXITTB;
+ cpu->interrupt_request |= CPU_INTERRUPT_EXITTB;
}
void helper_rfi (void)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index cf59765..57b63ac 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -3213,7 +3213,8 @@ static void gen_sync(DisasContext *ctx)
static void gen_wait(DisasContext *ctx)
{
TCGv_i32 t0 = tcg_temp_new_i32();
- tcg_gen_st_i32(t0, cpu_env, offsetof(CPUPPCState, halted));
+ tcg_gen_st_i32(t0, cpu_env, offsetof(CPUState, halted)
+ - offsetof(PowerPCCPU, env));
tcg_temp_free_i32(t0);
/* Stop translation, as the CPU is supposed to sleep from now */
gen_exception_err(ctx, EXCP_HLT, 1);
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index be13348..ecda9e6 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -989,7 +989,7 @@ static inline bool cpu_has_work(CPUState *cpu)
{
CPUS390XState *env = &S390_CPU(cpu)->env;
- return (env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ return (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->psw.mask & PSW_MASK_EXT);
}
diff --git a/target-s390x/helper.c b/target-s390x/helper.c
index d0a1180..7bf9554 100644
--- a/target-s390x/helper.c
+++ b/target-s390x/helper.c
@@ -438,6 +438,8 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUS390XState *env, target_ulong vadd
void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
if (mask & PSW_MASK_WAIT) {
if (!(mask & (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK))) {
if (s390_del_running_cpu(env) == 0) {
@@ -446,7 +448,7 @@ void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr)
#endif
}
}
- env->halted = 1;
+ cpu->halted = 1;
env->exception_index = EXCP_HLT;
}
@@ -571,8 +573,10 @@ static void do_ext_interrupt(CPUS390XState *env)
load_psw(env, mask, addr);
}
-void do_interrupt (CPUS390XState *env)
+void do_interrupt(CPUS390XState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
qemu_log("%s: %d at pc=%" PRIx64 "\n", __FUNCTION__, env->exception_index,
env->psw.addr);
@@ -610,7 +614,7 @@ void do_interrupt (CPUS390XState *env)
env->exception_index = -1;
if (!env->pending_int) {
- env->interrupt_request &= ~CPU_INTERRUPT_HARD;
+ cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;
}
}
diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
index e09709d..722511e 100644
--- a/target-s390x/kvm.c
+++ b/target-s390x/kvm.c
@@ -172,7 +172,9 @@ void kvm_arch_post_run(CPUS390XState *env, struct kvm_run *run)
int kvm_arch_process_async_events(CPUS390XState *env)
{
- return env->halted;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ return cpu->halted;
}
void kvm_s390_interrupt_internal(CPUS390XState *env, int type, uint32_t parm,
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index fd6fb86..ba66479 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -373,9 +373,7 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc,
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUSH4State *env = &SUPERH_CPU(cpu)->env;
-
- return env->interrupt_request & CPU_INTERRUPT_HARD;
+ return cpu->interrupt_request & CPU_INTERRUPT_HARD;
}
#include "exec-all.h"
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index 5c57380..fe3063d 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -78,9 +78,10 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr)
#define MMU_DADDR_ERROR_READ (-12)
#define MMU_DADDR_ERROR_WRITE (-13)
-void do_interrupt(CPUSH4State * env)
+void do_interrupt(CPUSH4State *env)
{
- int do_irq = env->interrupt_request & CPU_INTERRUPT_HARD;
+ CPUState *cpu = ENV_GET_CPU(env);
+ int do_irq = cpu->interrupt_request & CPU_INTERRUPT_HARD;
int do_exp, irq_vector = env->exception_index;
/* prioritize exceptions over interrupts */
diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c
index 4054791..4226671 100644
--- a/target-sh4/op_helper.c
+++ b/target-sh4/op_helper.c
@@ -117,7 +117,9 @@ void helper_debug(void)
void helper_sleep(uint32_t next_pc)
{
- env->halted = 1;
+ CPUState *cpu = ENV_GET_CPU(env);
+
+ cpu->halted = 1;
env->in_sleep = 1;
env->exception_index = EXCP_HLT;
env->pc = next_pc;
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index e3b3b44..31cd9f6 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -767,7 +767,7 @@ static inline bool cpu_has_work(CPUState *cpu)
{
CPUSPARCState *env1 = &SPARC_CPU(cpu)->env;
- return (env1->interrupt_request & CPU_INTERRUPT_HARD) &&
+ return (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
cpu_interrupts_enabled(env1);
}
diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index 2843a97..48431cd 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -185,9 +185,7 @@ void switch_mode(CPUUniCore32State *, int);
static inline bool cpu_has_work(CPUState *cpu)
{
- CPUUniCore32State *env = &UNICORE32_CPU(cpu)->env;
-
- return env->interrupt_request &
+ return cpu->interrupt_request &
(CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
}
diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c
index 364dc19..8eb02a5 100644
--- a/target-xtensa/op_helper.c
+++ b/target-xtensa/op_helper.c
@@ -390,6 +390,8 @@ void HELPER(dump_state)(void)
void HELPER(waiti)(uint32_t pc, uint32_t intlevel)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
env->pc = pc;
env->sregs[PS] = (env->sregs[PS] & ~PS_INTLEVEL) |
(intlevel << PS_INTLEVEL_SHIFT);
@@ -400,7 +402,7 @@ void HELPER(waiti)(uint32_t pc, uint32_t intlevel)
}
env->halt_clock = qemu_get_clock_ns(vm_clock);
- env->halted = 1;
+ cpu->halted = 1;
if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT)) {
xtensa_rearm_ccompare_timer(env);
}
diff --git a/xen-all.c b/xen-all.c
index bdf9c0f..33ebb72 100644
--- a/xen-all.c
+++ b/xen-all.c
@@ -590,9 +590,9 @@ static MemoryListener xen_memory_listener = {
static void xen_reset_vcpu(void *opaque)
{
- CPUArchState *env = opaque;
+ CPUState *cpu = opaque;
- env->halted = 1;
+ cpu->halted = 1;
}
void xen_vcpu_init(void)
@@ -600,8 +600,10 @@ void xen_vcpu_init(void)
CPUArchState *first_cpu;
if ((first_cpu = qemu_get_cpu(0))) {
- qemu_register_reset(xen_reset_vcpu, first_cpu);
- xen_reset_vcpu(first_cpu);
+ CPUState *cpu = ENV_GET_CPU(first_cpu);
+
+ qemu_register_reset(xen_reset_vcpu, cpu);
+ xen_reset_vcpu(cpu);
}
}
--
1.7.7
^ permalink raw reply related [flat|nested] 109+ messages in thread
* Re: [PATCH qom-next 00/59] QOM CPUState, part 4: CPU_COMMON
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 11:27 ` Stefano Stabellini
-1 siblings, 0 replies; 109+ messages in thread
From: Stefano Stabellini @ 2012-05-23 11:27 UTC (permalink / raw)
To: Andreas Färber
Cc: qemu-devel, Anthony Liguori, Paolo Bonzini, Igor Mammedov,
Richard Henderson, Peter Maydell, Edgar E. Iglesias,
Michael Walle, Aurélien Jarno, Alexander Graf, David Gibson,
qemu-ppc, Blue Swirl, Guan Xuetao, Max Filippov, Avi Kivity,
Marcelo Tosatti, Jan Kiszka, kvm, Stefano Stabellini, xen-devel
[-- Attachment #1: Type: text/plain, Size: 1854 bytes --]
On Wed, 23 May 2012, Andreas Färber wrote:
> Hello,
>
> This series, based on qom-next and the two pending ARM cleanup patches, starts
> moving fields from CPUArchState (CPU_COMMON) to QOM CPUState. It stops short
> of moving all easily possible fields (i.e., those not depending on target_ulong
> or target_phys_addr_t) since the series got too long already and is expected to
> spark some controversies due to collisions with several other series.
>
> The series is structured as preparatory refactorings interwoven with the actual
> touch-all movement of one field ("cpu: Move ... to CPUState"), optionally
> followed by type signature cleanups, culminating in the movement of two fields
> that are tied together by VMState.
> Thus, unlike part 3, this series cannot randomly be cherry-picked to
> <arch>-next trees, only select parts thereof (e.g., use of cpu_s390x_init()).
>
> Please review and test.
>
> The use of cpu_index vs. cpuid_apic_id for x86 cpu[n] still needs some thought.
>
> The question was brought up whether adding the CPUs a child<X86CPU> properties
> should be generalized outside the machine scope - I don't think so, since CPU
> hotplug seems highly architecture-specific and not applicable everywhere (SoCs).
>
> Blue will likely have a superb idea how to avoid the cpu_tlb_flush() indirection
> that I needed for VMState, but apart from having been a lot of dumb typing, it
> works fine as interim solution. "Blah." wasn't terribly helpful as a comment.
>
> I have checked this to compile on ...
> * openSUSE 12.1 x86_64 w/KVM,
> * openSUSE Factory ppc w/KVM,
> * SLES 11 SP2 s390x w/KVM,
> * mingw32/64 cross-builds,
> * OpenBSD 5.1 amd64 (not for final version though, master doesn't build).
> Untested: Xen.
I tested it on Xen: it works correctly.
Tested-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 00/59] QOM CPUState, part 4: CPU_COMMON
@ 2012-05-23 11:27 ` Stefano Stabellini
0 siblings, 0 replies; 109+ messages in thread
From: Stefano Stabellini @ 2012-05-23 11:27 UTC (permalink / raw)
To: Andreas Färber
Cc: Peter Maydell, Guan Xuetao, kvm, Stefano Stabellini, Jan Kiszka,
Marcelo Tosatti, Edgar E. Iglesias, qemu-devel, Alexander Graf,
Blue Swirl, Max Filippov, Michael Walle, xen-devel, qemu-ppc,
Avi Kivity, Anthony Liguori, Igor Mammedov, Paolo Bonzini,
David Gibson, Aurélien Jarno, Richard Henderson
[-- Attachment #1: Type: text/plain, Size: 1854 bytes --]
On Wed, 23 May 2012, Andreas Färber wrote:
> Hello,
>
> This series, based on qom-next and the two pending ARM cleanup patches, starts
> moving fields from CPUArchState (CPU_COMMON) to QOM CPUState. It stops short
> of moving all easily possible fields (i.e., those not depending on target_ulong
> or target_phys_addr_t) since the series got too long already and is expected to
> spark some controversies due to collisions with several other series.
>
> The series is structured as preparatory refactorings interwoven with the actual
> touch-all movement of one field ("cpu: Move ... to CPUState"), optionally
> followed by type signature cleanups, culminating in the movement of two fields
> that are tied together by VMState.
> Thus, unlike part 3, this series cannot randomly be cherry-picked to
> <arch>-next trees, only select parts thereof (e.g., use of cpu_s390x_init()).
>
> Please review and test.
>
> The use of cpu_index vs. cpuid_apic_id for x86 cpu[n] still needs some thought.
>
> The question was brought up whether adding the CPUs a child<X86CPU> properties
> should be generalized outside the machine scope - I don't think so, since CPU
> hotplug seems highly architecture-specific and not applicable everywhere (SoCs).
>
> Blue will likely have a superb idea how to avoid the cpu_tlb_flush() indirection
> that I needed for VMState, but apart from having been a lot of dumb typing, it
> works fine as interim solution. "Blah." wasn't terribly helpful as a comment.
>
> I have checked this to compile on ...
> * openSUSE 12.1 x86_64 w/KVM,
> * openSUSE Factory ppc w/KVM,
> * SLES 11 SP2 s390x w/KVM,
> * mingw32/64 cross-builds,
> * OpenBSD 5.1 amd64 (not for final version though, master doesn't build).
> Untested: Xen.
I tested it on Xen: it works correctly.
Tested-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 00/59] QOM CPUState, part 4: CPU_COMMON
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 15:16 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 15:16 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Guan Xuetao, kvm, Stefano Stabellini, Jan Kiszka,
Marcelo Tosatti, Edgar E. Iglesias, Alexander Graf, Blue Swirl,
Max Filippov, Michael Walle, xen-devel, qemu-ppc, Avi Kivity,
Anthony Liguori, Igor Mammedov, Paolo Bonzini, David Gibson,
Aurélien Jarno, Richard Henderson
Am 23.05.2012 05:07, schrieb Andreas Färber:
> This series, based on qom-next and the two pending ARM cleanup patches, [...]
Update: I've applied the aforementioned patches, so this series applies
unchanged to qom-next now.
> Available for testing and cherry-picking (not pulling!) from:
> git://github.com/afaerber/qemu-cpu.git qom-cpu-common.v1
> https://github.com/afaerber/qemu-cpu/commits/qom-cpu-common.v1
Updated on qom-cpu branch (rebased occasionally).
http://wiki.qemu.org/Features/QOM/CPU#Status
/-F
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 00/59] QOM CPUState, part 4: CPU_COMMON
@ 2012-05-23 15:16 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 15:16 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, xen-devel, kvm, Stefano Stabellini, Jan Kiszka,
Richard Henderson, Marcelo Tosatti, Alexander Graf, Blue Swirl,
Max Filippov, Michael Walle, Paolo Bonzini, qemu-ppc, Avi Kivity,
Anthony Liguori, Igor Mammedov, Edgar E. Iglesias, Guan Xuetao,
Aurélien Jarno, David Gibson
Am 23.05.2012 05:07, schrieb Andreas Färber:
> This series, based on qom-next and the two pending ARM cleanup patches, [...]
Update: I've applied the aforementioned patches, so this series applies
unchanged to qom-next now.
> Available for testing and cherry-picking (not pulling!) from:
> git://github.com/afaerber/qemu-cpu.git qom-cpu-common.v1
> https://github.com/afaerber/qemu-cpu/commits/qom-cpu-common.v1
Updated on qom-cpu branch (rebased occasionally).
http://wiki.qemu.org/Features/QOM/CPU#Status
/-F
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 00/59] QOM CPUState, part 4: CPU_COMMON
2012-05-23 11:27 ` [Qemu-devel] " Stefano Stabellini
@ 2012-05-23 15:36 ` Andreas Färber
-1 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 15:36 UTC (permalink / raw)
To: Stefano Stabellini; +Cc: xen-devel, qemu-devel
Am 23.05.2012 13:27, schrieb Stefano Stabellini:
> On Wed, 23 May 2012, Andreas Färber wrote:
>> This series, based on qom-next and the two pending ARM cleanup patches, starts
>> moving fields from CPUArchState (CPU_COMMON) to QOM CPUState. It stops short
>> of moving all easily possible fields (i.e., those not depending on target_ulong
>> or target_phys_addr_t) since the series got too long already and is expected to
>> spark some controversies due to collisions with several other series.
>>
>> The series is structured as preparatory refactorings interwoven with the actual
>> touch-all movement of one field ("cpu: Move ... to CPUState"), optionally
>> followed by type signature cleanups, culminating in the movement of two fields
>> that are tied together by VMState.
>> Thus, unlike part 3, this series cannot randomly be cherry-picked to
>> <arch>-next trees, only select parts thereof (e.g., use of cpu_s390x_init()).
>>
>> Please review and test.
[...]
>> I have checked this to compile on ...
>> * openSUSE 12.1 x86_64 w/KVM,
>> * openSUSE Factory ppc w/KVM,
>> * SLES 11 SP2 s390x w/KVM,
>> * mingw32/64 cross-builds,
>> * OpenBSD 5.1 amd64 (not for final version though, master doesn't build).
>> Untested: Xen.
>
> I tested it on Xen: it works correctly.
>
> Tested-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Thanks for the quick response! I've cherry-picked the preparatory patch
to qom-next:
http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next
/-F
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [PATCH qom-next 00/59] QOM CPUState, part 4: CPU_COMMON
@ 2012-05-23 15:36 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-05-23 15:36 UTC (permalink / raw)
To: Stefano Stabellini; +Cc: xen-devel, qemu-devel
Am 23.05.2012 13:27, schrieb Stefano Stabellini:
> On Wed, 23 May 2012, Andreas Färber wrote:
>> This series, based on qom-next and the two pending ARM cleanup patches, starts
>> moving fields from CPUArchState (CPU_COMMON) to QOM CPUState. It stops short
>> of moving all easily possible fields (i.e., those not depending on target_ulong
>> or target_phys_addr_t) since the series got too long already and is expected to
>> spark some controversies due to collisions with several other series.
>>
>> The series is structured as preparatory refactorings interwoven with the actual
>> touch-all movement of one field ("cpu: Move ... to CPUState"), optionally
>> followed by type signature cleanups, culminating in the movement of two fields
>> that are tied together by VMState.
>> Thus, unlike part 3, this series cannot randomly be cherry-picked to
>> <arch>-next trees, only select parts thereof (e.g., use of cpu_s390x_init()).
>>
>> Please review and test.
[...]
>> I have checked this to compile on ...
>> * openSUSE 12.1 x86_64 w/KVM,
>> * openSUSE Factory ppc w/KVM,
>> * SLES 11 SP2 s390x w/KVM,
>> * mingw32/64 cross-builds,
>> * OpenBSD 5.1 amd64 (not for final version though, master doesn't build).
>> Untested: Xen.
>
> I tested it on Xen: it works correctly.
>
> Tested-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Thanks for the quick response! I've cherry-picked the preparatory patch
to qom-next:
http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-next
/-F
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [PATCH qom-next 00/59] QOM CPUState, part 4: CPU_COMMON
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-05-23 19:36 ` Blue Swirl
-1 siblings, 0 replies; 109+ messages in thread
From: Blue Swirl @ 2012-05-23 19:36 UTC (permalink / raw)
To: Andreas Färber
Cc: qemu-devel, Anthony Liguori, Paolo Bonzini, Igor Mammedov,
Richard Henderson, Peter Maydell, Edgar E. Iglesias,
Michael Walle, Aurélien Jarno, Alexander Graf, David Gibson,
qemu-ppc, Guan Xuetao, Max Filippov, Avi Kivity, Marcelo Tosatti,
Jan Kiszka, kvm, Stefano Stabellini, xen-devel
On Wed, May 23, 2012 at 3:07 AM, Andreas Färber <afaerber@suse.de> wrote:
> Hello,
>
> This series, based on qom-next and the two pending ARM cleanup patches, starts
> moving fields from CPUArchState (CPU_COMMON) to QOM CPUState. It stops short
> of moving all easily possible fields (i.e., those not depending on target_ulong
> or target_phys_addr_t) since the series got too long already and is expected to
> spark some controversies due to collisions with several other series.
>
> The series is structured as preparatory refactorings interwoven with the actual
> touch-all movement of one field ("cpu: Move ... to CPUState"), optionally
> followed by type signature cleanups, culminating in the movement of two fields
> that are tied together by VMState.
> Thus, unlike part 3, this series cannot randomly be cherry-picked to
> <arch>-next trees, only select parts thereof (e.g., use of cpu_s390x_init()).
>
> Please review and test.
>
> The use of cpu_index vs. cpuid_apic_id for x86 cpu[n] still needs some thought.
>
> The question was brought up whether adding the CPUs a child<X86CPU> properties
> should be generalized outside the machine scope - I don't think so, since CPU
> hotplug seems highly architecture-specific and not applicable everywhere (SoCs).
>
> Blue will likely have a superb idea how to avoid the cpu_tlb_flush() indirection
> that I needed for VMState, but apart from having been a lot of dumb typing, it
> works fine as interim solution. "Blah." wasn't terribly helpful as a comment.
Unfortunately I don't have superb ideas today (as if I had them any
other day...), only second rate jokes (as if they could be called
jokes...). With 'Blah' I obviously meant that I didn't have a solution
for that particular target_ulong/target_phys_addr_t problem. I'll try
to improve on all these areas, if you know what I mean.
>
> I have checked this to compile on ...
> * openSUSE 12.1 x86_64 w/KVM,
> * openSUSE Factory ppc w/KVM,
> * SLES 11 SP2 s390x w/KVM,
> * mingw32/64 cross-builds,
> * OpenBSD 5.1 amd64 (not for final version though, master doesn't build).
> Untested: Xen.
> Only some targets including i386 were lightly runtime-tested.
>
> Available for testing and cherry-picking (not pulling!) from:
> git://github.com/afaerber/qemu-cpu.git qom-cpu-common.v1
> https://github.com/afaerber/qemu-cpu/commits/qom-cpu-common.v1
>
> Regards,
> Andreas
>
> Cc: Anthony Liguori <anthony@codemonkey.ws>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Igor Mammedov <imammedo@redhat.com>
>
> Cc: Richard Henderson <rth@twiddle.net>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
> Cc: Michael Walle <michael@walle.cc>
> Cc: Aurélien Jarno <aurelien@aurel32.net>
> Cc: Alexander Graf <agraf@suse.de>
> Cc: David Gibson <david@gibson.dropbear.id.au>
> Cc: qemu-ppc <qemu-ppc@nongnu.org>
> Cc: Blue Swirl <blauwirbel@gmail.com>
> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
> Cc: Max Filippov <jcmvbkbc@gmail.com>
>
> Cc: Avi Kivity <avi@redhat.com>
> Cc: Marcelo Tosatti <mtosatti@redhat.com>
> Cc: Jan Kiszka <jan.kiszka@siemens.com>
> Cc: kvm <kvm@vger.kernel.org>
>
> Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
> Cc: xen-devel <xen-devel@lists.xensource.com>
>
> Changes from preview in Igor's apic thread:
> * Use g_strdup_printf() for "cpu[x]" to be safe wrt length and nul termination.
> * Clean up removal of x86 version 5 load/save support.
> * Convert use of env->halted in s390x KVM code.
> * Convert some uses of env->halted/interrupt_request in ppc KVM code.
> * Convert some uses of env->halted in Xen code, prepend cpu_x86_init() patch.
> * Avoid using POWERPC_CPU() / SPARC_CPU() macros inside *_set_irq() functions.
>
> Andreas Färber (59):
> qemu-thread: Let qemu_thread_is_self() return bool
> cpu: Move CPU_COMMON_THREAD into CPUState
> cpu: Move thread field into CPUState
> pc: Add CPU as /machine/cpu[n]
> apic: Replace cpu_env pointer by X86CPU link
> pc: Pass X86CPU to cpu_is_bsp()
> cpu: Move thread_kicked to CPUState
> Makefile.dis: Add include/ to include path
> cpus: Pass CPUState to qemu_cpu_is_self()
> cpus: Pass CPUState to qemu_cpu_kick_thread()
> cpu: Move created field to CPUState
> cpu: Move stop field to CPUState
> ppce500_spin: Store PowerPCCPU in SpinKick
> cpu: Move stopped field to CPUState
> cpus: Pass CPUState to cpu_is_stopped()
> cpus: Pass CPUState to cpu_can_run()
> cpu: Move halt_cond to CPUState
> cpus: Pass CPUState to qemu_tcg_cpu_thread_fn
> cpus: Pass CPUState to qemu_tcg_init_vcpu()
> ppc: Pass PowerPCCPU to ppc6xx_set_irq()
> ppc: Pass PowerPCCPU to ppc970_set_irq()
> ppc: Pass PowerPCCPU to power7_set_irq()
> ppc: Pass PowerPCCPU to ppc40x_set_irq()
> ppc: Pass PowerPCCPU to ppce500_set_irq()
> sun4m: Pass SPARCCPU to cpu_set_irq()
> sun4m: Pass SPARCCPU to cpu_kick_irq()
> sun4u: Pass SPARCCPU to {,s,hs}tick_irq() and cpu_timer_create()
> sun4u: Pass SPARCCPU to cpu_kick_irq()
> target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU
> target-s390x: Let cpu_s390x_init() return S390CPU
> s390-virtio: Use cpu_s390x_init() to obtain S390CPU
> s390-virtio: Let s390_cpu_addr2state() return S390CPU
> target-s390x: Pass S390CPU to s390_cpu_restart()
> cpus: Pass CPUState to qemu_cpu_kick()
> cpu: Move queued_work_{first,last} to CPUState
> cpus: Pass CPUState to flush_queued_work()
> cpus: Pass CPUState to qemu_wait_io_event_common()
> target-ppc: Pass PowerPCCPU to powerpc_excp()
> target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall
> spapr: Pass PowerPCCPU to spapr_hypercall()
> spapr: Pass PowerPCCPU to hypercalls
> xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
> cpus: Pass CPUState to [qemu_]cpu_has_work()
> target-i386: Pass X86CPU to kvm_mce_inject()
> target-i386: Pass X86CPU to cpu_x86_inject_mce()
> cpus: Pass CPUState to run_on_cpu()
> cpu: Move thread_id to CPUState
> target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()
> target-i386: Drop version 5 CPU VMState support
> target-i386: Pass X86CPU to kvm_get_mp_state()
> target-i386: Pass X86CPU to kvm_handle_halt()
> target-mips: Pass MIPSCPU to mips_tc_wake()
> target-mips: Pass MIPSCPU to mips_vpe_is_wfi()
> target-mips: Pass MIPSCPU to mips_tc_sleep()
> target-mips: Pass MIPSCPU to mips_vpe_sleep()
> sun4u: Pass SPARCCPU to cpu_set_ivec_irq()
> cpu: Introduce mandatory tlb_flush callback
> xen_machine_pv: Use cpu_x86_init() to obtain X86CPU
> cpu: Move halted and interrupt_request to CPUState
>
> Makefile.dis | 1 +
> cpu-all.h | 4 -
> cpu-defs.h | 19 ----
> cpu-exec.c | 40 ++++----
> cpus.c | 233 +++++++++++++++++++++++--------------------
> exec.c | 44 ++++++---
> gdbstub.c | 4 +-
> hw/apic.c | 34 ++++---
> hw/apic.h | 2 +-
> hw/apic_common.c | 14 ++-
> hw/apic_internal.h | 2 +-
> hw/kvm/apic.c | 9 +-
> hw/kvmvapic.c | 6 +-
> hw/leon3.c | 2 +-
> hw/omap1.c | 4 +-
> hw/pc.c | 31 +++++-
> hw/ppc.c | 69 ++++++++-----
> hw/ppce500_mpc8544ds.c | 4 +-
> hw/ppce500_spin.c | 15 ++--
> hw/pxa2xx_gpio.c | 3 +-
> hw/pxa2xx_pic.c | 2 +-
> hw/s390-virtio-bus.c | 6 +-
> hw/s390-virtio.c | 26 +++--
> hw/spapr.c | 10 +-
> hw/spapr.h | 4 +-
> hw/spapr_hcall.c | 42 +++++---
> hw/spapr_llan.c | 10 +-
> hw/spapr_rtas.c | 13 ++-
> hw/spapr_vio.c | 12 +-
> hw/spapr_vty.c | 4 +-
> hw/sun4m.c | 31 +++---
> hw/sun4u.c | 47 +++++----
> hw/xen_machine_pv.c | 6 +-
> hw/xics.c | 11 ++-
> hw/xtensa_pic.c | 14 ++-
> include/qemu/cpu.h | 81 +++++++++++++++
> kvm-all.c | 15 ++-
> monitor.c | 6 +-
> qemu-common.h | 2 -
> qemu-thread-posix.c | 2 +-
> qemu-thread-win32.c | 2 +-
> qemu-thread.h | 3 +-
> qom/cpu.c | 11 ++
> target-alpha/cpu.c | 18 +++-
> target-alpha/cpu.h | 4 +-
> target-alpha/translate.c | 3 +-
> target-arm/cpu.c | 10 ++
> target-arm/cpu.h | 4 +-
> target-arm/helper.c | 3 +-
> target-arm/op_helper.c | 4 +-
> target-cris/cpu.c | 10 ++
> target-cris/cpu.h | 4 +-
> target-cris/translate.c | 4 +-
> target-i386/cpu.c | 10 ++
> target-i386/cpu.h | 16 ++-
> target-i386/helper.c | 21 ++--
> target-i386/kvm.c | 77 ++++++++------
> target-i386/machine.c | 10 +--
> target-i386/op_helper.c | 13 ++-
> target-lm32/cpu.c | 10 ++
> target-lm32/cpu.h | 4 +-
> target-lm32/op_helper.c | 4 +-
> target-m68k/cpu.c | 10 ++
> target-m68k/cpu.h | 4 +-
> target-m68k/op_helper.c | 3 +-
> target-m68k/qregs.def | 1 -
> target-m68k/translate.c | 6 +
> target-microblaze/cpu.c | 10 ++
> target-microblaze/cpu.h | 4 +-
> target-mips/cpu.c | 10 ++
> target-mips/cpu.h | 15 ++--
> target-mips/op_helper.c | 45 ++++++---
> target-mips/translate.c | 8 +-
> target-ppc/cpu.h | 8 +-
> target-ppc/helper.c | 48 +++++----
> target-ppc/helper_regs.h | 7 +-
> target-ppc/kvm.c | 25 +++--
> target-ppc/op_helper.c | 8 +-
> target-ppc/translate.c | 3 +-
> target-ppc/translate_init.c | 10 ++
> target-s390x/cpu.c | 12 ++-
> target-s390x/cpu.h | 16 ++--
> target-s390x/helper.c | 14 ++-
> target-s390x/kvm.c | 18 ++-
> target-sh4/cpu.c | 10 ++
> target-sh4/cpu.h | 4 +-
> target-sh4/helper.c | 5 +-
> target-sh4/op_helper.c | 4 +-
> target-sparc/cpu.c | 10 ++
> target-sparc/cpu.h | 6 +-
> target-unicore32/cpu.c | 18 +++-
> target-unicore32/cpu.h | 4 +-
> target-xtensa/cpu.c | 10 ++
> target-xtensa/cpu.h | 4 +-
> target-xtensa/op_helper.c | 4 +-
> xen-all.c | 10 +-
> 96 files changed, 974 insertions(+), 529 deletions(-)
>
> --
> 1.7.7
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 00/59] QOM CPUState, part 4: CPU_COMMON
@ 2012-05-23 19:36 ` Blue Swirl
0 siblings, 0 replies; 109+ messages in thread
From: Blue Swirl @ 2012-05-23 19:36 UTC (permalink / raw)
To: Andreas Färber
Cc: Peter Maydell, Guan Xuetao, kvm, Stefano Stabellini, Jan Kiszka,
Marcelo Tosatti, Edgar E. Iglesias, qemu-devel, Alexander Graf,
Max Filippov, Michael Walle, xen-devel, qemu-ppc, Avi Kivity,
Anthony Liguori, Igor Mammedov, Paolo Bonzini, David Gibson,
Aurélien Jarno, Richard Henderson
On Wed, May 23, 2012 at 3:07 AM, Andreas Färber <afaerber@suse.de> wrote:
> Hello,
>
> This series, based on qom-next and the two pending ARM cleanup patches, starts
> moving fields from CPUArchState (CPU_COMMON) to QOM CPUState. It stops short
> of moving all easily possible fields (i.e., those not depending on target_ulong
> or target_phys_addr_t) since the series got too long already and is expected to
> spark some controversies due to collisions with several other series.
>
> The series is structured as preparatory refactorings interwoven with the actual
> touch-all movement of one field ("cpu: Move ... to CPUState"), optionally
> followed by type signature cleanups, culminating in the movement of two fields
> that are tied together by VMState.
> Thus, unlike part 3, this series cannot randomly be cherry-picked to
> <arch>-next trees, only select parts thereof (e.g., use of cpu_s390x_init()).
>
> Please review and test.
>
> The use of cpu_index vs. cpuid_apic_id for x86 cpu[n] still needs some thought.
>
> The question was brought up whether adding the CPUs a child<X86CPU> properties
> should be generalized outside the machine scope - I don't think so, since CPU
> hotplug seems highly architecture-specific and not applicable everywhere (SoCs).
>
> Blue will likely have a superb idea how to avoid the cpu_tlb_flush() indirection
> that I needed for VMState, but apart from having been a lot of dumb typing, it
> works fine as interim solution. "Blah." wasn't terribly helpful as a comment.
Unfortunately I don't have superb ideas today (as if I had them any
other day...), only second rate jokes (as if they could be called
jokes...). With 'Blah' I obviously meant that I didn't have a solution
for that particular target_ulong/target_phys_addr_t problem. I'll try
to improve on all these areas, if you know what I mean.
>
> I have checked this to compile on ...
> * openSUSE 12.1 x86_64 w/KVM,
> * openSUSE Factory ppc w/KVM,
> * SLES 11 SP2 s390x w/KVM,
> * mingw32/64 cross-builds,
> * OpenBSD 5.1 amd64 (not for final version though, master doesn't build).
> Untested: Xen.
> Only some targets including i386 were lightly runtime-tested.
>
> Available for testing and cherry-picking (not pulling!) from:
> git://github.com/afaerber/qemu-cpu.git qom-cpu-common.v1
> https://github.com/afaerber/qemu-cpu/commits/qom-cpu-common.v1
>
> Regards,
> Andreas
>
> Cc: Anthony Liguori <anthony@codemonkey.ws>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Igor Mammedov <imammedo@redhat.com>
>
> Cc: Richard Henderson <rth@twiddle.net>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
> Cc: Michael Walle <michael@walle.cc>
> Cc: Aurélien Jarno <aurelien@aurel32.net>
> Cc: Alexander Graf <agraf@suse.de>
> Cc: David Gibson <david@gibson.dropbear.id.au>
> Cc: qemu-ppc <qemu-ppc@nongnu.org>
> Cc: Blue Swirl <blauwirbel@gmail.com>
> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
> Cc: Max Filippov <jcmvbkbc@gmail.com>
>
> Cc: Avi Kivity <avi@redhat.com>
> Cc: Marcelo Tosatti <mtosatti@redhat.com>
> Cc: Jan Kiszka <jan.kiszka@siemens.com>
> Cc: kvm <kvm@vger.kernel.org>
>
> Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
> Cc: xen-devel <xen-devel@lists.xensource.com>
>
> Changes from preview in Igor's apic thread:
> * Use g_strdup_printf() for "cpu[x]" to be safe wrt length and nul termination.
> * Clean up removal of x86 version 5 load/save support.
> * Convert use of env->halted in s390x KVM code.
> * Convert some uses of env->halted/interrupt_request in ppc KVM code.
> * Convert some uses of env->halted in Xen code, prepend cpu_x86_init() patch.
> * Avoid using POWERPC_CPU() / SPARC_CPU() macros inside *_set_irq() functions.
>
> Andreas Färber (59):
> qemu-thread: Let qemu_thread_is_self() return bool
> cpu: Move CPU_COMMON_THREAD into CPUState
> cpu: Move thread field into CPUState
> pc: Add CPU as /machine/cpu[n]
> apic: Replace cpu_env pointer by X86CPU link
> pc: Pass X86CPU to cpu_is_bsp()
> cpu: Move thread_kicked to CPUState
> Makefile.dis: Add include/ to include path
> cpus: Pass CPUState to qemu_cpu_is_self()
> cpus: Pass CPUState to qemu_cpu_kick_thread()
> cpu: Move created field to CPUState
> cpu: Move stop field to CPUState
> ppce500_spin: Store PowerPCCPU in SpinKick
> cpu: Move stopped field to CPUState
> cpus: Pass CPUState to cpu_is_stopped()
> cpus: Pass CPUState to cpu_can_run()
> cpu: Move halt_cond to CPUState
> cpus: Pass CPUState to qemu_tcg_cpu_thread_fn
> cpus: Pass CPUState to qemu_tcg_init_vcpu()
> ppc: Pass PowerPCCPU to ppc6xx_set_irq()
> ppc: Pass PowerPCCPU to ppc970_set_irq()
> ppc: Pass PowerPCCPU to power7_set_irq()
> ppc: Pass PowerPCCPU to ppc40x_set_irq()
> ppc: Pass PowerPCCPU to ppce500_set_irq()
> sun4m: Pass SPARCCPU to cpu_set_irq()
> sun4m: Pass SPARCCPU to cpu_kick_irq()
> sun4u: Pass SPARCCPU to {,s,hs}tick_irq() and cpu_timer_create()
> sun4u: Pass SPARCCPU to cpu_kick_irq()
> target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU
> target-s390x: Let cpu_s390x_init() return S390CPU
> s390-virtio: Use cpu_s390x_init() to obtain S390CPU
> s390-virtio: Let s390_cpu_addr2state() return S390CPU
> target-s390x: Pass S390CPU to s390_cpu_restart()
> cpus: Pass CPUState to qemu_cpu_kick()
> cpu: Move queued_work_{first,last} to CPUState
> cpus: Pass CPUState to flush_queued_work()
> cpus: Pass CPUState to qemu_wait_io_event_common()
> target-ppc: Pass PowerPCCPU to powerpc_excp()
> target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall
> spapr: Pass PowerPCCPU to spapr_hypercall()
> spapr: Pass PowerPCCPU to hypercalls
> xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
> cpus: Pass CPUState to [qemu_]cpu_has_work()
> target-i386: Pass X86CPU to kvm_mce_inject()
> target-i386: Pass X86CPU to cpu_x86_inject_mce()
> cpus: Pass CPUState to run_on_cpu()
> cpu: Move thread_id to CPUState
> target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()
> target-i386: Drop version 5 CPU VMState support
> target-i386: Pass X86CPU to kvm_get_mp_state()
> target-i386: Pass X86CPU to kvm_handle_halt()
> target-mips: Pass MIPSCPU to mips_tc_wake()
> target-mips: Pass MIPSCPU to mips_vpe_is_wfi()
> target-mips: Pass MIPSCPU to mips_tc_sleep()
> target-mips: Pass MIPSCPU to mips_vpe_sleep()
> sun4u: Pass SPARCCPU to cpu_set_ivec_irq()
> cpu: Introduce mandatory tlb_flush callback
> xen_machine_pv: Use cpu_x86_init() to obtain X86CPU
> cpu: Move halted and interrupt_request to CPUState
>
> Makefile.dis | 1 +
> cpu-all.h | 4 -
> cpu-defs.h | 19 ----
> cpu-exec.c | 40 ++++----
> cpus.c | 233 +++++++++++++++++++++++--------------------
> exec.c | 44 ++++++---
> gdbstub.c | 4 +-
> hw/apic.c | 34 ++++---
> hw/apic.h | 2 +-
> hw/apic_common.c | 14 ++-
> hw/apic_internal.h | 2 +-
> hw/kvm/apic.c | 9 +-
> hw/kvmvapic.c | 6 +-
> hw/leon3.c | 2 +-
> hw/omap1.c | 4 +-
> hw/pc.c | 31 +++++-
> hw/ppc.c | 69 ++++++++-----
> hw/ppce500_mpc8544ds.c | 4 +-
> hw/ppce500_spin.c | 15 ++--
> hw/pxa2xx_gpio.c | 3 +-
> hw/pxa2xx_pic.c | 2 +-
> hw/s390-virtio-bus.c | 6 +-
> hw/s390-virtio.c | 26 +++--
> hw/spapr.c | 10 +-
> hw/spapr.h | 4 +-
> hw/spapr_hcall.c | 42 +++++---
> hw/spapr_llan.c | 10 +-
> hw/spapr_rtas.c | 13 ++-
> hw/spapr_vio.c | 12 +-
> hw/spapr_vty.c | 4 +-
> hw/sun4m.c | 31 +++---
> hw/sun4u.c | 47 +++++----
> hw/xen_machine_pv.c | 6 +-
> hw/xics.c | 11 ++-
> hw/xtensa_pic.c | 14 ++-
> include/qemu/cpu.h | 81 +++++++++++++++
> kvm-all.c | 15 ++-
> monitor.c | 6 +-
> qemu-common.h | 2 -
> qemu-thread-posix.c | 2 +-
> qemu-thread-win32.c | 2 +-
> qemu-thread.h | 3 +-
> qom/cpu.c | 11 ++
> target-alpha/cpu.c | 18 +++-
> target-alpha/cpu.h | 4 +-
> target-alpha/translate.c | 3 +-
> target-arm/cpu.c | 10 ++
> target-arm/cpu.h | 4 +-
> target-arm/helper.c | 3 +-
> target-arm/op_helper.c | 4 +-
> target-cris/cpu.c | 10 ++
> target-cris/cpu.h | 4 +-
> target-cris/translate.c | 4 +-
> target-i386/cpu.c | 10 ++
> target-i386/cpu.h | 16 ++-
> target-i386/helper.c | 21 ++--
> target-i386/kvm.c | 77 ++++++++------
> target-i386/machine.c | 10 +--
> target-i386/op_helper.c | 13 ++-
> target-lm32/cpu.c | 10 ++
> target-lm32/cpu.h | 4 +-
> target-lm32/op_helper.c | 4 +-
> target-m68k/cpu.c | 10 ++
> target-m68k/cpu.h | 4 +-
> target-m68k/op_helper.c | 3 +-
> target-m68k/qregs.def | 1 -
> target-m68k/translate.c | 6 +
> target-microblaze/cpu.c | 10 ++
> target-microblaze/cpu.h | 4 +-
> target-mips/cpu.c | 10 ++
> target-mips/cpu.h | 15 ++--
> target-mips/op_helper.c | 45 ++++++---
> target-mips/translate.c | 8 +-
> target-ppc/cpu.h | 8 +-
> target-ppc/helper.c | 48 +++++----
> target-ppc/helper_regs.h | 7 +-
> target-ppc/kvm.c | 25 +++--
> target-ppc/op_helper.c | 8 +-
> target-ppc/translate.c | 3 +-
> target-ppc/translate_init.c | 10 ++
> target-s390x/cpu.c | 12 ++-
> target-s390x/cpu.h | 16 ++--
> target-s390x/helper.c | 14 ++-
> target-s390x/kvm.c | 18 ++-
> target-sh4/cpu.c | 10 ++
> target-sh4/cpu.h | 4 +-
> target-sh4/helper.c | 5 +-
> target-sh4/op_helper.c | 4 +-
> target-sparc/cpu.c | 10 ++
> target-sparc/cpu.h | 6 +-
> target-unicore32/cpu.c | 18 +++-
> target-unicore32/cpu.h | 4 +-
> target-xtensa/cpu.c | 10 ++
> target-xtensa/cpu.h | 4 +-
> target-xtensa/op_helper.c | 4 +-
> xen-all.c | 10 +-
> 96 files changed, 974 insertions(+), 529 deletions(-)
>
> --
> 1.7.7
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 49/59] target-i386: Drop version 5 CPU VMState support
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 49/59] target-i386: Drop version 5 CPU VMState support Andreas Färber
@ 2012-05-24 11:32 ` Juan Quintela
0 siblings, 0 replies; 109+ messages in thread
From: Juan Quintela @ 2012-05-24 11:32 UTC (permalink / raw)
To: Andreas Färber; +Cc: qemu-devel
Andreas Färber <afaerber@suse.de> wrote:
> Version 5 contained the halted field, that we are about to move from
> CPUX86State to CPUState. To avoid inventing new VMSTATE macros for
> calculating a negative offset from CPUX86State to the field in CPUState,
> rather bump the minimum version from 3 to 6. We're at 12 currently.
>
> Suggested-by: Juan Quintela <quintela@redhat.com>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> Cc: Juan Quintela <quintela@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 57/59] cpu: Introduce mandatory tlb_flush callback
[not found] ` <201205311953.31459.paul@codesourcery.com>
@ 2012-06-02 19:40 ` Blue Swirl
0 siblings, 0 replies; 109+ messages in thread
From: Blue Swirl @ 2012-06-02 19:40 UTC (permalink / raw)
To: Paul Brook
Cc: Peter Maydell, qemu-devel, Alexander Graf, Max Filippov,
Michael Walle, qemu-ppc, Edgar E. Iglesias, Guan Xuetao,
Andreas Färber, Aurelien Jarno, Richard Henderson
On Thu, May 31, 2012 at 6:53 PM, Paul Brook <paul@codesourcery.com> wrote:
>> >> +void cpu_tlb_flush(CPUState *cpu, bool flush_global)
>> >> +{
>> >> + CPUClass *cc = CPU_GET_CLASS(cpu);
>> >> +
>> >> + g_assert(cc->tlb_flush != NULL);
>> >> +
>> >> + cc->tlb_flush(cpu, flush_global);
>> >> +}
>> >
>> > This needs to be able to call tlb_flush() itself
>> > rather than having to have every single subclass of CPUState
>> > implement an identical tlb_flush method. You could do this
>> > if there was a CPU_GET_ENV()...
>>
>> Which is exactly the point: CPUState does not know about the
>> target-specific "env". And CPU_GET_ENV() is just plain wrong
>> conceptually because it adds yet another cpu.h dependency.
>
> Maybe so, but having every single taget implement its own copy of the exact
> same target independent wrapper seems even more wrong.
>
>> There's a separation between old code using env and new, clean code:
>> Just like Anthony doesn't want old concepts rewritten with the new type
>> (cf. object_realize() discussion) I don't want the old cpu.h #define
>> mess leaking into code that I'm redesigning specifically to get rid of
>> that target-*/cpu.h dependency in favor of a single qemu/cpu.h.
>> qom/cpu.c is by definition not compiled per target so it cannot contain
>> any target-specific code.
>
> At minimum it should be clearly documented[1] that this is a transitional
> hack, and how it should be removed. There have already been two posts in this
> thread suggesting this is a feature, implying that this operation is somehow
> target specific. I think the opposite is true: This is a target agnostic
> detail of the TCG implementation, and implementing architecturally defined
> MMU/TLB behavior here is activley wrong.
The advantage of making the TLB more target specific (it already
depends on sizes of both target_ulong and target_phys_addr_t) is that
we can push some run time MMU model dependent code to translation
time.
The translator currently generates calls to qemu_ld, which generates a
TLB lookup with TCG. In the miss case, the TCG helper calls tlb_fill
and then cpu_xxx_handle_mmu_fault(). Most of those functions have
conditional code for current MMU mode, data access vs code access,
switch() based on MMU type etc.
With changes to TCG TLB handling, the translator could specify the
function to be called on TLB miss (or different TLB functions can be
generated with softmmu templates). Then the conditional code can be
pushed to translator.
In some TLB based MMU cases, we could predict or even calculate in
advance the MMU TLB index and other parameters but there's no way to
pass those to the miss/fault handler now.
Taking x86 as an example, we could have different functions for each case of:
- paging disabled
- x86_64 long mode enabled
- PAE enabled
- maybe permuted with the above, PSE enabled
PPC (or later Sparc64) MMU models do not change during execution, so
getting rid of the run time switches would be nice.
In some cases the QEMU TLB and target MMU TLBs could be combined,
provided that the target MMU is reasonable. For example UltraSPARC-IIi
I/D MMU TLBs have only 64 (though variable size) entries, whereas the
QEMU TLB can have many more, so I probably would not consider that
case.
Some MMUs have a notion of contexts (e.g. mapped to PID or thread ID),
but currently a TLB flush is needed when the context is changed which
can be suboptimal. To solve that, we'd need to change the TLB access
to target specific code to consider both context and address when
calculating the index.
In general, the interface between generated code and the TCG helper
should be more optimized.
>
> Paul
>
> [1] In the code, not the commit message. Commit logs are not documentation.
> Commit logs are transient information valid only when the patch is applied.
> After that point they become archeological evidence, and you should not expect
> subsequent developers to be aware of them.
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n] Andreas Färber
@ 2012-06-08 8:20 ` Igor Mammedov
2012-06-08 9:11 ` Andreas Färber
0 siblings, 1 reply; 109+ messages in thread
From: Igor Mammedov @ 2012-06-08 8:20 UTC (permalink / raw)
To: Andreas Färber; +Cc: Anthony Liguori, qemu-devel, Igor Mammedov
On Wed, May 23, 2012 at 05:07:27AM +0200, Andreas Färber wrote:
> Using the cpu_index, give the X86CPU a canonical path.
> This must be done before initializing the APIC.
>
> Signed-off-by: Igor Mammedov <niallain@gmail.com>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
> hw/pc.c | 12 ++++++++++++
> 1 files changed, 12 insertions(+), 0 deletions(-)
>
> diff --git a/hw/pc.c b/hw/pc.c
> index 4167782..e9d7e05 100644
> --- a/hw/pc.c
> +++ b/hw/pc.c
> @@ -945,6 +945,8 @@ static X86CPU *pc_new_cpu(const char *cpu_model)
> {
> X86CPU *cpu;
> CPUX86State *env;
> + char *name;
> + Error *error = NULL;
>
> cpu = cpu_x86_init(cpu_model);
> if (cpu == NULL) {
> @@ -952,6 +954,16 @@ static X86CPU *pc_new_cpu(const char *cpu_model)
> exit(1);
> }
> env = &cpu->env;
> +
> + name = g_strdup_printf("cpu[%d]", env->cpu_index);
> + object_property_add_child(OBJECT(qdev_get_machine()), name,
> + OBJECT(cpu), &error);
This call might be too late. Imagine if before this call a property/child of this CPU
would set link on on it. Then it would assert in object_property_set_link ->
object_get_canonical_path since CPU would not have parent a that time.
Wouldn't it better to make it child in CPU's initfn? This way CPU object
could be used as a value for link anywhere once it's been created.
> + g_free(name);
> + if (error_is_set(&error)) {
> + qerror_report_err(error);
> + exit(1);
> + }
> +
> if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
> env->apic_state = apic_init(env, env->cpuid_apic_id);
> }
> --
> 1.7.7
>
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-06-08 8:20 ` Igor Mammedov
@ 2012-06-08 9:11 ` Andreas Färber
2012-06-08 10:21 ` Jan Kiszka
2012-06-08 12:05 ` Igor Mammedov
0 siblings, 2 replies; 109+ messages in thread
From: Andreas Färber @ 2012-06-08 9:11 UTC (permalink / raw)
To: Igor Mammedov
Cc: Jan Kiszka, Anthony Liguori, Paolo Bonzini, qemu-devel, Igor Mammedov
Am 08.06.2012 10:20, schrieb Igor Mammedov:
> On Wed, May 23, 2012 at 05:07:27AM +0200, Andreas Färber wrote:
>> Using the cpu_index, give the X86CPU a canonical path.
>> This must be done before initializing the APIC.
>>
>> Signed-off-by: Igor Mammedov <niallain@gmail.com>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>> ---
>> hw/pc.c | 12 ++++++++++++
>> 1 files changed, 12 insertions(+), 0 deletions(-)
>>
>> diff --git a/hw/pc.c b/hw/pc.c
>> index 4167782..e9d7e05 100644
>> --- a/hw/pc.c
>> +++ b/hw/pc.c
>> @@ -945,6 +945,8 @@ static X86CPU *pc_new_cpu(const char *cpu_model)
>> {
>> X86CPU *cpu;
>> CPUX86State *env;
>> + char *name;
>> + Error *error = NULL;
>>
>> cpu = cpu_x86_init(cpu_model);
>> if (cpu == NULL) {
>> @@ -952,6 +954,16 @@ static X86CPU *pc_new_cpu(const char *cpu_model)
>> exit(1);
>> }
>> env = &cpu->env;
>> +
>> + name = g_strdup_printf("cpu[%d]", env->cpu_index);
>> + object_property_add_child(OBJECT(qdev_get_machine()), name,
>> + OBJECT(cpu), &error);
> This call might be too late.
This series here is mostly not going to go through qom-next btw, it is
just based on qom-next, so it's not too late to discuss such issues. :)
> Imagine if before this call a property/child of this CPU
> would set link on on it. Then it would assert in object_property_set_link ->
> object_get_canonical_path since CPU would not have parent a that time.
> Wouldn't it better to make it child in CPU's initfn? This way CPU object
> could be used as a value for link anywhere once it's been created.
I've seen that issue in your series.
This is touching on a core QOM question: Can we link<> during initfn?
That's what you're trying to do for the APIC and why this may be too
late in your case. I believe the answer to that question must be no.
>From what I understand about the x86 modeling, the only case this
matters is if you hot-unplug CPU 0, right? Question is, what happens
with the APIC then? I would guess the remaining n-1 CPUs still want to
access the APIC - then it would need to stay and if CPU 0 is
hot-replugged it would not need to be recreated but reconnected. The
alternative would be that CPU 0 cannot be hot-unplugged at all, in which
case the APIC would be irrelevant to hot-plugging and the remodelling
would be moot; or all remaining CPUs would suddenly loose the APIC
feature on hot-unplug of CPU 0. Again, I don't know how this works in
hardware.
Another factor that is making this slightly difficult is that there are
three APIC subclasses. Currently they all have an instance_size of
sizeof(APICCommonState) so it could be created in-place if it actually
is a part (child<>) of the CPU wrt hot-plug. Creating objects with
object_new() in QOM instance_init is forbidden.
Also I have a broader view than the PC in mind: Depending on whether you
have a mainboard with CPU sockets or some SoC or module, you may desire
different modelings. My above modeling is for a PC, in hw/pc.c, using
/machine/cpu[n]. For a QSeven module the parent would be the Container
or type for the module, e.g. /machine/qseven/cpu[n]. Another example
might be AMD Fusion. Therefore I think that tying the modeling to the
CPU initfn is conceptually wrong.
Maybe this CPU hot-plug business would be a good topic for a KVM call?
Regards,
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-06-08 9:11 ` Andreas Färber
@ 2012-06-08 10:21 ` Jan Kiszka
2012-06-08 10:36 ` Andreas Färber
2012-06-08 12:05 ` Igor Mammedov
1 sibling, 1 reply; 109+ messages in thread
From: Jan Kiszka @ 2012-06-08 10:21 UTC (permalink / raw)
To: Andreas Färber
Cc: Igor Mammedov, Anthony Liguori, Paolo Bonzini, qemu-devel, Igor Mammedov
On 2012-06-08 11:11, Andreas Färber wrote:
>>From what I understand about the x86 modeling, the only case this
> matters is if you hot-unplug CPU 0, right? Question is, what happens
> with the APIC then? I would guess the remaining n-1 CPUs still want to
> access the APIC
APICs are per-CPU, each has its own.
Jan
--
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-06-08 10:21 ` Jan Kiszka
@ 2012-06-08 10:36 ` Andreas Färber
2012-06-08 10:45 ` Andreas Färber
2012-06-08 11:36 ` Igor Mammedov
0 siblings, 2 replies; 109+ messages in thread
From: Andreas Färber @ 2012-06-08 10:36 UTC (permalink / raw)
To: Jan Kiszka, Igor Mammedov
Cc: Paolo Bonzini, Anthony Liguori, qemu-devel, Igor Mammedov
Am 08.06.2012 12:21, schrieb Jan Kiszka:
> On 2012-06-08 11:11, Andreas Färber wrote:
>> >From what I understand about the x86 modeling, the only case this
>> matters is if you hot-unplug CPU 0, right? Question is, what happens
>> with the APIC then? I would guess the remaining n-1 CPUs still want to
>> access the APIC
>
> APICs are per-CPU, each has its own.
Uh, seems I'm seriously confusing APIC with something else then...
Anyway, if each CPU always has its own APIC there's no reason to link<>
them. It should be a child<> and it should be initialized in-place.
Igor, can you please look into that?
In that case the only open issue would be whether to use cpu_index or
the APIC ID as the property name in this patch.
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-06-08 10:36 ` Andreas Färber
@ 2012-06-08 10:45 ` Andreas Färber
2012-06-08 11:36 ` Igor Mammedov
1 sibling, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-06-08 10:45 UTC (permalink / raw)
To: Jan Kiszka, Igor Mammedov
Cc: Paolo Bonzini, Anthony Liguori, qemu-devel, Igor Mammedov
Am 08.06.2012 12:36, schrieb Andreas Färber:
> Am 08.06.2012 12:21, schrieb Jan Kiszka:
>> On 2012-06-08 11:11, Andreas Färber wrote:
>>> >From what I understand about the x86 modeling, the only case this
>>> matters is if you hot-unplug CPU 0, right? Question is, what happens
>>> with the APIC then? I would guess the remaining n-1 CPUs still want to
>>> access the APIC
>>
>> APICs are per-CPU, each has its own.
>
> Uh, seems I'm seriously confusing APIC with something else then...
Guess I misread this as apic_init() in Igor's patch:
+ if (env->cpu_index == 0) {
+ apic_designate_bsp(env->apic_state);
+ }
Shame on me. :/
/-F
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-06-08 10:36 ` Andreas Färber
2012-06-08 10:45 ` Andreas Färber
@ 2012-06-08 11:36 ` Igor Mammedov
2012-06-08 12:26 ` Andreas Färber
1 sibling, 1 reply; 109+ messages in thread
From: Igor Mammedov @ 2012-06-08 11:36 UTC (permalink / raw)
To: Andreas Färber
Cc: Jan Kiszka, Anthony Liguori, qemu-devel, Igor Mammedov, Paolo Bonzini
On Fri, Jun 08, 2012 at 12:36:18PM +0200, Andreas Färber wrote:
> Am 08.06.2012 12:21, schrieb Jan Kiszka:
> > On 2012-06-08 11:11, Andreas Färber wrote:
> >> >From what I understand about the x86 modeling, the only case this
> >> matters is if you hot-unplug CPU 0, right? Question is, what happens
> >> with the APIC then? I would guess the remaining n-1 CPUs still want to
> >> access the APIC
> >
> > APICs are per-CPU, each has its own.
>
> Uh, seems I'm seriously confusing APIC with something else then...
>
> Anyway, if each CPU always has its own APIC there's no reason to link<>
> them. It should be a child<> and it should be initialized in-place.
in [5/59] you create a back_link<> from APIC to parent cpu to replace cpu_env
pointer (i.e. something that could be ptr property). And from what I've read
link<> is kind of strong typed replacement for ptr properties, correct me if I wrong.
So having link<> there should be ok, except of that CPU should have parent before
it will set back_link<> "cpu" in APIC.
>
> Igor, can you please look into that?
Sure, Could you point to an example of creating a QOMified object in place, please?
>
> In that case the only open issue would be whether to use cpu_index or
> the APIC ID as the property name in this patch.
not only, cpu_x86_init() now represents create/set_props/realize sequence
and making cpu a child after set_props/realize is wrong. But if cpu_x86_init() were
replaced by its contents in pc_new_cpu and CPU were made a child right after
object_new(X86CPU) then problem would be avoided. and the rest of properties (including APIC)
could be set after that and at the end realizefn() is called.
>
> Andreas
>
> --
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-06-08 9:11 ` Andreas Färber
2012-06-08 10:21 ` Jan Kiszka
@ 2012-06-08 12:05 ` Igor Mammedov
2012-06-08 12:34 ` Andreas Färber
1 sibling, 1 reply; 109+ messages in thread
From: Igor Mammedov @ 2012-06-08 12:05 UTC (permalink / raw)
To: Andreas Färber
Cc: Jan Kiszka, Anthony Liguori, qemu-devel, Igor Mammedov, Paolo Bonzini
On Fri, Jun 08, 2012 at 11:11:11AM +0200, Andreas Färber wrote:
> Am 08.06.2012 10:20, schrieb Igor Mammedov:
> > On Wed, May 23, 2012 at 05:07:27AM +0200, Andreas Färber wrote:
>
> This is touching on a core QOM question: Can we link<> during initfn?
> That's what you're trying to do for the APIC and why this may be too
> late in your case. I believe the answer to that question must be no.
Yep, it's more of general question.
Potentially any property could be set in initfn to intialize
defaults and a property setter could create a link causing chicken/egg
conflict.
If making link<> to object is not permited till its initfn is done then
when it is permited to be made?
Maybe object_new() should take parent as parameter or maybe due to limitation
we should revise purpose of link<>s /if they are replacement of ptr properties/?
[...]
> Another factor that is making this slightly difficult is that there are
> three APIC subclasses. Currently they all have an instance_size of
> sizeof(APICCommonState) so it could be created in-place if it actually
> is a part (child<>) of the CPU wrt hot-plug. Creating objects with
> object_new() in QOM instance_init is forbidden.
Any particular reason why object_new() in intifn is not acceptable?
>
[...]
>
> Maybe this CPU hot-plug business would be a good topic for a KVM call?
It's more that I'm unhappy about wrong cpu creation order in pc_new_cpu()
at the present code. For hotplug qdev_device_add makes new object as
a child<> when it's created and it just needs to be placed before other
properties are set.
>
> Regards,
> Andreas
>
> --
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-06-08 11:36 ` Igor Mammedov
@ 2012-06-08 12:26 ` Andreas Färber
0 siblings, 0 replies; 109+ messages in thread
From: Andreas Färber @ 2012-06-08 12:26 UTC (permalink / raw)
To: Igor Mammedov
Cc: Jan Kiszka, Anthony Liguori, qemu-devel, Igor Mammedov, Paolo Bonzini
Am 08.06.2012 13:36, schrieb Igor Mammedov:
> On Fri, Jun 08, 2012 at 12:36:18PM +0200, Andreas Färber wrote:
>> Am 08.06.2012 12:21, schrieb Jan Kiszka:
>>> On 2012-06-08 11:11, Andreas Färber wrote:
>>>> >From what I understand about the x86 modeling, the only case this
>>>> matters is if you hot-unplug CPU 0, right? Question is, what happens
>>>> with the APIC then? I would guess the remaining n-1 CPUs still want to
>>>> access the APIC
>>>
>>> APICs are per-CPU, each has its own.
>>
>> [...] if each CPU always has its own APIC there's no reason to link<>
>> them. It should be a child<> and it should be initialized in-place.
>>
>> Igor, can you please look into that?
> Sure, Could you point to an example of creating a QOMified object in place, please?
http://patchwork.ozlabs.org/patch/161497/
and Anthony's i440fx series.
If I'm reading the code correctly then we'd need to add the APIC as a
child of the CPU before its qdev initfn is called, i.e. in place of the
current qdev pointer property.
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-06-08 12:05 ` Igor Mammedov
@ 2012-06-08 12:34 ` Andreas Färber
2012-06-08 12:36 ` Jan Kiszka
0 siblings, 1 reply; 109+ messages in thread
From: Andreas Färber @ 2012-06-08 12:34 UTC (permalink / raw)
To: Igor Mammedov
Cc: Jan Kiszka, Anthony Liguori, qemu-devel, Igor Mammedov, Paolo Bonzini
Am 08.06.2012 14:05, schrieb Igor Mammedov:
> On Fri, Jun 08, 2012 at 11:11:11AM +0200, Andreas Färber wrote:
>> Another factor that is making this slightly difficult is that there are
>> three APIC subclasses. Currently they all have an instance_size of
>> sizeof(APICCommonState) so it could be created in-place if it actually
>> is a part (child<>) of the CPU wrt hot-plug. Creating objects with
>> object_new() in QOM instance_init is forbidden.
> Any particular reason why object_new() in intifn is not acceptable?
It allocates memory, which may fail. The initfn must not fail, the
realizefn may return an Error object.
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-06-08 12:34 ` Andreas Färber
@ 2012-06-08 12:36 ` Jan Kiszka
2012-06-08 12:47 ` Igor Mammedov
0 siblings, 1 reply; 109+ messages in thread
From: Jan Kiszka @ 2012-06-08 12:36 UTC (permalink / raw)
To: Andreas Färber
Cc: Igor Mammedov, Anthony Liguori, qemu-devel, Igor Mammedov, Paolo Bonzini
On 2012-06-08 14:34, Andreas Färber wrote:
> Am 08.06.2012 14:05, schrieb Igor Mammedov:
>> On Fri, Jun 08, 2012 at 11:11:11AM +0200, Andreas Färber wrote:
>>> Another factor that is making this slightly difficult is that there are
>>> three APIC subclasses. Currently they all have an instance_size of
>>> sizeof(APICCommonState) so it could be created in-place if it actually
>>> is a part (child<>) of the CPU wrt hot-plug. Creating objects with
>>> object_new() in QOM instance_init is forbidden.
>> Any particular reason why object_new() in intifn is not acceptable?
>
> It allocates memory, which may fail. The initfn must not fail, the
> realizefn may return an Error object.
Since when do we fail gracefully on OOM again?
Jan
--
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-06-08 12:36 ` Jan Kiszka
@ 2012-06-08 12:47 ` Igor Mammedov
2012-06-08 12:52 ` Jan Kiszka
0 siblings, 1 reply; 109+ messages in thread
From: Igor Mammedov @ 2012-06-08 12:47 UTC (permalink / raw)
To: Jan Kiszka
Cc: Paolo Bonzini, Anthony Liguori, qemu-devel, Andreas Färber,
Igor Mammedov
----- Original Message -----
> From: "Jan Kiszka" <jan.kiszka@siemens.com>
> To: "Andreas Färber" <afaerber@suse.de>
> Cc: "Igor Mammedov" <imammedo@redhat.com>, "Anthony Liguori" <aliguori@us.ibm.com>, qemu-devel@nongnu.org, "Igor
> Mammedov" <niallain@gmail.com>, "Paolo Bonzini" <pbonzini@redhat.com>
> Sent: Friday, June 8, 2012 2:36:53 PM
> Subject: Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
>
> On 2012-06-08 14:34, Andreas Färber wrote:
> > Am 08.06.2012 14:05, schrieb Igor Mammedov:
> >> On Fri, Jun 08, 2012 at 11:11:11AM +0200, Andreas Färber wrote:
> >>> Another factor that is making this slightly difficult is that
> >>> there are
> >>> three APIC subclasses. Currently they all have an instance_size
> >>> of
> >>> sizeof(APICCommonState) so it could be created in-place if it
> >>> actually
> >>> is a part (child<>) of the CPU wrt hot-plug. Creating objects
> >>> with
> >>> object_new() in QOM instance_init is forbidden.
> >> Any particular reason why object_new() in intifn is not
> >> acceptable?
> >
> > It allocates memory, which may fail. The initfn must not fail, the
> > realizefn may return an Error object.
>
> Since when do we fail gracefully on OOM again?
Maybe Andreas means that we cannot report error to caller?
If it's a case then lets pass error to object_new() and fail gracefully
or simply abort on OOM.
BTW:
in-place creation looks ugly compared to object_new(), not mentioning
complications if being initialized object could be of different sizes.
>
> Jan
>
> --
> Siemens AG, Corporate Technology, CT T DE IT 1
> Corporate Competence Center Embedded Linux
>
>
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-06-08 12:47 ` Igor Mammedov
@ 2012-06-08 12:52 ` Jan Kiszka
2012-06-08 13:00 ` Q (Igor Mammedov)
2012-06-08 13:04 ` Andreas Färber
0 siblings, 2 replies; 109+ messages in thread
From: Jan Kiszka @ 2012-06-08 12:52 UTC (permalink / raw)
To: Igor Mammedov
Cc: Paolo Bonzini, Anthony Liguori, qemu-devel, Andreas Färber,
Igor Mammedov
On 2012-06-08 14:47, Igor Mammedov wrote:
> ----- Original Message -----
>> From: "Jan Kiszka" <jan.kiszka@siemens.com>
>> To: "Andreas Färber" <afaerber@suse.de>
>> Cc: "Igor Mammedov" <imammedo@redhat.com>, "Anthony Liguori" <aliguori@us.ibm.com>, qemu-devel@nongnu.org, "Igor
>> Mammedov" <niallain@gmail.com>, "Paolo Bonzini" <pbonzini@redhat.com>
>> Sent: Friday, June 8, 2012 2:36:53 PM
>> Subject: Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
>>
>> On 2012-06-08 14:34, Andreas Färber wrote:
>>> Am 08.06.2012 14:05, schrieb Igor Mammedov:
>>>> On Fri, Jun 08, 2012 at 11:11:11AM +0200, Andreas Färber wrote:
>>>>> Another factor that is making this slightly difficult is that
>>>>> there are
>>>>> three APIC subclasses. Currently they all have an instance_size
>>>>> of
>>>>> sizeof(APICCommonState) so it could be created in-place if it
>>>>> actually
>>>>> is a part (child<>) of the CPU wrt hot-plug. Creating objects
>>>>> with
>>>>> object_new() in QOM instance_init is forbidden.
>>>> Any particular reason why object_new() in intifn is not
>>>> acceptable?
>>>
>>> It allocates memory, which may fail. The initfn must not fail, the
>>> realizefn may return an Error object.
>>
>> Since when do we fail gracefully on OOM again?
> Maybe Andreas means that we cannot report error to caller?
> If it's a case then lets pass error to object_new() and fail gracefully
> or simply abort on OOM.
QEMU's policy on OOM is abort (that's what glib already does for us
theses days).
Jan
--
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-06-08 12:52 ` Jan Kiszka
@ 2012-06-08 13:00 ` Q (Igor Mammedov)
2012-06-08 13:04 ` Andreas Färber
1 sibling, 0 replies; 109+ messages in thread
From: Q (Igor Mammedov) @ 2012-06-08 13:00 UTC (permalink / raw)
To: Jan Kiszka
Cc: Igor Mammedov, Anthony Liguori, qemu-devel, Andreas Färber,
Paolo Bonzini
On Fri, Jun 8, 2012 at 2:52 PM, Jan Kiszka <jan.kiszka@siemens.com> wrote:
> On 2012-06-08 14:47, Igor Mammedov wrote:
>> ----- Original Message -----
>>> From: "Jan Kiszka" <jan.kiszka@siemens.com>
>>> To: "Andreas Färber" <afaerber@suse.de>
>>> Cc: "Igor Mammedov" <imammedo@redhat.com>, "Anthony Liguori" <aliguori@us.ibm.com>, qemu-devel@nongnu.org, "Igor
>>> Mammedov" <niallain@gmail.com>, "Paolo Bonzini" <pbonzini@redhat.com>
>>> Sent: Friday, June 8, 2012 2:36:53 PM
>>> Subject: Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
>>>
>>> On 2012-06-08 14:34, Andreas Färber wrote:
>>>> Am 08.06.2012 14:05, schrieb Igor Mammedov:
>>>>> On Fri, Jun 08, 2012 at 11:11:11AM +0200, Andreas Färber wrote:
>>>>>> Another factor that is making this slightly difficult is that
>>>>>> there are
>>>>>> three APIC subclasses. Currently they all have an instance_size
>>>>>> of
>>>>>> sizeof(APICCommonState) so it could be created in-place if it
>>>>>> actually
>>>>>> is a part (child<>) of the CPU wrt hot-plug. Creating objects
>>>>>> with
>>>>>> object_new() in QOM instance_init is forbidden.
>>>>> Any particular reason why object_new() in intifn is not
>>>>> acceptable?
>>>>
>>>> It allocates memory, which may fail. The initfn must not fail, the
>>>> realizefn may return an Error object.
>>>
>>> Since when do we fail gracefully on OOM again?
>> Maybe Andreas means that we cannot report error to caller?
>> If it's a case then lets pass error to object_new() and fail gracefully
>> or simply abort on OOM.
>
> QEMU's policy on OOM is abort (that's what glib already does for us
> theses days).
>
then there is little merit in playing in-place game since allocation
of containing
object may fail as well resulting in abort just a bit earlier.
> Jan
>
> --
> Siemens AG, Corporate Technology, CT T DE IT 1
> Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-06-08 12:52 ` Jan Kiszka
2012-06-08 13:00 ` Q (Igor Mammedov)
@ 2012-06-08 13:04 ` Andreas Färber
2012-07-04 9:18 ` Igor Mammedov
1 sibling, 1 reply; 109+ messages in thread
From: Andreas Färber @ 2012-06-08 13:04 UTC (permalink / raw)
To: Jan Kiszka
Cc: Igor Mammedov, Anthony Liguori, Paolo Bonzini, qemu-devel, Igor Mammedov
Am 08.06.2012 14:52, schrieb Jan Kiszka:
> On 2012-06-08 14:47, Igor Mammedov wrote:
>> ----- Original Message -----
>>> From: "Jan Kiszka" <jan.kiszka@siemens.com>
>>> To: "Andreas Färber" <afaerber@suse.de>
>>> Cc: "Igor Mammedov" <imammedo@redhat.com>, "Anthony Liguori" <aliguori@us.ibm.com>, qemu-devel@nongnu.org, "Igor
>>> Mammedov" <niallain@gmail.com>, "Paolo Bonzini" <pbonzini@redhat.com>
>>> Sent: Friday, June 8, 2012 2:36:53 PM
>>> Subject: Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
>>>
>>> On 2012-06-08 14:34, Andreas Färber wrote:
>>>> Am 08.06.2012 14:05, schrieb Igor Mammedov:
>>>>> On Fri, Jun 08, 2012 at 11:11:11AM +0200, Andreas Färber wrote:
>>>>>> Another factor that is making this slightly difficult is that
>>>>>> there are
>>>>>> three APIC subclasses. Currently they all have an instance_size
>>>>>> of
>>>>>> sizeof(APICCommonState) so it could be created in-place if it
>>>>>> actually
>>>>>> is a part (child<>) of the CPU wrt hot-plug. Creating objects
>>>>>> with
>>>>>> object_new() in QOM instance_init is forbidden.
>>>>> Any particular reason why object_new() in intifn is not
>>>>> acceptable?
>>>>
>>>> It allocates memory, which may fail. The initfn must not fail, the
>>>> realizefn may return an Error object.
>>>
>>> Since when do we fail gracefully on OOM again?
>> Maybe Andreas means that we cannot report error to caller?
>> If it's a case then lets pass error to object_new() and fail gracefully
>> or simply abort on OOM.
>
> QEMU's policy on OOM is abort (that's what glib already does for us
> theses days).
Nah, that's not the whole truth.
(More on that when I've finished fixing my series.)
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
2012-06-08 13:04 ` Andreas Färber
@ 2012-07-04 9:18 ` Igor Mammedov
0 siblings, 0 replies; 109+ messages in thread
From: Igor Mammedov @ 2012-07-04 9:18 UTC (permalink / raw)
To: Andreas Färber
Cc: Jan Kiszka, Anthony Liguori, Paolo Bonzini, qemu-devel, Igor Mammedov
On 06/08/2012 03:04 PM, Andreas Färber wrote:
> Am 08.06.2012 14:52, schrieb Jan Kiszka:
>> On 2012-06-08 14:47, Igor Mammedov wrote:
>>> ----- Original Message -----
>>>> From: "Jan Kiszka" <jan.kiszka@siemens.com>
>>>> To: "Andreas Färber" <afaerber@suse.de>
>>>> Cc: "Igor Mammedov" <imammedo@redhat.com>, "Anthony Liguori" <aliguori@us.ibm.com>, qemu-devel@nongnu.org, "Igor
>>>> Mammedov" <niallain@gmail.com>, "Paolo Bonzini" <pbonzini@redhat.com>
>>>> Sent: Friday, June 8, 2012 2:36:53 PM
>>>> Subject: Re: [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n]
>>>>
>>>> On 2012-06-08 14:34, Andreas Färber wrote:
>>>>> Am 08.06.2012 14:05, schrieb Igor Mammedov:
>>>>>> On Fri, Jun 08, 2012 at 11:11:11AM +0200, Andreas Färber wrote:
>>>>>>> Another factor that is making this slightly difficult is that
>>>>>>> there are
>>>>>>> three APIC subclasses. Currently they all have an instance_size
>>>>>>> of
>>>>>>> sizeof(APICCommonState) so it could be created in-place if it
>>>>>>> actually
>>>>>>> is a part (child<>) of the CPU wrt hot-plug. Creating objects
>>>>>>> with
>>>>>>> object_new() in QOM instance_init is forbidden.
>>>>>> Any particular reason why object_new() in intifn is not
>>>>>> acceptable?
>>>>>
>>>>> It allocates memory, which may fail. The initfn must not fail, the
>>>>> realizefn may return an Error object.
>>>>
>>>> Since when do we fail gracefully on OOM again?
>>> Maybe Andreas means that we cannot report error to caller?
>>> If it's a case then lets pass error to object_new() and fail gracefully
>>> or simply abort on OOM.
>>
>> QEMU's policy on OOM is abort (that's what glib already does for us
>> theses days).
>
> Nah, that's not the whole truth.
Could you elaborate more on subj?
I've looked at different initfns, many of them call object_property_add() which may cause
OOM as well. So if object_property_add() is permitted then why not object_new()?
>
> (More on that when I've finished fixing my series.)
>
> Andreas
>
--
-----
Igor
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [PATCH qom-next 06/59] pc: Pass X86CPU to cpu_is_bsp()
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
@ 2012-07-11 10:25 ` Igor Mammedov
-1 siblings, 0 replies; 109+ messages in thread
From: Igor Mammedov @ 2012-07-11 10:25 UTC (permalink / raw)
To: Andreas Färber
Cc: Anthony Liguori (supporter:PC), Marcelo Tosatti (supporter:X86),
qemu-devel, X86, Avi Kivity (supporter:X86)
On 05/23/2012 05:07 AM, Andreas Färber wrote:
> Also change return type to bool.
>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
> hw/apic.h | 2 +-
> hw/apic_common.c | 2 +-
> hw/pc.c | 6 +++---
> target-i386/helper.c | 2 +-
> target-i386/kvm.c | 4 +++-
> 5 files changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/hw/apic.h b/hw/apic.h
> index 62179ce..1030097 100644
> --- a/hw/apic.h
> +++ b/hw/apic.h
> @@ -22,7 +22,7 @@ void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
> TPRAccess access);
>
> /* pc.c */
> -int cpu_is_bsp(CPUX86State *env);
> +bool cpu_is_bsp(X86CPU *cpu);
> DeviceState *cpu_get_current_apic(void);
>
> #endif
> diff --git a/hw/apic_common.c b/hw/apic_common.c
> index 46a9ff7..bea885b 100644
> --- a/hw/apic_common.c
> +++ b/hw/apic_common.c
> @@ -207,7 +207,7 @@ static void apic_reset_common(DeviceState *d)
> APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
> bool bsp;
>
> - bsp = cpu_is_bsp(&s->cpu->env);
> + bsp = cpu_is_bsp(s->cpu);
> s->apicbase = 0xfee00000 |
> (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE;
>
> diff --git a/hw/pc.c b/hw/pc.c
> index 6bb3d2a..f0cbfef 100644
> --- a/hw/pc.c
> +++ b/hw/pc.c
> @@ -870,10 +870,10 @@ void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd)
> nb_ne2k++;
> }
>
> -int cpu_is_bsp(CPUX86State *env)
> +bool cpu_is_bsp(X86CPU *cpu)
> {
> /* We hard-wire the BSP to the first CPU. */
> - return env->cpu_index == 0;
> + return cpu->env.cpu_index == 0;
> }
>
> DeviceState *cpu_get_current_apic(void)
> @@ -945,7 +945,7 @@ static void pc_cpu_reset(void *opaque)
> CPUX86State *env = &cpu->env;
>
> cpu_reset(CPU(cpu));
> - env->halted = !cpu_is_bsp(env);
> + env->halted = !cpu_is_bsp(cpu);
> }
>
> static X86CPU *pc_new_cpu(const char *cpu_model)
> diff --git a/target-i386/helper.c b/target-i386/helper.c
> index 2cc8097..018a98f 100644
> --- a/target-i386/helper.c
> +++ b/target-i386/helper.c
> @@ -1191,7 +1191,7 @@ void do_cpu_init(X86CPU *cpu)
> env->interrupt_request = sipi;
> env->pat = pat;
> apic_init_reset(env->apic_state);
> - env->halted = !cpu_is_bsp(env);
> + env->halted = !cpu_is_bsp(cpu);
> }
>
> void do_cpu_sipi(X86CPU *cpu)
> diff --git a/target-i386/kvm.c b/target-i386/kvm.c
> index 0d0d8f6..97a2cb1 100644
> --- a/target-i386/kvm.c
> +++ b/target-i386/kvm.c
> @@ -579,11 +579,13 @@ int kvm_arch_init_vcpu(CPUX86State *env)
>
> void kvm_arch_reset_vcpu(CPUX86State *env)
> {
> + X86CPU *cpu = x86_env_get_cpu(env);
> +
> env->exception_injected = -1;
> env->interrupt_injected = -1;
> env->xcr0 = 1;
> if (kvm_irqchip_in_kernel()) {
> - env->mp_state = cpu_is_bsp(env) ? KVM_MP_STATE_RUNNABLE :
> + env->mp_state = cpu_is_bsp(cpu) ? KVM_MP_STATE_RUNNABLE :
> KVM_MP_STATE_UNINITIALIZED;
> } else {
> env->mp_state = KVM_MP_STATE_RUNNABLE;
>
This patch won't be necessary with
http://comments.gmane.org/gmane.comp.emulators.qemu/159553
where cpu_is_bsp() is abolished.
--
-----
Igor
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 06/59] pc: Pass X86CPU to cpu_is_bsp()
@ 2012-07-11 10:25 ` Igor Mammedov
0 siblings, 0 replies; 109+ messages in thread
From: Igor Mammedov @ 2012-07-11 10:25 UTC (permalink / raw)
To: Andreas Färber
Cc: Anthony Liguori (supporter:PC), Marcelo Tosatti (supporter:X86),
qemu-devel, X86, Avi Kivity (supporter:X86)
On 05/23/2012 05:07 AM, Andreas Färber wrote:
> Also change return type to bool.
>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
> hw/apic.h | 2 +-
> hw/apic_common.c | 2 +-
> hw/pc.c | 6 +++---
> target-i386/helper.c | 2 +-
> target-i386/kvm.c | 4 +++-
> 5 files changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/hw/apic.h b/hw/apic.h
> index 62179ce..1030097 100644
> --- a/hw/apic.h
> +++ b/hw/apic.h
> @@ -22,7 +22,7 @@ void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
> TPRAccess access);
>
> /* pc.c */
> -int cpu_is_bsp(CPUX86State *env);
> +bool cpu_is_bsp(X86CPU *cpu);
> DeviceState *cpu_get_current_apic(void);
>
> #endif
> diff --git a/hw/apic_common.c b/hw/apic_common.c
> index 46a9ff7..bea885b 100644
> --- a/hw/apic_common.c
> +++ b/hw/apic_common.c
> @@ -207,7 +207,7 @@ static void apic_reset_common(DeviceState *d)
> APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
> bool bsp;
>
> - bsp = cpu_is_bsp(&s->cpu->env);
> + bsp = cpu_is_bsp(s->cpu);
> s->apicbase = 0xfee00000 |
> (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE;
>
> diff --git a/hw/pc.c b/hw/pc.c
> index 6bb3d2a..f0cbfef 100644
> --- a/hw/pc.c
> +++ b/hw/pc.c
> @@ -870,10 +870,10 @@ void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd)
> nb_ne2k++;
> }
>
> -int cpu_is_bsp(CPUX86State *env)
> +bool cpu_is_bsp(X86CPU *cpu)
> {
> /* We hard-wire the BSP to the first CPU. */
> - return env->cpu_index == 0;
> + return cpu->env.cpu_index == 0;
> }
>
> DeviceState *cpu_get_current_apic(void)
> @@ -945,7 +945,7 @@ static void pc_cpu_reset(void *opaque)
> CPUX86State *env = &cpu->env;
>
> cpu_reset(CPU(cpu));
> - env->halted = !cpu_is_bsp(env);
> + env->halted = !cpu_is_bsp(cpu);
> }
>
> static X86CPU *pc_new_cpu(const char *cpu_model)
> diff --git a/target-i386/helper.c b/target-i386/helper.c
> index 2cc8097..018a98f 100644
> --- a/target-i386/helper.c
> +++ b/target-i386/helper.c
> @@ -1191,7 +1191,7 @@ void do_cpu_init(X86CPU *cpu)
> env->interrupt_request = sipi;
> env->pat = pat;
> apic_init_reset(env->apic_state);
> - env->halted = !cpu_is_bsp(env);
> + env->halted = !cpu_is_bsp(cpu);
> }
>
> void do_cpu_sipi(X86CPU *cpu)
> diff --git a/target-i386/kvm.c b/target-i386/kvm.c
> index 0d0d8f6..97a2cb1 100644
> --- a/target-i386/kvm.c
> +++ b/target-i386/kvm.c
> @@ -579,11 +579,13 @@ int kvm_arch_init_vcpu(CPUX86State *env)
>
> void kvm_arch_reset_vcpu(CPUX86State *env)
> {
> + X86CPU *cpu = x86_env_get_cpu(env);
> +
> env->exception_injected = -1;
> env->interrupt_injected = -1;
> env->xcr0 = 1;
> if (kvm_irqchip_in_kernel()) {
> - env->mp_state = cpu_is_bsp(env) ? KVM_MP_STATE_RUNNABLE :
> + env->mp_state = cpu_is_bsp(cpu) ? KVM_MP_STATE_RUNNABLE :
> KVM_MP_STATE_UNINITIALIZED;
> } else {
> env->mp_state = KVM_MP_STATE_RUNNABLE;
>
This patch won't be necessary with
http://comments.gmane.org/gmane.comp.emulators.qemu/159553
where cpu_is_bsp() is abolished.
--
-----
Igor
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 05/59] apic: Replace cpu_env pointer by X86CPU link
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 05/59] apic: Replace cpu_env pointer by X86CPU link Andreas Färber
@ 2012-07-11 10:47 ` Igor Mammedov
0 siblings, 0 replies; 109+ messages in thread
From: Igor Mammedov @ 2012-07-11 10:47 UTC (permalink / raw)
To: Andreas Färber; +Cc: Paolo Bonzini, Anthony Liguori, qemu-devel
On 05/23/2012 05:07 AM, Andreas Färber wrote:
> Needed for converting cpu_is_bsp().
>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> ---
...
> @@ -899,7 +900,13 @@ static DeviceState *apic_init(void *env, uint8_t apic_id)
> }
>
> qdev_prop_set_uint8(dev, "id", apic_id);
> - qdev_prop_set_ptr(dev, "cpu_env", env);
> + object_property_set_link(OBJECT(dev), OBJECT(ENV_GET_CPU(env)), "cpu",
> + &error);
Setting back-link should be done before or inside of x86_cpu_realize(),
i.e. no CPU internals outside of CPU object.
But that depends on CPU becoming a child of something between object_new(TYPE_X86_CPU)
and x86_cpu_realize(), otherwise it would crash in object_property_set_link ().
Currently it could be done in target-i386/helper.c:cpu_x86_init()but not in
hw/pc.c:pc_new_cpu() because cpu_x86_init() returns realized CPU.
Perhaps we should wait with this and previous patch till APIC is moved inside of CPU.
As a way to avoid back-link issue we could make CPU a child of /machine in
cpu_x86_init() before callling x86_cpu_realize(). Yes, it won't be at board level but it won't
hurt *-user target and might be acceptable sacrifice for i386-softmmu in effort of QOMifing
x86cpu and converting from qdev_prop_set_ptr() to object_property_set_link().
--
-----
Igor
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 42/59] xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 42/59] xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb() Andreas Färber
@ 2012-10-10 15:15 ` Andreas Färber
2012-10-10 15:35 ` Max Filippov
0 siblings, 1 reply; 109+ messages in thread
From: Andreas Färber @ 2012-10-10 15:15 UTC (permalink / raw)
To: Max Filippov; +Cc: qemu-devel
Am 23.05.2012 05:08, schrieb Andreas Färber:
> Needed for cpu_has_work().
>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
Max, could you ack this trivial patch please? It still applies.
I notice that you were originally not cc'ed: Probably this file was/is
not yet documented in MAINTAINERS.
Thanks,
Andreas
> ---
> hw/xtensa_pic.c | 7 +++++--
> 1 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/hw/xtensa_pic.c b/hw/xtensa_pic.c
> index 653ded6..8b9c051 100644
> --- a/hw/xtensa_pic.c
> +++ b/hw/xtensa_pic.c
> @@ -125,7 +125,8 @@ void xtensa_rearm_ccompare_timer(CPUXtensaState *env)
>
> static void xtensa_ccompare_cb(void *opaque)
> {
> - CPUXtensaState *env = opaque;
> + XtensaCPU *cpu = opaque;
> + CPUXtensaState *env = &cpu->env;
>
> if (env->halted) {
> env->halt_clock = qemu_get_clock_ns(vm_clock);
> @@ -139,12 +140,14 @@ static void xtensa_ccompare_cb(void *opaque)
>
> void xtensa_irq_init(CPUXtensaState *env)
> {
> + XtensaCPU *cpu = xtensa_env_get_cpu(env);
> +
> env->irq_inputs = (void **)qemu_allocate_irqs(
> xtensa_set_irq, env, env->config->ninterrupt);
> if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT) &&
> env->config->nccompare > 0) {
> env->ccompare_timer =
> - qemu_new_timer_ns(vm_clock, &xtensa_ccompare_cb, env);
> + qemu_new_timer_ns(vm_clock, &xtensa_ccompare_cb, cpu);
> }
> }
>
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 42/59] xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
2012-10-10 15:15 ` Andreas Färber
@ 2012-10-10 15:35 ` Max Filippov
2012-10-10 16:33 ` Andreas Färber
0 siblings, 1 reply; 109+ messages in thread
From: Max Filippov @ 2012-10-10 15:35 UTC (permalink / raw)
To: Andreas Färber; +Cc: qemu-devel
On Wed, Oct 10, 2012 at 7:15 PM, Andreas Färber <afaerber@suse.de> wrote:
> Am 23.05.2012 05:08, schrieb Andreas Färber:
>> Needed for cpu_has_work().
>>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>
> Max, could you ack this trivial patch please? It still applies.
Well, it does but why do you want to add a level of indirection here?
Does that mean that cpu->env may change during cpu lifetime?
Commit message is not very helpful here.
> I notice that you were originally not cc'ed: Probably this file was/is
> not yet documented in MAINTAINERS.
>
> Thanks,
> Andreas
>
>> ---
>> hw/xtensa_pic.c | 7 +++++--
>> 1 files changed, 5 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/xtensa_pic.c b/hw/xtensa_pic.c
>> index 653ded6..8b9c051 100644
>> --- a/hw/xtensa_pic.c
>> +++ b/hw/xtensa_pic.c
>> @@ -125,7 +125,8 @@ void xtensa_rearm_ccompare_timer(CPUXtensaState *env)
>>
>> static void xtensa_ccompare_cb(void *opaque)
>> {
>> - CPUXtensaState *env = opaque;
>> + XtensaCPU *cpu = opaque;
>> + CPUXtensaState *env = &cpu->env;
>>
>> if (env->halted) {
>> env->halt_clock = qemu_get_clock_ns(vm_clock);
>> @@ -139,12 +140,14 @@ static void xtensa_ccompare_cb(void *opaque)
>>
>> void xtensa_irq_init(CPUXtensaState *env)
>> {
>> + XtensaCPU *cpu = xtensa_env_get_cpu(env);
>> +
>> env->irq_inputs = (void **)qemu_allocate_irqs(
>> xtensa_set_irq, env, env->config->ninterrupt);
>> if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT) &&
>> env->config->nccompare > 0) {
>> env->ccompare_timer =
>> - qemu_new_timer_ns(vm_clock, &xtensa_ccompare_cb, env);
>> + qemu_new_timer_ns(vm_clock, &xtensa_ccompare_cb, cpu);
>> }
>> }
>>
>
> --
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
>
--
Thanks.
-- Max
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 42/59] xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
2012-10-10 15:35 ` Max Filippov
@ 2012-10-10 16:33 ` Andreas Färber
2012-10-10 20:21 ` Max Filippov
0 siblings, 1 reply; 109+ messages in thread
From: Andreas Färber @ 2012-10-10 16:33 UTC (permalink / raw)
To: Max Filippov; +Cc: qemu-devel
Am 10.10.2012 17:35, schrieb Max Filippov:
> On Wed, Oct 10, 2012 at 7:15 PM, Andreas Färber <afaerber@suse.de> wrote:
>> Am 23.05.2012 05:08, schrieb Andreas Färber:
>>> Needed for cpu_has_work().
>>>
>>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>>
>> Max, could you ack this trivial patch please? It still applies.
>
> Well, it does but why do you want to add a level of indirection here?
> Does that mean that cpu->env may change during cpu lifetime?
> Commit message is not very helpful here.
Patch 43/59 in that series updates cpu_has_work() argument to CPUState*,
thus this patch prepares xtensa_pic as one of the callers.
This is the only xtensa patch I have in my queue, so I wanted to avoid
hitting you with a large resend.
I see now that xtensa_set_irq could get an XtensaCPU opaque as well, but
so far there was no need apparently, so that can be changed later.
For target-specific code my general rule of thumb is, use FooCPU rather
than CPUFooState arguments and opaques wherever possible since the need
is growing. Also, any new fields that are not accessed by TCG should be
placed into FooCPU rather than CPUFooState.
Andreas
>>> @@ -139,12 +140,14 @@ static void xtensa_ccompare_cb(void *opaque)
>>>
>>> void xtensa_irq_init(CPUXtensaState *env)
>>> {
>>> + XtensaCPU *cpu = xtensa_env_get_cpu(env);
>>> +
>>> env->irq_inputs = (void **)qemu_allocate_irqs(
>>> xtensa_set_irq, env, env->config->ninterrupt);
>>> if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT) &&
>>> env->config->nccompare > 0) {
>>> env->ccompare_timer =
>>> - qemu_new_timer_ns(vm_clock, &xtensa_ccompare_cb, env);
>>> + qemu_new_timer_ns(vm_clock, &xtensa_ccompare_cb, cpu);
>>> }
>>> }
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 109+ messages in thread
* Re: [Qemu-devel] [PATCH qom-next 42/59] xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
2012-10-10 16:33 ` Andreas Färber
@ 2012-10-10 20:21 ` Max Filippov
0 siblings, 0 replies; 109+ messages in thread
From: Max Filippov @ 2012-10-10 20:21 UTC (permalink / raw)
To: Andreas Färber; +Cc: qemu-devel
On Wed, Oct 10, 2012 at 8:33 PM, Andreas Färber <afaerber@suse.de> wrote:
> Am 10.10.2012 17:35, schrieb Max Filippov:
>> On Wed, Oct 10, 2012 at 7:15 PM, Andreas Färber <afaerber@suse.de> wrote:
>>> Am 23.05.2012 05:08, schrieb Andreas Färber:
>>>> Needed for cpu_has_work().
>>>>
>>>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>>>
>>> Max, could you ack this trivial patch please? It still applies.
>>
>> Well, it does but why do you want to add a level of indirection here?
>> Does that mean that cpu->env may change during cpu lifetime?
>> Commit message is not very helpful here.
>
> Patch 43/59 in that series updates cpu_has_work() argument to CPUState*,
> thus this patch prepares xtensa_pic as one of the callers.
>
> This is the only xtensa patch I have in my queue, so I wanted to avoid
> hitting you with a large resend.
>
> I see now that xtensa_set_irq could get an XtensaCPU opaque as well, but
> so far there was no need apparently, so that can be changed later.
>
> For target-specific code my general rule of thumb is, use FooCPU rather
> than CPUFooState arguments and opaques wherever possible since the need
> is growing. Also, any new fields that are not accessed by TCG should be
> placed into FooCPU rather than CPUFooState.
Ok,
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
--
Thanks.
-- Max
^ permalink raw reply [flat|nested] 109+ messages in thread
end of thread, other threads:[~2012-10-10 20:21 UTC | newest]
Thread overview: 109+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-05-23 3:07 [PATCH qom-next 00/59] QOM CPUState, part 4: CPU_COMMON Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 01/59] qemu-thread: Let qemu_thread_is_self() return bool Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 02/59] cpu: Move CPU_COMMON_THREAD into CPUState Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 03/59] cpu: Move thread field " Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 04/59] pc: Add CPU as /machine/cpu[n] Andreas Färber
2012-06-08 8:20 ` Igor Mammedov
2012-06-08 9:11 ` Andreas Färber
2012-06-08 10:21 ` Jan Kiszka
2012-06-08 10:36 ` Andreas Färber
2012-06-08 10:45 ` Andreas Färber
2012-06-08 11:36 ` Igor Mammedov
2012-06-08 12:26 ` Andreas Färber
2012-06-08 12:05 ` Igor Mammedov
2012-06-08 12:34 ` Andreas Färber
2012-06-08 12:36 ` Jan Kiszka
2012-06-08 12:47 ` Igor Mammedov
2012-06-08 12:52 ` Jan Kiszka
2012-06-08 13:00 ` Q (Igor Mammedov)
2012-06-08 13:04 ` Andreas Färber
2012-07-04 9:18 ` Igor Mammedov
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 05/59] apic: Replace cpu_env pointer by X86CPU link Andreas Färber
2012-07-11 10:47 ` Igor Mammedov
2012-05-23 3:07 ` [PATCH qom-next 06/59] pc: Pass X86CPU to cpu_is_bsp() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
2012-07-11 10:25 ` Igor Mammedov
2012-07-11 10:25 ` [Qemu-devel] " Igor Mammedov
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 07/59] cpu: Move thread_kicked to CPUState Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 08/59] Makefile.dis: Add include/ to include path Andreas Färber
2012-05-23 3:07 ` [PATCH qom-next 09/59] cpus: Pass CPUState to qemu_cpu_is_self() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 10/59] cpus: Pass CPUState to qemu_cpu_kick_thread() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 11/59] cpu: Move created field to CPUState Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 12/59] cpu: Move stop " Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 13/59] ppce500_spin: Store PowerPCCPU in SpinKick Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 14/59] cpu: Move stopped field to CPUState Andreas Färber
2012-05-23 3:07 ` [PATCH qom-next 15/59] cpus: Pass CPUState to cpu_is_stopped() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 16/59] cpus: Pass CPUState to cpu_can_run() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 17/59] cpu: Move halt_cond to CPUState Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 18/59] cpus: Pass CPUState to qemu_tcg_cpu_thread_fn Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 19/59] cpus: Pass CPUState to qemu_tcg_init_vcpu() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 20/59] ppc: Pass PowerPCCPU to ppc6xx_set_irq() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 21/59] ppc: Pass PowerPCCPU to ppc970_set_irq() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 22/59] ppc: Pass PowerPCCPU to power7_set_irq() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 23/59] ppc: Pass PowerPCCPU to ppc40x_set_irq() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 24/59] ppc: Pass PowerPCCPU to ppce500_set_irq() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 25/59] sun4m: Pass SPARCCPU to cpu_set_irq() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 26/59] sun4m: Pass SPARCCPU to cpu_kick_irq() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 27/59] sun4u: Pass SPARCCPU to {, s, hs}tick_irq() and cpu_timer_create() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 28/59] sun4u: Pass SPARCCPU to cpu_kick_irq() Andreas Färber
2012-05-23 3:07 ` [PATCH qom-next 29/59] target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 30/59] target-s390x: Let cpu_s390x_init() return S390CPU Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 31/59] s390-virtio: Use cpu_s390x_init() to obtain S390CPU Andreas Färber
2012-05-23 3:07 ` [PATCH qom-next 32/59] s390-virtio: Let s390_cpu_addr2state() return S390CPU Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
2012-05-23 3:07 ` [PATCH qom-next 33/59] target-s390x: Pass S390CPU to s390_cpu_restart() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
2012-05-23 3:07 ` [PATCH qom-next 34/59] cpus: Pass CPUState to qemu_cpu_kick() Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] " Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 35/59] cpu: Move queued_work_{first, last} to CPUState Andreas Färber
2012-05-23 3:07 ` [Qemu-devel] [PATCH qom-next 36/59] cpus: Pass CPUState to flush_queued_work() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 37/59] cpus: Pass CPUState to qemu_wait_io_event_common() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 38/59] target-ppc: Pass PowerPCCPU to powerpc_excp() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 39/59] target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall Andreas Färber
2012-05-23 3:08 ` [PATCH qom-next 40/59] spapr: Pass PowerPCCPU to spapr_hypercall() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] " Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 41/59] spapr: Pass PowerPCCPU to hypercalls Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 42/59] xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb() Andreas Färber
2012-10-10 15:15 ` Andreas Färber
2012-10-10 15:35 ` Max Filippov
2012-10-10 16:33 ` Andreas Färber
2012-10-10 20:21 ` Max Filippov
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 43/59] cpus: Pass CPUState to [qemu_]cpu_has_work() Andreas Färber
2012-05-23 3:08 ` [PATCH qom-next 44/59] target-i386: Pass X86CPU to kvm_mce_inject() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] " Andreas Färber
2012-05-23 3:08 ` [PATCH qom-next 45/59] target-i386: Pass X86CPU to cpu_x86_inject_mce() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] " Andreas Färber
2012-05-23 3:08 ` [PATCH qom-next 46/59] cpus: Pass CPUState to run_on_cpu() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] " Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 47/59] cpu: Move thread_id to CPUState Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 48/59] target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 49/59] target-i386: Drop version 5 CPU VMState support Andreas Färber
2012-05-24 11:32 ` Juan Quintela
2012-05-23 3:08 ` [PATCH qom-next 50/59] target-i386: Pass X86CPU to kvm_get_mp_state() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] " Andreas Färber
2012-05-23 3:08 ` [PATCH qom-next 51/59] target-i386: Pass X86CPU to kvm_handle_halt() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] " Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 52/59] target-mips: Pass MIPSCPU to mips_tc_wake() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 53/59] target-mips: Pass MIPSCPU to mips_vpe_is_wfi() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 54/59] target-mips: Pass MIPSCPU to mips_tc_sleep() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 55/59] target-mips: Pass MIPSCPU to mips_vpe_sleep() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 56/59] sun4u: Pass SPARCCPU to cpu_set_ivec_irq() Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 57/59] cpu: Introduce mandatory tlb_flush callback Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] [PATCH qom-next 58/59] xen_machine_pv: Use cpu_x86_init() to obtain X86CPU Andreas Färber
2012-05-23 3:08 ` Andreas Färber
2012-05-23 3:08 ` [PATCH qom-next 59/59] cpu: Move halted and interrupt_request to CPUState Andreas Färber
2012-05-23 3:08 ` Andreas Färber
2012-05-23 3:08 ` [Qemu-devel] " Andreas Färber
2012-05-23 11:27 ` [PATCH qom-next 00/59] QOM CPUState, part 4: CPU_COMMON Stefano Stabellini
2012-05-23 11:27 ` [Qemu-devel] " Stefano Stabellini
2012-05-23 15:36 ` Andreas Färber
2012-05-23 15:36 ` Andreas Färber
2012-05-23 15:16 ` [Qemu-devel] " Andreas Färber
2012-05-23 15:16 ` Andreas Färber
2012-05-23 19:36 ` Blue Swirl
2012-05-23 19:36 ` [Qemu-devel] " Blue Swirl
[not found] ` <CAFEAcA9ga9=+iVUvtb8ApUQGh=j9sTfrWVcdOXHWTC2ZPx0-5w@mail.gmail.com>
[not found] ` <4FC5EF52.8010103@suse.de>
[not found] ` <201205311953.31459.paul@codesourcery.com>
2012-06-02 19:40 ` [Qemu-devel] [PATCH qom-next 57/59] cpu: Introduce mandatory tlb_flush callback Blue Swirl
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