From: Geert Uytterhoeven <geert@linux-m68k.org> To: Magnus Damm <magnus.damm@gmail.com> Cc: "Marc Zyngier" <maz@kernel.org>, "Russell King" <linux@arm.linux.org.uk>, "Linux ARM" <linux-arm-kernel@lists.infradead.org>, "Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>, "Will Deacon" <will@kernel.org>, "Catalin Marinas" <catalin.marinas@arm.com>, "Thomas Gleixner" <tglx@linutronix.de>, "Jason Cooper" <jason@lakedaemon.net>, "Sumit Garg" <sumit.garg@linaro.org>, "Valentin Schneider" <Valentin.Schneider@arm.com>, "Florian Fainelli" <f.fainelli@gmail.com>, "Gregory Clement" <gregory.clement@bootlin.com>, "Andrew Lunn" <andrew@lunn.ch>, "Android Kernel Team" <kernel-team@android.com>, stable <stable@vger.kernel.org>, "Magnus Damm" <damm+renesas@opensource.se>, "Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>, Linux-Renesas <linux-renesas-soc@vger.kernel.org> Subject: Re: [PATCH v2 07/17] irqchip/gic: Atomically update affinity Date: Mon, 13 Sep 2021 10:05:11 +0200 [thread overview] Message-ID: <CAMuHMdX3Vf8Mxuz3=Aoi1hwMS7BtyYCH178QvVS-GAHDpeMvxg@mail.gmail.com> (raw) In-Reply-To: <CANqRtoTa8g2sw_DoD8+34HR0mcHc_tOWt+4R9KzDT2Eu3d7TTg@mail.gmail.com> Hi Magnus, On Sun, Sep 12, 2021 at 7:40 AM Magnus Damm <magnus.damm@gmail.com> wrote: > On Sun, Sep 12, 2021 at 4:32 AM Marc Zyngier <maz@kernel.org> wrote: > > On Sat, 11 Sep 2021 03:49:20 +0100, > > Magnus Damm <magnus.damm@gmail.com> wrote: > > > On Fri, Sep 10, 2021 at 10:19 PM Geert Uytterhoeven > > > <geert@linux-m68k.org> wrote: > > > > On Fri, Sep 10, 2021 at 12:23 PM Marc Zyngier <maz@kernel.org> wrote: > > > > > On Thu, 09 Sep 2021 16:22:01 +0100, > > > > > Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > > > GIC: enabling workaround for broken byte access > > > > > > Indeed, byte access is unsupported according to the EMEV2 documentation. > > > > > > The EMEV2 documentation R19UH0036EJ0600 Chapter 7 Interrupt Control on > > > page 97 says: > > > "Interrupt registers can be accessed via the APB bus, in 32-bit units" > > > "For details about register functions, see ARM Generic Interrupt > > > Controller Architecture Specification Architecture version 1.0" > > > The file "R19UH0036EJ0600_1Chip.pdf" is the 6th edition version > > > published in 2010 and is not marked as confidential. > > > > This is as bad as it gets. Do you know if any other Renesas platform > > is affected by the same issue? > > Next time we have a beer together I would be happy to show you some > legacy interrupt controller code. =) > > EMEV2 and the Emma Mobile product line came from the NEC Electronics > side that got merged into Renesas Electronics in 2010. Historically > NEC Electronics mainly used MIPS I've been told, and the Emma Mobile > SoCs were one of the earlier Cortex-A9 adopters. That might have > something to do with the rather loose interpretation of the spec. Indeed. I used to work on products using EMMA1 and EMMA2, and they were MIPS-based (vr4120A for EMMA2, IIRC). Later variants (EMMA2H and EMMA3?) did include a small ARM core for standby control. > Renesas SoCs from a similar era: > AP4 (sh7372) AP4EVB (Cortex-A8 + INTCA/INTCS) This is no longer supported upstream (and not affected, as no GIC). > R-Mobile A1 (r8a7740) Armadillo-800-EVA (Cortex-A9 + INTCA/INTCS) R-Mobile A1 has GIC (PL390), too, and is not affected. > R-Car M1A (r8a7778) Bock-W (Cortex-A9 + GIC) > R-Car H1 (r8a7779) Marzen (4 x Cortex-A9 + GIC) > Emma Mobile EMEV2 KZM9D (2 x Cortex-A9 + GIC) > SH-Mobile AG5 (sh73a0) KZM9G (2 x Cortex-A9 + GIC) All of these (except for EMEV2) are fine, too. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
WARNING: multiple messages have this Message-ID (diff)
From: Geert Uytterhoeven <geert@linux-m68k.org> To: Magnus Damm <magnus.damm@gmail.com> Cc: "Marc Zyngier" <maz@kernel.org>, "Russell King" <linux@arm.linux.org.uk>, "Linux ARM" <linux-arm-kernel@lists.infradead.org>, "Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>, "Will Deacon" <will@kernel.org>, "Catalin Marinas" <catalin.marinas@arm.com>, "Thomas Gleixner" <tglx@linutronix.de>, "Jason Cooper" <jason@lakedaemon.net>, "Sumit Garg" <sumit.garg@linaro.org>, "Valentin Schneider" <Valentin.Schneider@arm.com>, "Florian Fainelli" <f.fainelli@gmail.com>, "Gregory Clement" <gregory.clement@bootlin.com>, "Andrew Lunn" <andrew@lunn.ch>, "Android Kernel Team" <kernel-team@android.com>, stable <stable@vger.kernel.org>, "Magnus Damm" <damm+renesas@opensource.se>, "Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>, Linux-Renesas <linux-renesas-soc@vger.kernel.org> Subject: Re: [PATCH v2 07/17] irqchip/gic: Atomically update affinity Date: Mon, 13 Sep 2021 10:05:11 +0200 [thread overview] Message-ID: <CAMuHMdX3Vf8Mxuz3=Aoi1hwMS7BtyYCH178QvVS-GAHDpeMvxg@mail.gmail.com> (raw) In-Reply-To: <CANqRtoTa8g2sw_DoD8+34HR0mcHc_tOWt+4R9KzDT2Eu3d7TTg@mail.gmail.com> Hi Magnus, On Sun, Sep 12, 2021 at 7:40 AM Magnus Damm <magnus.damm@gmail.com> wrote: > On Sun, Sep 12, 2021 at 4:32 AM Marc Zyngier <maz@kernel.org> wrote: > > On Sat, 11 Sep 2021 03:49:20 +0100, > > Magnus Damm <magnus.damm@gmail.com> wrote: > > > On Fri, Sep 10, 2021 at 10:19 PM Geert Uytterhoeven > > > <geert@linux-m68k.org> wrote: > > > > On Fri, Sep 10, 2021 at 12:23 PM Marc Zyngier <maz@kernel.org> wrote: > > > > > On Thu, 09 Sep 2021 16:22:01 +0100, > > > > > Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > > > GIC: enabling workaround for broken byte access > > > > > > Indeed, byte access is unsupported according to the EMEV2 documentation. > > > > > > The EMEV2 documentation R19UH0036EJ0600 Chapter 7 Interrupt Control on > > > page 97 says: > > > "Interrupt registers can be accessed via the APB bus, in 32-bit units" > > > "For details about register functions, see ARM Generic Interrupt > > > Controller Architecture Specification Architecture version 1.0" > > > The file "R19UH0036EJ0600_1Chip.pdf" is the 6th edition version > > > published in 2010 and is not marked as confidential. > > > > This is as bad as it gets. Do you know if any other Renesas platform > > is affected by the same issue? > > Next time we have a beer together I would be happy to show you some > legacy interrupt controller code. =) > > EMEV2 and the Emma Mobile product line came from the NEC Electronics > side that got merged into Renesas Electronics in 2010. Historically > NEC Electronics mainly used MIPS I've been told, and the Emma Mobile > SoCs were one of the earlier Cortex-A9 adopters. That might have > something to do with the rather loose interpretation of the spec. Indeed. I used to work on products using EMMA1 and EMMA2, and they were MIPS-based (vr4120A for EMMA2, IIRC). Later variants (EMMA2H and EMMA3?) did include a small ARM core for standby control. > Renesas SoCs from a similar era: > AP4 (sh7372) AP4EVB (Cortex-A8 + INTCA/INTCS) This is no longer supported upstream (and not affected, as no GIC). > R-Mobile A1 (r8a7740) Armadillo-800-EVA (Cortex-A9 + INTCA/INTCS) R-Mobile A1 has GIC (PL390), too, and is not affected. > R-Car M1A (r8a7778) Bock-W (Cortex-A9 + GIC) > R-Car H1 (r8a7779) Marzen (4 x Cortex-A9 + GIC) > Emma Mobile EMEV2 KZM9D (2 x Cortex-A9 + GIC) > SH-Mobile AG5 (sh73a0) KZM9G (2 x Cortex-A9 + GIC) All of these (except for EMEV2) are fine, too. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-09-13 8:05 UTC|newest] Thread overview: 99+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-06-24 19:57 [PATCH v2 00/17] arm/arm64: Turning IPIs into normal interrupts Marc Zyngier 2020-06-24 19:57 ` Marc Zyngier 2020-06-24 19:57 ` [PATCH v2 01/17] genirq: Add fasteoi IPI flow Marc Zyngier 2020-06-24 19:57 ` Marc Zyngier 2020-06-24 19:57 ` [PATCH v2 02/17] genirq: Allow interrupts to be excluded from /proc/interrupts Marc Zyngier 2020-06-24 19:57 ` Marc Zyngier 2020-06-24 19:57 ` [PATCH v2 03/17] arm64: Allow IPIs to be handled as normal interrupts Marc Zyngier 2020-06-24 19:57 ` Marc Zyngier 2020-06-25 18:25 ` Valentin Schneider 2020-06-25 18:25 ` Valentin Schneider 2020-07-10 19:58 ` Valentin Schneider 2020-07-10 19:58 ` Valentin Schneider 2020-06-24 19:57 ` [PATCH v2 04/17] ARM: " Marc Zyngier 2020-06-24 19:57 ` Marc Zyngier 2020-06-25 18:25 ` Valentin Schneider 2020-06-25 18:25 ` Valentin Schneider 2020-06-29 9:37 ` Marc Zyngier 2020-06-29 9:37 ` Marc Zyngier 2020-06-24 19:57 ` [PATCH v2 05/17] irqchip/gic-v3: Describe the SGI range Marc Zyngier 2020-06-24 19:57 ` Marc Zyngier 2020-06-24 19:58 ` [PATCH v2 06/17] irqchip/gic-v3: Configure SGIs as standard interrupts Marc Zyngier 2020-06-24 19:58 ` Marc Zyngier 2020-06-25 18:25 ` Valentin Schneider 2020-06-25 18:25 ` Valentin Schneider 2020-06-30 10:15 ` Marc Zyngier 2020-06-30 10:15 ` Marc Zyngier 2020-07-02 13:23 ` Valentin Schneider 2020-07-02 13:23 ` Valentin Schneider 2020-07-02 13:48 ` Marc Zyngier 2020-07-02 13:48 ` Marc Zyngier 2020-07-02 14:24 ` Valentin Schneider 2020-07-02 14:24 ` Valentin Schneider 2020-06-24 19:58 ` [PATCH v2 07/17] irqchip/gic: Atomically update affinity Marc Zyngier 2020-06-24 19:58 ` Marc Zyngier 2020-07-01 19:33 ` Sasha Levin 2020-07-01 19:33 ` Sasha Levin 2020-07-10 14:02 ` Sasha Levin 2020-07-10 14:02 ` Sasha Levin 2021-09-09 15:22 ` Geert Uytterhoeven 2021-09-09 15:22 ` Geert Uytterhoeven 2021-09-09 15:37 ` Russell King (Oracle) 2021-09-09 15:37 ` Russell King (Oracle) 2021-09-10 10:22 ` Marc Zyngier 2021-09-10 10:22 ` Marc Zyngier 2021-09-10 13:19 ` Geert Uytterhoeven 2021-09-10 13:19 ` Geert Uytterhoeven 2021-09-11 2:49 ` Magnus Damm 2021-09-11 2:49 ` Magnus Damm 2021-09-11 19:32 ` Marc Zyngier 2021-09-11 19:32 ` Marc Zyngier 2021-09-12 5:40 ` Magnus Damm 2021-09-12 5:40 ` Magnus Damm 2021-09-13 8:05 ` Geert Uytterhoeven [this message] 2021-09-13 8:05 ` Geert Uytterhoeven 2021-09-15 3:28 ` Magnus Damm 2021-09-15 3:28 ` Magnus Damm 2021-09-22 13:53 ` [irqchip: irq/irqchip-fixes] irqchip/gic: Work around broken Renesas integration irqchip-bot for Marc Zyngier 2020-06-24 19:58 ` [PATCH v2 08/17] irqchip/gic: Refactor SMP configuration Marc Zyngier 2020-06-24 19:58 ` Marc Zyngier 2020-06-24 19:58 ` [PATCH v2 09/17] irqchip/gic: Configure SGIs as standard interrupts Marc Zyngier 2020-06-24 19:58 ` Marc Zyngier 2020-06-24 19:58 ` [PATCH v2 10/17] irqchip/gic-common: Don't enable SGIs by default Marc Zyngier 2020-06-24 19:58 ` Marc Zyngier 2020-06-24 19:58 ` [PATCH v2 11/17] irqchip/bcm2836: Configure mailbox interrupts as standard interrupts Marc Zyngier 2020-06-24 19:58 ` Marc Zyngier 2020-06-24 19:58 ` [PATCH v2 12/17] irqchip/hip04: Configure IPIs " Marc Zyngier 2020-06-24 19:58 ` Marc Zyngier 2020-06-24 19:58 ` [PATCH v2 13/17] irqchip/armada-370-xp: " Marc Zyngier 2020-06-24 19:58 ` Marc Zyngier 2020-06-24 19:58 ` [PATCH v2 14/17] arm64: Kill __smp_cross_call and co Marc Zyngier 2020-06-24 19:58 ` Marc Zyngier 2020-06-25 18:25 ` Valentin Schneider 2020-06-25 18:25 ` Valentin Schneider 2020-07-02 13:37 ` Marc Zyngier 2020-07-02 13:37 ` Marc Zyngier 2020-06-24 19:58 ` [PATCH v2 15/17] arm64: Remove custom IRQ stat accounting Marc Zyngier 2020-06-24 19:58 ` Marc Zyngier 2020-06-25 18:26 ` Valentin Schneider 2020-06-25 18:26 ` Valentin Schneider 2020-06-26 11:58 ` Marc Zyngier 2020-06-26 11:58 ` Marc Zyngier 2020-06-26 23:15 ` Valentin Schneider 2020-06-26 23:15 ` Valentin Schneider 2020-06-27 11:42 ` Marc Zyngier 2020-06-27 11:42 ` Marc Zyngier 2020-07-10 19:58 ` Valentin Schneider 2020-07-10 19:58 ` Valentin Schneider 2020-06-24 19:58 ` [PATCH v2 16/17] ARM: Kill __smp_cross_call and co Marc Zyngier 2020-06-24 19:58 ` Marc Zyngier 2020-06-24 19:58 ` [PATCH v2 17/17] ARM: Remove custom IRQ stat accounting Marc Zyngier 2020-06-24 19:58 ` Marc Zyngier 2020-06-25 18:24 ` [PATCH v2 00/17] arm/arm64: Turning IPIs into normal interrupts Valentin Schneider 2020-06-25 18:24 ` Valentin Schneider 2020-07-10 19:58 ` Valentin Schneider 2020-07-10 19:58 ` Valentin Schneider 2020-08-11 13:15 ` Sumit Garg 2020-08-11 13:15 ` Sumit Garg 2020-08-11 13:58 ` Marc Zyngier 2020-08-11 13:58 ` Marc Zyngier
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