* [PATCH] drm/amdgpu: limit harvest bit read on several ASICs
@ 2022-02-22 15:07 Guchun Chen
2022-02-22 15:25 ` Deucher, Alexander
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Guchun Chen @ 2022-02-22 15:07 UTC (permalink / raw)
To: amd-gfx, alexander.deucher, hawking.zhang, christian.koenig, xinhui.pan
Cc: Guchun Chen
Due to faulty VBIOS out there, harvest bit setting is not
consistently correct especially for display IP. So far,
it's hard to work out a solution on all the legacy Navi1x
ASICs in a short time, so to avoid regression, limit harvest
bit read on several ASICs. Will revisit later once VBIOS has
corrected it in long term.
Fixes: b3f4ea887d5f("drm/amdgpu: read harvest bit per IP data on legacy GPUs")
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 18 +++++++++++++-----
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 11255290f117..2e0ff1ace6fc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -1129,12 +1129,20 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev)
* so read harvest bit per IP data structure to set
* harvest configuration.
*/
- if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0))
- amdgpu_discovery_read_harvest_bit_per_ip(adev,
- &vcn_harvest_count);
- else
+ if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) {
+ if ((adev->pdev->device == 0x731E &&
+ (adev->pdev->revision == 0xC6 ||
+ adev->pdev->revision == 0xC7)) ||
+ (adev->pdev->device == 0x7340 &&
+ adev->pdev->revision == 0xC9) ||
+ (adev->pdev->device == 0x7360 &&
+ adev->pdev->revision == 0xC7))
+ amdgpu_discovery_read_harvest_bit_per_ip(adev,
+ &vcn_harvest_count);
+ } else {
amdgpu_disocvery_read_from_harvest_table(adev,
- &vcn_harvest_count);
+ &vcn_harvest_count);
+ }
amdgpu_discovery_harvest_config_quirk(adev);
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs 2022-02-22 15:07 [PATCH] drm/amdgpu: limit harvest bit read on several ASICs Guchun Chen @ 2022-02-22 15:25 ` Deucher, Alexander 2022-02-22 17:00 ` Alex Deucher 2022-02-24 15:58 ` Alex Deucher 2 siblings, 0 replies; 7+ messages in thread From: Deucher, Alexander @ 2022-02-22 15:25 UTC (permalink / raw) To: Chen, Guchun, amd-gfx, Zhang, Hawking, Koenig, Christian, Pan, Xinhui [-- Attachment #1: Type: text/plain, Size: 2700 bytes --] [AMD Official Use Only] Acked-by: Alex Deucher <alexander.deucher@amd.com> ________________________________ From: Chen, Guchun <Guchun.Chen@amd.com> Sent: Tuesday, February 22, 2022 10:07 AM To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com> Cc: Chen, Guchun <Guchun.Chen@amd.com> Subject: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs Due to faulty VBIOS out there, harvest bit setting is not consistently correct especially for display IP. So far, it's hard to work out a solution on all the legacy Navi1x ASICs in a short time, so to avoid regression, limit harvest bit read on several ASICs. Will revisit later once VBIOS has corrected it in long term. Fixes: b3f4ea887d5f("drm/amdgpu: read harvest bit per IP data on legacy GPUs") Signed-off-by: Guchun Chen <guchun.chen@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c index 11255290f117..2e0ff1ace6fc 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c @@ -1129,12 +1129,20 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) * so read harvest bit per IP data structure to set * harvest configuration. */ - if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) - amdgpu_discovery_read_harvest_bit_per_ip(adev, - &vcn_harvest_count); - else + if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) { + if ((adev->pdev->device == 0x731E && + (adev->pdev->revision == 0xC6 || + adev->pdev->revision == 0xC7)) || + (adev->pdev->device == 0x7340 && + adev->pdev->revision == 0xC9) || + (adev->pdev->device == 0x7360 && + adev->pdev->revision == 0xC7)) + amdgpu_discovery_read_harvest_bit_per_ip(adev, + &vcn_harvest_count); + } else { amdgpu_disocvery_read_from_harvest_table(adev, - &vcn_harvest_count); + &vcn_harvest_count); + } amdgpu_discovery_harvest_config_quirk(adev); -- 2.17.1 [-- Attachment #2: Type: text/html, Size: 6020 bytes --] ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs 2022-02-22 15:07 [PATCH] drm/amdgpu: limit harvest bit read on several ASICs Guchun Chen 2022-02-22 15:25 ` Deucher, Alexander @ 2022-02-22 17:00 ` Alex Deucher 2022-02-23 2:29 ` Chen, Guchun 2022-02-24 15:58 ` Alex Deucher 2 siblings, 1 reply; 7+ messages in thread From: Alex Deucher @ 2022-02-22 17:00 UTC (permalink / raw) To: Guchun Chen Cc: Deucher, Alexander, xinhui pan, Christian Koenig, amd-gfx list, Hawking Zhang On Tue, Feb 22, 2022 at 10:07 AM Guchun Chen <guchun.chen@amd.com> wrote: > > Due to faulty VBIOS out there, harvest bit setting is not > consistently correct especially for display IP. So far, > it's hard to work out a solution on all the legacy Navi1x > ASICs in a short time, so to avoid regression, limit harvest > bit read on several ASICs. Will revisit later once VBIOS has > corrected it in long term. > Looks like it may be incorrect for VCN as well. Double check that. Alex > Fixes: b3f4ea887d5f("drm/amdgpu: read harvest bit per IP data on legacy GPUs") > Signed-off-by: Guchun Chen <guchun.chen@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 18 +++++++++++++----- > 1 file changed, 13 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > index 11255290f117..2e0ff1ace6fc 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > @@ -1129,12 +1129,20 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) > * so read harvest bit per IP data structure to set > * harvest configuration. > */ > - if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) > - amdgpu_discovery_read_harvest_bit_per_ip(adev, > - &vcn_harvest_count); > - else > + if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) { > + if ((adev->pdev->device == 0x731E && > + (adev->pdev->revision == 0xC6 || > + adev->pdev->revision == 0xC7)) || > + (adev->pdev->device == 0x7340 && > + adev->pdev->revision == 0xC9) || > + (adev->pdev->device == 0x7360 && > + adev->pdev->revision == 0xC7)) > + amdgpu_discovery_read_harvest_bit_per_ip(adev, > + &vcn_harvest_count); > + } else { > amdgpu_disocvery_read_from_harvest_table(adev, > - &vcn_harvest_count); > + &vcn_harvest_count); > + } > > amdgpu_discovery_harvest_config_quirk(adev); > > -- > 2.17.1 > ^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs 2022-02-22 17:00 ` Alex Deucher @ 2022-02-23 2:29 ` Chen, Guchun 2022-02-23 2:30 ` Deucher, Alexander 0 siblings, 1 reply; 7+ messages in thread From: Chen, Guchun @ 2022-02-23 2:29 UTC (permalink / raw) To: Alex Deucher Cc: Deucher, Alexander, Pan, Xinhui, Koenig, Christian, amd-gfx list, Zhang, Hawking Hi Alex, This patch has covered the check of VCN as well. So you want me to modify the comments to add VCN as well? Regards, Guchun -----Original Message----- From: Alex Deucher <alexdeucher@gmail.com> Sent: Wednesday, February 23, 2022 1:00 AM To: Chen, Guchun <Guchun.Chen@amd.com> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com> Subject: Re: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs On Tue, Feb 22, 2022 at 10:07 AM Guchun Chen <guchun.chen@amd.com> wrote: > > Due to faulty VBIOS out there, harvest bit setting is not consistently > correct especially for display IP. So far, it's hard to work out a > solution on all the legacy Navi1x ASICs in a short time, so to avoid > regression, limit harvest bit read on several ASICs. Will revisit > later once VBIOS has corrected it in long term. > Looks like it may be incorrect for VCN as well. Double check that. Alex > Fixes: b3f4ea887d5f("drm/amdgpu: read harvest bit per IP data on > legacy GPUs") > Signed-off-by: Guchun Chen <guchun.chen@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 18 +++++++++++++----- > 1 file changed, 13 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > index 11255290f117..2e0ff1ace6fc 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > @@ -1129,12 +1129,20 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) > * so read harvest bit per IP data structure to set > * harvest configuration. > */ > - if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) > - amdgpu_discovery_read_harvest_bit_per_ip(adev, > - &vcn_harvest_count); > - else > + if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) { > + if ((adev->pdev->device == 0x731E && > + (adev->pdev->revision == 0xC6 || > + adev->pdev->revision == 0xC7)) || > + (adev->pdev->device == 0x7340 && > + adev->pdev->revision == 0xC9) || > + (adev->pdev->device == 0x7360 && > + adev->pdev->revision == 0xC7)) > + amdgpu_discovery_read_harvest_bit_per_ip(adev, > + &vcn_harvest_count); > + } else { > amdgpu_disocvery_read_from_harvest_table(adev, > - &vcn_harvest_count); > + &vcn_harvest_count); > + } > > amdgpu_discovery_harvest_config_quirk(adev); > > -- > 2.17.1 > ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs 2022-02-23 2:29 ` Chen, Guchun @ 2022-02-23 2:30 ` Deucher, Alexander 0 siblings, 0 replies; 7+ messages in thread From: Deucher, Alexander @ 2022-02-23 2:30 UTC (permalink / raw) To: Chen, Guchun, Alex Deucher Cc: Pan, Xinhui, Koenig, Christian, amd-gfx list, Zhang, Hawking [-- Attachment #1: Type: text/plain, Size: 3517 bytes --] [AMD Official Use Only] No that's fine. Just checking. Alex ________________________________ From: Chen, Guchun <Guchun.Chen@amd.com> Sent: Tuesday, February 22, 2022 9:29 PM To: Alex Deucher <alexdeucher@gmail.com> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com> Subject: RE: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs Hi Alex, This patch has covered the check of VCN as well. So you want me to modify the comments to add VCN as well? Regards, Guchun -----Original Message----- From: Alex Deucher <alexdeucher@gmail.com> Sent: Wednesday, February 23, 2022 1:00 AM To: Chen, Guchun <Guchun.Chen@amd.com> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com> Subject: Re: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs On Tue, Feb 22, 2022 at 10:07 AM Guchun Chen <guchun.chen@amd.com> wrote: > > Due to faulty VBIOS out there, harvest bit setting is not consistently > correct especially for display IP. So far, it's hard to work out a > solution on all the legacy Navi1x ASICs in a short time, so to avoid > regression, limit harvest bit read on several ASICs. Will revisit > later once VBIOS has corrected it in long term. > Looks like it may be incorrect for VCN as well. Double check that. Alex > Fixes: b3f4ea887d5f("drm/amdgpu: read harvest bit per IP data on > legacy GPUs") > Signed-off-by: Guchun Chen <guchun.chen@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 18 +++++++++++++----- > 1 file changed, 13 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > index 11255290f117..2e0ff1ace6fc 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > @@ -1129,12 +1129,20 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) > * so read harvest bit per IP data structure to set > * harvest configuration. > */ > - if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) > - amdgpu_discovery_read_harvest_bit_per_ip(adev, > - &vcn_harvest_count); > - else > + if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) { > + if ((adev->pdev->device == 0x731E && > + (adev->pdev->revision == 0xC6 || > + adev->pdev->revision == 0xC7)) || > + (adev->pdev->device == 0x7340 && > + adev->pdev->revision == 0xC9) || > + (adev->pdev->device == 0x7360 && > + adev->pdev->revision == 0xC7)) > + amdgpu_discovery_read_harvest_bit_per_ip(adev, > + &vcn_harvest_count); > + } else { > amdgpu_disocvery_read_from_harvest_table(adev, > - &vcn_harvest_count); > + &vcn_harvest_count); > + } > > amdgpu_discovery_harvest_config_quirk(adev); > > -- > 2.17.1 > [-- Attachment #2: Type: text/html, Size: 7458 bytes --] ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs 2022-02-22 15:07 [PATCH] drm/amdgpu: limit harvest bit read on several ASICs Guchun Chen 2022-02-22 15:25 ` Deucher, Alexander 2022-02-22 17:00 ` Alex Deucher @ 2022-02-24 15:58 ` Alex Deucher 2022-02-25 2:26 ` Chen, Guchun 2 siblings, 1 reply; 7+ messages in thread From: Alex Deucher @ 2022-02-24 15:58 UTC (permalink / raw) To: Guchun Chen Cc: Deucher, Alexander, xinhui pan, Christian Koenig, amd-gfx list, Hawking Zhang On Tue, Feb 22, 2022 at 10:07 AM Guchun Chen <guchun.chen@amd.com> wrote: > > Due to faulty VBIOS out there, harvest bit setting is not > consistently correct especially for display IP. So far, > it's hard to work out a solution on all the legacy Navi1x > ASICs in a short time, so to avoid regression, limit harvest > bit read on several ASICs. Will revisit later once VBIOS has > corrected it in long term. > > Fixes: b3f4ea887d5f("drm/amdgpu: read harvest bit per IP data on legacy GPUs") > Signed-off-by: Guchun Chen <guchun.chen@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 18 +++++++++++++----- > 1 file changed, 13 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > index 11255290f117..2e0ff1ace6fc 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > @@ -1129,12 +1129,20 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) > * so read harvest bit per IP data structure to set > * harvest configuration. > */ > - if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) > - amdgpu_discovery_read_harvest_bit_per_ip(adev, > - &vcn_harvest_count); > - else > + if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) { > + if ((adev->pdev->device == 0x731E && > + (adev->pdev->revision == 0xC6 || > + adev->pdev->revision == 0xC7)) || > + (adev->pdev->device == 0x7340 && > + adev->pdev->revision == 0xC9) || > + (adev->pdev->device == 0x7360 && > + adev->pdev->revision == 0xC7)) > + amdgpu_discovery_read_harvest_bit_per_ip(adev, > + &vcn_harvest_count); Now that we have this code in place, can we drop the hardcoded harvest settings below? E.g., if ((adev->pdev->device == 0x731E && (adev->pdev->revision == 0xC6 || adev->pdev->revision == 0xC7)) || (adev->pdev->device == 0x7340 && adev->pdev->revision == 0xC9) || (adev->pdev->device == 0x7360 && adev->pdev->revision == 0xC7)) { adev->harvest_ip_mask |= AMD_HARVEST_IP_VCN_MASK; adev->harvest_ip_mask |= AMD_HARVEST_IP_JPEG_MASK; } Looks like the same board variants in both places. Alex > + } else { > amdgpu_disocvery_read_from_harvest_table(adev, > - &vcn_harvest_count); > + &vcn_harvest_count); > + } > > amdgpu_discovery_harvest_config_quirk(adev); > > -- > 2.17.1 > ^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs 2022-02-24 15:58 ` Alex Deucher @ 2022-02-25 2:26 ` Chen, Guchun 0 siblings, 0 replies; 7+ messages in thread From: Chen, Guchun @ 2022-02-25 2:26 UTC (permalink / raw) To: Alex Deucher Cc: Deucher, Alexander, Pan, Xinhui, Koenig, Christian, amd-gfx list, Zhang, Hawking Hi Alex, Exactly, I have the same idea, but I need to double confirm the harvest bit settings are correct on all these listed ASICs. Once confirmed, I will drop the redundant check. Regards, Guchun -----Original Message----- From: Alex Deucher <alexdeucher@gmail.com> Sent: Thursday, February 24, 2022 11:58 PM To: Chen, Guchun <Guchun.Chen@amd.com> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com> Subject: Re: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs On Tue, Feb 22, 2022 at 10:07 AM Guchun Chen <guchun.chen@amd.com> wrote: > > Due to faulty VBIOS out there, harvest bit setting is not consistently > correct especially for display IP. So far, it's hard to work out a > solution on all the legacy Navi1x ASICs in a short time, so to avoid > regression, limit harvest bit read on several ASICs. Will revisit > later once VBIOS has corrected it in long term. > > Fixes: b3f4ea887d5f("drm/amdgpu: read harvest bit per IP data on > legacy GPUs") > Signed-off-by: Guchun Chen <guchun.chen@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 18 +++++++++++++----- > 1 file changed, 13 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > index 11255290f117..2e0ff1ace6fc 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c > @@ -1129,12 +1129,20 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) > * so read harvest bit per IP data structure to set > * harvest configuration. > */ > - if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) > - amdgpu_discovery_read_harvest_bit_per_ip(adev, > - &vcn_harvest_count); > - else > + if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) { > + if ((adev->pdev->device == 0x731E && > + (adev->pdev->revision == 0xC6 || > + adev->pdev->revision == 0xC7)) || > + (adev->pdev->device == 0x7340 && > + adev->pdev->revision == 0xC9) || > + (adev->pdev->device == 0x7360 && > + adev->pdev->revision == 0xC7)) > + amdgpu_discovery_read_harvest_bit_per_ip(adev, > + &vcn_harvest_count); Now that we have this code in place, can we drop the hardcoded harvest settings below? E.g., if ((adev->pdev->device == 0x731E && (adev->pdev->revision == 0xC6 || adev->pdev->revision == 0xC7)) || (adev->pdev->device == 0x7340 && adev->pdev->revision == 0xC9) || (adev->pdev->device == 0x7360 && adev->pdev->revision == 0xC7)) { adev->harvest_ip_mask |= AMD_HARVEST_IP_VCN_MASK; adev->harvest_ip_mask |= AMD_HARVEST_IP_JPEG_MASK; } Looks like the same board variants in both places. Alex > + } else { > amdgpu_disocvery_read_from_harvest_table(adev, > - &vcn_harvest_count); > + &vcn_harvest_count); > + } > > amdgpu_discovery_harvest_config_quirk(adev); > > -- > 2.17.1 > ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2022-02-25 2:26 UTC | newest] Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-02-22 15:07 [PATCH] drm/amdgpu: limit harvest bit read on several ASICs Guchun Chen 2022-02-22 15:25 ` Deucher, Alexander 2022-02-22 17:00 ` Alex Deucher 2022-02-23 2:29 ` Chen, Guchun 2022-02-23 2:30 ` Deucher, Alexander 2022-02-24 15:58 ` Alex Deucher 2022-02-25 2:26 ` Chen, Guchun
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