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From: Peter Chen <peter.chen@nxp.com>
To: Felipe Balbi <balbi@kernel.org>,
	Peter Chen <hzpeterchen@gmail.com>,
	"pawell@cadence.com" <pawell@cadence.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
	"rogerq@ti.com" <rogerq@ti.com>,
	lkml <linux-kernel@vger.kernel.org>,
	"adouglas@cadence.com" <adouglas@cadence.com>,
	"jbergsagel@ti.com" <jbergsagel@ti.com>,
	"nsekhar@ti.com" <nsekhar@ti.com>, "nm@ti.com" <nm@ti.com>,
	"sureshp@cadence.com" <sureshp@cadence.com>,
	"pjez@cadence.com" <pjez@cadence.com>,
	"kurahul@cadence.com" <kurahul@cadence.com>
Subject: RE: [PATCH v1 2/2] usb:cdns3 Add Cadence USB3 DRD Driver
Date: Wed, 12 Dec 2018 07:38:11 +0000	[thread overview]
Message-ID: <VI1PR04MB5327B1CB6C6BC7D293701F1D8BA70@VI1PR04MB5327.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <877egfmdxk.fsf@linux.intel.com>

 
> >> >> +                                           USB_CMD_STMODE |
> >> >> +
> >> >> + USB_STS_TMODE_SEL(tmode - 1));
> >> >
> >> >I'm 90% sure this won't work. There's a reason why we only enter the
> >> >requested test mode from status stage. How have you tested this?
> >>
> >
> > What's the reason?
> > It can work although the code is a little different with above, I
> > tested it using USBxHSETT tool at Windows.
> 
> put a sniffer. Status stage won't complete
> 

Ok, you mean sending test packet during the status completion handler?
I will see whether the status stage can complete next time when doing test.

> >> >> +    irqreturn_t ret = IRQ_NONE;
> >> >> +    unsigned long flags;
> >> >> +    u32 reg;
> >> >> +
> >> >> +    priv_dev = cdns->gadget_dev;
> >> >> +    spin_lock_irqsave(&priv_dev->lock, flags);
> >> >
> >> >you're already running in hardirq context. Why do you need this lock
> >> >at all? I would be better to use the hardirq handler to mask your
> >> >interrupts, so they don't fire again, then used the top-half
> >> >(softirq) handler to actually handle the interrupts.
> >>
> >
> > This controller may be ran at SMP environment, register and flag
> > access needs to be protected among CPUs running.
> 
> in hardirq context? When interrupts are already disabled?

Interrupt handler (hardirq context) at CPU0, and process at CPU1, eg role switch, unload module, etc.

Peter

WARNING: multiple messages have this Message-ID (diff)
From: Peter Chen <peter.chen@nxp.com>
To: Felipe Balbi <balbi@kernel.org>,
	Peter Chen <hzpeterchen@gmail.com>,
	"pawell@cadence.com" <pawell@cadence.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
	"rogerq@ti.com" <rogerq@ti.com>,
	lkml <linux-kernel@vger.kernel.org>,
	"adouglas@cadence.com" <adouglas@cadence.com>,
	"jbergsagel@ti.com" <jbergsagel@ti.com>,
	"nsekhar@ti.com" <nsekhar@ti.com>, "nm@ti.com" <nm@ti.com>,
	"sureshp@cadence.com" <sureshp@cadence.com>,
	"pjez@cadence.com" <pjez@cadence.com>,
	"kurahul@cadence.com" <kurahul@cadence.com>
Subject: [v1,2/2] usb:cdns3 Add Cadence USB3 DRD Driver
Date: Wed, 12 Dec 2018 07:38:11 +0000	[thread overview]
Message-ID: <VI1PR04MB5327B1CB6C6BC7D293701F1D8BA70@VI1PR04MB5327.eurprd04.prod.outlook.com> (raw)

> >> >> +                                           USB_CMD_STMODE |
> >> >> +
> >> >> + USB_STS_TMODE_SEL(tmode - 1));
> >> >
> >> >I'm 90% sure this won't work. There's a reason why we only enter the
> >> >requested test mode from status stage. How have you tested this?
> >>
> >
> > What's the reason?
> > It can work although the code is a little different with above, I
> > tested it using USBxHSETT tool at Windows.
> 
> put a sniffer. Status stage won't complete
> 

Ok, you mean sending test packet during the status completion handler?
I will see whether the status stage can complete next time when doing test.

> >> >> +    irqreturn_t ret = IRQ_NONE;
> >> >> +    unsigned long flags;
> >> >> +    u32 reg;
> >> >> +
> >> >> +    priv_dev = cdns->gadget_dev;
> >> >> +    spin_lock_irqsave(&priv_dev->lock, flags);
> >> >
> >> >you're already running in hardirq context. Why do you need this lock
> >> >at all? I would be better to use the hardirq handler to mask your
> >> >interrupts, so they don't fire again, then used the top-half
> >> >(softirq) handler to actually handle the interrupts.
> >>
> >
> > This controller may be ran at SMP environment, register and flag
> > access needs to be protected among CPUs running.
> 
> in hardirq context? When interrupts are already disabled?

Interrupt handler (hardirq context) at CPU0, and process at CPU1, eg role switch, unload module, etc.

Peter

  reply	other threads:[~2018-12-12  7:38 UTC|newest]

Thread overview: 79+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-10 12:39 [PATCH v1 0/2] Introduced new Cadence USBSS DRD Driver Pawel Laszczak
2018-12-10 12:39 ` Pawel Laszczak
2018-12-10 12:39 ` [PATCH v1 1/2] dt-bindings: add binding for USBSS-DRD controller Pawel Laszczak
2018-12-10 12:39   ` [v1,1/2] " Pawel Laszczak
2018-12-10 12:39   ` [PATCH v1 1/2] " Pawel Laszczak
2018-12-11 10:16   ` Roger Quadros
2018-12-11 10:16     ` [v1,1/2] " Roger Quadros
2018-12-11 10:16     ` [PATCH v1 1/2] " Roger Quadros
2018-12-13  9:20     ` Peter Chen
2018-12-13  9:20       ` [v1,1/2] " Peter Chen
2018-12-13  9:25       ` [PATCH v1 1/2] " Pawel Laszczak
2018-12-13  9:25         ` [v1,1/2] " Pawel Laszczak
2018-12-20 20:01   ` [PATCH v1 1/2] " Rob Herring
2018-12-20 20:01     ` [v1,1/2] " Rob Herring
2018-12-22 22:24     ` [PATCH v1 1/2] " Pawel Laszczak
2018-12-22 22:24       ` [v1,1/2] " Pawel Laszczak
2018-12-27 21:01       ` [PATCH v1 1/2] " Rob Herring
2018-12-27 21:01         ` [v1,1/2] " Rob Herring
2018-12-31  5:35         ` [PATCH v1 1/2] " Pawel Laszczak
2018-12-31  5:35           ` [v1,1/2] " Pawel Laszczak
2018-12-10 12:39 ` [PATCH v1 2/2] usb:cdns3 Add Cadence USB3 DRD Driver Pawel Laszczak
2018-12-10 12:39   ` [v1,2/2] " Pawel Laszczak
2018-12-10 12:39   ` [PATCH v1 2/2] " Pawel Laszczak
2018-12-11  9:39   ` Roger Quadros
2018-12-11  9:39     ` [v1,2/2] " Roger Quadros
2018-12-11  9:39     ` [PATCH v1 2/2] " Roger Quadros
2018-12-11 10:01     ` Pawel Laszczak
2018-12-11 10:01       ` [v1,2/2] " Pawel Laszczak
2018-12-11 12:15       ` [PATCH v1 2/2] " Felipe Balbi
2018-12-11 12:15         ` [v1,2/2] " Felipe Balbi
2018-12-11 12:15         ` [PATCH v1 2/2] " Felipe Balbi
2018-12-11 11:46     ` Felipe Balbi
2018-12-11 11:46       ` [v1,2/2] " Felipe Balbi
2018-12-11 12:14   ` [PATCH v1 2/2] " Felipe Balbi
2018-12-11 12:14     ` [v1,2/2] " Felipe Balbi
2018-12-11 12:14     ` [PATCH v1 2/2] " Felipe Balbi
2018-12-11 19:04     ` Pawel Laszczak
2018-12-11 19:04       ` [v1,2/2] " Pawel Laszczak
2018-12-11 19:04       ` [PATCH v1 2/2] " Pawel Laszczak
2018-12-12  2:04       ` Peter Chen
2018-12-12  2:04         ` [v1,2/2] " Peter Chen
2018-12-12  6:55         ` [PATCH v1 2/2] " Felipe Balbi
2018-12-12  6:55           ` [v1,2/2] " Felipe Balbi
2018-12-12  7:38           ` Peter Chen [this message]
2018-12-12  7:38             ` Peter Chen
2018-12-12  8:34             ` [PATCH v1 2/2] " Felipe Balbi
2018-12-12  8:34               ` [v1,2/2] " Felipe Balbi
2018-12-12  8:34               ` [PATCH v1 2/2] " Felipe Balbi
2018-12-12  9:24               ` Peter Chen
2018-12-12  9:24                 ` [v1,2/2] " Peter Chen
2018-12-12 15:53         ` [PATCH v1 2/2] " Bin Liu
2018-12-12 15:53           ` [v1,2/2] " Bin Liu
2018-12-12 15:53           ` [PATCH v1 2/2] " Bin Liu
2018-12-13  1:21           ` Peter Chen
2018-12-13  1:21             ` [v1,2/2] " Peter Chen
2018-12-12  6:52       ` [PATCH v1 2/2] " Felipe Balbi
2018-12-12  6:52         ` [v1,2/2] " Felipe Balbi
2018-12-12  6:52         ` [PATCH v1 2/2] " Felipe Balbi
2018-12-14  3:46         ` Kishon Vijay Abraham I
2018-12-14  3:46           ` [v1,2/2] " Kishon Vijay Abraham I
2018-12-17  5:46           ` [PATCH v1 2/2] " Pawel Laszczak
2018-12-17  5:46             ` [v1,2/2] " Pawel Laszczak
2018-12-17 11:25         ` [PATCH v1 2/2] " Pawel Laszczak
2018-12-17 11:25           ` [v1,2/2] " Pawel Laszczak
2018-12-17 11:34           ` [PATCH v1 2/2] " Felipe Balbi
2018-12-17 11:34             ` [v1,2/2] " Felipe Balbi
2018-12-17 11:34             ` [PATCH v1 2/2] " Felipe Balbi
2018-12-17 11:51         ` Pawel Laszczak
2018-12-17 11:51           ` [v1,2/2] " Pawel Laszczak
2018-12-17 11:56           ` [PATCH v1 2/2] " Felipe Balbi
2018-12-17 11:56             ` [v1,2/2] " Felipe Balbi
2018-12-17 11:56             ` [PATCH v1 2/2] " Felipe Balbi
2018-12-13  9:35   ` Peter Chen
2018-12-13  9:35     ` [v1,2/2] " Peter Chen
2018-12-16 13:01     ` [PATCH v1 2/2] " Pawel Laszczak
2018-12-16 13:01       ` [v1,2/2] " Pawel Laszczak
2018-12-14 22:56   ` [PATCH v1 2/2] " kbuild test robot
2018-12-14 22:56     ` [v1,2/2] " kbuild test robot
2018-12-14 22:56     ` [PATCH v1 2/2] " kbuild test robot

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