From: Conor Dooley <conor@kernel.org> To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Conor Dooley <conor.dooley@microchip.com>, Hal Feng <hal.feng@starfivetech.com>, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Palmer Dabbelt <palmer@dabbelt.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Philipp Zabel <p.zabel@pengutronix.de>, Emil Renner Berthing <emil.renner.berthing@canonical.com>, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 07/11] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Date: Fri, 17 Feb 2023 16:27:34 +0000 [thread overview] Message-ID: <Y++q9ln8P3XegqfN@spud> (raw) In-Reply-To: <dcba75b5-7b62-35aa-6836-5d5edd785002@linaro.org> [-- Attachment #1: Type: text/plain, Size: 1606 bytes --] On Fri, Feb 17, 2023 at 04:47:48PM +0100, Krzysztof Kozlowski wrote: > On 17/02/2023 14:32, Conor Dooley wrote: > >>>> Yes, it is. > >>> > >>> Which would then make GMAC1 RGMII RX optional, rather than required? > >> > >> If thinking in this way, I must say yes, it is optional. But actually > >> GMAC1 RGMII RX feeds gmac1_rx by default. > >> For a mux, it usually works if you populate only one input to it. > >> Does it mean all the other inputs are optional? And how can we define > >> which input is required? > > > > I'm not sure, that is a question for Krzysztof and/or Rob. > > That's a long thread, please summarize what you ask. Otherwise I have no > clue what is the question. Sorry. I tried to preserve the context of the conversation the last time I cropped it so that things would be contained on one email. For me at least, I am wondering how you convey that out of a list of clock inputs (for example a, b, c, d) that two of the clocks are inputs to a mux and it is only required to provide one of the two (say b & c). > Does the mux works correctly if clock input is not connected? I mean, > are you now talking about real hardware or some simplification from SW > point of view? I'm coming at this from an angle of "is a StarFive customer going to show up with a devicetree containing dummy fixed-clocks to satisfy dtbs_check because they opted to only populate one input to the mux". I don't really care about implications for the driver, just about whether the hardware allows for inputs to the mux to be left un-populated. Cheers, Conor. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org> To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Conor Dooley <conor.dooley@microchip.com>, Hal Feng <hal.feng@starfivetech.com>, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Palmer Dabbelt <palmer@dabbelt.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Philipp Zabel <p.zabel@pengutronix.de>, Emil Renner Berthing <emil.renner.berthing@canonical.com>, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 07/11] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Date: Fri, 17 Feb 2023 16:27:34 +0000 [thread overview] Message-ID: <Y++q9ln8P3XegqfN@spud> (raw) In-Reply-To: <dcba75b5-7b62-35aa-6836-5d5edd785002@linaro.org> [-- Attachment #1.1: Type: text/plain, Size: 1606 bytes --] On Fri, Feb 17, 2023 at 04:47:48PM +0100, Krzysztof Kozlowski wrote: > On 17/02/2023 14:32, Conor Dooley wrote: > >>>> Yes, it is. > >>> > >>> Which would then make GMAC1 RGMII RX optional, rather than required? > >> > >> If thinking in this way, I must say yes, it is optional. But actually > >> GMAC1 RGMII RX feeds gmac1_rx by default. > >> For a mux, it usually works if you populate only one input to it. > >> Does it mean all the other inputs are optional? And how can we define > >> which input is required? > > > > I'm not sure, that is a question for Krzysztof and/or Rob. > > That's a long thread, please summarize what you ask. Otherwise I have no > clue what is the question. Sorry. I tried to preserve the context of the conversation the last time I cropped it so that things would be contained on one email. For me at least, I am wondering how you convey that out of a list of clock inputs (for example a, b, c, d) that two of the clocks are inputs to a mux and it is only required to provide one of the two (say b & c). > Does the mux works correctly if clock input is not connected? I mean, > are you now talking about real hardware or some simplification from SW > point of view? I'm coming at this from an angle of "is a StarFive customer going to show up with a devicetree containing dummy fixed-clocks to satisfy dtbs_check because they opted to only populate one input to the mux". I don't really care about implications for the driver, just about whether the hardware allows for inputs to the mux to be left un-populated. Cheers, Conor. [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 161 bytes --] _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-02-17 16:28 UTC|newest] Thread overview: 120+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-12-20 0:50 [PATCH v3 00/11] Basic clock and reset support for StarFive JH7110 RISC-V SoC Hal Feng 2022-12-20 0:50 ` Hal Feng 2022-12-20 0:50 ` [PATCH v3 01/11] clk: starfive: Factor out common JH7100 and JH7110 code Hal Feng 2022-12-20 0:50 ` Hal Feng 2022-12-20 21:54 ` Conor Dooley 2022-12-20 21:54 ` Conor Dooley 2022-12-20 0:50 ` [PATCH v3 02/11] clk: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng 2022-12-20 0:50 ` Hal Feng 2022-12-20 22:08 ` Conor Dooley 2022-12-20 22:08 ` Conor Dooley 2022-12-23 6:23 ` Hal Feng 2022-12-23 6:23 ` Hal Feng 2022-12-20 0:50 ` [PATCH v3 03/11] reset: Create subdirectory for StarFive drivers Hal Feng 2022-12-20 0:50 ` Hal Feng 2022-12-20 22:15 ` Conor Dooley 2022-12-20 22:15 ` Conor Dooley 2022-12-23 7:02 ` Hal Feng 2022-12-23 7:02 ` Hal Feng 2022-12-20 0:50 ` [PATCH v3 04/11] reset: starfive: Factor out common JH71X0 reset code Hal Feng 2022-12-20 0:50 ` Hal Feng 2022-12-20 22:28 ` Conor Dooley 2022-12-20 22:28 ` Conor Dooley 2022-12-23 7:49 ` Hal Feng 2022-12-23 7:49 ` Hal Feng 2022-12-20 0:50 ` [PATCH v3 05/11] reset: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng 2022-12-20 0:50 ` Hal Feng 2022-12-20 2:40 ` kernel test robot 2022-12-20 2:40 ` kernel test robot 2022-12-20 22:31 ` Conor Dooley 2022-12-20 22:31 ` Conor Dooley 2022-12-24 3:48 ` kernel test robot 2022-12-24 3:48 ` kernel test robot 2022-12-20 0:50 ` [PATCH v3 06/11] reset: starfive: jh71x0: Use 32bit I/O on 32bit registers Hal Feng 2022-12-20 0:50 ` Hal Feng 2022-12-20 22:49 ` Conor Dooley 2022-12-20 22:49 ` Conor Dooley 2022-12-20 0:50 ` [PATCH v3 07/11] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Hal Feng 2022-12-20 0:50 ` Hal Feng 2022-12-20 20:12 ` Rob Herring 2022-12-20 20:12 ` Rob Herring 2022-12-20 23:14 ` Conor Dooley 2022-12-20 23:14 ` Conor Dooley 2022-12-20 23:16 ` Conor Dooley 2022-12-20 23:16 ` Conor Dooley 2022-12-25 16:26 ` Hal Feng 2022-12-25 16:26 ` Hal Feng 2022-12-27 20:15 ` Conor Dooley 2022-12-27 20:15 ` Conor Dooley 2023-02-16 14:42 ` Hal Feng 2023-02-16 14:42 ` Hal Feng 2023-02-16 18:20 ` Conor Dooley 2023-02-16 18:20 ` Conor Dooley 2023-02-17 2:27 ` Hal Feng 2023-02-17 2:27 ` Hal Feng 2023-02-17 7:51 ` Conor Dooley 2023-02-17 7:51 ` Conor Dooley 2023-02-17 12:20 ` Hal Feng 2023-02-17 12:20 ` Hal Feng 2023-02-17 13:32 ` Conor Dooley 2023-02-17 13:32 ` Conor Dooley 2023-02-17 15:47 ` Krzysztof Kozlowski 2023-02-17 15:47 ` Krzysztof Kozlowski 2023-02-17 16:27 ` Conor Dooley [this message] 2023-02-17 16:27 ` Conor Dooley 2023-02-18 10:20 ` Krzysztof Kozlowski 2023-02-18 10:20 ` Krzysztof Kozlowski 2023-02-18 11:17 ` Conor Dooley 2023-02-18 11:17 ` Conor Dooley 2023-02-18 14:55 ` Krzysztof Kozlowski 2023-02-18 14:55 ` Krzysztof Kozlowski 2023-02-18 15:08 ` Conor Dooley 2023-02-18 15:08 ` Conor Dooley 2023-02-21 22:17 ` Stephen Boyd 2023-02-21 22:17 ` Stephen Boyd 2023-02-21 23:39 ` Conor Dooley 2023-02-21 23:39 ` Conor Dooley 2023-02-22 13:27 ` Hal Feng 2023-02-22 13:27 ` Hal Feng 2023-02-22 16:26 ` Conor Dooley 2023-02-22 16:26 ` Conor Dooley 2023-02-23 3:03 ` Hal Feng 2023-02-23 3:03 ` Hal Feng 2023-02-23 6:18 ` Conor Dooley 2023-02-23 6:18 ` Conor Dooley 2023-02-23 9:52 ` Hal Feng 2023-02-23 9:52 ` Hal Feng 2022-12-20 0:50 ` [PATCH v3 08/11] dt-bindings: clock: Add StarFive JH7110 always-on " Hal Feng 2022-12-20 0:50 ` Hal Feng 2022-12-20 20:14 ` Rob Herring 2022-12-20 20:14 ` Rob Herring 2022-12-20 23:19 ` Conor Dooley 2022-12-20 23:19 ` Conor Dooley 2023-02-16 17:19 ` Hal Feng 2023-02-16 17:19 ` Hal Feng 2022-12-20 0:50 ` [PATCH v3 09/11] clk: starfive: Add StarFive JH7110 system clock driver Hal Feng 2022-12-20 0:50 ` Hal Feng 2022-12-23 9:57 ` kernel test robot 2022-12-23 9:57 ` kernel test robot 2023-01-05 11:32 ` kernel test robot 2023-01-05 11:32 ` kernel test robot 2023-02-19 21:23 ` Emil Renner Berthing 2023-02-19 21:23 ` Emil Renner Berthing 2023-02-21 6:44 ` Hal Feng 2023-02-21 6:44 ` Hal Feng 2022-12-20 0:50 ` [PATCH v3 10/11] clk: starfive: Add StarFive JH7110 always-on " Hal Feng 2022-12-20 0:50 ` Hal Feng 2022-12-23 11:28 ` kernel test robot 2022-12-23 11:28 ` kernel test robot 2023-01-05 13:44 ` kernel test robot 2023-01-05 13:44 ` kernel test robot 2022-12-20 0:50 ` [PATCH v3 11/11] reset: starfive: Add StarFive JH7110 reset driver Hal Feng 2022-12-20 0:50 ` Hal Feng 2022-12-20 7:14 ` kernel test robot 2022-12-20 7:14 ` kernel test robot 2022-12-23 12:39 ` kernel test robot 2022-12-23 12:39 ` kernel test robot 2022-12-27 19:20 ` kernel test robot 2022-12-27 19:20 ` kernel test robot 2023-01-05 15:35 ` kernel test robot 2023-01-05 15:35 ` kernel test robot
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=Y++q9ln8P3XegqfN@spud \ --to=conor@kernel.org \ --cc=conor.dooley@microchip.com \ --cc=devicetree@vger.kernel.org \ --cc=emil.renner.berthing@canonical.com \ --cc=hal.feng@starfivetech.com \ --cc=krzysztof.kozlowski+dt@linaro.org \ --cc=krzysztof.kozlowski@linaro.org \ --cc=linux-clk@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-riscv@lists.infradead.org \ --cc=mturquette@baylibre.com \ --cc=p.zabel@pengutronix.de \ --cc=palmer@dabbelt.com \ --cc=robh+dt@kernel.org \ --cc=sboyd@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.