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From: Andrea Parri <parri.andrea@gmail.com>
To: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Cc: paulmck@kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com,
	aou@eecs.berkeley.edu, mmaas@google.com, hboehm@google.com,
	striker@us.ibm.com, charlie@rivosinc.com, rehn@rivosinc.com,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] membarrier: riscv: Provide core serializing command
Date: Wed, 29 Nov 2023 23:43:34 +0100	[thread overview]
Message-ID: <ZWe+ljzCUQQVu7oD@andrea> (raw)
In-Reply-To: <041c83e6-1ca5-4953-bcec-03571135165d@efficios.com>

> > So I should probably stick to 93917ad50972, which apparently selected
> > CONFIG_MEMBARRIER on RISC-V, for the Fixes: tag in question.
> 
> I think it goes further than that, because you can explicitly
> CONFIG_MEMBARRIER=y, see init/Kconfig:
> 
> config MEMBARRIER
>         bool "Enable membarrier() system call" if EXPERT
>         default y
>         help
>           Enable the membarrier() system call that allows issuing memory
>           barriers across all running threads, which can be used to distribute
>           the cost of user-space memory barriers asymmetrically by transforming
>           pairs of memory barriers into pairs consisting of membarrier() and a
>           compiler barrier.
> 
>           If unsure, say Y.
> 
> Before 1464d00b27b2, riscv just happened to set it to =n in the defconfig.
> 
> I suspect the initial port of riscv merged after v4.14 was already broken.

I see.  Oh well, guess I'll have to leave this up to the maintainers then
(I believe I've never managed to build riscv that far), Palmer?


> > I'll look into adding the membarrier feature you mention (as a final/
> > follow-up patch), unless you or someone else want to take care of it.
> 
> I'll be happy to review it :)

Sweet!  :-)

  Andrea

WARNING: multiple messages have this Message-ID (diff)
From: Andrea Parri <parri.andrea@gmail.com>
To: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Cc: paulmck@kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com,
	aou@eecs.berkeley.edu, mmaas@google.com, hboehm@google.com,
	striker@us.ibm.com, charlie@rivosinc.com, rehn@rivosinc.com,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] membarrier: riscv: Provide core serializing command
Date: Wed, 29 Nov 2023 23:43:34 +0100	[thread overview]
Message-ID: <ZWe+ljzCUQQVu7oD@andrea> (raw)
In-Reply-To: <041c83e6-1ca5-4953-bcec-03571135165d@efficios.com>

> > So I should probably stick to 93917ad50972, which apparently selected
> > CONFIG_MEMBARRIER on RISC-V, for the Fixes: tag in question.
> 
> I think it goes further than that, because you can explicitly
> CONFIG_MEMBARRIER=y, see init/Kconfig:
> 
> config MEMBARRIER
>         bool "Enable membarrier() system call" if EXPERT
>         default y
>         help
>           Enable the membarrier() system call that allows issuing memory
>           barriers across all running threads, which can be used to distribute
>           the cost of user-space memory barriers asymmetrically by transforming
>           pairs of memory barriers into pairs consisting of membarrier() and a
>           compiler barrier.
> 
>           If unsure, say Y.
> 
> Before 1464d00b27b2, riscv just happened to set it to =n in the defconfig.
> 
> I suspect the initial port of riscv merged after v4.14 was already broken.

I see.  Oh well, guess I'll have to leave this up to the maintainers then
(I believe I've never managed to build riscv that far), Palmer?


> > I'll look into adding the membarrier feature you mention (as a final/
> > follow-up patch), unless you or someone else want to take care of it.
> 
> I'll be happy to review it :)

Sweet!  :-)

  Andrea

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  reply	other threads:[~2023-11-29 22:43 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-27 10:32 [PATCH 0/2] membarrier: riscv: Provide core serializing command Andrea Parri
2023-11-27 10:32 ` Andrea Parri
2023-11-27 10:32 ` [PATCH 1/2] locking: Introduce prepare_sync_core_cmd() Andrea Parri
2023-11-27 10:32   ` Andrea Parri
2023-11-27 12:53   ` Mathieu Desnoyers
2023-11-27 12:53     ` Mathieu Desnoyers
2023-11-27 10:32 ` [PATCH 2/2] membarrier: riscv: Provide core serializing command Andrea Parri
2023-11-27 10:32   ` Andrea Parri
2023-11-27 13:28   ` Mathieu Desnoyers
2023-11-27 13:28     ` Mathieu Desnoyers
2023-11-28 15:13     ` Andrea Parri
2023-11-28 15:13       ` Andrea Parri
2023-11-28 18:39       ` Mathieu Desnoyers
2023-11-28 18:39         ` Mathieu Desnoyers
2023-11-29 18:29         ` Andrea Parri
2023-11-29 18:29           ` Andrea Parri
2023-11-29 20:00           ` Mathieu Desnoyers
2023-11-29 20:00             ` Mathieu Desnoyers
2023-11-29 21:25             ` Andrea Parri
2023-11-29 21:25               ` Andrea Parri
2023-11-29 21:32               ` Mathieu Desnoyers
2023-11-29 21:32                 ` Mathieu Desnoyers
2023-11-29 22:43                 ` Andrea Parri [this message]
2023-11-29 22:43                   ` Andrea Parri
2023-12-06 13:05                   ` Palmer Dabbelt
2023-12-06 13:05                     ` Palmer Dabbelt
2023-12-06 14:11                     ` Andrea Parri
2023-12-06 14:11                       ` Andrea Parri
2023-12-06 14:15                       ` Palmer Dabbelt
2023-12-06 14:15                         ` Palmer Dabbelt
2023-12-06 17:42                         ` Andrea Parri
2023-12-06 17:42                           ` Andrea Parri
2023-12-06 17:56                           ` Palmer Dabbelt
2023-12-06 17:56                             ` Palmer Dabbelt

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