From: Andrea Parri <parri.andrea@gmail.com>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: mathieu.desnoyers@efficios.com, paulmck@kernel.org,
Paul Walmsley <paul.walmsley@sifive.com>,
aou@eecs.berkeley.edu, mmaas@google.com, hboehm@google.com,
striker@us.ibm.com, charlie@rivosinc.com, rehn@rivosinc.com,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] membarrier: riscv: Provide core serializing command
Date: Wed, 6 Dec 2023 18:42:44 +0100 [thread overview]
Message-ID: <ZXCylOEXSbEMGB96@andrea> (raw)
In-Reply-To: <mhng-26a1b3dd-ca9e-4b82-86e9-1faf1e3571e5@palmer-ri-x1c9>
> > The final version of this fix will likely depend on some machinery/code
> > introduced by 3ccfebedd8cf54 ("powerpc, membarrier: Skip memory barrier
> > in switch_mm()"); but, yes, nothing we can't safely adjust I think.
>
> Ya, I guess we'll have to look to know for sure but hopefully it's
> manageable.
Absolutely. One approach would be to follow what PowerPC did: AFAIU, before
3ccfebedd8cf54 membarrier/powerpc used to hard code the required barrier in
in finish_task_switch(), "masking" it as an smp_mb__after_unlock_lock(); riscv
could use a similar approach (though with a different/new mask function).
Alternatively, we could maybe keep the barrier in switch_mm().
But let me complete and send out v2 with the fix at stake... this should give
us a more concrete basis to discuss about these matters.
Andrea
WARNING: multiple messages have this Message-ID (diff)
From: Andrea Parri <parri.andrea@gmail.com>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: mathieu.desnoyers@efficios.com, paulmck@kernel.org,
Paul Walmsley <paul.walmsley@sifive.com>,
aou@eecs.berkeley.edu, mmaas@google.com, hboehm@google.com,
striker@us.ibm.com, charlie@rivosinc.com, rehn@rivosinc.com,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] membarrier: riscv: Provide core serializing command
Date: Wed, 6 Dec 2023 18:42:44 +0100 [thread overview]
Message-ID: <ZXCylOEXSbEMGB96@andrea> (raw)
In-Reply-To: <mhng-26a1b3dd-ca9e-4b82-86e9-1faf1e3571e5@palmer-ri-x1c9>
> > The final version of this fix will likely depend on some machinery/code
> > introduced by 3ccfebedd8cf54 ("powerpc, membarrier: Skip memory barrier
> > in switch_mm()"); but, yes, nothing we can't safely adjust I think.
>
> Ya, I guess we'll have to look to know for sure but hopefully it's
> manageable.
Absolutely. One approach would be to follow what PowerPC did: AFAIU, before
3ccfebedd8cf54 membarrier/powerpc used to hard code the required barrier in
in finish_task_switch(), "masking" it as an smp_mb__after_unlock_lock(); riscv
could use a similar approach (though with a different/new mask function).
Alternatively, we could maybe keep the barrier in switch_mm().
But let me complete and send out v2 with the fix at stake... this should give
us a more concrete basis to discuss about these matters.
Andrea
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-12-06 17:42 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-27 10:32 [PATCH 0/2] membarrier: riscv: Provide core serializing command Andrea Parri
2023-11-27 10:32 ` Andrea Parri
2023-11-27 10:32 ` [PATCH 1/2] locking: Introduce prepare_sync_core_cmd() Andrea Parri
2023-11-27 10:32 ` Andrea Parri
2023-11-27 12:53 ` Mathieu Desnoyers
2023-11-27 12:53 ` Mathieu Desnoyers
2023-11-27 10:32 ` [PATCH 2/2] membarrier: riscv: Provide core serializing command Andrea Parri
2023-11-27 10:32 ` Andrea Parri
2023-11-27 13:28 ` Mathieu Desnoyers
2023-11-27 13:28 ` Mathieu Desnoyers
2023-11-28 15:13 ` Andrea Parri
2023-11-28 15:13 ` Andrea Parri
2023-11-28 18:39 ` Mathieu Desnoyers
2023-11-28 18:39 ` Mathieu Desnoyers
2023-11-29 18:29 ` Andrea Parri
2023-11-29 18:29 ` Andrea Parri
2023-11-29 20:00 ` Mathieu Desnoyers
2023-11-29 20:00 ` Mathieu Desnoyers
2023-11-29 21:25 ` Andrea Parri
2023-11-29 21:25 ` Andrea Parri
2023-11-29 21:32 ` Mathieu Desnoyers
2023-11-29 21:32 ` Mathieu Desnoyers
2023-11-29 22:43 ` Andrea Parri
2023-11-29 22:43 ` Andrea Parri
2023-12-06 13:05 ` Palmer Dabbelt
2023-12-06 13:05 ` Palmer Dabbelt
2023-12-06 14:11 ` Andrea Parri
2023-12-06 14:11 ` Andrea Parri
2023-12-06 14:15 ` Palmer Dabbelt
2023-12-06 14:15 ` Palmer Dabbelt
2023-12-06 17:42 ` Andrea Parri [this message]
2023-12-06 17:42 ` Andrea Parri
2023-12-06 17:56 ` Palmer Dabbelt
2023-12-06 17:56 ` Palmer Dabbelt
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZXCylOEXSbEMGB96@andrea \
--to=parri.andrea@gmail.com \
--cc=aou@eecs.berkeley.edu \
--cc=charlie@rivosinc.com \
--cc=hboehm@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=mathieu.desnoyers@efficios.com \
--cc=mmaas@google.com \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=paulmck@kernel.org \
--cc=rehn@rivosinc.com \
--cc=striker@us.ibm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.