From: Palmer Dabbelt <palmer@dabbelt.com> To: parri.andrea@gmail.com Cc: mathieu.desnoyers@efficios.com, paulmck@kernel.org, Paul Walmsley <paul.walmsley@sifive.com>, aou@eecs.berkeley.edu, mmaas@google.com, hboehm@google.com, striker@us.ibm.com, charlie@rivosinc.com, rehn@rivosinc.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] membarrier: riscv: Provide core serializing command Date: Wed, 06 Dec 2023 05:05:48 -0800 (PST) [thread overview] Message-ID: <mhng-40f43849-e610-410b-92b5-7571838ce9f5@palmer-ri-x1c9> (raw) In-Reply-To: <ZWe+ljzCUQQVu7oD@andrea> On Wed, 29 Nov 2023 14:43:34 PST (-0800), parri.andrea@gmail.com wrote: >> > So I should probably stick to 93917ad50972, which apparently selected >> > CONFIG_MEMBARRIER on RISC-V, for the Fixes: tag in question. >> >> I think it goes further than that, because you can explicitly >> CONFIG_MEMBARRIER=y, see init/Kconfig: >> >> config MEMBARRIER >> bool "Enable membarrier() system call" if EXPERT >> default y >> help >> Enable the membarrier() system call that allows issuing memory >> barriers across all running threads, which can be used to distribute >> the cost of user-space memory barriers asymmetrically by transforming >> pairs of memory barriers into pairs consisting of membarrier() and a >> compiler barrier. >> >> If unsure, say Y. >> >> Before 1464d00b27b2, riscv just happened to set it to =n in the defconfig. >> >> I suspect the initial port of riscv merged after v4.14 was already broken. > > I see. Oh well, guess I'll have to leave this up to the maintainers then > (I believe I've never managed to build riscv that far), Palmer? I see $ git grep "config MEMBARRIER" fab957c11efe2f405e08b9f0d080524bc2631428 fab957c11efe2f405e08b9f0d080524bc2631428:init/Kconfig:config MEMBARRIER so IMO this is just one of those forever bugs. So I'd lean towards Fixes: fab957c11efe ("RISC-V: Atomic and Locking Code") (or anything in that original patch set). It's not that big of a backport, so I think it's safe enough? >> > I'll look into adding the membarrier feature you mention (as a final/ >> > follow-up patch), unless you or someone else want to take care of it. >> >> I'll be happy to review it :) > > Sweet! :-) > > Andrea
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From: Palmer Dabbelt <palmer@dabbelt.com> To: parri.andrea@gmail.com Cc: mathieu.desnoyers@efficios.com, paulmck@kernel.org, Paul Walmsley <paul.walmsley@sifive.com>, aou@eecs.berkeley.edu, mmaas@google.com, hboehm@google.com, striker@us.ibm.com, charlie@rivosinc.com, rehn@rivosinc.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] membarrier: riscv: Provide core serializing command Date: Wed, 06 Dec 2023 05:05:48 -0800 (PST) [thread overview] Message-ID: <mhng-40f43849-e610-410b-92b5-7571838ce9f5@palmer-ri-x1c9> (raw) In-Reply-To: <ZWe+ljzCUQQVu7oD@andrea> On Wed, 29 Nov 2023 14:43:34 PST (-0800), parri.andrea@gmail.com wrote: >> > So I should probably stick to 93917ad50972, which apparently selected >> > CONFIG_MEMBARRIER on RISC-V, for the Fixes: tag in question. >> >> I think it goes further than that, because you can explicitly >> CONFIG_MEMBARRIER=y, see init/Kconfig: >> >> config MEMBARRIER >> bool "Enable membarrier() system call" if EXPERT >> default y >> help >> Enable the membarrier() system call that allows issuing memory >> barriers across all running threads, which can be used to distribute >> the cost of user-space memory barriers asymmetrically by transforming >> pairs of memory barriers into pairs consisting of membarrier() and a >> compiler barrier. >> >> If unsure, say Y. >> >> Before 1464d00b27b2, riscv just happened to set it to =n in the defconfig. >> >> I suspect the initial port of riscv merged after v4.14 was already broken. > > I see. Oh well, guess I'll have to leave this up to the maintainers then > (I believe I've never managed to build riscv that far), Palmer? I see $ git grep "config MEMBARRIER" fab957c11efe2f405e08b9f0d080524bc2631428 fab957c11efe2f405e08b9f0d080524bc2631428:init/Kconfig:config MEMBARRIER so IMO this is just one of those forever bugs. So I'd lean towards Fixes: fab957c11efe ("RISC-V: Atomic and Locking Code") (or anything in that original patch set). It's not that big of a backport, so I think it's safe enough? >> > I'll look into adding the membarrier feature you mention (as a final/ >> > follow-up patch), unless you or someone else want to take care of it. >> >> I'll be happy to review it :) > > Sweet! :-) > > Andrea _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-12-06 13:05 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-11-27 10:32 [PATCH 0/2] membarrier: riscv: Provide core serializing command Andrea Parri 2023-11-27 10:32 ` Andrea Parri 2023-11-27 10:32 ` [PATCH 1/2] locking: Introduce prepare_sync_core_cmd() Andrea Parri 2023-11-27 10:32 ` Andrea Parri 2023-11-27 12:53 ` Mathieu Desnoyers 2023-11-27 12:53 ` Mathieu Desnoyers 2023-11-27 10:32 ` [PATCH 2/2] membarrier: riscv: Provide core serializing command Andrea Parri 2023-11-27 10:32 ` Andrea Parri 2023-11-27 13:28 ` Mathieu Desnoyers 2023-11-27 13:28 ` Mathieu Desnoyers 2023-11-28 15:13 ` Andrea Parri 2023-11-28 15:13 ` Andrea Parri 2023-11-28 18:39 ` Mathieu Desnoyers 2023-11-28 18:39 ` Mathieu Desnoyers 2023-11-29 18:29 ` Andrea Parri 2023-11-29 18:29 ` Andrea Parri 2023-11-29 20:00 ` Mathieu Desnoyers 2023-11-29 20:00 ` Mathieu Desnoyers 2023-11-29 21:25 ` Andrea Parri 2023-11-29 21:25 ` Andrea Parri 2023-11-29 21:32 ` Mathieu Desnoyers 2023-11-29 21:32 ` Mathieu Desnoyers 2023-11-29 22:43 ` Andrea Parri 2023-11-29 22:43 ` Andrea Parri 2023-12-06 13:05 ` Palmer Dabbelt [this message] 2023-12-06 13:05 ` Palmer Dabbelt 2023-12-06 14:11 ` Andrea Parri 2023-12-06 14:11 ` Andrea Parri 2023-12-06 14:15 ` Palmer Dabbelt 2023-12-06 14:15 ` Palmer Dabbelt 2023-12-06 17:42 ` Andrea Parri 2023-12-06 17:42 ` Andrea Parri 2023-12-06 17:56 ` Palmer Dabbelt 2023-12-06 17:56 ` Palmer Dabbelt
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