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* [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE
@ 2023-02-05 22:39 Simon Glass
  2023-02-05 22:39 ` [PATCH v2 063/169] Correct SPL use of DEBUG_UART_ZYNQ Simon Glass
                   ` (69 more replies)
  0 siblings, 70 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_CPU_MICROBLAZE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/microblaze/cpu/cpuinfo.c         | 2 +-
 arch/microblaze/include/asm/cpuinfo.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/microblaze/cpu/cpuinfo.c b/arch/microblaze/cpu/cpuinfo.c
index f021f4e5e25..6b15d6ca41c 100644
--- a/arch/microblaze/cpu/cpuinfo.c
+++ b/arch/microblaze/cpu/cpuinfo.c
@@ -8,7 +8,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if CONFIG_IS_ENABLED(CPU_MICROBLAZE)
+#if IS_ENABLED(CONFIG_CPU_MICROBLAZE)
 /* These key value are as per MBV field in PVR0 */
 static const struct microblaze_version_map cpu_ver_lookup[] = {
 	{"5.00.a", 0x01},
diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h
index 86d2c8a034d..3c58e52217c 100644
--- a/arch/microblaze/include/asm/cpuinfo.h
+++ b/arch/microblaze/include/asm/cpuinfo.h
@@ -26,7 +26,7 @@ struct microblaze_cpuinfo {
 	u32 dcache_size;
 	u32 dcache_line_length;
 
-#if CONFIG_IS_ENABLED(CPU_MICROBLAZE)
+#if IS_ENABLED(CONFIG_CPU_MICROBLAZE)
 	u32 use_mmu;
 	u32 cpu_freq;
 	u32 addr_size;
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 063/169] Correct SPL use of DEBUG_UART_ZYNQ
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 064/169] Correct SPL uses of DFU_VIRT Simon Glass
                   ` (68 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_DEBUG_UART_ZYNQ defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 drivers/serial/serial_zynq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c
index 4b1818313a8..9bb9b7d3b8d 100644
--- a/drivers/serial/serial_zynq.c
+++ b/drivers/serial/serial_zynq.c
@@ -108,7 +108,7 @@ static void _uart_zynq_serial_init(struct uart_zynq *regs)
 
 static int _uart_zynq_serial_putc(struct uart_zynq *regs, const char c)
 {
-	if (CONFIG_IS_ENABLED(DEBUG_UART_ZYNQ)) {
+	if (IS_ENABLED(CONFIG_DEBUG_UART_ZYNQ)) {
 		if (!(readl(&regs->channel_sts) & ZYNQ_UART_SR_TXEMPTY))
 			return -EAGAIN;
 	} else {
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 064/169] Correct SPL uses of DFU_VIRT
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
  2023-02-05 22:39 ` [PATCH v2 063/169] Correct SPL use of DEBUG_UART_ZYNQ Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-09 17:49   ` Tom Rini
  2023-02-05 22:39 ` [PATCH v2 067/169] Correct SPL use of DISPLAY_CPUINFO Simon Glass
                   ` (67 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 3 usages of this option to the non-SPL form, since there is
no SPL_DFU_VIRT defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/st/common/stm32mp_dfu.c | 2 +-
 drivers/dfu/Makefile          | 2 +-
 include/dfu.h                 | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
index 0096f71dfc1..19e9c3b2402 100644
--- a/board/st/common/stm32mp_dfu.c
+++ b/board/st/common/stm32mp_dfu.c
@@ -159,7 +159,7 @@ void set_dfu_alt_info(char *interface, char *devstr)
 	puts("DFU alt info setting: done\n");
 }
 
-#if CONFIG_IS_ENABLED(DFU_VIRT)
+#if IS_ENABLED(CONFIG_DFU_VIRT)
 #include <dfu.h>
 #include <power/stpmic1.h>
 
diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile
index dfbf64da667..df88f4be59a 100644
--- a/drivers/dfu/Makefile
+++ b/drivers/dfu/Makefile
@@ -10,4 +10,4 @@ obj-$(CONFIG_$(SPL_)DFU_NAND) += dfu_nand.o
 obj-$(CONFIG_$(SPL_)DFU_RAM) += dfu_ram.o
 obj-$(CONFIG_$(SPL_)DFU_SF) += dfu_sf.o
 obj-$(CONFIG_$(SPL_)DFU_WRITE_ALT) += dfu_alt.o
-obj-$(CONFIG_$(SPL_)DFU_VIRT) += dfu_virt.o
+obj-$(CONFIG_DFU_VIRT) += dfu_virt.o
diff --git a/include/dfu.h b/include/dfu.h
index 07922224ef1..06efbf4b208 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -495,7 +495,7 @@ static inline int dfu_fill_entity_mtd(struct dfu_entity *dfu, char *devstr,
 }
 #endif
 
-#if CONFIG_IS_ENABLED(DFU_VIRT)
+#if IS_ENABLED(CONFIG_DFU_VIRT)
 int dfu_fill_entity_virt(struct dfu_entity *dfu, char *devstr,
 			 char **argv, int argc);
 int dfu_write_medium_virt(struct dfu_entity *dfu, u64 offset,
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 067/169] Correct SPL use of DISPLAY_CPUINFO
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
  2023-02-05 22:39 ` [PATCH v2 063/169] Correct SPL use of DEBUG_UART_ZYNQ Simon Glass
  2023-02-05 22:39 ` [PATCH v2 064/169] Correct SPL uses of DFU_VIRT Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 068/169] Correct SPL use of DM_RNG Simon Glass
                   ` (66 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_DISPLAY_CPUINFO defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/arm/mach-rockchip/cpu-info.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c
index d0f030109f4..dac24910e0c 100644
--- a/arch/arm/mach-rockchip/cpu-info.c
+++ b/arch/arm/mach-rockchip/cpu-info.c
@@ -44,7 +44,7 @@ char *get_reset_cause(void)
 	return cause;
 }
 
-#if CONFIG_IS_ENABLED(DISPLAY_CPUINFO)
+#if IS_ENABLED(CONFIG_DISPLAY_CPUINFO)
 int print_cpuinfo(void)
 {
 	char *cause = get_reset_cause();
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 068/169] Correct SPL use of DM_RNG
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (2 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 067/169] Correct SPL use of DISPLAY_CPUINFO Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-09  0:40   ` Tom Rini
  2023-02-05 22:39 ` [PATCH v2 069/169] Correct SPL uses of DTB_RESELECT Simon Glass
                   ` (65 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_DM_RNG defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 boot/vbe_request.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/boot/vbe_request.c b/boot/vbe_request.c
index 45f1d2b7e17..312edfa2bdb 100644
--- a/boot/vbe_request.c
+++ b/boot/vbe_request.c
@@ -36,7 +36,7 @@ static int handle_random_req(ofnode node, int default_size,
 	u32 size;
 	int ret;
 
-	if (!CONFIG_IS_ENABLED(DM_RNG))
+	if (!IS_ENABLED(CONFIG_DM_RNG))
 		return -ENOTSUPP;
 
 	if (ofnode_read_u32(node, "vbe,size", &size)) {
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 069/169] Correct SPL uses of DTB_RESELECT
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (3 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 068/169] Correct SPL use of DM_RNG Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 070/169] Correct SPL uses of DWC_ETH_QOS Simon Glass
                   ` (64 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_DTB_RESELECT defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/xilinx/common/board.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 3dea238466d..35a2f310f4f 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -208,7 +208,7 @@ static int xilinx_read_eeprom_fru(struct udevice *dev, char *name,
 	}
 
 	fru_capture((unsigned long)fru_content);
-	if (gd->flags & GD_FLG_RELOC || (_DEBUG && CONFIG_IS_ENABLED(DTB_RESELECT))) {
+	if (gd->flags & GD_FLG_RELOC || (_DEBUG && IS_ENABLED(CONFIG_DTB_RESELECT))) {
 		printf("Xilinx I2C FRU format at %s:\n", name);
 		ret = fru_display(0);
 		if (ret) {
@@ -501,7 +501,7 @@ int __maybe_unused board_fit_config_name_match(const char *name)
 	return -1;
 }
 
-#if CONFIG_IS_ENABLED(DTB_RESELECT)
+#if IS_ENABLED(CONFIG_DTB_RESELECT)
 #define MAX_NAME_LENGTH	50
 
 char * __maybe_unused __weak board_name_decode(void)
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 070/169] Correct SPL uses of DWC_ETH_QOS
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (4 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 069/169] Correct SPL uses of DTB_RESELECT Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 071/169] Correct SPL use of EFI_APP Simon Glass
                   ` (63 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 3 usages of this option to the non-SPL form, since there is
no SPL_DWC_ETH_QOS defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/engicam/imx8mp/icore_mx8mp.c      | 2 +-
 board/freescale/imx8mp_evk/imx8mp_evk.c | 2 +-
 board/freescale/imx93_evk/imx93_evk.c   | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/board/engicam/imx8mp/icore_mx8mp.c b/board/engicam/imx8mp/icore_mx8mp.c
index b309a12df08..f0096a2a879 100644
--- a/board/engicam/imx8mp/icore_mx8mp.c
+++ b/board/engicam/imx8mp/icore_mx8mp.c
@@ -61,7 +61,7 @@ int board_init(void)
 	if (CONFIG_IS_ENABLED(FEC_MXC))
 		setup_fec();
 
-	if (CONFIG_IS_ENABLED(DWC_ETH_QOS))
+	if (IS_ENABLED(CONFIG_DWC_ETH_QOS))
 		setup_eqos();
 
 	return 0;
diff --git a/board/freescale/imx8mp_evk/imx8mp_evk.c b/board/freescale/imx8mp_evk/imx8mp_evk.c
index 8971a827df3..c7692677f9a 100644
--- a/board/freescale/imx8mp_evk/imx8mp_evk.c
+++ b/board/freescale/imx8mp_evk/imx8mp_evk.c
@@ -59,7 +59,7 @@ int board_init(void)
 		setup_fec();
 	}
 
-	if (CONFIG_IS_ENABLED(DWC_ETH_QOS)) {
+	if (IS_ENABLED(CONFIG_DWC_ETH_QOS)) {
 		ret = setup_eqos();
 	}
 
diff --git a/board/freescale/imx93_evk/imx93_evk.c b/board/freescale/imx93_evk/imx93_evk.c
index 182ae5fd518..e01b2f59e3f 100644
--- a/board/freescale/imx93_evk/imx93_evk.c
+++ b/board/freescale/imx93_evk/imx93_evk.c
@@ -69,7 +69,7 @@ int board_init(void)
 	if (CONFIG_IS_ENABLED(FEC_MXC))
 		setup_fec();
 
-	if (CONFIG_IS_ENABLED(DWC_ETH_QOS))
+	if (IS_ENABLED(CONFIG_DWC_ETH_QOS))
 		setup_eqos();
 
 	return 0;
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 071/169] Correct SPL use of EFI_APP
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (5 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 070/169] Correct SPL uses of DWC_ETH_QOS Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 072/169] Correct SPL use of EFI_DEVICE_PATH_UTIL Simon Glass
                   ` (62 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_EFI_APP defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 lib/vsprintf.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 8de3882fb6c..2d13e68b579 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -629,7 +629,7 @@ repeat:
 
 		case 's':
 /* U-Boot uses UTF-16 strings in the EFI context only. */
-#if (CONFIG_IS_ENABLED(EFI_LOADER) || CONFIG_IS_ENABLED(EFI_APP)) && \
+#if (CONFIG_IS_ENABLED(EFI_LOADER) || IS_ENABLED(CONFIG_EFI_APP)) && \
 	!defined(API_BUILD)
 			if (qualifier == 'l') {
 				str = string16(str, end, va_arg(args, u16 *),
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 072/169] Correct SPL use of EFI_DEVICE_PATH_UTIL
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (6 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 071/169] Correct SPL use of EFI_APP Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 073/169] Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORT Simon Glass
                   ` (61 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_EFI_DEVICE_PATH_UTIL defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 lib/efi_loader/efi_root_node.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_root_node.c b/lib/efi_loader/efi_root_node.c
index a4eb6f493dc..09699b2968f 100644
--- a/lib/efi_loader/efi_root_node.c
+++ b/lib/efi_loader/efi_root_node.c
@@ -58,7 +58,7 @@ efi_status_t efi_root_node_register(void)
 		 &efi_guid_device_path_to_text_protocol,
 		 &efi_device_path_to_text,
 #endif
-#if CONFIG_IS_ENABLED(EFI_DEVICE_PATH_UTIL)
+#if IS_ENABLED(CONFIG_EFI_DEVICE_PATH_UTIL)
 		 /* Device path utilities protocol */
 		 &efi_guid_device_path_utilities_protocol,
 		 &efi_device_path_utilities,
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 073/169] Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORT
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (7 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 072/169] Correct SPL use of EFI_DEVICE_PATH_UTIL Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 074/169] Correct SPL use of EFI_LOADER_HII Simon Glass
                   ` (60 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 13 usages of this option to the non-SPL form, since there is
no SPL_EFI_HAVE_CAPSULE_SUPPORT defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c    | 2 +-
 board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c | 2 +-
 board/emulation/common/qemu_dfu.c                      | 2 +-
 board/emulation/qemu-arm/qemu-arm.c                    | 2 +-
 board/kontron/pitx_imx8m/pitx_imx8m.c                  | 2 +-
 board/kontron/sl-mx8mm/sl-mx8mm.c                      | 2 +-
 board/kontron/sl28/sl28.c                              | 2 +-
 board/rockchip/evb_rk3399/evb-rk3399.c                 | 2 +-
 board/sandbox/sandbox.c                                | 2 +-
 board/socionext/developerbox/developerbox.c            | 2 +-
 board/st/stm32mp1/stm32mp1.c                           | 4 ++--
 board/xilinx/common/board.c                            | 2 +-
 12 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
index aa9687f7a9d..34109c69ddb 100644
--- a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
+++ b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
@@ -35,7 +35,7 @@ static void setup_gpmi_nand(void)
 }
 #endif
 
-#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
 struct efi_fw_image fw_images[] = {
 #if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)
 	{
diff --git a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
index 3d7fff34d25..b373e45df95 100644
--- a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
+++ b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
@@ -31,7 +31,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
 struct efi_fw_image fw_images[] = {
 #if defined(CONFIG_TARGET_IMX8MM_CL_IOT_GATE)
 	{
diff --git a/board/emulation/common/qemu_dfu.c b/board/emulation/common/qemu_dfu.c
index c1aeaf10d93..332d659c1f7 100644
--- a/board/emulation/common/qemu_dfu.c
+++ b/board/emulation/common/qemu_dfu.c
@@ -44,7 +44,7 @@ void set_dfu_alt_info(char *interface, char *devstr)
 
 	ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
 
-	if (!CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) &&
+	if (!IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) &&
 	    env_get("dfu_alt_info"))
 		return;
 
diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c
index 3df3e41c0b2..ff1755f8cde 100644
--- a/board/emulation/qemu-arm/qemu-arm.c
+++ b/board/emulation/qemu-arm/qemu-arm.c
@@ -19,7 +19,7 @@
 #ifdef CONFIG_ARM64
 #include <asm/armv8/mmu.h>
 
-#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
 struct efi_fw_image fw_images[] = {
 #if defined(CONFIG_TARGET_QEMU_ARM_32BIT)
 	{
diff --git a/board/kontron/pitx_imx8m/pitx_imx8m.c b/board/kontron/pitx_imx8m/pitx_imx8m.c
index d974af8da1a..af1832c4736 100644
--- a/board/kontron/pitx_imx8m/pitx_imx8m.c
+++ b/board/kontron/pitx_imx8m/pitx_imx8m.c
@@ -32,7 +32,7 @@ static iomux_v3_cfg_t const uart_pads[] = {
 	IMX8MQ_PAD_ECSPI1_MISO__UART3_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
-#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
 struct efi_fw_image fw_images[] = {
 	{
 		.image_type_id = KONTRON_PITX_IMX8M_FIT_IMAGE_GUID,
diff --git a/board/kontron/sl-mx8mm/sl-mx8mm.c b/board/kontron/sl-mx8mm/sl-mx8mm.c
index 4ac430b29a9..250195694ba 100644
--- a/board/kontron/sl-mx8mm/sl-mx8mm.c
+++ b/board/kontron/sl-mx8mm/sl-mx8mm.c
@@ -18,7 +18,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
 struct efi_fw_image fw_images[] = {
 	{
 		.image_type_id = KONTRON_SL_MX8MM_FIT_IMAGE_GUID,
diff --git a/board/kontron/sl28/sl28.c b/board/kontron/sl28/sl28.c
index 0576b3eae48..4ad6b323476 100644
--- a/board/kontron/sl28/sl28.c
+++ b/board/kontron/sl28/sl28.c
@@ -28,7 +28,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
 struct efi_fw_image fw_images[] = {
 	{
 		.image_type_id = KONTRON_SL28_FIT_IMAGE_GUID,
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index f56b379b937..c99ffdd75e8 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -14,7 +14,7 @@
 
 #define ROCKPI4_UPDATABLE_IMAGES	2
 
-#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
 static struct efi_fw_image fw_images[ROCKPI4_UPDATABLE_IMAGES] = {0};
 
 struct efi_capsule_update_info update_info = {
diff --git a/board/sandbox/sandbox.c b/board/sandbox/sandbox.c
index 8b953f9b397..2e44bdf0df3 100644
--- a/board/sandbox/sandbox.c
+++ b/board/sandbox/sandbox.c
@@ -29,7 +29,7 @@
  */
 gd_t *gd;
 
-#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
 /* GUIDs for capsule updatable firmware images */
 #define SANDBOX_UBOOT_IMAGE_GUID \
 	EFI_GUID(0x09d7cf52, 0x0720, 0x4710, 0x91, 0xd1, \
diff --git a/board/socionext/developerbox/developerbox.c b/board/socionext/developerbox/developerbox.c
index 6415c90c1c1..16e14d4f7f5 100644
--- a/board/socionext/developerbox/developerbox.c
+++ b/board/socionext/developerbox/developerbox.c
@@ -18,7 +18,7 @@
 
 #include <linux/kernel.h>
 
-#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
 struct efi_fw_image fw_images[] = {
 	{
 		.image_type_id = DEVELOPERBOX_UBOOT_IMAGE_GUID,
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index b0dfa2b332e..ec6f0b43f28 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -88,7 +88,7 @@
 #define USB_START_LOW_THRESHOLD_UV	1230000
 #define USB_START_HIGH_THRESHOLD_UV	2150000
 
-#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
 struct efi_fw_image fw_images[1];
 
 struct efi_capsule_update_info update_info = {
@@ -677,7 +677,7 @@ int board_init(void)
 
 	setup_led(LEDST_ON);
 
-#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
 	efi_guid_t image_type_guid = STM32MP_FIP_IMAGE_GUID;
 
 	guidcpy(&fw_images[0].image_type_id, &image_type_guid);
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 35a2f310f4f..aa9f3ef071c 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -33,7 +33,7 @@
 
 #include "fru.h"
 
-#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
 struct efi_fw_image fw_images[] = {
 #if defined(XILINX_BOOT_IMAGE_GUID)
 	{
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 074/169] Correct SPL use of EFI_LOADER_HII
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (8 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 073/169] Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORT Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 076/169] Correct SPL use of EFI_SECURE_BOOT Simon Glass
                   ` (59 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_EFI_LOADER_HII defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 lib/efi_loader/efi_root_node.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_root_node.c b/lib/efi_loader/efi_root_node.c
index 09699b2968f..21a014d7c21 100644
--- a/lib/efi_loader/efi_root_node.c
+++ b/lib/efi_loader/efi_root_node.c
@@ -72,7 +72,7 @@ efi_status_t efi_root_node_register(void)
 		 &efi_guid_unicode_collation_protocol2,
 		 &efi_unicode_collation_protocol2,
 #endif
-#if CONFIG_IS_ENABLED(EFI_LOADER_HII)
+#if IS_ENABLED(CONFIG_EFI_LOADER_HII)
 		 /* HII string protocol */
 		 &efi_guid_hii_string_protocol,
 		 &efi_hii_string,
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 076/169] Correct SPL use of EFI_SECURE_BOOT
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (9 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 074/169] Correct SPL use of EFI_LOADER_HII Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-10 18:43   ` Tom Rini
  2023-02-05 22:39 ` [PATCH v2 077/169] Correct SPL use of EFI_TCG2_PROTOCOL Simon Glass
                   ` (58 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_EFI_SECURE_BOOT defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 cmd/eficonfig.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index 46f652c35d6..5b1f2a7731a 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -2670,7 +2670,7 @@ static const struct eficonfig_item maintenance_menu_items[] = {
 	{"Edit Boot Option", eficonfig_process_edit_boot_option},
 	{"Change Boot Order", eficonfig_process_change_boot_order},
 	{"Delete Boot Option", eficonfig_process_delete_boot_option},
-#if (CONFIG_IS_ENABLED(EFI_SECURE_BOOT) && IS_ENABLED(CONFIG_EFI_MM_COMM_TEE))
+#if (IS_ENABLED(CONFIG_EFI_SECURE_BOOT) && IS_ENABLED(CONFIG_EFI_MM_COMM_TEE))
 	{"Secure Boot Configuration", eficonfig_process_secure_boot_config},
 #endif
 	{"Quit", eficonfig_process_quit},
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 077/169] Correct SPL use of EFI_TCG2_PROTOCOL
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (10 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 076/169] Correct SPL use of EFI_SECURE_BOOT Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-06 23:41   ` Heinrich Schuchardt
  2023-02-05 22:39 ` [PATCH v2 078/169] Correct SPL use of EFI_UNICODE_COLLATION_PROTOCOL2 Simon Glass
                   ` (57 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_EFI_TCG2_PROTOCOL defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 lib/efi_loader/efi_image_loader.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c
index eaf75a5803d..26df0da16c9 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -938,7 +938,7 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle,
 		goto err;
 	}
 
-#if CONFIG_IS_ENABLED(EFI_TCG2_PROTOCOL)
+#if IS_ENABLED(CONFIG_EFI_TCG2_PROTOCOL)
 	/* Measure an PE/COFF image */
 	ret = tcg2_measure_pe_image(efi, efi_size, handle, loaded_image_info);
 	if (ret == EFI_SECURITY_VIOLATION) {
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 078/169] Correct SPL use of EFI_UNICODE_COLLATION_PROTOCOL2
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (11 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 077/169] Correct SPL use of EFI_TCG2_PROTOCOL Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-06 23:36   ` Heinrich Schuchardt
  2023-02-05 22:39 ` [PATCH v2 079/169] Correct SPL uses of ENV_IS_IN_UBI Simon Glass
                   ` (56 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_EFI_UNICODE_COLLATION_PROTOCOL2 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 lib/efi_loader/efi_root_node.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_root_node.c b/lib/efi_loader/efi_root_node.c
index 21a014d7c21..108c14b95bd 100644
--- a/lib/efi_loader/efi_root_node.c
+++ b/lib/efi_loader/efi_root_node.c
@@ -68,7 +68,7 @@ efi_status_t efi_root_node_register(void)
 		 &efi_guid_dt_fixup_protocol,
 		 &efi_dt_fixup_prot,
 #endif
-#if CONFIG_IS_ENABLED(EFI_UNICODE_COLLATION_PROTOCOL2)
+#if IS_ENABLED(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2)
 		 &efi_guid_unicode_collation_protocol2,
 		 &efi_unicode_collation_protocol2,
 #endif
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 079/169] Correct SPL uses of ENV_IS_IN_UBI
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (12 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 078/169] Correct SPL use of EFI_UNICODE_COLLATION_PROTOCOL2 Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 080/169] Correct SPL uses of ENV_VARS_UBOOT_RUNTIME_CONFIG Simon Glass
                   ` (55 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_ENV_IS_IN_UBI defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/engicam/stm32mp1/stm32mp1.c | 2 +-
 board/st/stm32mp1/stm32mp1.c      | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/engicam/stm32mp1/stm32mp1.c b/board/engicam/stm32mp1/stm32mp1.c
index 0a3e580f5b4..5223e9bae8d 100644
--- a/board/engicam/stm32mp1/stm32mp1.c
+++ b/board/engicam/stm32mp1/stm32mp1.c
@@ -68,7 +68,7 @@ enum env_location env_get_location(enum env_operation op, int prio)
 
 	case BOOT_FLASH_NAND:
 	case BOOT_FLASH_SPINAND:
-		if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI))
+		if (IS_ENABLED(CONFIG_ENV_IS_IN_UBI))
 			return ENVL_UBI;
 		else
 			return ENVL_NOWHERE;
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index ec6f0b43f28..1318ba8951a 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -831,7 +831,7 @@ enum env_location env_get_location(enum env_operation op, int prio)
 
 	case BOOT_FLASH_NAND:
 	case BOOT_FLASH_SPINAND:
-		if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI))
+		if (IS_ENABLED(CONFIG_ENV_IS_IN_UBI))
 			return ENVL_UBI;
 		else
 			return ENVL_NOWHERE;
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 080/169] Correct SPL uses of ENV_VARS_UBOOT_RUNTIME_CONFIG
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (13 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 079/169] Correct SPL uses of ENV_IS_IN_UBI Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 081/169] Correct SPL use of ENV_WRITEABLE_LIST Simon Glass
                   ` (54 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 4 usages of this option to the non-SPL form, since there is
no SPL_ENV_VARS_UBOOT_RUNTIME_CONFIG defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/xilinx/versal-net/board.c | 2 +-
 board/xilinx/versal/board.c     | 2 +-
 board/xilinx/zynq/board.c       | 2 +-
 board/xilinx/zynqmp/zynqmp.c    | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c
index 5fb71107ddc..7ff2c620110 100644
--- a/board/xilinx/versal-net/board.c
+++ b/board/xilinx/versal-net/board.c
@@ -172,7 +172,7 @@ int board_late_init(void)
 		return 0;
 	}
 
-	if (!CONFIG_IS_ENABLED(ENV_VARS_UBOOT_RUNTIME_CONFIG))
+	if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
 		return 0;
 
 	return board_late_init_xilinx();
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index 4cdc2ecd1d2..81e1b69905e 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -142,7 +142,7 @@ int board_late_init(void)
 		return 0;
 	}
 
-	if (!CONFIG_IS_ENABLED(ENV_VARS_UBOOT_RUNTIME_CONFIG))
+	if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
 		return 0;
 
 	bootmode = versal_get_bootmode();
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index df4c4576723..9a59445b442 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -55,7 +55,7 @@ int board_late_init(void)
 		return 0;
 	}
 
-	if (!CONFIG_IS_ENABLED(ENV_VARS_UBOOT_RUNTIME_CONFIG))
+	if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
 		return 0;
 
 	switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index e3f70c4caf4..39da96bcfb0 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -405,7 +405,7 @@ int board_late_init(void)
 		return 0;
 	}
 
-	if (!CONFIG_IS_ENABLED(ENV_VARS_UBOOT_RUNTIME_CONFIG))
+	if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
 		return 0;
 
 	ret = set_fdtfile();
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 081/169] Correct SPL use of ENV_WRITEABLE_LIST
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (14 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 080/169] Correct SPL uses of ENV_VARS_UBOOT_RUNTIME_CONFIG Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 082/169] Correct SPL use of EXYNOS7420 Simon Glass
                   ` (53 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_ENV_WRITEABLE_LIST defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 lib/hashtable.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/hashtable.c b/lib/hashtable.c
index 90c8465611e..f2d36bd34b4 100644
--- a/lib/hashtable.c
+++ b/lib/hashtable.c
@@ -942,7 +942,7 @@ int himport_r(struct hsearch_data *htab,
 		e.data = value;
 
 		hsearch_r(e, ENV_ENTER, &rv, htab, flag);
-#if !CONFIG_IS_ENABLED(ENV_WRITEABLE_LIST)
+#if !IS_ENABLED(CONFIG_ENV_WRITEABLE_LIST)
 		if (rv == NULL) {
 			printf("himport_r: can't insert \"%s=%s\" into hash table\n",
 				name, value);
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 082/169] Correct SPL use of EXYNOS7420
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (15 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 081/169] Correct SPL use of ENV_WRITEABLE_LIST Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 084/169] Correct SPL uses of FASTBOOT_FLASH Simon Glass
                   ` (52 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_EXYNOS7420 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/arm/mach-exynos/mmu-arm64.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-exynos/mmu-arm64.c b/arch/arm/mach-exynos/mmu-arm64.c
index d2c550b27d3..8d8c64e8f8f 100644
--- a/arch/arm/mach-exynos/mmu-arm64.c
+++ b/arch/arm/mach-exynos/mmu-arm64.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <asm/armv8/mmu.h>
 
-#if CONFIG_IS_ENABLED(EXYNOS7420)
+#if IS_ENABLED(CONFIG_EXYNOS7420)
 
 static struct mm_region exynos7420_mem_map[] = {
 	{
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 084/169] Correct SPL uses of FASTBOOT_FLASH
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (16 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 082/169] Correct SPL use of EXYNOS7420 Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 087/169] Correct SPL use of FASTBOOT_MMC_USER_SUPPORT Simon Glass
                   ` (51 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass, Mattijs Korpershoek

This converts 3 usages of this option to the non-SPL form, since there is
no SPL_FASTBOOT_FLASH defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
---

(no changes since v1)

 drivers/fastboot/fb_getvar.c | 4 ++--
 net/fastboot.c               | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/fastboot/fb_getvar.c b/drivers/fastboot/fb_getvar.c
index 2fbd285db38..bcef8f866f3 100644
--- a/drivers/fastboot/fb_getvar.c
+++ b/drivers/fastboot/fb_getvar.c
@@ -57,7 +57,7 @@ static const struct {
 	}, {
 		.variable = "current-slot",
 		.dispatch = getvar_current_slot
-#if CONFIG_IS_ENABLED(FASTBOOT_FLASH)
+#if IS_ENABLED(CONFIG_FASTBOOT_FLASH)
 	}, {
 		.variable = "has-slot",
 		.dispatch = getvar_has_slot
@@ -67,7 +67,7 @@ static const struct {
 		.variable = "partition-type",
 		.dispatch = getvar_partition_type
 #endif
-#if CONFIG_IS_ENABLED(FASTBOOT_FLASH)
+#if IS_ENABLED(CONFIG_FASTBOOT_FLASH)
 	}, {
 		.variable = "partition-size",
 		.dispatch = getvar_partition_size
diff --git a/net/fastboot.c b/net/fastboot.c
index 96bdf5486fa..e9569d88d2a 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -307,7 +307,7 @@ void fastboot_start_server(void)
 
 	fastboot_our_port = CONFIG_UDP_FUNCTION_FASTBOOT_PORT;
 
-	if (CONFIG_IS_ENABLED(FASTBOOT_FLASH))
+	if (IS_ENABLED(CONFIG_FASTBOOT_FLASH))
 		fastboot_set_progress_callback(fastboot_timed_send_info);
 
 	net_set_udp_handler(fastboot_handler);
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 087/169] Correct SPL use of FASTBOOT_MMC_USER_SUPPORT
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (17 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 084/169] Correct SPL uses of FASTBOOT_FLASH Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 088/169] Correct SPL use of FDT_SIMPLEFB Simon Glass
                   ` (50 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_FASTBOOT_MMC_USER_SUPPORT defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 drivers/fastboot/fb_mmc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/fastboot/fb_mmc.c b/drivers/fastboot/fb_mmc.c
index 033c510bc09..a06c590234f 100644
--- a/drivers/fastboot/fb_mmc.c
+++ b/drivers/fastboot/fb_mmc.c
@@ -588,7 +588,7 @@ void fastboot_mmc_flash_write(const char *cmd, void *download_buffer,
 	}
 #endif
 
-#if CONFIG_IS_ENABLED(FASTBOOT_MMC_USER_SUPPORT)
+#if IS_ENABLED(CONFIG_FASTBOOT_MMC_USER_SUPPORT)
 	if (strcmp(cmd, CONFIG_FASTBOOT_MMC_USER_NAME) == 0) {
 		dev_desc = fastboot_mmc_get_dev(response);
 		if (!dev_desc)
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 088/169] Correct SPL use of FDT_SIMPLEFB
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (18 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 087/169] Correct SPL use of FASTBOOT_MMC_USER_SUPPORT Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:39 ` [PATCH v2 090/169] Correct SPL use of FSL_CAAM Simon Glass
                   ` (49 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_FDT_SIMPLEFB defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/st/stm32mp1/stm32mp1.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 1318ba8951a..ca8f0255ae0 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -930,7 +930,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 		if (IS_ENABLED(CONFIG_FDT_FIXUP_PARTITIONS))
 			fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
 
-	if (CONFIG_IS_ENABLED(FDT_SIMPLEFB))
+	if (IS_ENABLED(CONFIG_FDT_SIMPLEFB))
 		fdt_simplefb_enable_and_mem_rsv(blob);
 
 	return 0;
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 090/169] Correct SPL use of FSL_CAAM
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (19 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 088/169] Correct SPL use of FDT_SIMPLEFB Simon Glass
@ 2023-02-05 22:39 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 091/169] Correct SPL uses of FSL_ISBC_KEY_EXT Simon Glass
                   ` (48 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:39 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_FSL_CAAM defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/traverse/ten64/ten64.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/traverse/ten64/ten64.c b/board/traverse/ten64/ten64.c
index e6403cad1f5..d3ff1d143b0 100644
--- a/board/traverse/ten64/ten64.c
+++ b/board/traverse/ten64/ten64.c
@@ -123,7 +123,7 @@ int board_init(void)
 {
 	init_final_memctl_regs();
 
-	if (CONFIG_IS_ENABLED(FSL_CAAM))
+	if (IS_ENABLED(CONFIG_FSL_CAAM))
 		sec_init();
 
 	return 0;
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 091/169] Correct SPL uses of FSL_ISBC_KEY_EXT
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (20 preceding siblings ...)
  2023-02-05 22:39 ` [PATCH v2 090/169] Correct SPL use of FSL_CAAM Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-09  1:09   ` Tom Rini
  2023-02-05 22:40 ` [PATCH v2 092/169] Correct SPL use of FSL_MC_ENET Simon Glass
                   ` (47 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 9 usages of this option to the non-SPL form, since there is
no SPL_FSL_ISBC_KEY_EXT defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/freescale/common/fsl_validate.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c
index bfe6357b0d6..78bed122466 100644
--- a/board/freescale/common/fsl_validate.c
+++ b/board/freescale/common/fsl_validate.c
@@ -29,7 +29,7 @@
 #define CHECK_KEY_LEN(key_len)	(((key_len) == 2 * KEY_SIZE_BYTES / 4) || \
 				 ((key_len) == 2 * KEY_SIZE_BYTES / 2) || \
 				 ((key_len) == 2 * KEY_SIZE_BYTES))
-#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT)
+#if IS_ENABLED(CONFIG_FSL_ISBC_KEY_EXT)
 /* Global data structure */
 static struct fsl_secboot_glb glb;
 #endif
@@ -63,7 +63,7 @@ self:
 	goto self;
 }
 
-#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT)
+#if IS_ENABLED(CONFIG_FSL_ISBC_KEY_EXT)
 static u32 check_ie(struct fsl_secboot_img_priv *img)
 {
 	if (img->hdr.ie_flag & IE_FLAG_MASK)
@@ -188,7 +188,7 @@ static u32 check_srk(struct fsl_secboot_img_priv *img)
 {
 #ifdef CONFIG_ESBC_HDR_LS
 	/* In LS, No SRK Flag as SRK is always present if IE not present*/
-#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT)
+#if IS_ENABLED(CONFIG_FSL_ISBC_KEY_EXT)
 	return !check_ie(img);
 #endif
 	return 1;
@@ -278,7 +278,7 @@ static u32 read_validate_single_key(struct fsl_secboot_img_priv *img)
 }
 #endif /* CONFIG_ESBC_HDR_LS */
 
-#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT)
+#if IS_ENABLED(CONFIG_FSL_ISBC_KEY_EXT)
 
 static void install_ie_tbl(uintptr_t ie_tbl_addr,
 		struct fsl_secboot_img_priv *img)
@@ -434,7 +434,7 @@ void fsl_secboot_handle_error(int error)
 	case ERROR_ESBC_CLIENT_HEADER_INVALID_KEY_NUM:
 	case ERROR_ESBC_CLIENT_HEADER_INV_SRK_ENTRY_KEYLEN:
 #endif
-#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT)
+#if IS_ENABLED(CONFIG_FSL_ISBC_KEY_EXT)
 	/*@fallthrough@*/
 	case ERROR_ESBC_CLIENT_HEADER_IE_KEY_REVOKED:
 	case ERROR_ESBC_CLIENT_HEADER_INVALID_IE_NUM_ENTRY:
@@ -571,7 +571,7 @@ static int calc_esbchdr_esbc_hash(struct fsl_secboot_img_priv *img)
 		key_hash = 1;
 	}
 #endif
-#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT)
+#if IS_ENABLED(CONFIG_FSL_ISBC_KEY_EXT)
 	if (!key_hash && check_ie(img))
 		key_hash = 1;
 #endif
@@ -705,7 +705,7 @@ static int read_validate_esbc_client_header(struct fsl_secboot_img_priv *img)
 	}
 #endif
 
-#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT)
+#if IS_ENABLED(CONFIG_FSL_ISBC_KEY_EXT)
 	if (!key_found && check_ie(img)) {
 		ret = read_validate_ie_tbl(img);
 		if (ret != 0)
@@ -851,7 +851,7 @@ static int secboot_init(struct fsl_secboot_img_priv **img_ptr)
 		return -ENOMEM;
 	memset(img, 0, sizeof(struct fsl_secboot_img_priv));
 
-#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT)
+#if IS_ENABLED(CONFIG_FSL_ISBC_KEY_EXT)
 	if (glb.ie_addr)
 		img->ie_addr = glb.ie_addr;
 #endif
@@ -952,7 +952,7 @@ int fsl_secboot_validate(uintptr_t haddr, char *arg_hash_str,
 	else
 		ret = memcmp(srk_hash, img->img_key_hash, SHA256_BYTES);
 
-#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT)
+#if IS_ENABLED(CONFIG_FSL_ISBC_KEY_EXT)
 	if (!hash_cmd && check_ie(img))
 		ret = 0;
 #endif
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 092/169] Correct SPL use of FSL_MC_ENET
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (21 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 091/169] Correct SPL uses of FSL_ISBC_KEY_EXT Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 093/169] Correct SPL use of FSP_VERSION2 Simon Glass
                   ` (46 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_FSL_MC_ENET defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/traverse/ten64/ten64.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/traverse/ten64/ten64.c b/board/traverse/ten64/ten64.c
index d3ff1d143b0..13aafb5de76 100644
--- a/board/traverse/ten64/ten64.c
+++ b/board/traverse/ten64/ten64.c
@@ -229,7 +229,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 
 	fdt_fsl_mc_fixup_iommu_map_entry(blob);
 
-	if (CONFIG_IS_ENABLED(FSL_MC_ENET))
+	if (IS_ENABLED(CONFIG_FSL_MC_ENET))
 		fdt_fixup_board_enet(blob);
 
 	fdt_fixup_icid(blob);
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 093/169] Correct SPL use of FSP_VERSION2
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (22 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 092/169] Correct SPL use of FSL_MC_ENET Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-10 12:41   ` Tom Rini
  2023-02-05 22:40 ` [PATCH v2 094/169] Correct SPL use of FS_EROFS Simon Glass
                   ` (45 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_FSP_VERSION2 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/x86/lib/fsp/fsp_dram.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index cc889a688d8..3805a011dda 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -62,7 +62,7 @@ int dram_init_banksize(void)
 	 * DRAM range in MTRR otherwise the boot process goes very slowly,
 	 * which was observed on Chromebook Coral with FSP2.
 	 */
-	update_mtrr = CONFIG_IS_ENABLED(FSP_VERSION2);
+	update_mtrr = IS_ENABLED(CONFIG_FSP_VERSION2);
 
 	if (!ll_boot_init()) {
 		gd->bd->bi_dram[0].start = 0;
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 094/169] Correct SPL use of FS_EROFS
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (23 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 093/169] Correct SPL use of FSP_VERSION2 Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 095/169] Correct SPL use of GENERATE_SMBIOS_TABLE Simon Glass
                   ` (44 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass, Huang Jianan

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_FS_EROFS defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Huang Jianan <jnhuang95@gmail.com>
---

(no changes since v1)

 fs/erofs/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/erofs/Makefile b/fs/erofs/Makefile
index 58af6a68e41..ef94d2db45d 100644
--- a/fs/erofs/Makefile
+++ b/fs/erofs/Makefile
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-$(CONFIG_$(SPL_)FS_EROFS) = fs.o \
+obj-$(CONFIG_FS_EROFS) = fs.o \
 				super.o \
 				namei.o \
 				data.o \
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 095/169] Correct SPL use of GENERATE_SMBIOS_TABLE
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (24 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 094/169] Correct SPL use of FS_EROFS Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-09  2:40   ` Tom Rini
  2023-02-05 22:40 ` [PATCH v2 096/169] Correct SPL uses of GMAC_ROCKCHIP Simon Glass
                   ` (43 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_GENERATE_SMBIOS_TABLE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 include/asm-generic/global_data.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index da17ac8cbc8..ac7640c5ed0 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -467,7 +467,7 @@ struct global_data {
 	 */
 	ulong acpi_start;
 #endif
-#if CONFIG_IS_ENABLED(GENERATE_SMBIOS_TABLE)
+#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLE)
 	/**
 	 * @smbios_version: Points to SMBIOS type 0 version
 	 */
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 096/169] Correct SPL uses of GMAC_ROCKCHIP
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (25 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 095/169] Correct SPL use of GENERATE_SMBIOS_TABLE Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-09  1:51   ` Tom Rini
  2023-02-05 22:40 ` [PATCH v2 097/169] Correct SPL use of HUSH_PARSER Simon Glass
                   ` (42 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_GMAC_ROCKCHIP defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 drivers/clk/rockchip/clk_rk3368.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 39caf23c31f..ea8d120738f 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -313,7 +313,7 @@ static ulong rk3368_ddr_set_clk(struct rk3368_cru *cru, ulong set_rate)
 }
 #endif
 
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+#if IS_ENABLED(CONFIG_GMAC_ROCKCHIP)
 static ulong rk3368_gmac_set_clk(struct rk3368_cru *cru, ulong set_rate)
 {
 	ulong ret;
@@ -507,7 +507,7 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 		ret = rk3368_mmc_set_clk(clk, rate);
 		break;
 #endif
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+#if IS_ENABLED(CONFIG_GMAC_ROCKCHIP)
 	case SCLK_MAC:
 		/* select the external clock */
 		ret = rk3368_gmac_set_clk(priv->cru, rate);
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 097/169] Correct SPL use of HUSH_PARSER
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (26 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 096/169] Correct SPL uses of GMAC_ROCKCHIP Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 098/169] Correct SPL uses of HW_WATCHDOG Simon Glass
                   ` (41 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_HUSH_PARSER defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 common/cli.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/cli.c b/common/cli.c
index ba45dad2db5..9451e6a1426 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -31,7 +31,7 @@
  */
 int run_command(const char *cmd, int flag)
 {
-#if !CONFIG_IS_ENABLED(HUSH_PARSER)
+#if !IS_ENABLED(CONFIG_HUSH_PARSER)
 	/*
 	 * cli_run_command can return 0 or 1 for success, so clean up
 	 * its result.
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 098/169] Correct SPL uses of HW_WATCHDOG
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (27 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 097/169] Correct SPL use of HUSH_PARSER Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 099/169] Correct SPL uses of I8259_PIC Simon Glass
                   ` (40 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass, Chia-Wei Wang

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_HW_WATCHDOG defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
---

(no changes since v1)

 drivers/crypto/aspeed/aspeed_hace.c | 2 +-
 drivers/crypto/hash/hash_sw.c       | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/aspeed/aspeed_hace.c b/drivers/crypto/aspeed/aspeed_hace.c
index a1b0b9f564b..6b6c8fa6588 100644
--- a/drivers/crypto/aspeed/aspeed_hace.c
+++ b/drivers/crypto/aspeed/aspeed_hace.c
@@ -288,7 +288,7 @@ static int aspeed_hace_digest_wd(struct udevice *dev, enum HASH_ALGO algo,
 	if (rc)
 		return rc;
 
-	if (CONFIG_IS_ENABLED(HW_WATCHDOG) || CONFIG_IS_ENABLED(WATCHDOG)) {
+	if (IS_ENABLED(CONFIG_HW_WATCHDOG) || CONFIG_IS_ENABLED(WATCHDOG)) {
 		cur = ibuf;
 		end = ibuf + ilen;
 
diff --git a/drivers/crypto/hash/hash_sw.c b/drivers/crypto/hash/hash_sw.c
index 553c068010c..d8065d68ea4 100644
--- a/drivers/crypto/hash/hash_sw.c
+++ b/drivers/crypto/hash/hash_sw.c
@@ -244,7 +244,7 @@ static int sw_hash_digest_wd(struct udevice *dev, enum HASH_ALGO algo,
 	if (rc)
 		return rc;
 
-	if (CONFIG_IS_ENABLED(HW_WATCHDOG) || CONFIG_IS_ENABLED(WATCHDOG)) {
+	if (IS_ENABLED(CONFIG_HW_WATCHDOG) || CONFIG_IS_ENABLED(WATCHDOG)) {
 		cur = ibuf;
 		end = ibuf + ilen;
 
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 099/169] Correct SPL uses of I8259_PIC
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (28 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 098/169] Correct SPL uses of HW_WATCHDOG Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-10 12:41   ` Tom Rini
  2023-02-05 22:40 ` [PATCH v2 100/169] Correct SPL uses of IMX8M Simon Glass
                   ` (39 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 4 usages of this option to the non-SPL form, since there is
no SPL_I8259_PIC defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/x86/lib/interrupts.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/lib/interrupts.c b/arch/x86/lib/interrupts.c
index ff52959ed28..33d6eb49d75 100644
--- a/arch/x86/lib/interrupts.c
+++ b/arch/x86/lib/interrupts.c
@@ -66,7 +66,7 @@ void irq_install_handler(int irq, interrupt_handler_t *handler, void *arg)
 	irq_handlers[irq].arg = arg;
 	irq_handlers[irq].count = 0;
 
-	if (CONFIG_IS_ENABLED(I8259_PIC))
+	if (IS_ENABLED(CONFIG_I8259_PIC))
 		unmask_irq(irq);
 
 	if (status)
@@ -86,7 +86,7 @@ void irq_free_handler(int irq)
 
 	status = disable_interrupts();
 
-	if (CONFIG_IS_ENABLED(I8259_PIC))
+	if (IS_ENABLED(CONFIG_I8259_PIC))
 		mask_irq(irq);
 
 	irq_handlers[irq].handler = NULL;
@@ -108,13 +108,13 @@ void do_irq(int hw_irq)
 	}
 
 	if (irq_handlers[irq].handler) {
-		if (CONFIG_IS_ENABLED(I8259_PIC))
+		if (IS_ENABLED(CONFIG_I8259_PIC))
 			mask_irq(irq);
 
 		irq_handlers[irq].handler(irq_handlers[irq].arg);
 		irq_handlers[irq].count++;
 
-		if (CONFIG_IS_ENABLED(I8259_PIC)) {
+		if (IS_ENABLED(CONFIG_I8259_PIC)) {
 			unmask_irq(irq);
 			specific_eoi(irq);
 		}
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 100/169] Correct SPL uses of IMX8M
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (29 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 099/169] Correct SPL uses of I8259_PIC Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 101/169] Correct SPL use of IMX8MN_BEACON_2GB_LPDDR Simon Glass
                   ` (38 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 3 usages of this option to the non-SPL form, since there is
no SPL_IMX8M defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/arm/mach-imx/imx_bootaux.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c
index 1a3e538c4fa..433c1f80cee 100644
--- a/arch/arm/mach-imx/imx_bootaux.c
+++ b/arch/arm/mach-imx/imx_bootaux.c
@@ -15,7 +15,7 @@
 #include <cpu_func.h>
 
 /* Just to avoid build error */
-#if CONFIG_IS_ENABLED(IMX8M)
+#if IS_ENABLED(CONFIG_IMX8M)
 #define SRC_M4C_NON_SCLR_RST_MASK	BIT(0)
 #define SRC_M4_ENABLE_MASK		BIT(0)
 #define SRC_M4_REG_OFFSET		0
@@ -128,7 +128,7 @@ int arch_auxiliary_core_up(u32 core_id, ulong addr)
 	flush_dcache_all();
 
 	/* Enable M4 */
-	if (CONFIG_IS_ENABLED(IMX8M)) {
+	if (IS_ENABLED(CONFIG_IMX8M)) {
 		arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0, 0, 0, 0, 0, NULL);
 	} else {
 		clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET,
@@ -143,7 +143,7 @@ int arch_auxiliary_core_check_up(u32 core_id)
 	struct arm_smccc_res res;
 	unsigned int val;
 
-	if (CONFIG_IS_ENABLED(IMX8M)) {
+	if (IS_ENABLED(CONFIG_IMX8M)) {
 		arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0, 0, 0, 0, 0, &res);
 		return res.a0;
 	}
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 101/169] Correct SPL use of IMX8MN_BEACON_2GB_LPDDR
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (30 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 100/169] Correct SPL uses of IMX8M Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 102/169] Correct SPL uses of IMX_MODULE_FUSE Simon Glass
                   ` (37 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass, Adam Ford

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_IMX8MN_BEACON_2GB_LPDDR defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Adam Ford <aford173@gmail.com>
---

(no changes since v1)

 include/configs/imx8mn_beacon.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h
index bb3dfe3fa0d..1880d0311e4 100644
--- a/include/configs/imx8mn_beacon.h
+++ b/include/configs/imx8mn_beacon.h
@@ -80,7 +80,7 @@
 
 #define CFG_SYS_SDRAM_BASE		0x40000000
 #define PHYS_SDRAM			0x40000000
-#if CONFIG_IS_ENABLED(IMX8MN_BEACON_2GB_LPDDR)
+#if IS_ENABLED(CONFIG_IMX8MN_BEACON_2GB_LPDDR)
 #define PHYS_SDRAM_SIZE		0x80000000 /* 2GB DDR */
 #else
 #define PHYS_SDRAM_SIZE		0x40000000 /* 1GB DDR */
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 102/169] Correct SPL uses of IMX_MODULE_FUSE
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (31 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 101/169] Correct SPL use of IMX8MN_BEACON_2GB_LPDDR Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 103/169] Correct SPL uses of IMX_RDC Simon Glass
                   ` (36 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 6 usages of this option to the non-SPL form, since there is
no SPL_IMX_MODULE_FUSE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/arm/include/asm/mach-imx/module_fuse.h | 2 +-
 drivers/i2c/mxc_i2c.c                       | 4 ++--
 drivers/net/fec_mxc.c                       | 2 +-
 drivers/usb/host/ehci-mx6.c                 | 4 ++--
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/mach-imx/module_fuse.h b/arch/arm/include/asm/mach-imx/module_fuse.h
index a46fc3f1f8e..6c92cb40d6d 100644
--- a/arch/arm/include/asm/mach-imx/module_fuse.h
+++ b/arch/arm/include/asm/mach-imx/module_fuse.h
@@ -74,7 +74,7 @@ struct fuse_entry_desc {
 	u32 status;
 };
 
-#if !CONFIG_IS_ENABLED(IMX_MODULE_FUSE)
+#if !IS_ENABLED(CONFIG_IMX_MODULE_FUSE)
 static inline u32 check_module_fused(enum fuse_module_type module)
 {
 	return 0;
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 9a1599dcd91..86b9fb57c83 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -744,7 +744,7 @@ void bus_i2c_init(int index, int speed, int unused,
 		return;
 	}
 
-	if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) {
+	if (IS_ENABLED(CONFIG_IMX_MODULE_FUSE)) {
 		if (i2c_fused((ulong)mxc_i2c_buses[index].base)) {
 			printf("SoC fuse indicates I2C@0x%lx is unavailable.\n",
 			       (ulong)mxc_i2c_buses[index].base);
@@ -878,7 +878,7 @@ static int mxc_i2c_probe(struct udevice *bus)
 	if (addr == FDT_ADDR_T_NONE)
 		return -EINVAL;
 
-	if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) {
+	if (IS_ENABLED(CONFIG_IMX_MODULE_FUSE)) {
 		if (i2c_fused((ulong)addr)) {
 			printf("SoC fuse indicates I2C@0x%lx is unavailable.\n",
 			       (ulong)addr);
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 006d27051eb..5cc35958c49 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -1125,7 +1125,7 @@ static int fecmxc_probe(struct udevice *dev)
 	uint32_t start;
 	int ret;
 
-	if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) {
+	if (IS_ENABLED(CONFIG_IMX_MODULE_FUSE)) {
 		if (enet_fused((ulong)priv->eth)) {
 			printf("SoC fuse indicates Ethernet@0x%lx is unavailable.\n", (ulong)priv->eth);
 			return -ENODEV;
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 0a12db614ff..91633f013a5 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -360,7 +360,7 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 	if (index > 3)
 		return -EINVAL;
 
-	if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) {
+	if (IS_ENABLED(CONFIG_IMX_MODULE_FUSE)) {
 		if (usb_fused((ulong)ehci)) {
 			printf("SoC fuse indicates USB@0x%lx is unavailable.\n",
 			       (ulong)ehci);
@@ -641,7 +641,7 @@ static int ehci_usb_probe(struct udevice *dev)
 	struct ehci_hcor *hcor;
 	int ret;
 
-	if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) {
+	if (IS_ENABLED(CONFIG_IMX_MODULE_FUSE)) {
 		if (usb_fused((ulong)ehci)) {
 			printf("SoC fuse indicates USB@0x%lx is unavailable.\n",
 			       (ulong)ehci);
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 103/169] Correct SPL uses of IMX_RDC
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (32 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 102/169] Correct SPL uses of IMX_MODULE_FUSE Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-09  2:39   ` Tom Rini
  2023-02-05 22:40 ` [PATCH v2 104/169] Correct SPL uses of LMB Simon Glass
                   ` (35 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_IMX_RDC defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/arm/mach-imx/mx7/soc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 02af0d568f2..550e392550e 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -68,7 +68,7 @@ U_BOOT_DRVINFO(imx7_thermal) = {
 };
 #endif
 
-#if CONFIG_IS_ENABLED(IMX_RDC)
+#if IS_ENABLED(CONFIG_IMX_RDC)
 /*
  * In current design, if any peripheral was assigned to both A7 and M4,
  * it will receive ipg_stop or ipg_wait when any of the 2 platforms enter
@@ -316,7 +316,7 @@ int arch_cpu_init(void)
 
 	init_cpu_basic();
 
-#if CONFIG_IS_ENABLED(IMX_RDC)
+#if IS_ENABLED(CONFIG_IMX_RDC)
 	isolate_resource();
 #endif
 
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 104/169] Correct SPL uses of LMB
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (33 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 103/169] Correct SPL uses of IMX_RDC Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 105/169] Correct SPL uses of MICROBLAZE Simon Glass
                   ` (34 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 9 usages of this option to the non-SPL form, since there is
no SPL_LMB defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/arc/lib/bootm.c        | 2 +-
 arch/arm/lib/bootm.c        | 2 +-
 arch/m68k/lib/bootm.c       | 2 +-
 arch/microblaze/lib/bootm.c | 2 +-
 arch/powerpc/lib/bootm.c    | 2 +-
 arch/riscv/lib/bootm.c      | 2 +-
 arch/sandbox/lib/bootm.c    | 2 +-
 arch/x86/lib/bootm.c        | 2 +-
 boot/image-board.c          | 2 +-
 9 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c
index 07b2c1540d0..2dd003445f8 100644
--- a/arch/arc/lib/bootm.c
+++ b/arch/arc/lib/bootm.c
@@ -29,7 +29,7 @@ static int boot_prep_linux(struct bootm_headers *images)
 {
 	int ret;
 
-	if (CONFIG_IS_ENABLED(LMB)) {
+	if (IS_ENABLED(CONFIG_LMB)) {
 		ret = image_setup_linux(images);
 		if (ret)
 			return ret;
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index e414ef82673..c56285738a2 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -199,7 +199,7 @@ static void boot_prep_linux(struct bootm_headers *images)
 {
 	char *commandline = env_get("bootargs");
 
-	if (CONFIG_IS_ENABLED(OF_LIBFDT) && CONFIG_IS_ENABLED(LMB) && images->ft_len) {
+	if (CONFIG_IS_ENABLED(OF_LIBFDT) && IS_ENABLED(CONFIG_LMB) && images->ft_len) {
 		debug("using: FDT\n");
 		if (image_setup_linux(images)) {
 			panic("FDT creation failed!");
diff --git a/arch/m68k/lib/bootm.c b/arch/m68k/lib/bootm.c
index c1c9bdceb50..f18bed235d4 100644
--- a/arch/m68k/lib/bootm.c
+++ b/arch/m68k/lib/bootm.c
@@ -60,7 +60,7 @@ int do_bootm_linux(int flag, int argc, char *const argv[],
 	}
 	set_clocks_in_mhz(kbd);
 
-	if (CONFIG_IS_ENABLED(LMB)) {
+	if (IS_ENABLED(CONFIG_LMB)) {
 		ret = image_setup_linux(images);
 		if (ret)
 			goto error;
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index 4a5421497e5..930384f4015 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -73,7 +73,7 @@ static void boot_jump_linux(struct bootm_headers *images, int flag)
 
 static void boot_prep_linux(struct bootm_headers *images)
 {
-	if (CONFIG_IS_ENABLED(OF_LIBFDT) && CONFIG_IS_ENABLED(LMB) && images->ft_len) {
+	if (CONFIG_IS_ENABLED(OF_LIBFDT) && IS_ENABLED(CONFIG_LMB) && images->ft_len) {
 		debug("using: FDT\n");
 		if (image_setup_linux(images)) {
 			printf("FDT creation failed! hanging...");
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index 7b392b06bcb..910121ec9c8 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -214,7 +214,7 @@ static int boot_body_linux(struct bootm_headers *images)
 	if (ret)
 		return ret;
 
-	if (CONFIG_IS_ENABLED(LMB)) {
+	if (IS_ENABLED(CONFIG_LMB)) {
 		ret = image_setup_linux(images);
 		if (ret)
 			return ret;
diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index f5f8b4c7333..276677a5e2f 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -64,7 +64,7 @@ static void announce_and_cleanup(int fake)
 
 static void boot_prep_linux(struct bootm_headers *images)
 {
-	if (CONFIG_IS_ENABLED(OF_LIBFDT) && CONFIG_IS_ENABLED(LMB) && images->ft_len) {
+	if (CONFIG_IS_ENABLED(OF_LIBFDT) && IS_ENABLED(CONFIG_LMB) && images->ft_len) {
 		debug("using: FDT\n");
 		if (image_setup_linux(images)) {
 			printf("FDT creation failed! hanging...");
diff --git a/arch/sandbox/lib/bootm.c b/arch/sandbox/lib/bootm.c
index 28f4a746fb6..dc8b8e46cb4 100644
--- a/arch/sandbox/lib/bootm.c
+++ b/arch/sandbox/lib/bootm.c
@@ -55,7 +55,7 @@ static int boot_prep_linux(struct bootm_headers *images)
 {
 	int ret;
 
-	if (CONFIG_IS_ENABLED(LMB)) {
+	if (IS_ENABLED(CONFIG_LMB)) {
 		ret = image_setup_linux(images);
 		if (ret)
 			return ret;
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index 04e475bdc24..873e2bc176f 100644
--- a/arch/x86/lib/bootm.c
+++ b/arch/x86/lib/bootm.c
@@ -78,7 +78,7 @@ static int boot_prep_linux(struct bootm_headers *images)
 	size_t len;
 	int ret;
 
-	if (CONFIG_IS_ENABLED(OF_LIBFDT) && CONFIG_IS_ENABLED(LMB) && images->ft_len) {
+	if (CONFIG_IS_ENABLED(OF_LIBFDT) && IS_ENABLED(CONFIG_LMB) && images->ft_len) {
 		debug("using: FDT\n");
 		if (image_setup_linux(images)) {
 			puts("FDT creation failed! hanging...");
diff --git a/boot/image-board.c b/boot/image-board.c
index e5d71a3d541..25b60ec30b3 100644
--- a/boot/image-board.c
+++ b/boot/image-board.c
@@ -927,7 +927,7 @@ int image_setup_linux(struct bootm_headers *images)
 	int ret;
 
 	/* This function cannot be called without lmb support */
-	if (!CONFIG_IS_ENABLED(LMB))
+	if (!IS_ENABLED(CONFIG_LMB))
 		return -EFAULT;
 	if (CONFIG_IS_ENABLED(OF_LIBFDT))
 		boot_fdt_add_mem_rsv_regions(lmb, *of_flat_tree);
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 105/169] Correct SPL uses of MICROBLAZE
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (34 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 104/169] Correct SPL uses of LMB Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 106/169] Correct SPL use of MIPS_CM Simon Glass
                   ` (33 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_MICROBLAZE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/xilinx/common/board.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index aa9f3ef071c..bed15319934 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -412,14 +412,14 @@ int board_late_init_xilinx(void)
 	struct xilinx_board_description *desc;
 	phys_size_t bootm_size = gd->ram_top - gd->ram_base;
 
-	if (!CONFIG_IS_ENABLED(MICROBLAZE)) {
+	if (!IS_ENABLED(CONFIG_MICROBLAZE)) {
 		ulong scriptaddr;
 
 		scriptaddr = env_get_hex("scriptaddr", 0);
 		ret |= env_set_hex("scriptaddr", gd->ram_base + scriptaddr);
 	}
 
-	if (IS_ENABLED(CONFIG_ARCH_ZYNQ) || CONFIG_IS_ENABLED(MICROBLAZE))
+	if (IS_ENABLED(CONFIG_ARCH_ZYNQ) || IS_ENABLED(CONFIG_MICROBLAZE))
 		bootm_size = min(bootm_size, (phys_size_t)(SZ_512M + SZ_256M));
 
 	ret |= env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET);
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 106/169] Correct SPL use of MIPS_CM
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (35 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 105/169] Correct SPL uses of MICROBLAZE Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 107/169] Correct SPL use of MMC_QUIRKS Simon Glass
                   ` (32 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_MIPS_CM defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/mips/include/asm/cm.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/cm.h b/arch/mips/include/asm/cm.h
index 5cc8c09621d..c695ffc71f5 100644
--- a/arch/mips/include/asm/cm.h
+++ b/arch/mips/include/asm/cm.h
@@ -108,7 +108,7 @@
 #include <asm/io.h>
 #include <linux/bitops.h>
 
-#if CONFIG_IS_ENABLED(MIPS_CM)
+#if IS_ENABLED(CONFIG_MIPS_CM)
 static inline void *mips_cm_base(void)
 {
 	return (void *)CKSEG1ADDR(CONFIG_MIPS_CM_BASE);
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 107/169] Correct SPL use of MMC_QUIRKS
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (36 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 106/169] Correct SPL use of MIPS_CM Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-06  0:30   ` Jaehoon Chung
  2023-02-09 21:32   ` Tom Rini
  2023-02-05 22:40 ` [PATCH v2 108/169] Correct SPL uses of MTD Simon Glass
                   ` (31 subsequent siblings)
  69 siblings, 2 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_MMC_QUIRKS defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 drivers/mmc/mmc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 210703ea46b..fd4aa946e2a 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -247,7 +247,7 @@ static int mmc_send_cmd_retry(struct mmc *mmc, struct mmc_cmd *cmd,
 static int mmc_send_cmd_quirks(struct mmc *mmc, struct mmc_cmd *cmd,
 			       struct mmc_data *data, u32 quirk, uint retries)
 {
-	if (CONFIG_IS_ENABLED(MMC_QUIRKS) && mmc->quirks & quirk)
+	if (IS_ENABLED(CONFIG_MMC_QUIRKS) && mmc->quirks & quirk)
 		return mmc_send_cmd_retry(mmc, cmd, data, retries);
 	else
 		return mmc_send_cmd(mmc, cmd, data);
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 108/169] Correct SPL uses of MTD
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (37 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 107/169] Correct SPL use of MMC_QUIRKS Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 109/169] Correct SPL uses of MULTIPLEXER Simon Glass
                   ` (30 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_MTD defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c | 2 +-
 board/st/common/stm32mp_dfu.c                   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
index 89552d2ad10..934800be93d 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
@@ -1748,7 +1748,7 @@ static void stm32prog_end_phase(struct stm32prog_data *data, u64 offset)
 		}
 	}
 
-	if (CONFIG_IS_ENABLED(MTD) &&
+	if (IS_ENABLED(CONFIG_MTD) &&
 	    data->cur_part->bin_nb > 1) {
 		if (stm32prog_copy_fsbl(data->cur_part)) {
 			stm32prog_err("%s (0x%x): copy of fsbl failed",
diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
index 19e9c3b2402..079ba15ddb1 100644
--- a/board/st/common/stm32mp_dfu.c
+++ b/board/st/common/stm32mp_dfu.c
@@ -123,7 +123,7 @@ void set_dfu_alt_info(char *interface, char *devstr)
 			board_get_alt_info_mmc(dev, buf);
 	}
 
-	if (CONFIG_IS_ENABLED(MTD)) {
+	if (IS_ENABLED(CONFIG_MTD)) {
 		/* probe all MTD devices */
 		mtd_probe_devices();
 
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 109/169] Correct SPL uses of MULTIPLEXER
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (38 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 108/169] Correct SPL uses of MTD Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-09 15:56   ` Tom Rini
  2023-02-05 22:40 ` [PATCH v2 110/169] Correct SPL uses of NEEDS_MANUAL_RELOC Simon Glass
                   ` (29 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 3 usages of this option to the non-SPL form, since there is
no SPL_MULTIPLEXER defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 drivers/Makefile     | 2 +-
 drivers/mux/Makefile | 2 +-
 include/mux.h        | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/Makefile b/drivers/Makefile
index 15d19d0c8a3..20497aa2ac9 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -18,7 +18,7 @@ obj-$(CONFIG_$(SPL_TPL_)INPUT) += input/
 obj-$(CONFIG_$(SPL_TPL_)LED) += led/
 obj-$(CONFIG_$(SPL_TPL_)MMC) += mmc/
 obj-y += mtd/
-obj-$(CONFIG_$(SPL_)MULTIPLEXER) += mux/
+obj-$(CONFIG_MULTIPLEXER) += mux/
 obj-$(CONFIG_$(SPL_TPL_)ETH) += net/
 obj-$(CONFIG_$(SPL_TPL_)PCH) += pch/
 obj-$(CONFIG_$(SPL_TPL_)PCI) += pci/
diff --git a/drivers/mux/Makefile b/drivers/mux/Makefile
index 78ebf04c7a9..d4e24789d33 100644
--- a/drivers/mux/Makefile
+++ b/drivers/mux/Makefile
@@ -3,5 +3,5 @@
 # (C) Copyright 2019
 # Jean-Jacques Hiblot <jjhiblot@ti.com>
 
-obj-$(CONFIG_$(SPL_)MULTIPLEXER) += mux-uclass.o
+obj-$(CONFIG_MULTIPLEXER) += mux-uclass.o
 obj-$(CONFIG_$(SPL_)MUX_MMIO) += mmio.o
diff --git a/include/mux.h b/include/mux.h
index 9f809912742..c92d887591e 100644
--- a/include/mux.h
+++ b/include/mux.h
@@ -23,7 +23,7 @@
 struct udevice;
 struct mux_control;
 
-#if CONFIG_IS_ENABLED(MULTIPLEXER)
+#if IS_ENABLED(CONFIG_MULTIPLEXER)
 /**
  * mux_control_states() - Query the number of multiplexer states.
  * @mux: The mux-control to query.
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 110/169] Correct SPL uses of NEEDS_MANUAL_RELOC
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (39 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 109/169] Correct SPL uses of MULTIPLEXER Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 111/169] Correct SPL use of NETDEVICES Simon Glass
                   ` (28 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 3 usages of this option to the non-SPL form, since there is
no SPL_NEEDS_MANUAL_RELOC defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 common/board_r.c | 4 ++--
 common/event.c   | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/common/board_r.c b/common/board_r.c
index 3618acad437..fe803615163 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -155,7 +155,7 @@ static int initr_reloc_global_data(void)
 	 * The fdt_blob needs to be moved to new relocation address
 	 * incase of FDT blob is embedded with in image
 	 */
-	if (CONFIG_IS_ENABLED(OF_EMBED) && CONFIG_IS_ENABLED(NEEDS_MANUAL_RELOC))
+	if (CONFIG_IS_ENABLED(OF_EMBED) && IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC))
 		gd->fdt_blob += gd->reloc_off;
 
 #ifdef CONFIG_EFI_LOADER
@@ -609,7 +609,7 @@ static init_fnc_t init_sequence_r[] = {
 	 */
 #endif
 	initr_reloc_global_data,
-#if CONFIG_IS_ENABLED(NEEDS_MANUAL_RELOC) && CONFIG_IS_ENABLED(EVENT)
+#if IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC) && CONFIG_IS_ENABLED(EVENT)
 	event_manual_reloc,
 #endif
 #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
diff --git a/common/event.c b/common/event.c
index c312556490e..164c95f8f52 100644
--- a/common/event.c
+++ b/common/event.c
@@ -155,7 +155,7 @@ void event_show_spy_list(void)
 	}
 }
 
-#if CONFIG_IS_ENABLED(NEEDS_MANUAL_RELOC)
+#if IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC)
 int event_manual_reloc(void)
 {
 	struct evspy_info *spy, *end;
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 111/169] Correct SPL use of NETDEVICES
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (40 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 110/169] Correct SPL uses of NEEDS_MANUAL_RELOC Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 112/169] Correct SPL uses of NXP_FSPI Simon Glass
                   ` (27 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_NETDEVICES defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 net/bootp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/bootp.c b/net/bootp.c
index cae041988db..8b1a4ae2ef8 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -1078,7 +1078,7 @@ static void dhcp_handler(uchar *pkt, unsigned dest, struct in_addr sip,
 #endif	/* CONFIG_SYS_BOOTFILE_PREFIX */
 			dhcp_packet_process_options(bp);
 			if (CONFIG_IS_ENABLED(EFI_LOADER) &&
-			    CONFIG_IS_ENABLED(NETDEVICES))
+			    IS_ENABLED(CONFIG_NETDEVICES))
 				efi_net_set_dhcp_ack(pkt, len);
 
 #if defined(CONFIG_SERVERIP_FROM_PROXYDHCP)
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 112/169] Correct SPL uses of NXP_FSPI
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (41 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 111/169] Correct SPL use of NETDEVICES Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-09  2:04   ` Tom Rini
  2023-02-05 22:40 ` [PATCH v2 113/169] Correct SPL use of OCTEON_SERIAL_BOOTCMD Simon Glass
                   ` (26 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_NXP_FSPI defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 drivers/clk/imx/clk-imx8mm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index b5c253e4966..663b9a1bc7e 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -86,7 +86,7 @@ static const char *imx8mm_wdog_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_
 static const char *imx8mm_usdhc3_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",
 					   "sys_pll3_out", "sys_pll1_266m", "audio_pll2_clk", "sys_pll1_100m", };
 
-#if CONFIG_IS_ENABLED(NXP_FSPI)
+#if IS_ENABLED(CONFIG_NXP_FSPI)
 static const char *imx8mm_qspi_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll2_333m", "sys_pll2_500m",
 					   "audio_pll2_out", "sys_pll1_266m", "sys_pll3_out", "sys_pll1_100m", };
 #endif
@@ -355,7 +355,7 @@ static int imx8mm_clk_probe(struct udevice *dev)
 	       imx_clk_gate4("ecspi3_root_clk", "ecspi3", base + 0x4090, 0));
 #endif
 
-#if CONFIG_IS_ENABLED(NXP_FSPI)
+#if IS_ENABLED(CONFIG_NXP_FSPI)
 	clk_dm(IMX8MM_CLK_QSPI,
 	       imx8m_clk_composite("qspi", imx8mm_qspi_sels, base + 0xab80));
 	clk_dm(IMX8MM_CLK_QSPI_ROOT,
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 113/169] Correct SPL use of OCTEON_SERIAL_BOOTCMD
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (42 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 112/169] Correct SPL uses of NXP_FSPI Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 114/169] Correct SPL use of OCTEON_SERIAL_PCIE_CONSOLE Simon Glass
                   ` (25 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_OCTEON_SERIAL_BOOTCMD defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/mips/mach-octeon/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/mach-octeon/cpu.c b/arch/mips/mach-octeon/cpu.c
index 1bdc6cd7290..5adf4ba32c8 100644
--- a/arch/mips/mach-octeon/cpu.c
+++ b/arch/mips/mach-octeon/cpu.c
@@ -451,7 +451,7 @@ int arch_misc_init(void)
 	if (CONFIG_IS_ENABLED(OCTEON_SERIAL_PCIE_CONSOLE))
 		init_pcie_console();
 
-	if (CONFIG_IS_ENABLED(OCTEON_SERIAL_BOOTCMD))
+	if (IS_ENABLED(CONFIG_OCTEON_SERIAL_BOOTCMD))
 		init_bootcmd_console();
 
 	return 0;
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 114/169] Correct SPL use of OCTEON_SERIAL_PCIE_CONSOLE
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (43 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 113/169] Correct SPL use of OCTEON_SERIAL_BOOTCMD Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 116/169] Correct SPL use of OF_EMBED Simon Glass
                   ` (24 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_OCTEON_SERIAL_PCIE_CONSOLE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/mips/mach-octeon/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/mach-octeon/cpu.c b/arch/mips/mach-octeon/cpu.c
index 5adf4ba32c8..c7744e84706 100644
--- a/arch/mips/mach-octeon/cpu.c
+++ b/arch/mips/mach-octeon/cpu.c
@@ -448,7 +448,7 @@ int arch_misc_init(void)
 	if (ret)
 		return ret;
 
-	if (CONFIG_IS_ENABLED(OCTEON_SERIAL_PCIE_CONSOLE))
+	if (IS_ENABLED(CONFIG_OCTEON_SERIAL_PCIE_CONSOLE))
 		init_pcie_console();
 
 	if (IS_ENABLED(CONFIG_OCTEON_SERIAL_BOOTCMD))
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 116/169] Correct SPL use of OF_EMBED
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (44 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 114/169] Correct SPL use of OCTEON_SERIAL_PCIE_CONSOLE Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 118/169] Correct SPL use of PARTITION_TYPE_GUID Simon Glass
                   ` (23 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_OF_EMBED defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 common/board_r.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/board_r.c b/common/board_r.c
index fe803615163..90e1219fb96 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -155,7 +155,7 @@ static int initr_reloc_global_data(void)
 	 * The fdt_blob needs to be moved to new relocation address
 	 * incase of FDT blob is embedded with in image
 	 */
-	if (CONFIG_IS_ENABLED(OF_EMBED) && IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC))
+	if (IS_ENABLED(CONFIG_OF_EMBED) && IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC))
 		gd->fdt_blob += gd->reloc_off;
 
 #ifdef CONFIG_EFI_LOADER
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 118/169] Correct SPL use of PARTITION_TYPE_GUID
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (45 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 116/169] Correct SPL use of OF_EMBED Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 119/169] Correct SPL use of PCI_PNP Simon Glass
                   ` (22 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_PARTITION_TYPE_GUID defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 disk/part_efi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 18f7e584050..80a44dc9f07 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -242,7 +242,7 @@ void part_print_efi(struct blk_desc *dev_desc)
 			print_efiname(&gpt_pte[i]));
 		printf("\tattrs:\t0x%016llx\n", gpt_pte[i].attributes.raw);
 		uuid = (unsigned char *)gpt_pte[i].partition_type_guid.b;
-		if (CONFIG_IS_ENABLED(PARTITION_TYPE_GUID))
+		if (IS_ENABLED(CONFIG_PARTITION_TYPE_GUID))
 			printf("\ttype:\t%pUl\n\t\t(%pUs)\n", uuid, uuid);
 		else
 			printf("\ttype:\t%pUl\n", uuid);
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 119/169] Correct SPL use of PCI_PNP
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (46 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 118/169] Correct SPL use of PARTITION_TYPE_GUID Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-09 23:34   ` Tom Rini
  2023-02-05 22:40 ` [PATCH v2 120/169] Correct SPL uses of PG_WCOM_UBOOT_BOOTPACKAGE Simon Glass
                   ` (21 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_PCI_PNP defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 drivers/pci/pci-uclass.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 9343cfc62a9..a0c19987ab1 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1140,7 +1140,7 @@ static int pci_uclass_post_probe(struct udevice *bus)
 	if (ret)
 		return log_msg_ret("bind", ret);
 
-	if (CONFIG_IS_ENABLED(PCI_PNP) && ll_boot_init() &&
+	if (IS_ENABLED(CONFIG_PCI_PNP) && ll_boot_init() &&
 	    (!hose->skip_auto_config_until_reloc ||
 	     (gd->flags & GD_FLG_RELOC))) {
 		ret = pci_auto_config_devices(bus);
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 120/169] Correct SPL uses of PG_WCOM_UBOOT_BOOTPACKAGE
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (47 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 119/169] Correct SPL use of PCI_PNP Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 121/169] Correct SPL uses of PG_WCOM_UBOOT_UPDATE Simon Glass
                   ` (20 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_PG_WCOM_UBOOT_BOOTPACKAGE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
---

(no changes since v1)

 board/keymile/common/common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c
index 0252ada93ff..9cf5b71655c 100644
--- a/board/keymile/common/common.c
+++ b/board/keymile/common/common.c
@@ -79,9 +79,9 @@ int set_km_env(void)
 }
 
 #if CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE_SUPPORTED)
-#if   ((!CONFIG_IS_ENABLED(PG_WCOM_UBOOT_BOOTPACKAGE) && \
+#if   ((!IS_ENABLED(CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE) && \
 	!CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE)) ||     \
-	(CONFIG_IS_ENABLED(PG_WCOM_UBOOT_BOOTPACKAGE) && \
+	(IS_ENABLED(CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE) && \
 	CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE)))
 #error "It has to be either bootpackage or update u-boot image!"
 #endif
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 121/169] Correct SPL uses of PG_WCOM_UBOOT_UPDATE
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (48 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 120/169] Correct SPL uses of PG_WCOM_UBOOT_BOOTPACKAGE Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 124/169] Correct SPL use of PHY_CADENCE_TORRENT Simon Glass
                   ` (19 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_PG_WCOM_UBOOT_UPDATE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
---

(no changes since v1)

 board/keymile/common/common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c
index 9cf5b71655c..8c282f9952a 100644
--- a/board/keymile/common/common.c
+++ b/board/keymile/common/common.c
@@ -80,9 +80,9 @@ int set_km_env(void)
 
 #if CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE_SUPPORTED)
 #if   ((!IS_ENABLED(CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE) && \
-	!CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE)) ||     \
+	!IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE)) ||     \
 	(IS_ENABLED(CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE) && \
-	CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE)))
+	IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE)))
 #error "It has to be either bootpackage or update u-boot image!"
 #endif
 void check_for_uboot_update(void)
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 124/169] Correct SPL use of PHY_CADENCE_TORRENT
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (49 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 121/169] Correct SPL uses of PG_WCOM_UBOOT_UPDATE Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-09  0:39   ` Tom Rini
  2023-02-05 22:40 ` [PATCH v2 126/169] Correct SPL uses of PMIC_STPMIC1 Simon Glass
                   ` (18 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_PHY_CADENCE_TORRENT defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 drivers/phy/cadence/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/phy/cadence/Makefile b/drivers/phy/cadence/Makefile
index c247feb8262..a1cb6868c9e 100644
--- a/drivers/phy/cadence/Makefile
+++ b/drivers/phy/cadence/Makefile
@@ -1,2 +1,2 @@
 obj-$(CONFIG_PHY_CADENCE_SIERRA)	+= phy-cadence-sierra.o
-obj-$(CONFIG_$(SPL_)PHY_CADENCE_TORRENT) += phy-cadence-torrent.o
+obj-$(CONFIG_PHY_CADENCE_TORRENT) += phy-cadence-torrent.o
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 126/169] Correct SPL uses of PMIC_STPMIC1
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (50 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 124/169] Correct SPL use of PHY_CADENCE_TORRENT Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 127/169] Correct SPL use of QFW_PIO Simon Glass
                   ` (17 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_PMIC_STPMIC1 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
index 934800be93d..6f3641ccf57 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
@@ -1583,7 +1583,7 @@ int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
 	int result = 0, ret;
 	struct udevice *dev;
 
-	if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
+	if (!IS_ENABLED(CONFIG_PMIC_STPMIC1)) {
 		stm32prog_err("PMIC update not supported");
 
 		return -EOPNOTSUPP;
@@ -1633,7 +1633,7 @@ int stm32prog_pmic_start(struct stm32prog_data *data)
 	int ret;
 	struct udevice *dev;
 
-	if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
+	if (!IS_ENABLED(CONFIG_PMIC_STPMIC1)) {
 		stm32prog_err("PMIC update not supported");
 
 		return -EOPNOTSUPP;
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 127/169] Correct SPL use of QFW_PIO
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (51 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 126/169] Correct SPL uses of PMIC_STPMIC1 Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-10 12:41   ` Tom Rini
  2023-02-05 22:40 ` [PATCH v2 128/169] Correct SPL use of REGEX Simon Glass
                   ` (16 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_QFW_PIO defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/x86/cpu/qemu/qemu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index e54082df7f9..4f28dc75b70 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -17,7 +17,7 @@
 
 static bool i440fx;
 
-#if CONFIG_IS_ENABLED(QFW_PIO)
+#if IS_ENABLED(CONFIG_QFW_PIO)
 U_BOOT_DRVINFO(x86_qfw_pio) = {
 	.name = "qfw_pio",
 };
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 128/169] Correct SPL use of REGEX
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (52 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 127/169] Correct SPL use of QFW_PIO Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 129/169] Correct SPL use of RENESAS_SDHI Simon Glass
                   ` (15 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_REGEX defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/xilinx/common/board.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index bed15319934..d071ebfb9cc 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -481,7 +481,7 @@ int __maybe_unused board_fit_config_name_match(const char *name)
 	debug("%s: Check %s, default %s\n", __func__, name, board_name);
 
 #if !defined(CONFIG_SPL_BUILD)
-	if (CONFIG_IS_ENABLED(REGEX)) {
+	if (IS_ENABLED(CONFIG_REGEX)) {
 		struct slre slre;
 		int ret;
 
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 129/169] Correct SPL use of RENESAS_SDHI
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (53 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 128/169] Correct SPL use of REGEX Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 130/169] Correct SPL use of RESV_RAM Simon Glass
                   ` (14 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_RENESAS_SDHI defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 drivers/mmc/tmio-common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/tmio-common.h b/drivers/mmc/tmio-common.h
index 59d5a0e22e9..b1556bba5d9 100644
--- a/drivers/mmc/tmio-common.h
+++ b/drivers/mmc/tmio-common.h
@@ -139,7 +139,7 @@ struct tmio_sd_priv {
 #if CONFIG_IS_ENABLED(CLK)
 	struct clk			clk;
 #endif
-#if CONFIG_IS_ENABLED(RENESAS_SDHI)
+#if IS_ENABLED(CONFIG_RENESAS_SDHI)
 	unsigned int			smpcmp;
 	u8				tap_set;
 	u8				tap_num;
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 130/169] Correct SPL use of RESV_RAM
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (54 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 129/169] Correct SPL use of RENESAS_SDHI Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 131/169] Correct SPL uses of ROCKCHIP_EFUSE Simon Glass
                   ` (13 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_RESV_RAM defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/traverse/ten64/ten64.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/traverse/ten64/ten64.c b/board/traverse/ten64/ten64.c
index 13aafb5de76..9e4c84ad2f4 100644
--- a/board/traverse/ten64/ten64.c
+++ b/board/traverse/ten64/ten64.c
@@ -211,7 +211,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 		base[i] = gd->bd->bi_dram[i].start;
 		size[i] = gd->bd->bi_dram[i].size;
 		/* reduce size if reserved memory is within this bank */
-		if (CONFIG_IS_ENABLED(RESV_RAM) && RESV_MEM_IN_BANK(i))
+		if (IS_ENABLED(CONFIG_RESV_RAM) && RESV_MEM_IN_BANK(i))
 			size[i] = gd->arch.resv_ram - base[i];
 	}
 
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 131/169] Correct SPL uses of ROCKCHIP_EFUSE
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (55 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 130/169] Correct SPL use of RESV_RAM Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 133/169] Correct SPL use of SANDBOX Simon Glass
                   ` (12 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_ROCKCHIP_EFUSE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/arm/mach-rockchip/misc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c
index 01aedadf2c6..437c7cf896a 100644
--- a/arch/arm/mach-rockchip/misc.c
+++ b/arch/arm/mach-rockchip/misc.c
@@ -60,12 +60,12 @@ int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
 			      const u32 cpuid_length,
 			      u8 *cpuid)
 {
-#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE) || CONFIG_IS_ENABLED(ROCKCHIP_OTP)
+#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || CONFIG_IS_ENABLED(ROCKCHIP_OTP)
 	struct udevice *dev;
 	int ret;
 
 	/* retrieve the device */
-#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE)
+#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)
 	ret = uclass_get_device_by_driver(UCLASS_MISC,
 					  DM_DRIVER_GET(rockchip_efuse), &dev);
 #elif CONFIG_IS_ENABLED(ROCKCHIP_OTP)
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 133/169] Correct SPL use of SANDBOX
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (56 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 131/169] Correct SPL uses of ROCKCHIP_EFUSE Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 134/169] Correct SPL uses of SANDBOX_CLK_CCF Simon Glass
                   ` (11 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SANDBOX defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 drivers/pinctrl/pinctrl-single.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index bc9c17bce84..d80281fd3dd 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -541,7 +541,7 @@ static int single_probe(struct udevice *dev)
 	INIT_LIST_HEAD(&priv->gpiofuncs);
 
 	size = pdata->offset + pdata->width / BITS_PER_BYTE;
-	#if (CONFIG_IS_ENABLED(SANDBOX))
+	#if (IS_ENABLED(CONFIG_SANDBOX))
 	priv->sandbox_regs =
 		devm_kzalloc(dev, size * sizeof(*priv->sandbox_regs),
 			     GFP_KERNEL);
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 134/169] Correct SPL uses of SANDBOX_CLK_CCF
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (57 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 133/169] Correct SPL use of SANDBOX Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 135/169] Correct SPL uses of SAVE_PREV_BL_FDT_ADDR Simon Glass
                   ` (10 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 12 usages of this option to the non-SPL form, since there is
no SPL_SANDBOX_CLK_CCF defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 drivers/clk/clk-divider.c    | 4 ++--
 drivers/clk/clk-gate.c       | 6 +++---
 drivers/clk/clk-mux.c        | 8 ++++----
 include/linux/clk-provider.h | 6 +++---
 4 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 7e8e62feeee..6ab137a72be 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -81,7 +81,7 @@ static ulong clk_divider_recalc_rate(struct clk *clk)
 	unsigned long parent_rate = clk_get_parent_rate(clk);
 	unsigned int val;
 
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	val = divider->io_divider_val;
 #else
 	val = readl(divider->reg);
@@ -210,7 +210,7 @@ static struct clk *_register_divider(struct device *dev, const char *name,
 	div->width = width;
 	div->flags = clk_divider_flags;
 	div->table = table;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	div->io_divider_val = *(u32 *)reg;
 #endif
 
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index aa40daf3d79..a8775c77dc2 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -62,7 +62,7 @@ static void clk_gate_endisable(struct clk *clk, int enable)
 		if (set)
 			reg |= BIT(gate->bit_idx);
 	} else {
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 		reg = gate->io_gate_val;
 #else
 		reg = readl(gate->reg);
@@ -96,7 +96,7 @@ int clk_gate_is_enabled(struct clk *clk)
 	struct clk_gate *gate = to_clk_gate(clk);
 	u32 reg;
 
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	reg = gate->io_gate_val;
 #else
 	reg = readl(gate->reg);
@@ -142,7 +142,7 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
 	gate->reg = reg;
 	gate->bit_idx = bit_idx;
 	gate->flags = clk_gate_flags;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	gate->io_gate_val = *(u32 *)reg;
 #endif
 
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index b49946fbcd5..184d426d0b3 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -90,7 +90,7 @@ u8 clk_mux_get_parent(struct clk *clk)
 	struct clk_mux *mux = to_clk_mux(clk);
 	u32 val;
 
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	val = mux->io_mux_val;
 #else
 	val = readl(mux->reg);
@@ -137,7 +137,7 @@ static int clk_mux_set_parent(struct clk *clk, struct clk *parent)
 	if (mux->flags & CLK_MUX_HIWORD_MASK) {
 		reg = mux->mask << (mux->shift + 16);
 	} else {
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 		reg = mux->io_mux_val;
 #else
 		reg = readl(mux->reg);
@@ -146,7 +146,7 @@ static int clk_mux_set_parent(struct clk *clk, struct clk *parent)
 	}
 	val = val << mux->shift;
 	reg |= val;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	mux->io_mux_val = reg;
 #else
 	writel(reg, mux->reg);
@@ -194,7 +194,7 @@ struct clk *clk_hw_register_mux_table(struct device *dev, const char *name,
 	mux->mask = mask;
 	mux->flags = clk_mux_flags;
 	mux->table = table;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	mux->io_mux_val = *(u32 *)reg;
 #endif
 
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 2d04882d053..b8acacd49ee 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -65,7 +65,7 @@ struct clk_mux {
 	 */
 	const char	* const *parent_names;
 	u8		num_parents;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	u32             io_mux_val;
 #endif
 
@@ -93,7 +93,7 @@ struct clk_gate {
 	void __iomem	*reg;
 	u8		bit_idx;
 	u8		flags;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	u32		io_gate_val;
 #endif
 };
@@ -121,7 +121,7 @@ struct clk_divider {
 	u8		width;
 	u8		flags;
 	const struct clk_div_table	*table;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	u32             io_divider_val;
 #endif
 };
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 135/169] Correct SPL uses of SAVE_PREV_BL_FDT_ADDR
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (58 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 134/169] Correct SPL uses of SANDBOX_CLK_CCF Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 138/169] Correct SPL uses of SIFIVE_OTP Simon Glass
                   ` (9 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_SAVE_PREV_BL_FDT_ADDR defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/arm/lib/save_prev_bl_data.c | 2 +-
 common/board_r.c                 | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/lib/save_prev_bl_data.c b/arch/arm/lib/save_prev_bl_data.c
index f4ee86a89c6..cd943eefe10 100644
--- a/arch/arm/lib/save_prev_bl_data.c
+++ b/arch/arm/lib/save_prev_bl_data.c
@@ -60,7 +60,7 @@ int save_prev_bl_data(void)
 		return -ENODATA;
 	}
 
-	if (CONFIG_IS_ENABLED(SAVE_PREV_BL_FDT_ADDR))
+	if (IS_ENABLED(CONFIG_SAVE_PREV_BL_FDT_ADDR))
 		env_set_addr("prevbl_fdt_addr", (void *)reg0);
 	if (!CONFIG_IS_ENABLED(SAVE_PREV_BL_INITRAMFS_START_ADDR))
 		return 0;
diff --git a/common/board_r.c b/common/board_r.c
index 90e1219fb96..6026e4367ce 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -453,7 +453,7 @@ static int initr_env(void)
 			    (unsigned long)map_to_sysmem(gd->fdt_blob));
 
 	#if (CONFIG_IS_ENABLED(SAVE_PREV_BL_INITRAMFS_START_ADDR) || \
-						CONFIG_IS_ENABLED(SAVE_PREV_BL_FDT_ADDR))
+						IS_ENABLED(CONFIG_SAVE_PREV_BL_FDT_ADDR))
 		save_prev_bl_data();
 	#endif
 
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 138/169] Correct SPL uses of SIFIVE_OTP
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (59 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 135/169] Correct SPL uses of SAVE_PREV_BL_FDT_ADDR Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 139/169] Correct SPL use of SL28CPLD Simon Glass
                   ` (8 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 2 usages of this option to the non-SPL form, since there is
no SPL_SIFIVE_OTP defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/sifive/unleashed/unleashed.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/sifive/unleashed/unleashed.c b/board/sifive/unleashed/unleashed.c
index f8aad862c6d..b6ab06a08fb 100644
--- a/board/sifive/unleashed/unleashed.c
+++ b/board/sifive/unleashed/unleashed.c
@@ -27,7 +27,7 @@
 
 #ifdef CONFIG_MISC_INIT_R
 
-#if CONFIG_IS_ENABLED(SIFIVE_OTP)
+#if IS_ENABLED(CONFIG_SIFIVE_OTP)
 static u32 otp_read_serialnum(struct udevice *dev)
 {
 	int ret;
@@ -53,7 +53,7 @@ static u32 fu540_read_serialnum(void)
 {
 	u32 serial = ERROR_READING_SERIAL_NUMBER;
 
-#if CONFIG_IS_ENABLED(SIFIVE_OTP)
+#if IS_ENABLED(CONFIG_SIFIVE_OTP)
 	struct udevice *dev;
 	int ret;
 
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 139/169] Correct SPL use of SL28CPLD
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (60 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 138/169] Correct SPL uses of SIFIVE_OTP Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 140/169] Correct SPL use of SL28_SPL_LOADS_OPTEE_BL32 Simon Glass
                   ` (7 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SL28CPLD defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/kontron/sl28/sl28.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/kontron/sl28/sl28.c b/board/kontron/sl28/sl28.c
index 4ad6b323476..257923685a5 100644
--- a/board/kontron/sl28/sl28.c
+++ b/board/kontron/sl28/sl28.c
@@ -109,7 +109,7 @@ static void print_cpld_version(void)
 int checkboard(void)
 {
 	printf("EL:    %d\n", current_el());
-	if (CONFIG_IS_ENABLED(SL28CPLD))
+	if (IS_ENABLED(CONFIG_SL28CPLD))
 		print_cpld_version();
 
 	return 0;
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 140/169] Correct SPL use of SL28_SPL_LOADS_OPTEE_BL32
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (61 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 139/169] Correct SPL use of SL28CPLD Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 144/169] Correct SPL use of STM32MP15X_STM32IMAGE Simon Glass
                   ` (6 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SL28_SPL_LOADS_OPTEE_BL32 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/kontron/sl28/sl28.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/kontron/sl28/sl28.c b/board/kontron/sl28/sl28.c
index 257923685a5..e78a0d5dd3c 100644
--- a/board/kontron/sl28/sl28.c
+++ b/board/kontron/sl28/sl28.c
@@ -188,7 +188,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 
 	fdt_fixup_icid(blob);
 
-	if (CONFIG_IS_ENABLED(SL28_SPL_LOADS_OPTEE_BL32)) {
+	if (IS_ENABLED(CONFIG_SL28_SPL_LOADS_OPTEE_BL32)) {
 		node = fdt_node_offset_by_compatible(blob, -1, "linaro,optee-tz");
 		if (node)
 			fdt_set_node_status(blob, node, FDT_STATUS_OKAY);
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 144/169] Correct SPL use of STM32MP15X_STM32IMAGE
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (62 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 140/169] Correct SPL use of SL28_SPL_LOADS_OPTEE_BL32 Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 145/169] Correct SPL use of SUPPORT_EMMC_RPMB Simon Glass
                   ` (5 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_STM32MP15X_STM32IMAGE defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/arm/mach-stm32mp/fdt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-stm32mp/fdt.c b/arch/arm/mach-stm32mp/fdt.c
index 3b4c05d7451..de5c5a55ea0 100644
--- a/arch/arm/mach-stm32mp/fdt.c
+++ b/arch/arm/mach-stm32mp/fdt.c
@@ -505,7 +505,7 @@ int ft_system_setup(void *blob, struct bd_info *bd)
 		 * under CONFIG_STM32MP15x_STM32IMAGE only for compatibility
 		 * when FIP is not used by TF-A
 		 */
-		if (CONFIG_IS_ENABLED(STM32MP15x_STM32IMAGE) &&
+		if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE) &&
 		    !tee_find_device(NULL, NULL, NULL, NULL))
 			stm32_fdt_disable_optee(blob);
 	}
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 145/169] Correct SPL use of SUPPORT_EMMC_RPMB
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (63 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 144/169] Correct SPL use of STM32MP15X_STM32IMAGE Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-06  0:30   ` Jaehoon Chung
  2023-02-05 22:40 ` [PATCH v2 146/169] Correct SPL use of SYS_FSL_ERRATUM_A010539 Simon Glass
                   ` (4 subsequent siblings)
  69 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SUPPORT_EMMC_RPMB defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 drivers/mmc/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 3a664c2ebbb..3dc757108d5 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -46,7 +46,7 @@ obj-$(CONFIG_MMC_MXS)			+= mxsmmc.o
 obj-$(CONFIG_MMC_OCTEONTX)		+= octeontx_hsmmc.o
 obj-$(CONFIG_MMC_OWL)			+= owl_mmc.o
 obj-$(CONFIG_MMC_PCI)			+= pci_mmc.o
-obj-$(CONFIG_$(SPL_TPL_)SUPPORT_EMMC_RPMB) += rpmb.o
+obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o
 obj-$(CONFIG_MMC_SANDBOX)		+= sandbox_mmc.o
 obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
 obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 146/169] Correct SPL use of SYS_FSL_ERRATUM_A010539
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (64 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 145/169] Correct SPL use of SUPPORT_EMMC_RPMB Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 147/169] Correct SPL uses of SYS_LONGHELP Simon Glass
                   ` (3 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SYS_FSL_ERRATUM_A010539 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index b0e86785337..12d31184ad9 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -760,7 +760,7 @@ enum boot_src __get_boot_src(u32 porsr1)
 	}
 #endif
 
-	if (CONFIG_IS_ENABLED(SYS_FSL_ERRATUM_A010539) && !rcw_src)
+	if (IS_ENABLED(CONFIG_SYS_FSL_ERRATUM_A010539) && !rcw_src)
 		src = BOOT_SOURCE_QSPI_NOR;
 
 	debug("%s: src 0x%x\n", __func__, src);
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 147/169] Correct SPL uses of SYS_LONGHELP
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (65 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 146/169] Correct SPL use of SYS_FSL_ERRATUM_A010539 Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 148/169] Correct SPL use of SYS_MEM_RSVD_FOR_MMU Simon Glass
                   ` (2 subsequent siblings)
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 5 usages of this option to the non-SPL form, since there is
no SPL_SYS_LONGHELP defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 cmd/bootcount.c | 4 ++--
 cmd/cpu.c       | 2 +-
 cmd/dm.c        | 2 +-
 cmd/ti/pd.c     | 2 +-
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/cmd/bootcount.c b/cmd/bootcount.c
index 654bbb805c1..3898d2543d2 100644
--- a/cmd/bootcount.c
+++ b/cmd/bootcount.c
@@ -46,7 +46,7 @@ static int do_bootcount(struct cmd_tbl *cmdtp, int flag, int argc,
 	return CMD_RET_USAGE;
 }
 
-#if CONFIG_IS_ENABLED(SYS_LONGHELP)
+#if IS_ENABLED(CONFIG_SYS_LONGHELP)
 static char bootcount_help_text[] =
 	"print - print current bootcounter\n"
 	"reset - reset the bootcounter"
@@ -55,7 +55,7 @@ static char bootcount_help_text[] =
 
 U_BOOT_CMD(bootcount, 2, 1, do_bootcount,
 	   "bootcount",
-#if CONFIG_IS_ENABLED(SYS_LONGHELP)
+#if IS_ENABLED(CONFIG_SYS_LONGHELP)
 	   bootcount_help_text
 #endif
 );
diff --git a/cmd/cpu.c b/cmd/cpu.c
index a09736e1bb9..314852440f1 100644
--- a/cmd/cpu.c
+++ b/cmd/cpu.c
@@ -83,7 +83,7 @@ static int do_cpu_detail(struct cmd_tbl *cmdtp, int flag, int argc,
 	return 0;
 }
 
-#if CONFIG_IS_ENABLED(SYS_LONGHELP)
+#if IS_ENABLED(CONFIG_SYS_LONGHELP)
 static char cpu_help_text[] =
 	"list	- list available CPUs\n"
 	"cpu detail	- show CPU detail"
diff --git a/cmd/dm.c b/cmd/dm.c
index 979cd36061e..3263547cbec 100644
--- a/cmd/dm.c
+++ b/cmd/dm.c
@@ -84,7 +84,7 @@ static int do_dm_dump_uclass(struct cmd_tbl *cmdtp, int flag, int argc,
 #define DM_MEM
 #endif
 
-#if CONFIG_IS_ENABLED(SYS_LONGHELP)
+#if IS_ENABLED(CONFIG_SYS_LONGHELP)
 static char dm_help_text[] =
 	"compat        Dump list of drivers with compatibility strings\n"
 	"dm devres        Dump list of device resources for each device\n"
diff --git a/cmd/ti/pd.c b/cmd/ti/pd.c
index 008668fd903..a9a182fc386 100644
--- a/cmd/ti/pd.c
+++ b/cmd/ti/pd.c
@@ -177,7 +177,7 @@ static int ti_do_pd(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv
 
 U_BOOT_CMD(pd, 4, 1, ti_do_pd,
 	   "TI power domain control",
-#if CONFIG_IS_ENABLED(SYS_LONGHELP)
+#if IS_ENABLED(CONFIG_SYS_LONGHELP)
 	   "dump                 - show power domain status\n"
 	   "enable [psc] [lpsc]  - enable power domain\n"
 	   "disable [psc] [lpsc] - disable power domain\n"
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 148/169] Correct SPL use of SYS_MEM_RSVD_FOR_MMU
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (66 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 147/169] Correct SPL uses of SYS_LONGHELP Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:40 ` [PATCH v2 150/169] Correct SPL use of TARGET_MX6UL_9X9_EVK Simon Glass
  2023-02-05 22:41 ` [PATCH v2 151/169] Correct SPL use of TARGET_PG_WCOM_EXPU1 Simon Glass
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SYS_MEM_RSVD_FOR_MMU defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 board/xilinx/versal-net/board.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c
index 7ff2c620110..6724c7290f8 100644
--- a/board/xilinx/versal-net/board.c
+++ b/board/xilinx/versal-net/board.c
@@ -195,7 +195,7 @@ int dram_init(void)
 {
 	int ret;
 
-	if (CONFIG_IS_ENABLED(SYS_MEM_RSVD_FOR_MMU))
+	if (IS_ENABLED(CONFIG_SYS_MEM_RSVD_FOR_MMU))
 		ret = fdtdec_setup_mem_size_base();
 	else
 		ret = fdtdec_setup_mem_size_base_lowest();
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 150/169] Correct SPL use of TARGET_MX6UL_9X9_EVK
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (67 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 148/169] Correct SPL use of SYS_MEM_RSVD_FOR_MMU Simon Glass
@ 2023-02-05 22:40 ` Simon Glass
  2023-02-05 22:41 ` [PATCH v2 151/169] Correct SPL use of TARGET_PG_WCOM_EXPU1 Simon Glass
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:40 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_TARGET_MX6UL_9X9_EVK defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

(no changes since v1)

 include/configs/mx6ul_14x14_evk.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h
index 635ae78abcb..98b743b9364 100644
--- a/include/configs/mx6ul_14x14_evk.h
+++ b/include/configs/mx6ul_14x14_evk.h
@@ -13,7 +13,7 @@
 #include "mx6_common.h"
 #include <asm/mach-imx/gpio.h>
 
-#define is_mx6ul_9x9_evk()	CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)
+#define is_mx6ul_9x9_evk()	IS_ENABLED(CONFIG_TARGET_MX6UL_9X9_EVK)
 
 #define CFG_MXC_UART_BASE		UART1_BASE
 
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* [PATCH v2 151/169] Correct SPL use of TARGET_PG_WCOM_EXPU1
  2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
                   ` (68 preceding siblings ...)
  2023-02-05 22:40 ` [PATCH v2 150/169] Correct SPL use of TARGET_MX6UL_9X9_EVK Simon Glass
@ 2023-02-05 22:41 ` Simon Glass
  69 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-05 22:41 UTC (permalink / raw)
  To: U-Boot Mailing List; +Cc: Tom Rini, Simon Glass

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_TARGET_PG_WCOM_EXPU1 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
---

(no changes since v1)

 board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
index e005ece469b..c65cd9cdc9b 100644
--- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
+++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
@@ -79,7 +79,7 @@ int board_early_init_f(void)
 	qrio_wdmask(KM_PAXK_RST, true);
 #endif
 
-#if CONFIG_IS_ENABLED(TARGET_PG_WCOM_EXPU1)
+#if IS_ENABLED(CONFIG_TARGET_PG_WCOM_EXPU1)
 	qrio_prstcfg(WCOM_TMG_RST, PRSTCFG_POWUP_UNIT_RST);
 	qrio_wdmask(WCOM_TMG_RST, true);
 
-- 
2.39.1.519.gcb327c4b5f-goog


^ permalink raw reply related	[flat|nested] 111+ messages in thread

* RE: [PATCH v2 107/169] Correct SPL use of MMC_QUIRKS
  2023-02-05 22:40 ` [PATCH v2 107/169] Correct SPL use of MMC_QUIRKS Simon Glass
@ 2023-02-06  0:30   ` Jaehoon Chung
  2023-02-09 21:32   ` Tom Rini
  1 sibling, 0 replies; 111+ messages in thread
From: Jaehoon Chung @ 2023-02-06  0:30 UTC (permalink / raw)
  To: 'Simon Glass', 'U-Boot Mailing List'; +Cc: 'Tom Rini'



> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Simon Glass
> Sent: Monday, February 6, 2023 7:40 AM
> To: U-Boot Mailing List <u-boot@lists.denx.de>
> Cc: Tom Rini <trini@konsulko.com>; Simon Glass <sjg@chromium.org>
> Subject: [PATCH v2 107/169] Correct SPL use of MMC_QUIRKS
> 
> This converts 1 usage of this option to the non-SPL form, since there is
> no SPL_MMC_QUIRKS defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>

Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

Best Regards,
Jaehoon Chung

> ---
> 
> (no changes since v1)
> 
>  drivers/mmc/mmc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
> index 210703ea46b..fd4aa946e2a 100644
> --- a/drivers/mmc/mmc.c
> +++ b/drivers/mmc/mmc.c
> @@ -247,7 +247,7 @@ static int mmc_send_cmd_retry(struct mmc *mmc, struct mmc_cmd *cmd,
>  static int mmc_send_cmd_quirks(struct mmc *mmc, struct mmc_cmd *cmd,
>  			       struct mmc_data *data, u32 quirk, uint retries)
>  {
> -	if (CONFIG_IS_ENABLED(MMC_QUIRKS) && mmc->quirks & quirk)
> +	if (IS_ENABLED(CONFIG_MMC_QUIRKS) && mmc->quirks & quirk)
>  		return mmc_send_cmd_retry(mmc, cmd, data, retries);
>  	else
>  		return mmc_send_cmd(mmc, cmd, data);
> --
> 2.39.1.519.gcb327c4b5f-goog



^ permalink raw reply	[flat|nested] 111+ messages in thread

* RE: [PATCH v2 145/169] Correct SPL use of SUPPORT_EMMC_RPMB
  2023-02-05 22:40 ` [PATCH v2 145/169] Correct SPL use of SUPPORT_EMMC_RPMB Simon Glass
@ 2023-02-06  0:30   ` Jaehoon Chung
  0 siblings, 0 replies; 111+ messages in thread
From: Jaehoon Chung @ 2023-02-06  0:30 UTC (permalink / raw)
  To: 'Simon Glass', 'U-Boot Mailing List'; +Cc: 'Tom Rini'



> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Simon Glass
> Sent: Monday, February 6, 2023 7:41 AM
> To: U-Boot Mailing List <u-boot@lists.denx.de>
> Cc: Tom Rini <trini@konsulko.com>; Simon Glass <sjg@chromium.org>
> Subject: [PATCH v2 145/169] Correct SPL use of SUPPORT_EMMC_RPMB
> 
> This converts 1 usage of this option to the non-SPL form, since there is
> no SPL_SUPPORT_EMMC_RPMB defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>

Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

Best Regards,
Jaehoon Chung

> ---
> 
> (no changes since v1)
> 
>  drivers/mmc/Makefile | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
> index 3a664c2ebbb..3dc757108d5 100644
> --- a/drivers/mmc/Makefile
> +++ b/drivers/mmc/Makefile
> @@ -46,7 +46,7 @@ obj-$(CONFIG_MMC_MXS)			+= mxsmmc.o
>  obj-$(CONFIG_MMC_OCTEONTX)		+= octeontx_hsmmc.o
>  obj-$(CONFIG_MMC_OWL)			+= owl_mmc.o
>  obj-$(CONFIG_MMC_PCI)			+= pci_mmc.o
> -obj-$(CONFIG_$(SPL_TPL_)SUPPORT_EMMC_RPMB) += rpmb.o
> +obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o
>  obj-$(CONFIG_MMC_SANDBOX)		+= sandbox_mmc.o
>  obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
>  obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
> --
> 2.39.1.519.gcb327c4b5f-goog



^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 078/169] Correct SPL use of EFI_UNICODE_COLLATION_PROTOCOL2
  2023-02-05 22:39 ` [PATCH v2 078/169] Correct SPL use of EFI_UNICODE_COLLATION_PROTOCOL2 Simon Glass
@ 2023-02-06 23:36   ` Heinrich Schuchardt
  2023-02-06 23:38     ` Tom Rini
  0 siblings, 1 reply; 111+ messages in thread
From: Heinrich Schuchardt @ 2023-02-06 23:36 UTC (permalink / raw)
  To: Simon Glass; +Cc: Tom Rini, U-Boot Mailing List

On 2/5/23 23:39, Simon Glass wrote:
> This converts 1 usage of this option to the non-SPL form, since there is
> no SPL_EFI_UNICODE_COLLATION_PROTOCOL2 defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
> 
> (no changes since v1)
> 
>   lib/efi_loader/efi_root_node.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/lib/efi_loader/efi_root_node.c b/lib/efi_loader/efi_root_node.c
> index 21a014d7c21..108c14b95bd 100644
> --- a/lib/efi_loader/efi_root_node.c
> +++ b/lib/efi_loader/efi_root_node.c
> @@ -68,7 +68,7 @@ efi_status_t efi_root_node_register(void)
>   		 &efi_guid_dt_fixup_protocol,
>   		 &efi_dt_fixup_prot,
>   #endif
> -#if CONFIG_IS_ENABLED(EFI_UNICODE_COLLATION_PROTOCOL2)
> +#if IS_ENABLED(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2)

I never received this patch in my inbox. Expect series with more than 50 
mails not even to be copied to the spam folder. They are outright 
rejected by my mail provider.

I cannot see any problem solved by this patch. Why did you send it?

Best regards

Heinrich

>   		 &efi_guid_unicode_collation_protocol2,
>   		 &efi_unicode_collation_protocol2,
>   #endif

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 078/169] Correct SPL use of EFI_UNICODE_COLLATION_PROTOCOL2
  2023-02-06 23:36   ` Heinrich Schuchardt
@ 2023-02-06 23:38     ` Tom Rini
  2023-02-07  1:24       ` Heinrich Schuchardt
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-06 23:38 UTC (permalink / raw)
  To: Heinrich Schuchardt; +Cc: Simon Glass, U-Boot Mailing List

[-- Attachment #1: Type: text/plain, Size: 1319 bytes --]

On Tue, Feb 07, 2023 at 12:36:51AM +0100, Heinrich Schuchardt wrote:
> On 2/5/23 23:39, Simon Glass wrote:
> > This converts 1 usage of this option to the non-SPL form, since there is
> > no SPL_EFI_UNICODE_COLLATION_PROTOCOL2 defined in Kconfig
> > 
> > Signed-off-by: Simon Glass <sjg@chromium.org>
> > ---
> > 
> > (no changes since v1)
> > 
> >   lib/efi_loader/efi_root_node.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/lib/efi_loader/efi_root_node.c b/lib/efi_loader/efi_root_node.c
> > index 21a014d7c21..108c14b95bd 100644
> > --- a/lib/efi_loader/efi_root_node.c
> > +++ b/lib/efi_loader/efi_root_node.c
> > @@ -68,7 +68,7 @@ efi_status_t efi_root_node_register(void)
> >   		 &efi_guid_dt_fixup_protocol,
> >   		 &efi_dt_fixup_prot,
> >   #endif
> > -#if CONFIG_IS_ENABLED(EFI_UNICODE_COLLATION_PROTOCOL2)
> > +#if IS_ENABLED(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2)
> 
> I never received this patch in my inbox. Expect series with more than 50
> mails not even to be copied to the spam folder. They are outright rejected
> by my mail provider.
> 
> I cannot see any problem solved by this patch. Why did you send it?

You should look in to setting up lei to fetch the list then, as this is
well explained in the cover letter.

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 659 bytes --]

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 077/169] Correct SPL use of EFI_TCG2_PROTOCOL
  2023-02-05 22:39 ` [PATCH v2 077/169] Correct SPL use of EFI_TCG2_PROTOCOL Simon Glass
@ 2023-02-06 23:41   ` Heinrich Schuchardt
  2023-02-07  4:02     ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Heinrich Schuchardt @ 2023-02-06 23:41 UTC (permalink / raw)
  To: Simon Glass; +Cc: Tom Rini, U-Boot Mailing List



On 2/5/23 23:39, Simon Glass wrote:
> This converts 1 usage of this option to the non-SPL form, since there is
> no SPL_EFI_TCG2_PROTOCOL defined in Kconfig

Why do you touch the code? I can't see any problem being solved.

Best regards

Heinrich

> 
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
> 
> (no changes since v1)
> 
>   lib/efi_loader/efi_image_loader.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c
> index eaf75a5803d..26df0da16c9 100644
> --- a/lib/efi_loader/efi_image_loader.c
> +++ b/lib/efi_loader/efi_image_loader.c
> @@ -938,7 +938,7 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle,
>   		goto err;
>   	}
>   
> -#if CONFIG_IS_ENABLED(EFI_TCG2_PROTOCOL)
> +#if IS_ENABLED(CONFIG_EFI_TCG2_PROTOCOL)
>   	/* Measure an PE/COFF image */
>   	ret = tcg2_measure_pe_image(efi, efi_size, handle, loaded_image_info);
>   	if (ret == EFI_SECURITY_VIOLATION) {

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 078/169] Correct SPL use of EFI_UNICODE_COLLATION_PROTOCOL2
  2023-02-06 23:38     ` Tom Rini
@ 2023-02-07  1:24       ` Heinrich Schuchardt
  2023-02-07  1:36         ` Tom Rini
  0 siblings, 1 reply; 111+ messages in thread
From: Heinrich Schuchardt @ 2023-02-07  1:24 UTC (permalink / raw)
  To: Tom Rini; +Cc: Simon Glass, U-Boot Mailing List



On 2/7/23 00:38, Tom Rini wrote:
> On Tue, Feb 07, 2023 at 12:36:51AM +0100, Heinrich Schuchardt wrote:
>> On 2/5/23 23:39, Simon Glass wrote:
>>> This converts 1 usage of this option to the non-SPL form, since there is
>>> no SPL_EFI_UNICODE_COLLATION_PROTOCOL2 defined in Kconfig
>>>
>>> Signed-off-by: Simon Glass <sjg@chromium.org>
>>> ---
>>>
>>> (no changes since v1)
>>>
>>>    lib/efi_loader/efi_root_node.c | 2 +-
>>>    1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/lib/efi_loader/efi_root_node.c b/lib/efi_loader/efi_root_node.c
>>> index 21a014d7c21..108c14b95bd 100644
>>> --- a/lib/efi_loader/efi_root_node.c
>>> +++ b/lib/efi_loader/efi_root_node.c
>>> @@ -68,7 +68,7 @@ efi_status_t efi_root_node_register(void)
>>>    		 &efi_guid_dt_fixup_protocol,
>>>    		 &efi_dt_fixup_prot,
>>>    #endif
>>> -#if CONFIG_IS_ENABLED(EFI_UNICODE_COLLATION_PROTOCOL2)
>>> +#if IS_ENABLED(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2)
>>
>> I never received this patch in my inbox. Expect series with more than 50
>> mails not even to be copied to the spam folder. They are outright rejected
>> by my mail provider.
>>
>> I cannot see any problem solved by this patch. Why did you send it?
> 
> You should look in to setting up lei to fetch the list then, as this is
> well explained in the cover letter.

lei = circle of flowers is what I find in a dictionary. Do I miss an 
idiomatic expression?

The cover letter describes an observation but does not point out any 
problem relating to this observation.

We don't have a CONFIG_SPL_EFI_LOADER. In vsnprintf_internal() we use 
CONFIG_IS_ENABLED(EFI_LOADER). The code inside the #if condition is not 
compiled in SPL. This is the desired behavior.

How is moveconfig meant to accept this?

Is anything wrong about this use of CONFIG_IS_ENABLED(EFI_LOADER)?

What is the reasoning behind wanting to use CONFIG_IS_ENABLED() only if 
an SPL config option exists?

Where is the documentation change describing that CONFIG_IS_ENABLED() 
should only be used if an SPL config option exists?

Best regards

Heinrich

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 078/169] Correct SPL use of EFI_UNICODE_COLLATION_PROTOCOL2
  2023-02-07  1:24       ` Heinrich Schuchardt
@ 2023-02-07  1:36         ` Tom Rini
  2023-02-07  9:11           ` Heinrich Schuchardt
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-07  1:36 UTC (permalink / raw)
  To: Heinrich Schuchardt; +Cc: Simon Glass, U-Boot Mailing List

[-- Attachment #1: Type: text/plain, Size: 4185 bytes --]

On Tue, Feb 07, 2023 at 02:24:22AM +0100, Heinrich Schuchardt wrote:
> 
> 
> On 2/7/23 00:38, Tom Rini wrote:
> > On Tue, Feb 07, 2023 at 12:36:51AM +0100, Heinrich Schuchardt wrote:
> > > On 2/5/23 23:39, Simon Glass wrote:
> > > > This converts 1 usage of this option to the non-SPL form, since there is
> > > > no SPL_EFI_UNICODE_COLLATION_PROTOCOL2 defined in Kconfig
> > > > 
> > > > Signed-off-by: Simon Glass <sjg@chromium.org>
> > > > ---
> > > > 
> > > > (no changes since v1)
> > > > 
> > > >    lib/efi_loader/efi_root_node.c | 2 +-
> > > >    1 file changed, 1 insertion(+), 1 deletion(-)
> > > > 
> > > > diff --git a/lib/efi_loader/efi_root_node.c b/lib/efi_loader/efi_root_node.c
> > > > index 21a014d7c21..108c14b95bd 100644
> > > > --- a/lib/efi_loader/efi_root_node.c
> > > > +++ b/lib/efi_loader/efi_root_node.c
> > > > @@ -68,7 +68,7 @@ efi_status_t efi_root_node_register(void)
> > > >    		 &efi_guid_dt_fixup_protocol,
> > > >    		 &efi_dt_fixup_prot,
> > > >    #endif
> > > > -#if CONFIG_IS_ENABLED(EFI_UNICODE_COLLATION_PROTOCOL2)
> > > > +#if IS_ENABLED(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2)
> > > 
> > > I never received this patch in my inbox. Expect series with more than 50
> > > mails not even to be copied to the spam folder. They are outright rejected
> > > by my mail provider.
> > > 
> > > I cannot see any problem solved by this patch. Why did you send it?
> > 
> > You should look in to setting up lei to fetch the list then, as this is
> > well explained in the cover letter.
> 
> lei = circle of flowers is what I find in a dictionary. Do I miss an
> idiomatic expression?

Yes, https://public-inbox.org/lei.html is a tool widely used in the
kernel community, and also works for U-Boot as we're mirrored on
lore.kernel.org. In short, it's what I'm using to download the mailing
list now, without Google screwing up and putting some messages in the
spam folder and then I miss them. Also nice when U-Boot gets cc'd on
something later and it'll just pull the whole thread in from the other
lists for me, for context.

> The cover letter describes an observation but does not point out any problem
> relating to this observation.
[snip to reorder]
> 
> Is anything wrong about this use of CONFIG_IS_ENABLED(EFI_LOADER)?
> 
> What is the reasoning behind wanting to use CONFIG_IS_ENABLED() only if an
> SPL config option exists?

We have two macros, IS_ENABLED(CONFIG_FOO) and CONFIG_IS_ENABLED(FOO).
The case where we use CONFIG_IS_ENABLED(FOO) and CONFIG_SPL_FOO (or
_TPL_ or _VPL_) is not a valid symbol AND it makes sense to use
CONFIG_IS_ENABLED(FOO) because we need to have the test evaluate to
false because IS_ENABLED(CONFIG_FOO) would be true but we can rely on
CONFIG_SPL_FOO being false due to being undefined is, on the whole, very
rare. In specifics however, code supporting the EFI loader subsystem
makes use of this because as for example yes, we modify printf related
code. So that needs to be tested with CONFIG_IS_ENABLED(). However, in
the example here never will we ever build lib/efi_loader/efi_root_node.c
outside of the main U-Boot case, so we should be testing via
IS_ENABLED().

[paste to re-order]
> We don't have a CONFIG_SPL_EFI_LOADER. In vsnprintf_internal() we use
> CONFIG_IS_ENABLED(EFI_LOADER). The code inside the #if condition is not
> compiled in SPL. This is the desired behavior.
> 
> How is moveconfig meant to accept this?
[back in order]
> Where is the documentation change describing that CONFIG_IS_ENABLED() should
> only be used if an SPL config option exists?

Yes, in the final related series that moves to a "split config" build.
And if what's in there isn't enough, that series should get more. That's
where CONFIG_IS_ENABLED(EFI_LOADER) in the vsprintf could would be
handled because that series is where Simon removes CONFIG_IS_ENABLED(),
adds more SPL_FOO def_bool n options, and moves to IS_ENABLED() for
everything. And that series is still under discussion.

However, the vast majority if CONFIG_IS_ENABLED(FOO) where SPL_FOO, etc,
are never defined should be using IS_ENABLED(CONFIG_FOO).

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 077/169] Correct SPL use of EFI_TCG2_PROTOCOL
  2023-02-06 23:41   ` Heinrich Schuchardt
@ 2023-02-07  4:02     ` Simon Glass
  2023-02-07  8:40       ` Heinrich Schuchardt
  0 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-07  4:02 UTC (permalink / raw)
  To: Heinrich Schuchardt; +Cc: Tom Rini, U-Boot Mailing List

Hi Heinrich,

On Mon, 6 Feb 2023 at 16:41, Heinrich Schuchardt
<heinrich.schuchardt@canonical.com> wrote:
>
>
>
> On 2/5/23 23:39, Simon Glass wrote:
> > This converts 1 usage of this option to the non-SPL form, since there is
> > no SPL_EFI_TCG2_PROTOCOL defined in Kconfig
>
> Why do you touch the code? I can't see any problem being solved.

CONFIG_IS_ENABLED() is going away, so we need to migrate things that
should not be using it. I understand that EFI is not used in SPL, so
it is also redundant.

Regards,
Simon

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 077/169] Correct SPL use of EFI_TCG2_PROTOCOL
  2023-02-07  4:02     ` Simon Glass
@ 2023-02-07  8:40       ` Heinrich Schuchardt
  2023-02-07 13:38         ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Heinrich Schuchardt @ 2023-02-07  8:40 UTC (permalink / raw)
  To: Simon Glass; +Cc: Tom Rini, U-Boot Mailing List

On 2/7/23 05:02, Simon Glass wrote:
> Hi Heinrich,
> 
> On Mon, 6 Feb 2023 at 16:41, Heinrich Schuchardt
> <heinrich.schuchardt@canonical.com> wrote:
>>
>>
>>
>> On 2/5/23 23:39, Simon Glass wrote:
>>> This converts 1 usage of this option to the non-SPL form, since there is
>>> no SPL_EFI_TCG2_PROTOCOL defined in Kconfig
>>
>> Why do you touch the code? I can't see any problem being solved.
> 
> CONFIG_IS_ENABLED() is going away, so we need to migrate things that
> should not be using it. I understand that EFI is not used in SPL, so
> it is also redundant.
> 

Neither the cover letter of this series nor the commit message of this 
patch says that CONFIG_IS_ENABLED() is going away.

Both the cover letter and the commit message of the individual patches 
should clearly indicate this intention.

Why do you want to eliminate CONFIG_IS_ENABLED()? What is going to 
replace it?

Best regards

Heinrich


^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 078/169] Correct SPL use of EFI_UNICODE_COLLATION_PROTOCOL2
  2023-02-07  1:36         ` Tom Rini
@ 2023-02-07  9:11           ` Heinrich Schuchardt
  0 siblings, 0 replies; 111+ messages in thread
From: Heinrich Schuchardt @ 2023-02-07  9:11 UTC (permalink / raw)
  To: Tom Rini; +Cc: Simon Glass, U-Boot Mailing List

On 2/7/23 02:36, Tom Rini wrote:
> On Tue, Feb 07, 2023 at 02:24:22AM +0100, Heinrich Schuchardt wrote:
>>
>>
>> On 2/7/23 00:38, Tom Rini wrote:
>>> On Tue, Feb 07, 2023 at 12:36:51AM +0100, Heinrich Schuchardt wrote:
>>>> On 2/5/23 23:39, Simon Glass wrote:
>>>>> This converts 1 usage of this option to the non-SPL form, since there is
>>>>> no SPL_EFI_UNICODE_COLLATION_PROTOCOL2 defined in Kconfig
>>>>>
>>>>> Signed-off-by: Simon Glass <sjg@chromium.org>
>>>>> ---
>>>>>
>>>>> (no changes since v1)
>>>>>
>>>>>     lib/efi_loader/efi_root_node.c | 2 +-
>>>>>     1 file changed, 1 insertion(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/lib/efi_loader/efi_root_node.c b/lib/efi_loader/efi_root_node.c
>>>>> index 21a014d7c21..108c14b95bd 100644
>>>>> --- a/lib/efi_loader/efi_root_node.c
>>>>> +++ b/lib/efi_loader/efi_root_node.c
>>>>> @@ -68,7 +68,7 @@ efi_status_t efi_root_node_register(void)
>>>>>     		 &efi_guid_dt_fixup_protocol,
>>>>>     		 &efi_dt_fixup_prot,
>>>>>     #endif
>>>>> -#if CONFIG_IS_ENABLED(EFI_UNICODE_COLLATION_PROTOCOL2)
>>>>> +#if IS_ENABLED(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2)
>>>>
>>>> I never received this patch in my inbox. Expect series with more than 50
>>>> mails not even to be copied to the spam folder. They are outright rejected
>>>> by my mail provider.
>>>>
>>>> I cannot see any problem solved by this patch. Why did you send it?
>>>
>>> You should look in to setting up lei to fetch the list then, as this is
>>> well explained in the cover letter.
>>
>> lei = circle of flowers is what I find in a dictionary. Do I miss an
>> idiomatic expression?
> 
> Yes, https://public-inbox.org/lei.html is a tool widely used in the
> kernel community, and also works for U-Boot as we're mirrored on
> lore.kernel.org. In short, it's what I'm using to download the mailing
> list now, without Google screwing up and putting some messages in the
> spam folder and then I miss them. Also nice when U-Boot gets cc'd on
> something later and it'll just pull the whole thread in from the other
> lists for me, for context.
> 
>> The cover letter describes an observation but does not point out any problem
>> relating to this observation.
> [snip to reorder]
>>
>> Is anything wrong about this use of CONFIG_IS_ENABLED(EFI_LOADER)?
>>
>> What is the reasoning behind wanting to use CONFIG_IS_ENABLED() only if an
>> SPL config option exists?
> 
> We have two macros, IS_ENABLED(CONFIG_FOO) and CONFIG_IS_ENABLED(FOO).
> The case where we use CONFIG_IS_ENABLED(FOO) and CONFIG_SPL_FOO (or
> _TPL_ or _VPL_) is not a valid symbol AND it makes sense to use
> CONFIG_IS_ENABLED(FOO) because we need to have the test evaluate to
> false because IS_ENABLED(CONFIG_FOO) would be true but we can rely on
> CONFIG_SPL_FOO being false due to being undefined is, on the whole, very
> rare. In specifics however, code supporting the EFI loader subsystem
> makes use of this because as for example yes, we modify printf related
> code. So that needs to be tested with CONFIG_IS_ENABLED(). However, in
> the example here never will we ever build lib/efi_loader/efi_root_node.c
> outside of the main U-Boot case, so we should be testing via
> IS_ENABLED().
> 
> [paste to re-order]
>> We don't have a CONFIG_SPL_EFI_LOADER. In vsnprintf_internal() we use
>> CONFIG_IS_ENABLED(EFI_LOADER). The code inside the #if condition is not
>> compiled in SPL. This is the desired behavior.
>>
>> How is moveconfig meant to accept this?
> [back in order]
>> Where is the documentation change describing that CONFIG_IS_ENABLED() should
>> only be used if an SPL config option exists?
> 
> Yes, in the final related series that moves to a "split config" build.

No related series was mentioned in the cover-letter.
Which series do you relate to?

> And if what's in there isn't enough, that series should get more. That's
> where CONFIG_IS_ENABLED(EFI_LOADER) in the vsprintf could would be

If the target is to remove CONFIG_IS_ENABLED() I would expect this 
mentioned in the individual commit messages so that we get this 
information into the git log.

Furthermore the reasoning behind eliminating CONFIG_IS_ENABLED() should 
be mentioned in the cover-letter.

Best regards

Heinrich

> handled because that series is where Simon removes CONFIG_IS_ENABLED(),
> adds more SPL_FOO def_bool n options, and moves to IS_ENABLED() for
> everything. And that series is still under discussion.
> 
> However, the vast majority if CONFIG_IS_ENABLED(FOO) where SPL_FOO, etc,
> are never defined should be using IS_ENABLED(CONFIG_FOO).
> 



^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 077/169] Correct SPL use of EFI_TCG2_PROTOCOL
  2023-02-07  8:40       ` Heinrich Schuchardt
@ 2023-02-07 13:38         ` Simon Glass
  0 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-07 13:38 UTC (permalink / raw)
  To: Heinrich Schuchardt; +Cc: Tom Rini, U-Boot Mailing List

Hi Heinrich,

On Tue, 7 Feb 2023 at 01:40, Heinrich Schuchardt
<heinrich.schuchardt@canonical.com> wrote:
>
> On 2/7/23 05:02, Simon Glass wrote:
> > Hi Heinrich,
> >
> > On Mon, 6 Feb 2023 at 16:41, Heinrich Schuchardt
> > <heinrich.schuchardt@canonical.com> wrote:
> >>
> >>
> >>
> >> On 2/5/23 23:39, Simon Glass wrote:
> >>> This converts 1 usage of this option to the non-SPL form, since there is
> >>> no SPL_EFI_TCG2_PROTOCOL defined in Kconfig
> >>
> >> Why do you touch the code? I can't see any problem being solved.
> >
> > CONFIG_IS_ENABLED() is going away, so we need to migrate things that
> > should not be using it. I understand that EFI is not used in SPL, so
> > it is also redundant.
> >
>
> Neither the cover letter of this series nor the commit message of this
> patch says that CONFIG_IS_ENABLED() is going away.
>
> Both the cover letter and the commit message of the individual patches
> should clearly indicate this intention.
>
> Why do you want to eliminate CONFIG_IS_ENABLED()? What is going to
> replace it?

Please see the comments here:

https://patchwork.ozlabs.org/project/uboot/cover/20230206190550.1692420-1-sjg@chromium.org/

This work is happening in three different series:

u-boot-dm/spla-working - ensures that Kconfig options mentioned in the
source code actually exist in Kconfig
u-boot-dm/splb-working - drops use of CONFIG_IS_ENABLED() where it is
not necessary
u-boot-dm/splc-working - adds SPL Kconfigs which are referred to in
the source; converts to a split config

Fundamentally it is about having CONFIG_FOO mean the same thing in all
builds (U-Boot proper, SPL, etc.): FOO is enabled in this build. It
means we can drop the SPL_TPL_ macro and also the use of
CONFIG_IS_ENABLED().

This discussion has been going on for many years. Unfortunately it is
extremely difficult to achieve. What started off as 30 patches and
turned into a lot...

Regards,
Simon

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 124/169] Correct SPL use of PHY_CADENCE_TORRENT
  2023-02-05 22:40 ` [PATCH v2 124/169] Correct SPL use of PHY_CADENCE_TORRENT Simon Glass
@ 2023-02-09  0:39   ` Tom Rini
  2023-02-12 23:14     ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-09  0:39 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

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On Sun, Feb 05, 2023 at 03:40:33PM -0700, Simon Glass wrote:

> This converts 1 usage of this option to the non-SPL form, since there is
> no SPL_PHY_CADENCE_TORRENT defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
> 
> (no changes since v1)
> 
>  drivers/phy/cadence/Makefile | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/phy/cadence/Makefile b/drivers/phy/cadence/Makefile
> index c247feb8262..a1cb6868c9e 100644
> --- a/drivers/phy/cadence/Makefile
> +++ b/drivers/phy/cadence/Makefile
> @@ -1,2 +1,2 @@
>  obj-$(CONFIG_PHY_CADENCE_SIERRA)	+= phy-cadence-sierra.o
> -obj-$(CONFIG_$(SPL_)PHY_CADENCE_TORRENT) += phy-cadence-torrent.o
> +obj-$(CONFIG_PHY_CADENCE_TORRENT) += phy-cadence-torrent.o

This is a size increase on j7200_evm_a72 where we do not want this PHY
in SPL. And FWIW, the sierra one is the same case, on other TI K3
platforms.

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 068/169] Correct SPL use of DM_RNG
  2023-02-05 22:39 ` [PATCH v2 068/169] Correct SPL use of DM_RNG Simon Glass
@ 2023-02-09  0:40   ` Tom Rini
  2023-02-09  1:08     ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-09  0:40 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

[-- Attachment #1: Type: text/plain, Size: 817 bytes --]

On Sun, Feb 05, 2023 at 03:39:37PM -0700, Simon Glass wrote:

> This converts 1 usage of this option to the non-SPL form, since there is
> no SPL_DM_RNG defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
> 
> (no changes since v1)
> 
>  boot/vbe_request.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/boot/vbe_request.c b/boot/vbe_request.c
> index 45f1d2b7e17..312edfa2bdb 100644
> --- a/boot/vbe_request.c
> +++ b/boot/vbe_request.c
> @@ -36,7 +36,7 @@ static int handle_random_req(ofnode node, int default_size,
>  	u32 size;
>  	int ret;
>  
> -	if (!CONFIG_IS_ENABLED(DM_RNG))
> +	if (!IS_ENABLED(CONFIG_DM_RNG))
>  		return -ENOTSUPP;
>  
>  	if (ofnode_read_u32(node, "vbe,size", &size)) {

This breaks sandbox_vpl.

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 068/169] Correct SPL use of DM_RNG
  2023-02-09  0:40   ` Tom Rini
@ 2023-02-09  1:08     ` Simon Glass
  2023-02-09  1:10       ` Tom Rini
  0 siblings, 1 reply; 111+ messages in thread
From: Simon Glass @ 2023-02-09  1:08 UTC (permalink / raw)
  To: Tom Rini; +Cc: U-Boot Mailing List

Hi Tom,

On Wed, 8 Feb 2023 at 17:40, Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, Feb 05, 2023 at 03:39:37PM -0700, Simon Glass wrote:
>
> > This converts 1 usage of this option to the non-SPL form, since there is
> > no SPL_DM_RNG defined in Kconfig
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
> > ---
> >
> > (no changes since v1)
> >
> >  boot/vbe_request.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/boot/vbe_request.c b/boot/vbe_request.c
> > index 45f1d2b7e17..312edfa2bdb 100644
> > --- a/boot/vbe_request.c
> > +++ b/boot/vbe_request.c
> > @@ -36,7 +36,7 @@ static int handle_random_req(ofnode node, int default_size,
> >       u32 size;
> >       int ret;
> >
> > -     if (!CONFIG_IS_ENABLED(DM_RNG))
> > +     if (!IS_ENABLED(CONFIG_DM_RNG))
> >               return -ENOTSUPP;
> >
> >       if (ofnode_read_u32(node, "vbe,size", &size)) {
>
> This breaks sandbox_vpl.

Yes I think I mentioned that this needs dropping for ordering reasons.
I've moved it into splc.

Regards,
Simon

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 091/169] Correct SPL uses of FSL_ISBC_KEY_EXT
  2023-02-05 22:40 ` [PATCH v2 091/169] Correct SPL uses of FSL_ISBC_KEY_EXT Simon Glass
@ 2023-02-09  1:09   ` Tom Rini
  2023-02-12 23:14     ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-09  1:09 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

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On Sun, Feb 05, 2023 at 03:40:00PM -0700, Simon Glass wrote:

> This converts 9 usages of this option to the non-SPL form, since there is
> no SPL_FSL_ISBC_KEY_EXT defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>

This is used to avoid including things in SPL that aren't required,
in commit 3a581af21af0 ("Convert CONFIG_FLASH_SPANSION_S29WS_N et al to
Kconfig") it shows why this is an example of CONFIG_IS_ENABLED() for
this case.

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 068/169] Correct SPL use of DM_RNG
  2023-02-09  1:08     ` Simon Glass
@ 2023-02-09  1:10       ` Tom Rini
  0 siblings, 0 replies; 111+ messages in thread
From: Tom Rini @ 2023-02-09  1:10 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

[-- Attachment #1: Type: text/plain, Size: 1222 bytes --]

On Wed, Feb 08, 2023 at 06:08:11PM -0700, Simon Glass wrote:
> Hi Tom,
> 
> On Wed, 8 Feb 2023 at 17:40, Tom Rini <trini@konsulko.com> wrote:
> >
> > On Sun, Feb 05, 2023 at 03:39:37PM -0700, Simon Glass wrote:
> >
> > > This converts 1 usage of this option to the non-SPL form, since there is
> > > no SPL_DM_RNG defined in Kconfig
> > >
> > > Signed-off-by: Simon Glass <sjg@chromium.org>
> > > ---
> > >
> > > (no changes since v1)
> > >
> > >  boot/vbe_request.c | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/boot/vbe_request.c b/boot/vbe_request.c
> > > index 45f1d2b7e17..312edfa2bdb 100644
> > > --- a/boot/vbe_request.c
> > > +++ b/boot/vbe_request.c
> > > @@ -36,7 +36,7 @@ static int handle_random_req(ofnode node, int default_size,
> > >       u32 size;
> > >       int ret;
> > >
> > > -     if (!CONFIG_IS_ENABLED(DM_RNG))
> > > +     if (!IS_ENABLED(CONFIG_DM_RNG))
> > >               return -ENOTSUPP;
> > >
> > >       if (ofnode_read_u32(node, "vbe,size", &size)) {
> >
> > This breaks sandbox_vpl.
> 
> Yes I think I mentioned that this needs dropping for ordering reasons.
> I've moved it into splc.

OK, thanks.

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 096/169] Correct SPL uses of GMAC_ROCKCHIP
  2023-02-05 22:40 ` [PATCH v2 096/169] Correct SPL uses of GMAC_ROCKCHIP Simon Glass
@ 2023-02-09  1:51   ` Tom Rini
  2023-02-12 23:14     ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-09  1:51 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

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On Sun, Feb 05, 2023 at 03:40:05PM -0700, Simon Glass wrote:

> This converts 2 usages of this option to the non-SPL form, since there is
> no SPL_GMAC_ROCKCHIP defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>

This is used to avoid code in SPL/TPL on these platforms.

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 112/169] Correct SPL uses of NXP_FSPI
  2023-02-05 22:40 ` [PATCH v2 112/169] Correct SPL uses of NXP_FSPI Simon Glass
@ 2023-02-09  2:04   ` Tom Rini
  2023-02-12 23:14     ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-09  2:04 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

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On Sun, Feb 05, 2023 at 03:40:21PM -0700, Simon Glass wrote:

> This converts 2 usages of this option to the non-SPL form, since there is
> no SPL_NXP_FSPI defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>

This is used to avoid code in SPL.

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 103/169] Correct SPL uses of IMX_RDC
  2023-02-05 22:40 ` [PATCH v2 103/169] Correct SPL uses of IMX_RDC Simon Glass
@ 2023-02-09  2:39   ` Tom Rini
  2023-02-12 23:14     ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-09  2:39 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

[-- Attachment #1: Type: text/plain, Size: 299 bytes --]

On Sun, Feb 05, 2023 at 03:40:12PM -0700, Simon Glass wrote:

> This converts 2 usages of this option to the non-SPL form, since there is
> no SPL_IMX_RDC defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>

This is used to avoid the code in SPL in some cases.

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 095/169] Correct SPL use of GENERATE_SMBIOS_TABLE
  2023-02-05 22:40 ` [PATCH v2 095/169] Correct SPL use of GENERATE_SMBIOS_TABLE Simon Glass
@ 2023-02-09  2:40   ` Tom Rini
  2023-02-12 23:14     ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-09  2:40 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

[-- Attachment #1: Type: text/plain, Size: 323 bytes --]

On Sun, Feb 05, 2023 at 03:40:04PM -0700, Simon Glass wrote:

> This converts 1 usage of this option to the non-SPL form, since there is
> no SPL_GENERATE_SMBIOS_TABLE defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>

This is used to avoid increasing the size of SPL in some cases.

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 109/169] Correct SPL uses of MULTIPLEXER
  2023-02-05 22:40 ` [PATCH v2 109/169] Correct SPL uses of MULTIPLEXER Simon Glass
@ 2023-02-09 15:56   ` Tom Rini
  2023-02-12 23:14     ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-09 15:56 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

[-- Attachment #1: Type: text/plain, Size: 729 bytes --]

On Sun, Feb 05, 2023 at 03:40:18PM -0700, Simon Glass wrote:

> This converts 3 usages of this option to the non-SPL form, since there is
> no SPL_MULTIPLEXER defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
> 
> (no changes since v1)
> 
>  drivers/Makefile     | 2 +-
>  drivers/mux/Makefile | 2 +-
>  include/mux.h        | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)

This is done so that we don't force multiplexer to be linked in to SPL,
as there is no SPL_MULTIPLEXER option. For a v2 of this patch, also move
the line down to the block of all of the other options that lack SPL_FOO
but that we guard with a check for not doing SPL/TPL builds, thanks.

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 064/169] Correct SPL uses of DFU_VIRT
  2023-02-05 22:39 ` [PATCH v2 064/169] Correct SPL uses of DFU_VIRT Simon Glass
@ 2023-02-09 17:49   ` Tom Rini
  2023-02-12 23:14     ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-09 17:49 UTC (permalink / raw)
  To: Simon Glass
  Cc: U-Boot Mailing List, Patrick Delaunay, Patrice Chotard, uboot-stm32

[-- Attachment #1: Type: text/plain, Size: 1909 bytes --]

On Sun, Feb 05, 2023 at 03:39:33PM -0700, Simon Glass wrote:
> This converts 3 usages of this option to the non-SPL form, since there is
> no SPL_DFU_VIRT defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
> 
> (no changes since v1)
> 
>  board/st/common/stm32mp_dfu.c | 2 +-
>  drivers/dfu/Makefile          | 2 +-
>  include/dfu.h                 | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
> index 0096f71dfc1..19e9c3b2402 100644
> --- a/board/st/common/stm32mp_dfu.c
> +++ b/board/st/common/stm32mp_dfu.c
> @@ -159,7 +159,7 @@ void set_dfu_alt_info(char *interface, char *devstr)
>  	puts("DFU alt info setting: done\n");
>  }
>  
> -#if CONFIG_IS_ENABLED(DFU_VIRT)
> +#if IS_ENABLED(CONFIG_DFU_VIRT)
>  #include <dfu.h>
>  #include <power/stpmic1.h>
>  
> diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile
> index dfbf64da667..df88f4be59a 100644
> --- a/drivers/dfu/Makefile
> +++ b/drivers/dfu/Makefile
> @@ -10,4 +10,4 @@ obj-$(CONFIG_$(SPL_)DFU_NAND) += dfu_nand.o
>  obj-$(CONFIG_$(SPL_)DFU_RAM) += dfu_ram.o
>  obj-$(CONFIG_$(SPL_)DFU_SF) += dfu_sf.o
>  obj-$(CONFIG_$(SPL_)DFU_WRITE_ALT) += dfu_alt.o
> -obj-$(CONFIG_$(SPL_)DFU_VIRT) += dfu_virt.o
> +obj-$(CONFIG_DFU_VIRT) += dfu_virt.o
> diff --git a/include/dfu.h b/include/dfu.h
> index 07922224ef1..06efbf4b208 100644
> --- a/include/dfu.h
> +++ b/include/dfu.h
> @@ -495,7 +495,7 @@ static inline int dfu_fill_entity_mtd(struct dfu_entity *dfu, char *devstr,
>  }
>  #endif
>  
> -#if CONFIG_IS_ENABLED(DFU_VIRT)
> +#if IS_ENABLED(CONFIG_DFU_VIRT)
>  int dfu_fill_entity_virt(struct dfu_entity *dfu, char *devstr,
>  			 char **argv, int argc);
>  int dfu_write_medium_virt(struct dfu_entity *dfu, u64 offset,

This is I believe an intentional usage.

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 107/169] Correct SPL use of MMC_QUIRKS
  2023-02-05 22:40 ` [PATCH v2 107/169] Correct SPL use of MMC_QUIRKS Simon Glass
  2023-02-06  0:30   ` Jaehoon Chung
@ 2023-02-09 21:32   ` Tom Rini
  1 sibling, 0 replies; 111+ messages in thread
From: Tom Rini @ 2023-02-09 21:32 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

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On Sun, Feb 05, 2023 at 03:40:16PM -0700, Simon Glass wrote:

> This converts 1 usage of this option to the non-SPL form, since there is
> no SPL_MMC_QUIRKS defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>
> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

Applied to u-boot/master, thanks!

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 119/169] Correct SPL use of PCI_PNP
  2023-02-05 22:40 ` [PATCH v2 119/169] Correct SPL use of PCI_PNP Simon Glass
@ 2023-02-09 23:34   ` Tom Rini
  2023-02-12 23:14     ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-09 23:34 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

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On Sun, Feb 05, 2023 at 03:40:28PM -0700, Simon Glass wrote:

> This converts 1 usage of this option to the non-SPL form, since there is
> no SPL_PCI_PNP defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>

On x86, this is used to avoid the code in SPL/TPL.

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 093/169] Correct SPL use of FSP_VERSION2
  2023-02-05 22:40 ` [PATCH v2 093/169] Correct SPL use of FSP_VERSION2 Simon Glass
@ 2023-02-10 12:41   ` Tom Rini
  2023-02-12 23:14     ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-10 12:41 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

[-- Attachment #1: Type: text/plain, Size: 305 bytes --]

On Sun, Feb 05, 2023 at 03:40:02PM -0700, Simon Glass wrote:

> This converts 1 usage of this option to the non-SPL form, since there is
> no SPL_FSP_VERSION2 defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>

This is used to avoid code on chromebook_coral in SPL.

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 099/169] Correct SPL uses of I8259_PIC
  2023-02-05 22:40 ` [PATCH v2 099/169] Correct SPL uses of I8259_PIC Simon Glass
@ 2023-02-10 12:41   ` Tom Rini
  2023-02-12 23:14     ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-10 12:41 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

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On Sun, Feb 05, 2023 at 03:40:08PM -0700, Simon Glass wrote:

> This converts 4 usages of this option to the non-SPL form, since there is
> no SPL_I8259_PIC defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>

This is used to avoid code in SPL.

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 127/169] Correct SPL use of QFW_PIO
  2023-02-05 22:40 ` [PATCH v2 127/169] Correct SPL use of QFW_PIO Simon Glass
@ 2023-02-10 12:41   ` Tom Rini
  2023-02-12 23:14     ` Simon Glass
  0 siblings, 1 reply; 111+ messages in thread
From: Tom Rini @ 2023-02-10 12:41 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

[-- Attachment #1: Type: text/plain, Size: 280 bytes --]

On Sun, Feb 05, 2023 at 03:40:36PM -0700, Simon Glass wrote:

> This converts 1 usage of this option to the non-SPL form, since there is
> no SPL_QFW_PIO defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>

This is used to avoid code in SPL.

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 076/169] Correct SPL use of EFI_SECURE_BOOT
  2023-02-05 22:39 ` [PATCH v2 076/169] Correct SPL use of EFI_SECURE_BOOT Simon Glass
@ 2023-02-10 18:43   ` Tom Rini
  0 siblings, 0 replies; 111+ messages in thread
From: Tom Rini @ 2023-02-10 18:43 UTC (permalink / raw)
  To: Simon Glass; +Cc: U-Boot Mailing List

[-- Attachment #1: Type: text/plain, Size: 335 bytes --]

On Sun, Feb 05, 2023 at 03:39:45PM -0700, Simon Glass wrote:

> This converts 1 usage of this option to the non-SPL form, since there is
> no SPL_EFI_SECURE_BOOT defined in Kconfig
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>

As I missed this, somehow, in the main branch, applied to u-boot/master,
thanks!

-- 
Tom

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^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 091/169] Correct SPL uses of FSL_ISBC_KEY_EXT
  2023-02-09  1:09   ` Tom Rini
@ 2023-02-12 23:14     ` Simon Glass
  0 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-12 23:14 UTC (permalink / raw)
  To: Tom Rini; +Cc: U-Boot Mailing List

Hi Tom,

On Wed, 8 Feb 2023 at 18:09, Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, Feb 05, 2023 at 03:40:00PM -0700, Simon Glass wrote:
>
> > This converts 9 usages of this option to the non-SPL form, since there is
> > no SPL_FSL_ISBC_KEY_EXT defined in Kconfig
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
>
> This is used to avoid including things in SPL that aren't required,
> in commit 3a581af21af0 ("Convert CONFIG_FLASH_SPANSION_S29WS_N et al to
> Kconfig") it shows why this is an example of CONFIG_IS_ENABLED() for
> this case.

I'll add this to config_nospl

Regards,
Simon

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 064/169] Correct SPL uses of DFU_VIRT
  2023-02-09 17:49   ` Tom Rini
@ 2023-02-12 23:14     ` Simon Glass
  0 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-12 23:14 UTC (permalink / raw)
  To: Tom Rini
  Cc: U-Boot Mailing List, Patrick Delaunay, Patrice Chotard, uboot-stm32

Hi Tom,

On Thu, 9 Feb 2023 at 10:50, Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, Feb 05, 2023 at 03:39:33PM -0700, Simon Glass wrote:
> > This converts 3 usages of this option to the non-SPL form, since there is
> > no SPL_DFU_VIRT defined in Kconfig
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
> > ---
> >
> > (no changes since v1)
> >
> >  board/st/common/stm32mp_dfu.c | 2 +-
> >  drivers/dfu/Makefile          | 2 +-
> >  include/dfu.h                 | 2 +-
> >  3 files changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
> > index 0096f71dfc1..19e9c3b2402 100644
> > --- a/board/st/common/stm32mp_dfu.c
> > +++ b/board/st/common/stm32mp_dfu.c
> > @@ -159,7 +159,7 @@ void set_dfu_alt_info(char *interface, char *devstr)
> >       puts("DFU alt info setting: done\n");
> >  }
> >
> > -#if CONFIG_IS_ENABLED(DFU_VIRT)
> > +#if IS_ENABLED(CONFIG_DFU_VIRT)
> >  #include <dfu.h>
> >  #include <power/stpmic1.h>
> >
> > diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile
> > index dfbf64da667..df88f4be59a 100644
> > --- a/drivers/dfu/Makefile
> > +++ b/drivers/dfu/Makefile
> > @@ -10,4 +10,4 @@ obj-$(CONFIG_$(SPL_)DFU_NAND) += dfu_nand.o
> >  obj-$(CONFIG_$(SPL_)DFU_RAM) += dfu_ram.o
> >  obj-$(CONFIG_$(SPL_)DFU_SF) += dfu_sf.o
> >  obj-$(CONFIG_$(SPL_)DFU_WRITE_ALT) += dfu_alt.o
> > -obj-$(CONFIG_$(SPL_)DFU_VIRT) += dfu_virt.o
> > +obj-$(CONFIG_DFU_VIRT) += dfu_virt.o
> > diff --git a/include/dfu.h b/include/dfu.h
> > index 07922224ef1..06efbf4b208 100644
> > --- a/include/dfu.h
> > +++ b/include/dfu.h
> > @@ -495,7 +495,7 @@ static inline int dfu_fill_entity_mtd(struct dfu_entity *dfu, char *devstr,
> >  }
> >  #endif
> >
> > -#if CONFIG_IS_ENABLED(DFU_VIRT)
> > +#if IS_ENABLED(CONFIG_DFU_VIRT)
> >  int dfu_fill_entity_virt(struct dfu_entity *dfu, char *devstr,
> >                        char **argv, int argc);
> >  int dfu_write_medium_virt(struct dfu_entity *dfu, u64 offset,
>
> This is I believe an intentional usage.

I'll add this to config_nospl

Regards,
Simon

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 093/169] Correct SPL use of FSP_VERSION2
  2023-02-10 12:41   ` Tom Rini
@ 2023-02-12 23:14     ` Simon Glass
  0 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-12 23:14 UTC (permalink / raw)
  To: Tom Rini; +Cc: U-Boot Mailing List

Hi Tom,

On Fri, 10 Feb 2023 at 05:41, Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, Feb 05, 2023 at 03:40:02PM -0700, Simon Glass wrote:
>
> > This converts 1 usage of this option to the non-SPL form, since there is
> > no SPL_FSP_VERSION2 defined in Kconfig
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
>
> This is used to avoid code on chromebook_coral in SPL.

I'll add a Kconfig for this one.

Regards,
Simon

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 095/169] Correct SPL use of GENERATE_SMBIOS_TABLE
  2023-02-09  2:40   ` Tom Rini
@ 2023-02-12 23:14     ` Simon Glass
  0 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-12 23:14 UTC (permalink / raw)
  To: Tom Rini; +Cc: U-Boot Mailing List

Hi Tom,

On Wed, 8 Feb 2023 at 19:40, Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, Feb 05, 2023 at 03:40:04PM -0700, Simon Glass wrote:
>
> > This converts 1 usage of this option to the non-SPL form, since there is
> > no SPL_GENERATE_SMBIOS_TABLE defined in Kconfig
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
>
> This is used to avoid increasing the size of SPL in some cases.

I'll add this to config_nospl

Regards,
Simon

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 096/169] Correct SPL uses of GMAC_ROCKCHIP
  2023-02-09  1:51   ` Tom Rini
@ 2023-02-12 23:14     ` Simon Glass
  0 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-12 23:14 UTC (permalink / raw)
  To: Tom Rini; +Cc: U-Boot Mailing List

Hi Tom,

On Wed, 8 Feb 2023 at 18:51, Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, Feb 05, 2023 at 03:40:05PM -0700, Simon Glass wrote:
>
> > This converts 2 usages of this option to the non-SPL form, since there is
> > no SPL_GMAC_ROCKCHIP defined in Kconfig
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
>
> This is used to avoid code in SPL/TPL on these platforms.
>

I'll add this to config_nospl

Regards,
Simon

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 099/169] Correct SPL uses of I8259_PIC
  2023-02-10 12:41   ` Tom Rini
@ 2023-02-12 23:14     ` Simon Glass
  0 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-12 23:14 UTC (permalink / raw)
  To: Tom Rini; +Cc: U-Boot Mailing List

Hi Tom,

On Fri, 10 Feb 2023 at 05:41, Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, Feb 05, 2023 at 03:40:08PM -0700, Simon Glass wrote:
>
> > This converts 4 usages of this option to the non-SPL form, since there is
> > no SPL_I8259_PIC defined in Kconfig
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
>
> This is used to avoid code in SPL.
>
I'll add this to config_nospl

Regards,

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 103/169] Correct SPL uses of IMX_RDC
  2023-02-09  2:39   ` Tom Rini
@ 2023-02-12 23:14     ` Simon Glass
  0 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-12 23:14 UTC (permalink / raw)
  To: Tom Rini; +Cc: U-Boot Mailing List

Hi Tom,

On Wed, 8 Feb 2023 at 19:40, Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, Feb 05, 2023 at 03:40:12PM -0700, Simon Glass wrote:
>
> > This converts 2 usages of this option to the non-SPL form, since there is
> > no SPL_IMX_RDC defined in Kconfig
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
>
> This is used to avoid the code in SPL in some cases.

I'll add this to config_nospl

Regards,
Simon

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 109/169] Correct SPL uses of MULTIPLEXER
  2023-02-09 15:56   ` Tom Rini
@ 2023-02-12 23:14     ` Simon Glass
  0 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-12 23:14 UTC (permalink / raw)
  To: Tom Rini; +Cc: U-Boot Mailing List

Hi Tom,

On Thu, 9 Feb 2023 at 08:57, Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, Feb 05, 2023 at 03:40:18PM -0700, Simon Glass wrote:
>
> > This converts 3 usages of this option to the non-SPL form, since there is
> > no SPL_MULTIPLEXER defined in Kconfig
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
> > ---
> >
> > (no changes since v1)
> >
> >  drivers/Makefile     | 2 +-
> >  drivers/mux/Makefile | 2 +-
> >  include/mux.h        | 2 +-
> >  3 files changed, 3 insertions(+), 3 deletions(-)
>
> This is done so that we don't force multiplexer to be linked in to SPL,
> as there is no SPL_MULTIPLEXER option. For a v2 of this patch, also move
> the line down to the block of all of the other options that lack SPL_FOO
> but that we guard with a check for not doing SPL/TPL builds, thanks.

OK, moved down in drivers/Makefile

Regards,
Simon

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 112/169] Correct SPL uses of NXP_FSPI
  2023-02-09  2:04   ` Tom Rini
@ 2023-02-12 23:14     ` Simon Glass
  0 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-12 23:14 UTC (permalink / raw)
  To: Tom Rini; +Cc: U-Boot Mailing List

Hi Tom,

On Wed, 8 Feb 2023 at 19:04, Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, Feb 05, 2023 at 03:40:21PM -0700, Simon Glass wrote:
>
> > This converts 2 usages of this option to the non-SPL form, since there is
> > no SPL_NXP_FSPI defined in Kconfig
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
>
> This is used to avoid code in SPL.

I'll add this to config_nospl

Regards,
Simon

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 119/169] Correct SPL use of PCI_PNP
  2023-02-09 23:34   ` Tom Rini
@ 2023-02-12 23:14     ` Simon Glass
  0 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-12 23:14 UTC (permalink / raw)
  To: Tom Rini; +Cc: U-Boot Mailing List

Hi Tom,

On Thu, 9 Feb 2023 at 16:34, Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, Feb 05, 2023 at 03:40:28PM -0700, Simon Glass wrote:
>
> > This converts 1 usage of this option to the non-SPL form, since there is
> > no SPL_PCI_PNP defined in Kconfig
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
>
> On x86, this is used to avoid the code in SPL/TPL.

I'll add this to config_nospl

Regards,
Simon

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 124/169] Correct SPL use of PHY_CADENCE_TORRENT
  2023-02-09  0:39   ` Tom Rini
@ 2023-02-12 23:14     ` Simon Glass
  0 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-12 23:14 UTC (permalink / raw)
  To: Tom Rini; +Cc: U-Boot Mailing List

Hi Tom,

On Wed, 8 Feb 2023 at 17:39, Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, Feb 05, 2023 at 03:40:33PM -0700, Simon Glass wrote:
>
> > This converts 1 usage of this option to the non-SPL form, since there is
> > no SPL_PHY_CADENCE_TORRENT defined in Kconfig
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
> > ---
> >
> > (no changes since v1)
> >
> >  drivers/phy/cadence/Makefile | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/phy/cadence/Makefile b/drivers/phy/cadence/Makefile
> > index c247feb8262..a1cb6868c9e 100644
> > --- a/drivers/phy/cadence/Makefile
> > +++ b/drivers/phy/cadence/Makefile
> > @@ -1,2 +1,2 @@
> >  obj-$(CONFIG_PHY_CADENCE_SIERRA)     += phy-cadence-sierra.o
> > -obj-$(CONFIG_$(SPL_)PHY_CADENCE_TORRENT) += phy-cadence-torrent.o
> > +obj-$(CONFIG_PHY_CADENCE_TORRENT) += phy-cadence-torrent.o
>
> This is a size increase on j7200_evm_a72 where we do not want this PHY
> in SPL. And FWIW, the sierra one is the same case, on other TI K3
> platforms.

I'll add this to config_nospl

Regards,
Simon

^ permalink raw reply	[flat|nested] 111+ messages in thread

* Re: [PATCH v2 127/169] Correct SPL use of QFW_PIO
  2023-02-10 12:41   ` Tom Rini
@ 2023-02-12 23:14     ` Simon Glass
  0 siblings, 0 replies; 111+ messages in thread
From: Simon Glass @ 2023-02-12 23:14 UTC (permalink / raw)
  To: Tom Rini; +Cc: U-Boot Mailing List

Hi Tom,

On Fri, 10 Feb 2023 at 05:42, Tom Rini <trini@konsulko.com> wrote:
>
> On Sun, Feb 05, 2023 at 03:40:36PM -0700, Simon Glass wrote:
>
> > This converts 1 usage of this option to the non-SPL form, since there is
> > no SPL_QFW_PIO defined in Kconfig
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
>
> This is used to avoid code in SPL.

I'll add this to config_nospl

Regards,
Simon

^ permalink raw reply	[flat|nested] 111+ messages in thread

end of thread, other threads:[~2023-02-12 23:16 UTC | newest]

Thread overview: 111+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-02-05 22:39 [PATCH v2 062/169] Correct SPL uses of CPU_MICROBLAZE Simon Glass
2023-02-05 22:39 ` [PATCH v2 063/169] Correct SPL use of DEBUG_UART_ZYNQ Simon Glass
2023-02-05 22:39 ` [PATCH v2 064/169] Correct SPL uses of DFU_VIRT Simon Glass
2023-02-09 17:49   ` Tom Rini
2023-02-12 23:14     ` Simon Glass
2023-02-05 22:39 ` [PATCH v2 067/169] Correct SPL use of DISPLAY_CPUINFO Simon Glass
2023-02-05 22:39 ` [PATCH v2 068/169] Correct SPL use of DM_RNG Simon Glass
2023-02-09  0:40   ` Tom Rini
2023-02-09  1:08     ` Simon Glass
2023-02-09  1:10       ` Tom Rini
2023-02-05 22:39 ` [PATCH v2 069/169] Correct SPL uses of DTB_RESELECT Simon Glass
2023-02-05 22:39 ` [PATCH v2 070/169] Correct SPL uses of DWC_ETH_QOS Simon Glass
2023-02-05 22:39 ` [PATCH v2 071/169] Correct SPL use of EFI_APP Simon Glass
2023-02-05 22:39 ` [PATCH v2 072/169] Correct SPL use of EFI_DEVICE_PATH_UTIL Simon Glass
2023-02-05 22:39 ` [PATCH v2 073/169] Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORT Simon Glass
2023-02-05 22:39 ` [PATCH v2 074/169] Correct SPL use of EFI_LOADER_HII Simon Glass
2023-02-05 22:39 ` [PATCH v2 076/169] Correct SPL use of EFI_SECURE_BOOT Simon Glass
2023-02-10 18:43   ` Tom Rini
2023-02-05 22:39 ` [PATCH v2 077/169] Correct SPL use of EFI_TCG2_PROTOCOL Simon Glass
2023-02-06 23:41   ` Heinrich Schuchardt
2023-02-07  4:02     ` Simon Glass
2023-02-07  8:40       ` Heinrich Schuchardt
2023-02-07 13:38         ` Simon Glass
2023-02-05 22:39 ` [PATCH v2 078/169] Correct SPL use of EFI_UNICODE_COLLATION_PROTOCOL2 Simon Glass
2023-02-06 23:36   ` Heinrich Schuchardt
2023-02-06 23:38     ` Tom Rini
2023-02-07  1:24       ` Heinrich Schuchardt
2023-02-07  1:36         ` Tom Rini
2023-02-07  9:11           ` Heinrich Schuchardt
2023-02-05 22:39 ` [PATCH v2 079/169] Correct SPL uses of ENV_IS_IN_UBI Simon Glass
2023-02-05 22:39 ` [PATCH v2 080/169] Correct SPL uses of ENV_VARS_UBOOT_RUNTIME_CONFIG Simon Glass
2023-02-05 22:39 ` [PATCH v2 081/169] Correct SPL use of ENV_WRITEABLE_LIST Simon Glass
2023-02-05 22:39 ` [PATCH v2 082/169] Correct SPL use of EXYNOS7420 Simon Glass
2023-02-05 22:39 ` [PATCH v2 084/169] Correct SPL uses of FASTBOOT_FLASH Simon Glass
2023-02-05 22:39 ` [PATCH v2 087/169] Correct SPL use of FASTBOOT_MMC_USER_SUPPORT Simon Glass
2023-02-05 22:39 ` [PATCH v2 088/169] Correct SPL use of FDT_SIMPLEFB Simon Glass
2023-02-05 22:39 ` [PATCH v2 090/169] Correct SPL use of FSL_CAAM Simon Glass
2023-02-05 22:40 ` [PATCH v2 091/169] Correct SPL uses of FSL_ISBC_KEY_EXT Simon Glass
2023-02-09  1:09   ` Tom Rini
2023-02-12 23:14     ` Simon Glass
2023-02-05 22:40 ` [PATCH v2 092/169] Correct SPL use of FSL_MC_ENET Simon Glass
2023-02-05 22:40 ` [PATCH v2 093/169] Correct SPL use of FSP_VERSION2 Simon Glass
2023-02-10 12:41   ` Tom Rini
2023-02-12 23:14     ` Simon Glass
2023-02-05 22:40 ` [PATCH v2 094/169] Correct SPL use of FS_EROFS Simon Glass
2023-02-05 22:40 ` [PATCH v2 095/169] Correct SPL use of GENERATE_SMBIOS_TABLE Simon Glass
2023-02-09  2:40   ` Tom Rini
2023-02-12 23:14     ` Simon Glass
2023-02-05 22:40 ` [PATCH v2 096/169] Correct SPL uses of GMAC_ROCKCHIP Simon Glass
2023-02-09  1:51   ` Tom Rini
2023-02-12 23:14     ` Simon Glass
2023-02-05 22:40 ` [PATCH v2 097/169] Correct SPL use of HUSH_PARSER Simon Glass
2023-02-05 22:40 ` [PATCH v2 098/169] Correct SPL uses of HW_WATCHDOG Simon Glass
2023-02-05 22:40 ` [PATCH v2 099/169] Correct SPL uses of I8259_PIC Simon Glass
2023-02-10 12:41   ` Tom Rini
2023-02-12 23:14     ` Simon Glass
2023-02-05 22:40 ` [PATCH v2 100/169] Correct SPL uses of IMX8M Simon Glass
2023-02-05 22:40 ` [PATCH v2 101/169] Correct SPL use of IMX8MN_BEACON_2GB_LPDDR Simon Glass
2023-02-05 22:40 ` [PATCH v2 102/169] Correct SPL uses of IMX_MODULE_FUSE Simon Glass
2023-02-05 22:40 ` [PATCH v2 103/169] Correct SPL uses of IMX_RDC Simon Glass
2023-02-09  2:39   ` Tom Rini
2023-02-12 23:14     ` Simon Glass
2023-02-05 22:40 ` [PATCH v2 104/169] Correct SPL uses of LMB Simon Glass
2023-02-05 22:40 ` [PATCH v2 105/169] Correct SPL uses of MICROBLAZE Simon Glass
2023-02-05 22:40 ` [PATCH v2 106/169] Correct SPL use of MIPS_CM Simon Glass
2023-02-05 22:40 ` [PATCH v2 107/169] Correct SPL use of MMC_QUIRKS Simon Glass
2023-02-06  0:30   ` Jaehoon Chung
2023-02-09 21:32   ` Tom Rini
2023-02-05 22:40 ` [PATCH v2 108/169] Correct SPL uses of MTD Simon Glass
2023-02-05 22:40 ` [PATCH v2 109/169] Correct SPL uses of MULTIPLEXER Simon Glass
2023-02-09 15:56   ` Tom Rini
2023-02-12 23:14     ` Simon Glass
2023-02-05 22:40 ` [PATCH v2 110/169] Correct SPL uses of NEEDS_MANUAL_RELOC Simon Glass
2023-02-05 22:40 ` [PATCH v2 111/169] Correct SPL use of NETDEVICES Simon Glass
2023-02-05 22:40 ` [PATCH v2 112/169] Correct SPL uses of NXP_FSPI Simon Glass
2023-02-09  2:04   ` Tom Rini
2023-02-12 23:14     ` Simon Glass
2023-02-05 22:40 ` [PATCH v2 113/169] Correct SPL use of OCTEON_SERIAL_BOOTCMD Simon Glass
2023-02-05 22:40 ` [PATCH v2 114/169] Correct SPL use of OCTEON_SERIAL_PCIE_CONSOLE Simon Glass
2023-02-05 22:40 ` [PATCH v2 116/169] Correct SPL use of OF_EMBED Simon Glass
2023-02-05 22:40 ` [PATCH v2 118/169] Correct SPL use of PARTITION_TYPE_GUID Simon Glass
2023-02-05 22:40 ` [PATCH v2 119/169] Correct SPL use of PCI_PNP Simon Glass
2023-02-09 23:34   ` Tom Rini
2023-02-12 23:14     ` Simon Glass
2023-02-05 22:40 ` [PATCH v2 120/169] Correct SPL uses of PG_WCOM_UBOOT_BOOTPACKAGE Simon Glass
2023-02-05 22:40 ` [PATCH v2 121/169] Correct SPL uses of PG_WCOM_UBOOT_UPDATE Simon Glass
2023-02-05 22:40 ` [PATCH v2 124/169] Correct SPL use of PHY_CADENCE_TORRENT Simon Glass
2023-02-09  0:39   ` Tom Rini
2023-02-12 23:14     ` Simon Glass
2023-02-05 22:40 ` [PATCH v2 126/169] Correct SPL uses of PMIC_STPMIC1 Simon Glass
2023-02-05 22:40 ` [PATCH v2 127/169] Correct SPL use of QFW_PIO Simon Glass
2023-02-10 12:41   ` Tom Rini
2023-02-12 23:14     ` Simon Glass
2023-02-05 22:40 ` [PATCH v2 128/169] Correct SPL use of REGEX Simon Glass
2023-02-05 22:40 ` [PATCH v2 129/169] Correct SPL use of RENESAS_SDHI Simon Glass
2023-02-05 22:40 ` [PATCH v2 130/169] Correct SPL use of RESV_RAM Simon Glass
2023-02-05 22:40 ` [PATCH v2 131/169] Correct SPL uses of ROCKCHIP_EFUSE Simon Glass
2023-02-05 22:40 ` [PATCH v2 133/169] Correct SPL use of SANDBOX Simon Glass
2023-02-05 22:40 ` [PATCH v2 134/169] Correct SPL uses of SANDBOX_CLK_CCF Simon Glass
2023-02-05 22:40 ` [PATCH v2 135/169] Correct SPL uses of SAVE_PREV_BL_FDT_ADDR Simon Glass
2023-02-05 22:40 ` [PATCH v2 138/169] Correct SPL uses of SIFIVE_OTP Simon Glass
2023-02-05 22:40 ` [PATCH v2 139/169] Correct SPL use of SL28CPLD Simon Glass
2023-02-05 22:40 ` [PATCH v2 140/169] Correct SPL use of SL28_SPL_LOADS_OPTEE_BL32 Simon Glass
2023-02-05 22:40 ` [PATCH v2 144/169] Correct SPL use of STM32MP15X_STM32IMAGE Simon Glass
2023-02-05 22:40 ` [PATCH v2 145/169] Correct SPL use of SUPPORT_EMMC_RPMB Simon Glass
2023-02-06  0:30   ` Jaehoon Chung
2023-02-05 22:40 ` [PATCH v2 146/169] Correct SPL use of SYS_FSL_ERRATUM_A010539 Simon Glass
2023-02-05 22:40 ` [PATCH v2 147/169] Correct SPL uses of SYS_LONGHELP Simon Glass
2023-02-05 22:40 ` [PATCH v2 148/169] Correct SPL use of SYS_MEM_RSVD_FOR_MMU Simon Glass
2023-02-05 22:40 ` [PATCH v2 150/169] Correct SPL use of TARGET_MX6UL_9X9_EVK Simon Glass
2023-02-05 22:41 ` [PATCH v2 151/169] Correct SPL use of TARGET_PG_WCOM_EXPU1 Simon Glass

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