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* [PATCH 0/4] staging: mt7621-pci: Handle minor issues
@ 2019-06-21  6:15 Sergio Paracuellos
  2019-06-21  6:15 ` [PATCH 1/4] staging: mt7621-pci: disable pcie port clock if there is no pcie link Sergio Paracuellos
                   ` (4 more replies)
  0 siblings, 5 replies; 20+ messages in thread
From: Sergio Paracuellos @ 2019-06-21  6:15 UTC (permalink / raw)
  To: gregkh; +Cc: neil, driverdev-devel, gerg

This patch series properly handle minor issues in this driver. These are:
* Disable pcie port clock on pci dirver instead of doing it in the phy
  driver. The pci driver is the correct place to do this.
* Add a missing call to phy_exit function to properly handle the function
  'mt7621_pcie_init_port' error path.
* Move driver to init in a later stage using 'module_init' instead of using
  'arch_initcall'.

Patches are only compile-tested. It would be awasome to be tested before applied
them (mainly the change to 'module_init' stuff).

Hope this helps.

Best regards,
    Sergio Paracuellos

Sergio Paracuellos (4):
  staging: mt7621-pci: disable pcie port clock if there is no pcie link
  staging: mt7621-pci: add phy exit call if phy_power_on call fails
  staging: mt7621-pci-phy: remove disable clock from the phy exit
    function
  staging: mt7621-pci: use 'module_init' instead of 'arch_initcall'

 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c |  8 --------
 drivers/staging/mt7621-pci/pci-mt7621.c         | 10 +++++++++-
 2 files changed, 9 insertions(+), 9 deletions(-)

-- 
2.19.1

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^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 1/4] staging: mt7621-pci: disable pcie port clock if there is no pcie link
  2019-06-21  6:15 [PATCH 0/4] staging: mt7621-pci: Handle minor issues Sergio Paracuellos
@ 2019-06-21  6:15 ` Sergio Paracuellos
  2019-06-21  6:15 ` [PATCH 2/4] staging: mt7621-pci: add phy exit call if phy_power_on call fails Sergio Paracuellos
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 20+ messages in thread
From: Sergio Paracuellos @ 2019-06-21  6:15 UTC (permalink / raw)
  To: gregkh; +Cc: neil, driverdev-devel, gerg

When there is no pcie link detected we have to properly disable the
port pcie clock.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
 drivers/staging/mt7621-pci/pci-mt7621.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c
index de09bda0b4cd..f6b91b29fb9c 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -45,6 +45,7 @@
 #define PCIE_FTS_NUM_L0(x)		((x) & 0xff << 8)
 
 /* rt_sysc_membase relative registers */
+#define RALINK_CLKCFG1			0x30
 #define RALINK_PCIE_CLK_GEN		0x7c
 #define RALINK_PCIE_CLK_GEN1		0x80
 
@@ -221,6 +222,11 @@ static inline bool mt7621_pcie_port_is_linkup(struct mt7621_pcie_port *port)
 	return (pcie_port_read(port, RALINK_PCI_STATUS) & PCIE_PORT_LINKUP) != 0;
 }
 
+static inline void mt7621_pcie_port_clk_disable(struct mt7621_pcie_port *port)
+{
+	rt_sysc_m32(PCIE_PORT_CLK_EN(port->slot), 0, RALINK_CLKCFG1);
+}
+
 static inline void mt7621_control_assert(struct mt7621_pcie_port *port)
 {
 	u32 chip_rev_id = rt_sysc_r32(MT7621_CHIP_REV_ID);
@@ -475,6 +481,7 @@ static void mt7621_pcie_init_ports(struct mt7621_pcie *pcie)
 				slot);
 			phy_power_off(port->phy);
 			mt7621_control_assert(port);
+			mt7621_pcie_port_clk_disable(port);
 			port->enabled = false;
 		}
 	}
-- 
2.19.1

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^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH 2/4] staging: mt7621-pci: add phy exit call if phy_power_on call fails
  2019-06-21  6:15 [PATCH 0/4] staging: mt7621-pci: Handle minor issues Sergio Paracuellos
  2019-06-21  6:15 ` [PATCH 1/4] staging: mt7621-pci: disable pcie port clock if there is no pcie link Sergio Paracuellos
@ 2019-06-21  6:15 ` Sergio Paracuellos
  2019-06-21  6:15 ` [PATCH 3/4] staging: mt7621-pci-phy: remove disable clock from the phy exit function Sergio Paracuellos
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 20+ messages in thread
From: Sergio Paracuellos @ 2019-06-21  6:15 UTC (permalink / raw)
  To: gregkh; +Cc: neil, driverdev-devel, gerg

Add missing call to 'phy_exit' function if the phy_power_on call fails.
With this call added the error path is properly handled.

Fixes: 07420a02b003 ("staging: mt7621-pci: use gpio perst instead of builtin behaviour")
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
 drivers/staging/mt7621-pci/pci-mt7621.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c
index f6b91b29fb9c..da2e180f8d19 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -436,6 +436,7 @@ static int mt7621_pcie_init_port(struct mt7621_pcie_port *port)
 	err = phy_power_on(port->phy);
 	if (err) {
 		dev_err(dev, "failed to power on port%d phy\n", slot);
+		phy_exit(port->phy);
 		return err;
 	}
 
-- 
2.19.1

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^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH 3/4] staging: mt7621-pci-phy: remove disable clock from the phy exit function
  2019-06-21  6:15 [PATCH 0/4] staging: mt7621-pci: Handle minor issues Sergio Paracuellos
  2019-06-21  6:15 ` [PATCH 1/4] staging: mt7621-pci: disable pcie port clock if there is no pcie link Sergio Paracuellos
  2019-06-21  6:15 ` [PATCH 2/4] staging: mt7621-pci: add phy exit call if phy_power_on call fails Sergio Paracuellos
@ 2019-06-21  6:15 ` Sergio Paracuellos
  2019-06-21  6:15 ` [PATCH 4/4] staging: mt7621-pci: use 'module_init' instead of 'arch_initcall' Sergio Paracuellos
  2019-06-21 12:35 ` [PATCH 0/4] staging: mt7621-pci: Handle minor issues Greg Ungerer
  4 siblings, 0 replies; 20+ messages in thread
From: Sergio Paracuellos @ 2019-06-21  6:15 UTC (permalink / raw)
  To: gregkh; +Cc: neil, driverdev-devel, gerg

The clock which has been used here is not about the phy but the pcie port.
It has been properly handled into host pcie driver code. Hence, remove it
from here which is the correct thing to do.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c b/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c
index 2576f179e30a..d2a07f145143 100644
--- a/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c
+++ b/drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c
@@ -16,10 +16,6 @@
 #include <mt7621.h>
 #include <ralink_regs.h>
 
-#define RALINK_CLKCFG1				0x30
-
-#define PCIE_PORT_CLK_EN(x)			BIT(24 + (x))
-
 #define RG_PE1_PIPE_REG				0x02c
 #define RG_PE1_PIPE_RST				BIT(12)
 #define RG_PE1_PIPE_CMD_FRC			BIT(4)
@@ -286,10 +282,6 @@ static int mt7621_pci_phy_power_off(struct phy *phy)
 
 static int mt7621_pci_phy_exit(struct phy *phy)
 {
-	struct mt7621_pci_phy_instance *instance = phy_get_drvdata(phy);
-
-	rt_sysc_m32(PCIE_PORT_CLK_EN(instance->index), 0, RALINK_CLKCFG1);
-
 	return 0;
 }
 
-- 
2.19.1

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^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH 4/4] staging: mt7621-pci: use 'module_init' instead of 'arch_initcall'
  2019-06-21  6:15 [PATCH 0/4] staging: mt7621-pci: Handle minor issues Sergio Paracuellos
                   ` (2 preceding siblings ...)
  2019-06-21  6:15 ` [PATCH 3/4] staging: mt7621-pci-phy: remove disable clock from the phy exit function Sergio Paracuellos
@ 2019-06-21  6:15 ` Sergio Paracuellos
  2019-06-21 12:35 ` [PATCH 0/4] staging: mt7621-pci: Handle minor issues Greg Ungerer
  4 siblings, 0 replies; 20+ messages in thread
From: Sergio Paracuellos @ 2019-06-21  6:15 UTC (permalink / raw)
  To: gregkh; +Cc: neil, driverdev-devel, gerg

This driver has dependencies on mt7621-gpio and mt7621-pci-phy which
are init in later stages. Hence, when this driver is probed it is always
returning 'EPROBE_DEFER' and being initialized afterwards. Use function
'module_init' to just initialize later.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
 drivers/staging/mt7621-pci/pci-mt7621.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c
index da2e180f8d19..a981f4f0ed03 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -727,4 +727,4 @@ static int __init mt7621_pci_init(void)
 	return platform_driver_register(&mt7621_pci_driver);
 }
 
-arch_initcall(mt7621_pci_init);
+module_init(mt7621_pci_init);
-- 
2.19.1

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^ permalink raw reply related	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-06-21  6:15 [PATCH 0/4] staging: mt7621-pci: Handle minor issues Sergio Paracuellos
                   ` (3 preceding siblings ...)
  2019-06-21  6:15 ` [PATCH 4/4] staging: mt7621-pci: use 'module_init' instead of 'arch_initcall' Sergio Paracuellos
@ 2019-06-21 12:35 ` Greg Ungerer
  2019-06-21 13:23   ` Sergio Paracuellos
  2019-06-23  2:15   ` Brett Neumeier
  4 siblings, 2 replies; 20+ messages in thread
From: Greg Ungerer @ 2019-06-21 12:35 UTC (permalink / raw)
  To: Sergio Paracuellos, gregkh; +Cc: neil, driverdev-devel

Hi Sergio,

On 21/6/19 4:15 pm, Sergio Paracuellos wrote:
> This patch series properly handle minor issues in this driver. These are:
> * Disable pcie port clock on pci dirver instead of doing it in the phy
>    driver. The pci driver is the correct place to do this.
> * Add a missing call to phy_exit function to properly handle the function
>    'mt7621_pcie_init_port' error path.
> * Move driver to init in a later stage using 'module_init' instead of using
>    'arch_initcall'.
> 
> Patches are only compile-tested. It would be awasome to be tested before applied
> them (mainly the change to 'module_init' stuff).

Quick test - not though or extensive.
On 3 boots it successfully booted for me twice with:

rt2880-pinmux pinctrl: pcie is already enabled
mt7621-pci 1e140000.pcie: Error applying setting, reverse things back
mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
mt7621-pci 1e140000.pcie: Port 0 N_FTS = 1b102800
mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
mt7621-pci 1e140000.pcie: Port 1 N_FTS = 1b102800
mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz
mt7621-pci 1e140000.pcie: Port 2 N_FTS = 1b102800
mt7621-pci 1e140000.pcie: pcie1 no card, disable it (RST & CLK)
mt7621-pci 1e140000.pcie: pcie2 no card, disable it (RST & CLK)
mt7621-pci 1e140000.pcie: PCIE0 enabled
mt7621-pci 1e140000.pcie: PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [io  0xffffffff]
pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
pci_bus 0000:00: root bus resource [bus 00-ff]
pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400
pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff]
pci 0000:00:00.0: reg 0x14: [mem 0x00000000-0x0000ffff]
pci 0000:00:00.0: supports D1
pci 0000:00:00.0: PME# supported from D0 D1 D3hot
pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
pci 0000:01:00.0: [168c:003c] type 00 class 0x028000
pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x001fffff 64bit]
pci 0000:01:00.0: reg 0x30: [mem 0x00000000-0x0000ffff pref]
pci 0000:01:00.0: supports D1 D2
pci 0000:00:00.0: PCI bridge to [bus 01-ff]
pci 0000:00:00.0:   bridge window [io  0x0000-0x0fff]
pci 0000:00:00.0:   bridge window [mem 0x00000000-0x000fffff]
pci 0000:00:00.0:   bridge window [mem 0x00000000-0x000fffff pref]
pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x601fffff]
pci 0000:00:00.0: BAR 9: assigned [mem 0x60200000-0x602fffff pref]
pci 0000:00:00.0: BAR 1: assigned [mem 0x60300000-0x6030ffff]
pci 0000:00:00.0: BAR 7: no space for [io  size 0x1000]
pci 0000:00:00.0: BAR 7: failed to assign [io  size 0x1000]
pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x601fffff 64bit]
pci 0000:01:00.0: BAR 6: assigned [mem 0x60200000-0x6020ffff pref]
pci 0000:00:00.0: PCI bridge to [bus 01]
pci 0000:00:00.0:   bridge window [mem 0x60000000-0x601fffff]
pci 0000:00:00.0:   bridge window [mem 0x60200000-0x602fffff pref]
pcieport 0000:00:00.0: of_irq_parse_pci: failed with rc=-22
pcieport 0000:00:00.0: enabling device (0004 -> 0006)

PCI devices worked ok on the 2 good boots.

Regards
Greg



> Hope this helps.
> 
> Best regards,
>      Sergio Paracuellos
> 
> Sergio Paracuellos (4):
>    staging: mt7621-pci: disable pcie port clock if there is no pcie link
>    staging: mt7621-pci: add phy exit call if phy_power_on call fails
>    staging: mt7621-pci-phy: remove disable clock from the phy exit
>      function
>    staging: mt7621-pci: use 'module_init' instead of 'arch_initcall'
> 
>   drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c |  8 --------
>   drivers/staging/mt7621-pci/pci-mt7621.c         | 10 +++++++++-
>   2 files changed, 9 insertions(+), 9 deletions(-)
> 
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http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-06-21 12:35 ` [PATCH 0/4] staging: mt7621-pci: Handle minor issues Greg Ungerer
@ 2019-06-21 13:23   ` Sergio Paracuellos
  2019-06-23  2:15   ` Brett Neumeier
  1 sibling, 0 replies; 20+ messages in thread
From: Sergio Paracuellos @ 2019-06-21 13:23 UTC (permalink / raw)
  To: Greg Ungerer; +Cc: NeilBrown, Greg KH, driverdev-devel

Hi Greg,

On Fri, Jun 21, 2019 at 2:35 PM Greg Ungerer <gerg@kernel.org> wrote:
>
> Hi Sergio,
>
> On 21/6/19 4:15 pm, Sergio Paracuellos wrote:
> > This patch series properly handle minor issues in this driver. These are:
> > * Disable pcie port clock on pci dirver instead of doing it in the phy
> >    driver. The pci driver is the correct place to do this.
> > * Add a missing call to phy_exit function to properly handle the function
> >    'mt7621_pcie_init_port' error path.
> > * Move driver to init in a later stage using 'module_init' instead of using
> >    'arch_initcall'.
> >
> > Patches are only compile-tested. It would be awasome to be tested before applied
> > them (mainly the change to 'module_init' stuff).
>
> Quick test - not though or extensive.
> On 3 boots it successfully booted for me twice with:
>
> rt2880-pinmux pinctrl: pcie is already enabled
> mt7621-pci 1e140000.pcie: Error applying setting, reverse things back
> mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
> mt7621-pci 1e140000.pcie: Port 0 N_FTS = 1b102800
> mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
> mt7621-pci 1e140000.pcie: Port 1 N_FTS = 1b102800
> mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz
> mt7621-pci 1e140000.pcie: Port 2 N_FTS = 1b102800
> mt7621-pci 1e140000.pcie: pcie1 no card, disable it (RST & CLK)
> mt7621-pci 1e140000.pcie: pcie2 no card, disable it (RST & CLK)
> mt7621-pci 1e140000.pcie: PCIE0 enabled
> mt7621-pci 1e140000.pcie: PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
> mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
> pci_bus 0000:00: root bus resource [io  0xffffffff]
> pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
> pci_bus 0000:00: root bus resource [bus 00-ff]
> pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400
> pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff]
> pci 0000:00:00.0: reg 0x14: [mem 0x00000000-0x0000ffff]
> pci 0000:00:00.0: supports D1
> pci 0000:00:00.0: PME# supported from D0 D1 D3hot
> pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> pci 0000:01:00.0: [168c:003c] type 00 class 0x028000
> pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x001fffff 64bit]
> pci 0000:01:00.0: reg 0x30: [mem 0x00000000-0x0000ffff pref]
> pci 0000:01:00.0: supports D1 D2
> pci 0000:00:00.0: PCI bridge to [bus 01-ff]
> pci 0000:00:00.0:   bridge window [io  0x0000-0x0fff]
> pci 0000:00:00.0:   bridge window [mem 0x00000000-0x000fffff]
> pci 0000:00:00.0:   bridge window [mem 0x00000000-0x000fffff pref]
> pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
> pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
> pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
> pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x601fffff]
> pci 0000:00:00.0: BAR 9: assigned [mem 0x60200000-0x602fffff pref]
> pci 0000:00:00.0: BAR 1: assigned [mem 0x60300000-0x6030ffff]
> pci 0000:00:00.0: BAR 7: no space for [io  size 0x1000]
> pci 0000:00:00.0: BAR 7: failed to assign [io  size 0x1000]
> pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x601fffff 64bit]
> pci 0000:01:00.0: BAR 6: assigned [mem 0x60200000-0x6020ffff pref]
> pci 0000:00:00.0: PCI bridge to [bus 01]
> pci 0000:00:00.0:   bridge window [mem 0x60000000-0x601fffff]
> pci 0000:00:00.0:   bridge window [mem 0x60200000-0x602fffff pref]
> pcieport 0000:00:00.0: of_irq_parse_pci: failed with rc=-22
> pcieport 0000:00:00.0: enabling device (0004 -> 0006)
>
> PCI devices worked ok on the 2 good boots.

Perfect, thanks for testing this.

>
> Regards
> Greg

Best regards,
    Sergio Paracuellos
>
>
>
> > Hope this helps.
> >
> > Best regards,
> >      Sergio Paracuellos
> >
> > Sergio Paracuellos (4):
> >    staging: mt7621-pci: disable pcie port clock if there is no pcie link
> >    staging: mt7621-pci: add phy exit call if phy_power_on call fails
> >    staging: mt7621-pci-phy: remove disable clock from the phy exit
> >      function
> >    staging: mt7621-pci: use 'module_init' instead of 'arch_initcall'
> >
> >   drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c |  8 --------
> >   drivers/staging/mt7621-pci/pci-mt7621.c         | 10 +++++++++-
> >   2 files changed, 9 insertions(+), 9 deletions(-)
> >
_______________________________________________
devel mailing list
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http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-06-21 12:35 ` [PATCH 0/4] staging: mt7621-pci: Handle minor issues Greg Ungerer
  2019-06-21 13:23   ` Sergio Paracuellos
@ 2019-06-23  2:15   ` Brett Neumeier
  2019-06-23  5:58     ` Sergio Paracuellos
  1 sibling, 1 reply; 20+ messages in thread
From: Brett Neumeier @ 2019-06-23  2:15 UTC (permalink / raw)
  To: Greg Ungerer; +Cc: Neil Brown, driverdev-devel, gregkh

On Fri, Jun 21, 2019 at 7:35 AM Greg Ungerer <gerg@kernel.org> wrote:
>
> Hi Sergio,
>
> On 21/6/19 4:15 pm, Sergio Paracuellos wrote:
> > This patch series properly handle minor issues in this driver. These are:
> > * Disable pcie port clock on pci dirver instead of doing it in the phy
> >    driver. The pci driver is the correct place to do this.
> > * Add a missing call to phy_exit function to properly handle the function
> >    'mt7621_pcie_init_port' error path.
> > * Move driver to init in a later stage using 'module_init' instead of using
> >    'arch_initcall'.
> >
> > Patches are only compile-tested. It would be awasome to be tested before applied
> > them (mainly the change to 'module_init' stuff).

I have similar results to Greg -- on GnuBee PC1 and PC2, six boot
attempts each on a kernel built from staging-next, I have four hangs
and eight successful boots. The hanging patterns are similar to
previous results. If the full boot logs would be helpful let me know,
I can provide them.

-- 
Brett Neumeier (bneumeier@gmail.com)
_______________________________________________
devel mailing list
devel@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-06-23  2:15   ` Brett Neumeier
@ 2019-06-23  5:58     ` Sergio Paracuellos
  2019-06-25  5:10       ` Greg Ungerer
  0 siblings, 1 reply; 20+ messages in thread
From: Sergio Paracuellos @ 2019-06-23  5:58 UTC (permalink / raw)
  To: Brett Neumeier; +Cc: Neil Brown, Greg KH, Greg Ungerer, driverdev-devel

Hi Brett,

On Sun, Jun 23, 2019 at 4:15 AM Brett Neumeier <bneumeier@gmail.com> wrote:
>
> On Fri, Jun 21, 2019 at 7:35 AM Greg Ungerer <gerg@kernel.org> wrote:
> >
> > Hi Sergio,
> >
> > On 21/6/19 4:15 pm, Sergio Paracuellos wrote:
> > > This patch series properly handle minor issues in this driver. These are:
> > > * Disable pcie port clock on pci dirver instead of doing it in the phy
> > >    driver. The pci driver is the correct place to do this.
> > > * Add a missing call to phy_exit function to properly handle the function
> > >    'mt7621_pcie_init_port' error path.
> > > * Move driver to init in a later stage using 'module_init' instead of using
> > >    'arch_initcall'.
> > >
> > > Patches are only compile-tested. It would be awasome to be tested before applied
> > > them (mainly the change to 'module_init' stuff).
>
> I have similar results to Greg -- on GnuBee PC1 and PC2, six boot
> attempts each on a kernel built from staging-next, I have four hangs
> and eight successful boots. The hanging patterns are similar to
> previous results. If the full boot logs would be helpful let me know,
> I can provide them.

Thanks for letting me know. One thing we can try is check init order
in v4.20 kernel. Can you please try to compile pci driver for the
kernel v4.20 tag changing
driver's last line 'arch_initcall' into 'module_init'? Just to know if
at that working driver putting all the stuff in a later stage stills
work as expected.

Full dmesg's of this v4.20 wih the change would be helpful.

Best regards,
    Sergio Paracuellos

>
> --
> Brett Neumeier (bneumeier@gmail.com)
_______________________________________________
devel mailing list
devel@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-06-23  5:58     ` Sergio Paracuellos
@ 2019-06-25  5:10       ` Greg Ungerer
  2019-06-25  5:18         ` Sergio Paracuellos
  0 siblings, 1 reply; 20+ messages in thread
From: Greg Ungerer @ 2019-06-25  5:10 UTC (permalink / raw)
  To: Sergio Paracuellos, Brett Neumeier; +Cc: Neil Brown, Greg KH, driverdev-devel

Hi Sergio,

On 23/6/19 3:58 pm, Sergio Paracuellos wrote:
> On Sun, Jun 23, 2019 at 4:15 AM Brett Neumeier <bneumeier@gmail.com> wrote:
>> On Fri, Jun 21, 2019 at 7:35 AM Greg Ungerer <gerg@kernel.org> wrote:
>>> On 21/6/19 4:15 pm, Sergio Paracuellos wrote:
>>>> This patch series properly handle minor issues in this driver. These are:
>>>> * Disable pcie port clock on pci dirver instead of doing it in the phy
>>>>     driver. The pci driver is the correct place to do this.
>>>> * Add a missing call to phy_exit function to properly handle the function
>>>>     'mt7621_pcie_init_port' error path.
>>>> * Move driver to init in a later stage using 'module_init' instead of using
>>>>     'arch_initcall'.
>>>>
>>>> Patches are only compile-tested. It would be awasome to be tested before applied
>>>> them (mainly the change to 'module_init' stuff).
>>
>> I have similar results to Greg -- on GnuBee PC1 and PC2, six boot
>> attempts each on a kernel built from staging-next, I have four hangs
>> and eight successful boots. The hanging patterns are similar to
>> previous results. If the full boot logs would be helpful let me know,
>> I can provide them.
> 
> Thanks for letting me know. One thing we can try is check init order
> in v4.20 kernel. Can you please try to compile pci driver for the
> kernel v4.20 tag changing
> driver's last line 'arch_initcall' into 'module_init'? Just to know if
> at that working driver putting all the stuff in a later stage stills
> work as expected.
> 
> Full dmesg's of this v4.20 wih the change would be helpful.

Not exactly what you asked for, but just as useful I think.
I have a linux-5.1.14 kernel with the linux-4.20 pci-mt7621.c
driver in place. That works great, never hangs, always probes
PCI and works.

If I change the pci-mt7621.c arch_initcall() to module_init(),
then I see the PCI probe happen much latter in boot. Running this
I have booted about 15 times, no hangs, PCI bus probed and working
on every boot.

Boot log below.

Regards
Greg



Linux version 5.1.14 (gerg@goober) (gcc version 5.4.0 (GCC)) #2 SMP Tue Jun 25 14:34:27 AEST 2019
SoC Type: MediaTek MT7621 ver:1 eco:3
printk: bootconsole [early0] enabled
CPU0 revision is: 0001992f (MIPS 1004Kc)
OF: fdt: No chosen node found, continuing without
MIPS: machine is Digi EX15
Determined physical RAM map:
  memory: 10000000 @ 00000000 (usable)
Initrd not found or empty - disabling initrd
VPE topology {2,2} total 4
Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
Zone ranges:
   Normal   [mem 0x0000000000000000-0x000000000fffffff]
Movable zone start for each node
Early memory node ranges
   node   0: [mem 0x0000000000000000-0x000000000fffffff]
Initmem setup node 0 [mem 0x0000000000000000-0x000000000fffffff]
random: get_random_bytes called from start_kernel+0xb0/0x51c with crng_init=0
percpu: Embedded 15 pages/cpu s30144 r8192 d23104 u61440
Built 1 zonelists, mobility grouping on.  Total pages: 65024
Kernel command line:  console=ttyS0,115200 ubi.mtd=3 root=/dev/mtdblock5 bootpart=a
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Writing ErrCtl register=00030517
Readback ErrCtl register=00030517
Memory: 251176K/262144K available (6464K kernel code, 243K rwdata, 1200K rodata, 272K init, 228K bss, 10968K reserved, 0K cma-reserved)
SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
rcu: Hierarchical RCU implementation.
rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
NR_IRQS: 256
clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps every 21474836475000000ns
Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
rcu: Hierarchical SRCU implementation.
smp: Bringing up secondary CPUs ...
Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
CPU1 revision is: 0001992f (MIPS 1004Kc)
Synchronize counters for CPU 1: done.
Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
CPU2 revision is: 0001992f (MIPS 1004Kc)
Synchronize counters for CPU 2: done.
Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
CPU3 revision is: 0001992f (MIPS 1004Kc)
Synchronize counters for CPU 3: done.
smp: Brought up 1 node, 4 CPUs
devtmpfs: initialized
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
futex hash table entries: 1024 (order: 3, 32768 bytes)
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
pcf857x 0-0026: probed
i2c-mt7621 1e000900.i2c: clock 400KHz, re-start not support
clocksource: Switched to clocksource GIC
NET: Registered protocol family 2
tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes)
TCP established hash table entries: 2048 (order: 1, 8192 bytes)
TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
UDP hash table entries: 256 (order: 1, 8192 bytes)
UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
NET: Registered protocol family 1
workingset: timestamp_bits=30 max_order=16 bucket_order=0
squashfs: version 4.0 (2009/01/31) Phillip Lougher
random: fast init done
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
mt7621_gpio 1e000600.gpio: registering 32 gpios
mt7621_gpio 1e000600.gpio: registering 32 gpios
mt7621_gpio 1e000600.gpio: registering 32 gpios
Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
printk: console [ttyS0] disabled
1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 18, base_baud = 3125000) is a 16550A
printk: console [ttyS0] enabled
printk: console [ttyS0] enabled
printk: bootconsole [early0] disabled
printk: bootconsole [early0] disabled
1e000d00.uartlite: ttyS1 at MMIO 0x1e000d00 (irq = 19, base_baud = 3125000) is a 16550A
cacheinfo: Failed to find cpu0 device node
cacheinfo: Unable to detect cache hierarchy for CPU 0
brd: module loaded
mt7621-nand: NAND register bank at 0xbe003000
mt7621-nand: NAND ECC register bank at 0xbe003800
nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xdc
nand: Micron NAND 512MiB 3,3V 8-bit
nand: 512 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
nand: ecc bit: 4, spare_per_sector: 16
Bad block table found at page 262080, version 0x01
Bad block table found at page 262016, version 0x01
5 fixed-partitions partitions found on MTD device MT7621-NAND
Creating 5 MTD partitions on "MT7621-NAND":
0x000000000000-0x000000200000 : "u-boot"
0x000000200000-0x000000300000 : "u-boot-env"
0x000000300000-0x000000500000 : "log"
0x000000500000-0x000020000000 : "flash"
0x000000000000-0x000020000000 : "all"
libphy: Fixed MDIO Bus: probed
tun: Universal TUN/TAP device driver, 1.6
libphy: mdio: probed
mtk_soc_eth 1e100000.ethernet: generated random MAC address c6:f5:21:ba:39:d3
mtk_soc_eth 1e100000.ethernet: connected mac 0 to PHY at fixed-0:00 [uid=00000000, driver=Generic PHY]
mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
PPP generic driver version 2.4.2
PPP BSD Compression module registered
PPP Deflate Compression module registered
PPP MPPE Compression module registered
NET: Registered protocol family 24
SLIP: version 0.8.4-NET3.019-NEWTTY (dynamic channels, max=256).
CSLIP: code copyright 1989 Regents of the University of California.
usbcore: registered new interface driver asix
usbcore: registered new interface driver ax88179_178a
usbcore: registered new interface driver cdc_ether
usbcore: registered new interface driver cdc_eem
usbcore: registered new interface driver rndis_host
usbcore: registered new interface driver cdc_subset
usbcore: registered new interface driver cdc_ncm
usbcore: registered new interface driver qmi_wwan
usbcore: registered new interface driver cdc_mbim
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci-pci: EHCI PCI platform driver
ehci-platform: EHCI generic platform driver
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
ohci-pci: OHCI PCI platform driver
xhci-mtk 1e1c0000.xhci: xHCI Host Controller
xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 1
xhci-mtk 1e1c0000.xhci: hcc params 0x01401198 hci version 0x96 quirks 0x0000000000210010
xhci-mtk 1e1c0000.xhci: irq 20, io mem 0x1e1c0000
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.01
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: xHCI Host Controller
usb usb1: Manufacturer: Linux 5.1.14-ac0 xhci-hcd
usb usb1: SerialNumber: 1e1c0000.xhci
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 2 ports detected
xhci-mtk 1e1c0000.xhci: xHCI Host Controller
xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 2
xhci-mtk 1e1c0000.xhci: Host supports USB 3.0  SuperSpeed
usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.01
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: xHCI Host Controller
usb usb2: Manufacturer: Linux 5.1.14-ac0 xhci-hcd
usb usb2: SerialNumber: 1e1c0000.xhci
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 1 port detected
usbcore: registered new interface driver cdc_acm
cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
usbcore: registered new interface driver cdc_wdm
usbcore: registered new interface driver usb-storage
usbcore: registered new interface driver usbserial_generic
usbserial: USB Serial support registered for generic
usbcore: registered new interface driver ipw
usbserial: USB Serial support registered for IPWireless converter
usbcore: registered new interface driver option
usbserial: USB Serial support registered for GSM modem (1-port)
usbcore: registered new interface driver qcaux
usbserial: USB Serial support registered for qcaux
usbcore: registered new interface driver qcserial
usbserial: USB Serial support registered for Qualcomm USB modem
usbcore: registered new interface driver quatech2
usbserial: USB Serial support registered for Quatech 2nd gen USB to Serial Driver
usbcore: registered new interface driver usb_serial_simple
usbserial: USB Serial support registered for carelink
usbserial: USB Serial support registered for zio
usbserial: USB Serial support registered for funsoft
usbserial: USB Serial support registered for flashloader
usbserial: USB Serial support registered for google
usbserial: USB Serial support registered for libtransistor
usbserial: USB Serial support registered for vivopay
usbserial: USB Serial support registered for moto_modem
usbserial: USB Serial support registered for motorola_tetra
usbserial: USB Serial support registered for novatel_gps
usbserial: USB Serial support registered for hp4x
usbserial: USB Serial support registered for suunto
usbserial: USB Serial support registered for siemens_mpi
***** Xtal 40MHz *****
PCIE1 no card, disable it(RST&CLK)
PCIE2 no card, disable it(RST&CLK)
PCIE0 enabled
PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [io  0xffffffff]
pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
pci_bus 0000:00: root bus resource [bus 00-ff]
pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
pci 0000:00:00.0: PCI bridge to [bus 01-ff]
pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x601fffff]
pci 0000:00:00.0: BAR 9: assigned [mem 0x60200000-0x602fffff pref]
pci 0000:00:00.0: BAR 1: assigned [mem 0x60300000-0x6030ffff]
pci 0000:00:00.0: BAR 7: no space for [io  size 0x1000]
pci 0000:00:00.0: BAR 7: failed to assign [io  size 0x1000]
pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x601fffff 64bit]
pci 0000:01:00.0: BAR 6: assigned [mem 0x60200000-0x6020ffff pref]
pci 0000:00:00.0: PCI bridge to [bus 01]
pci 0000:00:00.0:   bridge window [mem 0x60000000-0x601fffff]
pci 0000:00:00.0:   bridge window [mem 0x60200000-0x602fffff pref]
pcieport 0000:00:00.0: of_irq_parse_pci: failed with rc=-22
pcieport 0000:00:00.0: enabling device (0004 -> 0006)
u32 classifier
     input device check on
ipip: IPv4 and MPLS over IPv4 tunneling driver
gre: GRE over IPv4 demultiplexor driver
ip_gre: GRE over IPv4 tunneling driver
Initializing XFRM netlink socket
NET: Registered protocol family 10
Segment Routing with IPv6
sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
NET: Registered protocol family 17
NET: Registered protocol family 15
8021q: 802.1Q VLAN Support v1.8
libphy: dsa slave smi: probed
mt7530 mdio-bus:00 lan (uninitialized): PHY [dsa-0.0:00] driver [Generic PHY]
mt7530 mdio-bus:00 wan (uninitialized): PHY [dsa-0.0:01] driver [Generic PHY]
DSA: tree 0 setup
ubi0: attaching mtd3
ubi0: scanning is finished
ubi0: attached mtd3 (name "flash", size 507 MiB)
ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048
ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096
ubi0: good PEBs: 4052, bad PEBs: 4, corrupted PEBs: 0
ubi0: user volume: 4, internal volumes: 1, max. volumes count: 128
ubi0: max/mean erase counter: 9/4, WL threshold: 4096, image sequence number: 1236486005
ubi0: available PEBs: 0, total reserved PEBs: 4052, PEBs reserved for bad PEB handling: 76
ubi0: background thread "ubi_bgt0d" started, PID 112
hctosys: unable to open rtc device (rtc0)
VFS: Mounted root (squashfs filesystem) readonly on device 31:5.
devtmpfs: mounted
Freeing unused kernel memory: 272K
This architecture does not have kernel memory protection.
Run /sbin/init as init process
Run /etc/init as init process
Run /bin/init as init process


_______________________________________________
devel mailing list
devel@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-06-25  5:10       ` Greg Ungerer
@ 2019-06-25  5:18         ` Sergio Paracuellos
  2019-06-25 12:47           ` Sergio Paracuellos
  0 siblings, 1 reply; 20+ messages in thread
From: Sergio Paracuellos @ 2019-06-25  5:18 UTC (permalink / raw)
  To: Greg Ungerer; +Cc: Greg KH, driverdev-devel, Neil Brown

Hi Greg,

On Tue, Jun 25, 2019 at 7:10 AM Greg Ungerer <gerg@kernel.org> wrote:
>
> Hi Sergio,
>
> On 23/6/19 3:58 pm, Sergio Paracuellos wrote:
> > On Sun, Jun 23, 2019 at 4:15 AM Brett Neumeier <bneumeier@gmail.com> wrote:
> >> On Fri, Jun 21, 2019 at 7:35 AM Greg Ungerer <gerg@kernel.org> wrote:
> >>> On 21/6/19 4:15 pm, Sergio Paracuellos wrote:
> >>>> This patch series properly handle minor issues in this driver. These are:
> >>>> * Disable pcie port clock on pci dirver instead of doing it in the phy
> >>>>     driver. The pci driver is the correct place to do this.
> >>>> * Add a missing call to phy_exit function to properly handle the function
> >>>>     'mt7621_pcie_init_port' error path.
> >>>> * Move driver to init in a later stage using 'module_init' instead of using
> >>>>     'arch_initcall'.
> >>>>
> >>>> Patches are only compile-tested. It would be awasome to be tested before applied
> >>>> them (mainly the change to 'module_init' stuff).
> >>
> >> I have similar results to Greg -- on GnuBee PC1 and PC2, six boot
> >> attempts each on a kernel built from staging-next, I have four hangs
> >> and eight successful boots. The hanging patterns are similar to
> >> previous results. If the full boot logs would be helpful let me know,
> >> I can provide them.
> >
> > Thanks for letting me know. One thing we can try is check init order
> > in v4.20 kernel. Can you please try to compile pci driver for the
> > kernel v4.20 tag changing
> > driver's last line 'arch_initcall' into 'module_init'? Just to know if
> > at that working driver putting all the stuff in a later stage stills
> > work as expected.
> >
> > Full dmesg's of this v4.20 wih the change would be helpful.
>
> Not exactly what you asked for, but just as useful I think.
> I have a linux-5.1.14 kernel with the linux-4.20 pci-mt7621.c
> driver in place. That works great, never hangs, always probes
> PCI and works.
>
> If I change the pci-mt7621.c arch_initcall() to module_init(),
> then I see the PCI probe happen much latter in boot. Running this
> I have booted about 15 times, no hangs, PCI bus probed and working
> on every boot.

Perfect. That is exactly what I wanted to know. Thanks for testing this.

>
> Boot log below.
>
> Regards
> Greg

Best regards,
    Sergio Paracuellos

>
>
>
> Linux version 5.1.14 (gerg@goober) (gcc version 5.4.0 (GCC)) #2 SMP Tue Jun 25 14:34:27 AEST 2019
> SoC Type: MediaTek MT7621 ver:1 eco:3
> printk: bootconsole [early0] enabled
> CPU0 revision is: 0001992f (MIPS 1004Kc)
> OF: fdt: No chosen node found, continuing without
> MIPS: machine is Digi EX15
> Determined physical RAM map:
>   memory: 10000000 @ 00000000 (usable)
> Initrd not found or empty - disabling initrd
> VPE topology {2,2} total 4
> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> Zone ranges:
>    Normal   [mem 0x0000000000000000-0x000000000fffffff]
> Movable zone start for each node
> Early memory node ranges
>    node   0: [mem 0x0000000000000000-0x000000000fffffff]
> Initmem setup node 0 [mem 0x0000000000000000-0x000000000fffffff]
> random: get_random_bytes called from start_kernel+0xb0/0x51c with crng_init=0
> percpu: Embedded 15 pages/cpu s30144 r8192 d23104 u61440
> Built 1 zonelists, mobility grouping on.  Total pages: 65024
> Kernel command line:  console=ttyS0,115200 ubi.mtd=3 root=/dev/mtdblock5 bootpart=a
> Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
> Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
> Writing ErrCtl register=00030517
> Readback ErrCtl register=00030517
> Memory: 251176K/262144K available (6464K kernel code, 243K rwdata, 1200K rodata, 272K init, 228K bss, 10968K reserved, 0K cma-reserved)
> SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
> rcu: Hierarchical RCU implementation.
> rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
> NR_IRQS: 256
> clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
> sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps every 21474836475000000ns
> Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
> pid_max: default: 32768 minimum: 301
> Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
> Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
> rcu: Hierarchical SRCU implementation.
> smp: Bringing up secondary CPUs ...
> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> CPU1 revision is: 0001992f (MIPS 1004Kc)
> Synchronize counters for CPU 1: done.
> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> CPU2 revision is: 0001992f (MIPS 1004Kc)
> Synchronize counters for CPU 2: done.
> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> CPU3 revision is: 0001992f (MIPS 1004Kc)
> Synchronize counters for CPU 3: done.
> smp: Brought up 1 node, 4 CPUs
> devtmpfs: initialized
> clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
> futex hash table entries: 1024 (order: 3, 32768 bytes)
> pinctrl core: initialized pinctrl subsystem
> NET: Registered protocol family 16
> SCSI subsystem initialized
> usbcore: registered new interface driver usbfs
> usbcore: registered new interface driver hub
> usbcore: registered new device driver usb
> pcf857x 0-0026: probed
> i2c-mt7621 1e000900.i2c: clock 400KHz, re-start not support
> clocksource: Switched to clocksource GIC
> NET: Registered protocol family 2
> tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes)
> TCP established hash table entries: 2048 (order: 1, 8192 bytes)
> TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
> TCP: Hash tables configured (established 2048 bind 2048)
> UDP hash table entries: 256 (order: 1, 8192 bytes)
> UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
> NET: Registered protocol family 1
> workingset: timestamp_bits=30 max_order=16 bucket_order=0
> squashfs: version 4.0 (2009/01/31) Phillip Lougher
> random: fast init done
> Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
> mt7621_gpio 1e000600.gpio: registering 32 gpios
> mt7621_gpio 1e000600.gpio: registering 32 gpios
> mt7621_gpio 1e000600.gpio: registering 32 gpios
> Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
> printk: console [ttyS0] disabled
> 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 18, base_baud = 3125000) is a 16550A
> printk: console [ttyS0] enabled
> printk: console [ttyS0] enabled
> printk: bootconsole [early0] disabled
> printk: bootconsole [early0] disabled
> 1e000d00.uartlite: ttyS1 at MMIO 0x1e000d00 (irq = 19, base_baud = 3125000) is a 16550A
> cacheinfo: Failed to find cpu0 device node
> cacheinfo: Unable to detect cache hierarchy for CPU 0
> brd: module loaded
> mt7621-nand: NAND register bank at 0xbe003000
> mt7621-nand: NAND ECC register bank at 0xbe003800
> nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xdc
> nand: Micron NAND 512MiB 3,3V 8-bit
> nand: 512 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
> nand: ecc bit: 4, spare_per_sector: 16
> Bad block table found at page 262080, version 0x01
> Bad block table found at page 262016, version 0x01
> 5 fixed-partitions partitions found on MTD device MT7621-NAND
> Creating 5 MTD partitions on "MT7621-NAND":
> 0x000000000000-0x000000200000 : "u-boot"
> 0x000000200000-0x000000300000 : "u-boot-env"
> 0x000000300000-0x000000500000 : "log"
> 0x000000500000-0x000020000000 : "flash"
> 0x000000000000-0x000020000000 : "all"
> libphy: Fixed MDIO Bus: probed
> tun: Universal TUN/TAP device driver, 1.6
> libphy: mdio: probed
> mtk_soc_eth 1e100000.ethernet: generated random MAC address c6:f5:21:ba:39:d3
> mtk_soc_eth 1e100000.ethernet: connected mac 0 to PHY at fixed-0:00 [uid=00000000, driver=Generic PHY]
> mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
> PPP generic driver version 2.4.2
> PPP BSD Compression module registered
> PPP Deflate Compression module registered
> PPP MPPE Compression module registered
> NET: Registered protocol family 24
> SLIP: version 0.8.4-NET3.019-NEWTTY (dynamic channels, max=256).
> CSLIP: code copyright 1989 Regents of the University of California.
> usbcore: registered new interface driver asix
> usbcore: registered new interface driver ax88179_178a
> usbcore: registered new interface driver cdc_ether
> usbcore: registered new interface driver cdc_eem
> usbcore: registered new interface driver rndis_host
> usbcore: registered new interface driver cdc_subset
> usbcore: registered new interface driver cdc_ncm
> usbcore: registered new interface driver qmi_wwan
> usbcore: registered new interface driver cdc_mbim
> ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
> ehci-pci: EHCI PCI platform driver
> ehci-platform: EHCI generic platform driver
> ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
> ohci-pci: OHCI PCI platform driver
> xhci-mtk 1e1c0000.xhci: xHCI Host Controller
> xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 1
> xhci-mtk 1e1c0000.xhci: hcc params 0x01401198 hci version 0x96 quirks 0x0000000000210010
> xhci-mtk 1e1c0000.xhci: irq 20, io mem 0x1e1c0000
> usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.01
> usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
> usb usb1: Product: xHCI Host Controller
> usb usb1: Manufacturer: Linux 5.1.14-ac0 xhci-hcd
> usb usb1: SerialNumber: 1e1c0000.xhci
> hub 1-0:1.0: USB hub found
> hub 1-0:1.0: 2 ports detected
> xhci-mtk 1e1c0000.xhci: xHCI Host Controller
> xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 2
> xhci-mtk 1e1c0000.xhci: Host supports USB 3.0  SuperSpeed
> usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
> usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.01
> usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
> usb usb2: Product: xHCI Host Controller
> usb usb2: Manufacturer: Linux 5.1.14-ac0 xhci-hcd
> usb usb2: SerialNumber: 1e1c0000.xhci
> hub 2-0:1.0: USB hub found
> hub 2-0:1.0: 1 port detected
> usbcore: registered new interface driver cdc_acm
> cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
> usbcore: registered new interface driver cdc_wdm
> usbcore: registered new interface driver usb-storage
> usbcore: registered new interface driver usbserial_generic
> usbserial: USB Serial support registered for generic
> usbcore: registered new interface driver ipw
> usbserial: USB Serial support registered for IPWireless converter
> usbcore: registered new interface driver option
> usbserial: USB Serial support registered for GSM modem (1-port)
> usbcore: registered new interface driver qcaux
> usbserial: USB Serial support registered for qcaux
> usbcore: registered new interface driver qcserial
> usbserial: USB Serial support registered for Qualcomm USB modem
> usbcore: registered new interface driver quatech2
> usbserial: USB Serial support registered for Quatech 2nd gen USB to Serial Driver
> usbcore: registered new interface driver usb_serial_simple
> usbserial: USB Serial support registered for carelink
> usbserial: USB Serial support registered for zio
> usbserial: USB Serial support registered for funsoft
> usbserial: USB Serial support registered for flashloader
> usbserial: USB Serial support registered for google
> usbserial: USB Serial support registered for libtransistor
> usbserial: USB Serial support registered for vivopay
> usbserial: USB Serial support registered for moto_modem
> usbserial: USB Serial support registered for motorola_tetra
> usbserial: USB Serial support registered for novatel_gps
> usbserial: USB Serial support registered for hp4x
> usbserial: USB Serial support registered for suunto
> usbserial: USB Serial support registered for siemens_mpi
> ***** Xtal 40MHz *****
> PCIE1 no card, disable it(RST&CLK)
> PCIE2 no card, disable it(RST&CLK)
> PCIE0 enabled
> PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
> mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
> pci_bus 0000:00: root bus resource [io  0xffffffff]
> pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
> pci_bus 0000:00: root bus resource [bus 00-ff]
> pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> pci 0000:00:00.0: PCI bridge to [bus 01-ff]
> pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
> pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
> pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x601fffff]
> pci 0000:00:00.0: BAR 9: assigned [mem 0x60200000-0x602fffff pref]
> pci 0000:00:00.0: BAR 1: assigned [mem 0x60300000-0x6030ffff]
> pci 0000:00:00.0: BAR 7: no space for [io  size 0x1000]
> pci 0000:00:00.0: BAR 7: failed to assign [io  size 0x1000]
> pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x601fffff 64bit]
> pci 0000:01:00.0: BAR 6: assigned [mem 0x60200000-0x6020ffff pref]
> pci 0000:00:00.0: PCI bridge to [bus 01]
> pci 0000:00:00.0:   bridge window [mem 0x60000000-0x601fffff]
> pci 0000:00:00.0:   bridge window [mem 0x60200000-0x602fffff pref]
> pcieport 0000:00:00.0: of_irq_parse_pci: failed with rc=-22
> pcieport 0000:00:00.0: enabling device (0004 -> 0006)
> u32 classifier
>      input device check on
> ipip: IPv4 and MPLS over IPv4 tunneling driver
> gre: GRE over IPv4 demultiplexor driver
> ip_gre: GRE over IPv4 tunneling driver
> Initializing XFRM netlink socket
> NET: Registered protocol family 10
> Segment Routing with IPv6
> sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
> NET: Registered protocol family 17
> NET: Registered protocol family 15
> 8021q: 802.1Q VLAN Support v1.8
> libphy: dsa slave smi: probed
> mt7530 mdio-bus:00 lan (uninitialized): PHY [dsa-0.0:00] driver [Generic PHY]
> mt7530 mdio-bus:00 wan (uninitialized): PHY [dsa-0.0:01] driver [Generic PHY]
> DSA: tree 0 setup
> ubi0: attaching mtd3
> ubi0: scanning is finished
> ubi0: attached mtd3 (name "flash", size 507 MiB)
> ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
> ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048
> ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096
> ubi0: good PEBs: 4052, bad PEBs: 4, corrupted PEBs: 0
> ubi0: user volume: 4, internal volumes: 1, max. volumes count: 128
> ubi0: max/mean erase counter: 9/4, WL threshold: 4096, image sequence number: 1236486005
> ubi0: available PEBs: 0, total reserved PEBs: 4052, PEBs reserved for bad PEB handling: 76
> ubi0: background thread "ubi_bgt0d" started, PID 112
> hctosys: unable to open rtc device (rtc0)
> VFS: Mounted root (squashfs filesystem) readonly on device 31:5.
> devtmpfs: mounted
> Freeing unused kernel memory: 272K
> This architecture does not have kernel memory protection.
> Run /sbin/init as init process
> Run /etc/init as init process
> Run /bin/init as init process
>
>
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^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-06-25  5:18         ` Sergio Paracuellos
@ 2019-06-25 12:47           ` Sergio Paracuellos
  2019-06-26  3:31             ` Greg Ungerer
  0 siblings, 1 reply; 20+ messages in thread
From: Sergio Paracuellos @ 2019-06-25 12:47 UTC (permalink / raw)
  To: Greg Ungerer; +Cc: Greg KH, driverdev-devel, Neil Brown

Hi Greg,

On Tue, Jun 25, 2019 at 7:18 AM Sergio Paracuellos
<sergio.paracuellos@gmail.com> wrote:
>
> Hi Greg,
>
> On Tue, Jun 25, 2019 at 7:10 AM Greg Ungerer <gerg@kernel.org> wrote:
> >
> > Hi Sergio,
> >
> > On 23/6/19 3:58 pm, Sergio Paracuellos wrote:
> > > On Sun, Jun 23, 2019 at 4:15 AM Brett Neumeier <bneumeier@gmail.com> wrote:
> > >> On Fri, Jun 21, 2019 at 7:35 AM Greg Ungerer <gerg@kernel.org> wrote:
> > >>> On 21/6/19 4:15 pm, Sergio Paracuellos wrote:
> > >>>> This patch series properly handle minor issues in this driver. These are:
> > >>>> * Disable pcie port clock on pci dirver instead of doing it in the phy
> > >>>>     driver. The pci driver is the correct place to do this.
> > >>>> * Add a missing call to phy_exit function to properly handle the function
> > >>>>     'mt7621_pcie_init_port' error path.
> > >>>> * Move driver to init in a later stage using 'module_init' instead of using
> > >>>>     'arch_initcall'.
> > >>>>
> > >>>> Patches are only compile-tested. It would be awasome to be tested before applied
> > >>>> them (mainly the change to 'module_init' stuff).
> > >>
> > >> I have similar results to Greg -- on GnuBee PC1 and PC2, six boot
> > >> attempts each on a kernel built from staging-next, I have four hangs
> > >> and eight successful boots. The hanging patterns are similar to
> > >> previous results. If the full boot logs would be helpful let me know,
> > >> I can provide them.
> > >
> > > Thanks for letting me know. One thing we can try is check init order
> > > in v4.20 kernel. Can you please try to compile pci driver for the
> > > kernel v4.20 tag changing
> > > driver's last line 'arch_initcall' into 'module_init'? Just to know if
> > > at that working driver putting all the stuff in a later stage stills
> > > work as expected.
> > >
> > > Full dmesg's of this v4.20 wih the change would be helpful.
> >
> > Not exactly what you asked for, but just as useful I think.
> > I have a linux-5.1.14 kernel with the linux-4.20 pci-mt7621.c
> > driver in place. That works great, never hangs, always probes
> > PCI and works.
> >
> > If I change the pci-mt7621.c arch_initcall() to module_init(),
> > then I see the PCI probe happen much latter in boot. Running this
> > I have booted about 15 times, no hangs, PCI bus probed and working
> > on every boot.
>
> Perfect. That is exactly what I wanted to know. Thanks for testing this.
>
> >
> > Boot log below.
> >
> > Regards
> > Greg

Can you please test the following change?

diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c
b/drivers/staging/mt7621-pci/pci-mt7621.c
index a981f4f0ed03..9ae14f722c91 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -41,8 +41,8 @@

 /* MediaTek specific configuration registers */
 #define PCIE_FTS_NUM                   0x70c
-#define PCIE_FTS_NUM_MASK              GENMASK(15, 8)
-#define PCIE_FTS_NUM_L0(x)             ((x) & 0xff << 8)
+#define PCIE_FTS_NUM_MASK              GENMASK(7, 0)
+#define PCIE_FTS_NUM_L0(x)             ((x) << 8)

 /* rt_sysc_membase relative registers */
 #define RALINK_CLKCFG1                 0x30
@@ -540,7 +540,7 @@ static void mt7621_pcie_enable_ports(struct
mt7621_pcie *pcie)
                write_config(pcie, slot, PCI_COMMAND, val);
                /* configure RC FTS number to 250 when it leaves L0s */
                val = read_config(pcie, slot, PCIE_FTS_NUM);
-               val &= ~PCIE_FTS_NUM_MASK;
+               val &= ~(PCIE_FTS_NUM_MASK) << 8;
                val |= PCIE_FTS_NUM_L0(0x50);
                write_config(pcie, slot, PCIE_FTS_NUM, val);
        }

Best regards,
    Sergio Paracuellos

> >
> > Linux version 5.1.14 (gerg@goober) (gcc version 5.4.0 (GCC)) #2 SMP Tue Jun 25 14:34:27 AEST 2019
> > SoC Type: MediaTek MT7621 ver:1 eco:3
> > printk: bootconsole [early0] enabled
> > CPU0 revision is: 0001992f (MIPS 1004Kc)
> > OF: fdt: No chosen node found, continuing without
> > MIPS: machine is Digi EX15
> > Determined physical RAM map:
> >   memory: 10000000 @ 00000000 (usable)
> > Initrd not found or empty - disabling initrd
> > VPE topology {2,2} total 4
> > Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> > Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> > MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> > Zone ranges:
> >    Normal   [mem 0x0000000000000000-0x000000000fffffff]
> > Movable zone start for each node
> > Early memory node ranges
> >    node   0: [mem 0x0000000000000000-0x000000000fffffff]
> > Initmem setup node 0 [mem 0x0000000000000000-0x000000000fffffff]
> > random: get_random_bytes called from start_kernel+0xb0/0x51c with crng_init=0
> > percpu: Embedded 15 pages/cpu s30144 r8192 d23104 u61440
> > Built 1 zonelists, mobility grouping on.  Total pages: 65024
> > Kernel command line:  console=ttyS0,115200 ubi.mtd=3 root=/dev/mtdblock5 bootpart=a
> > Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
> > Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
> > Writing ErrCtl register=00030517
> > Readback ErrCtl register=00030517
> > Memory: 251176K/262144K available (6464K kernel code, 243K rwdata, 1200K rodata, 272K init, 228K bss, 10968K reserved, 0K cma-reserved)
> > SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
> > rcu: Hierarchical RCU implementation.
> > rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
> > NR_IRQS: 256
> > clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
> > sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps every 21474836475000000ns
> > Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
> > pid_max: default: 32768 minimum: 301
> > Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
> > Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
> > rcu: Hierarchical SRCU implementation.
> > smp: Bringing up secondary CPUs ...
> > Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> > Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> > MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> > CPU1 revision is: 0001992f (MIPS 1004Kc)
> > Synchronize counters for CPU 1: done.
> > Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> > Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> > MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> > CPU2 revision is: 0001992f (MIPS 1004Kc)
> > Synchronize counters for CPU 2: done.
> > Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> > Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> > MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> > CPU3 revision is: 0001992f (MIPS 1004Kc)
> > Synchronize counters for CPU 3: done.
> > smp: Brought up 1 node, 4 CPUs
> > devtmpfs: initialized
> > clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
> > futex hash table entries: 1024 (order: 3, 32768 bytes)
> > pinctrl core: initialized pinctrl subsystem
> > NET: Registered protocol family 16
> > SCSI subsystem initialized
> > usbcore: registered new interface driver usbfs
> > usbcore: registered new interface driver hub
> > usbcore: registered new device driver usb
> > pcf857x 0-0026: probed
> > i2c-mt7621 1e000900.i2c: clock 400KHz, re-start not support
> > clocksource: Switched to clocksource GIC
> > NET: Registered protocol family 2
> > tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes)
> > TCP established hash table entries: 2048 (order: 1, 8192 bytes)
> > TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
> > TCP: Hash tables configured (established 2048 bind 2048)
> > UDP hash table entries: 256 (order: 1, 8192 bytes)
> > UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
> > NET: Registered protocol family 1
> > workingset: timestamp_bits=30 max_order=16 bucket_order=0
> > squashfs: version 4.0 (2009/01/31) Phillip Lougher
> > random: fast init done
> > Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
> > mt7621_gpio 1e000600.gpio: registering 32 gpios
> > mt7621_gpio 1e000600.gpio: registering 32 gpios
> > mt7621_gpio 1e000600.gpio: registering 32 gpios
> > Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
> > printk: console [ttyS0] disabled
> > 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 18, base_baud = 3125000) is a 16550A
> > printk: console [ttyS0] enabled
> > printk: console [ttyS0] enabled
> > printk: bootconsole [early0] disabled
> > printk: bootconsole [early0] disabled
> > 1e000d00.uartlite: ttyS1 at MMIO 0x1e000d00 (irq = 19, base_baud = 3125000) is a 16550A
> > cacheinfo: Failed to find cpu0 device node
> > cacheinfo: Unable to detect cache hierarchy for CPU 0
> > brd: module loaded
> > mt7621-nand: NAND register bank at 0xbe003000
> > mt7621-nand: NAND ECC register bank at 0xbe003800
> > nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xdc
> > nand: Micron NAND 512MiB 3,3V 8-bit
> > nand: 512 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
> > nand: ecc bit: 4, spare_per_sector: 16
> > Bad block table found at page 262080, version 0x01
> > Bad block table found at page 262016, version 0x01
> > 5 fixed-partitions partitions found on MTD device MT7621-NAND
> > Creating 5 MTD partitions on "MT7621-NAND":
> > 0x000000000000-0x000000200000 : "u-boot"
> > 0x000000200000-0x000000300000 : "u-boot-env"
> > 0x000000300000-0x000000500000 : "log"
> > 0x000000500000-0x000020000000 : "flash"
> > 0x000000000000-0x000020000000 : "all"
> > libphy: Fixed MDIO Bus: probed
> > tun: Universal TUN/TAP device driver, 1.6
> > libphy: mdio: probed
> > mtk_soc_eth 1e100000.ethernet: generated random MAC address c6:f5:21:ba:39:d3
> > mtk_soc_eth 1e100000.ethernet: connected mac 0 to PHY at fixed-0:00 [uid=00000000, driver=Generic PHY]
> > mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
> > PPP generic driver version 2.4.2
> > PPP BSD Compression module registered
> > PPP Deflate Compression module registered
> > PPP MPPE Compression module registered
> > NET: Registered protocol family 24
> > SLIP: version 0.8.4-NET3.019-NEWTTY (dynamic channels, max=256).
> > CSLIP: code copyright 1989 Regents of the University of California.
> > usbcore: registered new interface driver asix
> > usbcore: registered new interface driver ax88179_178a
> > usbcore: registered new interface driver cdc_ether
> > usbcore: registered new interface driver cdc_eem
> > usbcore: registered new interface driver rndis_host
> > usbcore: registered new interface driver cdc_subset
> > usbcore: registered new interface driver cdc_ncm
> > usbcore: registered new interface driver qmi_wwan
> > usbcore: registered new interface driver cdc_mbim
> > ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
> > ehci-pci: EHCI PCI platform driver
> > ehci-platform: EHCI generic platform driver
> > ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
> > ohci-pci: OHCI PCI platform driver
> > xhci-mtk 1e1c0000.xhci: xHCI Host Controller
> > xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 1
> > xhci-mtk 1e1c0000.xhci: hcc params 0x01401198 hci version 0x96 quirks 0x0000000000210010
> > xhci-mtk 1e1c0000.xhci: irq 20, io mem 0x1e1c0000
> > usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.01
> > usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
> > usb usb1: Product: xHCI Host Controller
> > usb usb1: Manufacturer: Linux 5.1.14-ac0 xhci-hcd
> > usb usb1: SerialNumber: 1e1c0000.xhci
> > hub 1-0:1.0: USB hub found
> > hub 1-0:1.0: 2 ports detected
> > xhci-mtk 1e1c0000.xhci: xHCI Host Controller
> > xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 2
> > xhci-mtk 1e1c0000.xhci: Host supports USB 3.0  SuperSpeed
> > usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
> > usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.01
> > usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
> > usb usb2: Product: xHCI Host Controller
> > usb usb2: Manufacturer: Linux 5.1.14-ac0 xhci-hcd
> > usb usb2: SerialNumber: 1e1c0000.xhci
> > hub 2-0:1.0: USB hub found
> > hub 2-0:1.0: 1 port detected
> > usbcore: registered new interface driver cdc_acm
> > cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
> > usbcore: registered new interface driver cdc_wdm
> > usbcore: registered new interface driver usb-storage
> > usbcore: registered new interface driver usbserial_generic
> > usbserial: USB Serial support registered for generic
> > usbcore: registered new interface driver ipw
> > usbserial: USB Serial support registered for IPWireless converter
> > usbcore: registered new interface driver option
> > usbserial: USB Serial support registered for GSM modem (1-port)
> > usbcore: registered new interface driver qcaux
> > usbserial: USB Serial support registered for qcaux
> > usbcore: registered new interface driver qcserial
> > usbserial: USB Serial support registered for Qualcomm USB modem
> > usbcore: registered new interface driver quatech2
> > usbserial: USB Serial support registered for Quatech 2nd gen USB to Serial Driver
> > usbcore: registered new interface driver usb_serial_simple
> > usbserial: USB Serial support registered for carelink
> > usbserial: USB Serial support registered for zio
> > usbserial: USB Serial support registered for funsoft
> > usbserial: USB Serial support registered for flashloader
> > usbserial: USB Serial support registered for google
> > usbserial: USB Serial support registered for libtransistor
> > usbserial: USB Serial support registered for vivopay
> > usbserial: USB Serial support registered for moto_modem
> > usbserial: USB Serial support registered for motorola_tetra
> > usbserial: USB Serial support registered for novatel_gps
> > usbserial: USB Serial support registered for hp4x
> > usbserial: USB Serial support registered for suunto
> > usbserial: USB Serial support registered for siemens_mpi
> > ***** Xtal 40MHz *****
> > PCIE1 no card, disable it(RST&CLK)
> > PCIE2 no card, disable it(RST&CLK)
> > PCIE0 enabled
> > PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
> > mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
> > pci_bus 0000:00: root bus resource [io  0xffffffff]
> > pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
> > pci_bus 0000:00: root bus resource [bus 00-ff]
> > pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> > pci 0000:00:00.0: PCI bridge to [bus 01-ff]
> > pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
> > pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
> > pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x601fffff]
> > pci 0000:00:00.0: BAR 9: assigned [mem 0x60200000-0x602fffff pref]
> > pci 0000:00:00.0: BAR 1: assigned [mem 0x60300000-0x6030ffff]
> > pci 0000:00:00.0: BAR 7: no space for [io  size 0x1000]
> > pci 0000:00:00.0: BAR 7: failed to assign [io  size 0x1000]
> > pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x601fffff 64bit]
> > pci 0000:01:00.0: BAR 6: assigned [mem 0x60200000-0x6020ffff pref]
> > pci 0000:00:00.0: PCI bridge to [bus 01]
> > pci 0000:00:00.0:   bridge window [mem 0x60000000-0x601fffff]
> > pci 0000:00:00.0:   bridge window [mem 0x60200000-0x602fffff pref]
> > pcieport 0000:00:00.0: of_irq_parse_pci: failed with rc=-22
> > pcieport 0000:00:00.0: enabling device (0004 -> 0006)
> > u32 classifier
> >      input device check on
> > ipip: IPv4 and MPLS over IPv4 tunneling driver
> > gre: GRE over IPv4 demultiplexor driver
> > ip_gre: GRE over IPv4 tunneling driver
> > Initializing XFRM netlink socket
> > NET: Registered protocol family 10
> > Segment Routing with IPv6
> > sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
> > NET: Registered protocol family 17
> > NET: Registered protocol family 15
> > 8021q: 802.1Q VLAN Support v1.8
> > libphy: dsa slave smi: probed
> > mt7530 mdio-bus:00 lan (uninitialized): PHY [dsa-0.0:00] driver [Generic PHY]
> > mt7530 mdio-bus:00 wan (uninitialized): PHY [dsa-0.0:01] driver [Generic PHY]
> > DSA: tree 0 setup
> > ubi0: attaching mtd3
> > ubi0: scanning is finished
> > ubi0: attached mtd3 (name "flash", size 507 MiB)
> > ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
> > ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048
> > ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096
> > ubi0: good PEBs: 4052, bad PEBs: 4, corrupted PEBs: 0
> > ubi0: user volume: 4, internal volumes: 1, max. volumes count: 128
> > ubi0: max/mean erase counter: 9/4, WL threshold: 4096, image sequence number: 1236486005
> > ubi0: available PEBs: 0, total reserved PEBs: 4052, PEBs reserved for bad PEB handling: 76
> > ubi0: background thread "ubi_bgt0d" started, PID 112
> > hctosys: unable to open rtc device (rtc0)
> > VFS: Mounted root (squashfs filesystem) readonly on device 31:5.
> > devtmpfs: mounted
> > Freeing unused kernel memory: 272K
> > This architecture does not have kernel memory protection.
> > Run /sbin/init as init process
> > Run /etc/init as init process
> > Run /bin/init as init process
> >
> >
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^ permalink raw reply related	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-06-25 12:47           ` Sergio Paracuellos
@ 2019-06-26  3:31             ` Greg Ungerer
  2019-06-26  7:10               ` Sergio Paracuellos
  0 siblings, 1 reply; 20+ messages in thread
From: Greg Ungerer @ 2019-06-26  3:31 UTC (permalink / raw)
  To: Sergio Paracuellos; +Cc: Greg KH, driverdev-devel, Neil Brown

Hi Sergio,

On 25/6/19 10:47 pm, Sergio Paracuellos wrote:
> On Tue, Jun 25, 2019 at 7:18 AM Sergio Paracuellos
> <sergio.paracuellos@gmail.com> wrote:
>> On Tue, Jun 25, 2019 at 7:10 AM Greg Ungerer <gerg@kernel.org> wrote:
>>> On 23/6/19 3:58 pm, Sergio Paracuellos wrote:
>>>> On Sun, Jun 23, 2019 at 4:15 AM Brett Neumeier <bneumeier@gmail.com> wrote:
>>>>> On Fri, Jun 21, 2019 at 7:35 AM Greg Ungerer <gerg@kernel.org> wrote:
>>>>>> On 21/6/19 4:15 pm, Sergio Paracuellos wrote:
>>>>>>> This patch series properly handle minor issues in this driver. These are:
>>>>>>> * Disable pcie port clock on pci dirver instead of doing it in the phy
>>>>>>>      driver. The pci driver is the correct place to do this.
>>>>>>> * Add a missing call to phy_exit function to properly handle the function
>>>>>>>      'mt7621_pcie_init_port' error path.
>>>>>>> * Move driver to init in a later stage using 'module_init' instead of using
>>>>>>>      'arch_initcall'.
>>>>>>>
>>>>>>> Patches are only compile-tested. It would be awasome to be tested before applied
>>>>>>> them (mainly the change to 'module_init' stuff).
>>>>>
>>>>> I have similar results to Greg -- on GnuBee PC1 and PC2, six boot
>>>>> attempts each on a kernel built from staging-next, I have four hangs
>>>>> and eight successful boots. The hanging patterns are similar to
>>>>> previous results. If the full boot logs would be helpful let me know,
>>>>> I can provide them.
>>>>
>>>> Thanks for letting me know. One thing we can try is check init order
>>>> in v4.20 kernel. Can you please try to compile pci driver for the
>>>> kernel v4.20 tag changing
>>>> driver's last line 'arch_initcall' into 'module_init'? Just to know if
>>>> at that working driver putting all the stuff in a later stage stills
>>>> work as expected.
>>>>
>>>> Full dmesg's of this v4.20 wih the change would be helpful.
>>>
>>> Not exactly what you asked for, but just as useful I think.
>>> I have a linux-5.1.14 kernel with the linux-4.20 pci-mt7621.c
>>> driver in place. That works great, never hangs, always probes
>>> PCI and works.
>>>
>>> If I change the pci-mt7621.c arch_initcall() to module_init(),
>>> then I see the PCI probe happen much latter in boot. Running this
>>> I have booted about 15 times, no hangs, PCI bus probed and working
>>> on every boot.
>>
>> Perfect. That is exactly what I wanted to know. Thanks for testing this.
>>
>>>
>>> Boot log below.
>>>
>>> Regards
>>> Greg
> 
> Can you please test the following change?
> 
> diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c
> b/drivers/staging/mt7621-pci/pci-mt7621.c
> index a981f4f0ed03..9ae14f722c91 100644
> --- a/drivers/staging/mt7621-pci/pci-mt7621.c
> +++ b/drivers/staging/mt7621-pci/pci-mt7621.c
> @@ -41,8 +41,8 @@
> 
>   /* MediaTek specific configuration registers */
>   #define PCIE_FTS_NUM                   0x70c
> -#define PCIE_FTS_NUM_MASK              GENMASK(15, 8)
> -#define PCIE_FTS_NUM_L0(x)             ((x) & 0xff << 8)
> +#define PCIE_FTS_NUM_MASK              GENMASK(7, 0)
> +#define PCIE_FTS_NUM_L0(x)             ((x) << 8)
> 
>   /* rt_sysc_membase relative registers */
>   #define RALINK_CLKCFG1                 0x30
> @@ -540,7 +540,7 @@ static void mt7621_pcie_enable_ports(struct
> mt7621_pcie *pcie)
>                  write_config(pcie, slot, PCI_COMMAND, val);
>                  /* configure RC FTS number to 250 when it leaves L0s */
>                  val = read_config(pcie, slot, PCIE_FTS_NUM);
> -               val &= ~PCIE_FTS_NUM_MASK;
> +               val &= ~(PCIE_FTS_NUM_MASK) << 8;
>                  val |= PCIE_FTS_NUM_L0(0x50);
>                  write_config(pcie, slot, PCIE_FTS_NUM, val);
>          }

Same result. Occasional hangs on boot, sometimes it boots all the way up
successfully. But looking at the patch doesn't it do essentially
the same thing?

Regards
Greg

  

> Best regards,
>      Sergio Paracuellos
> 
>>>
>>> Linux version 5.1.14 (gerg@goober) (gcc version 5.4.0 (GCC)) #2 SMP Tue Jun 25 14:34:27 AEST 2019
>>> SoC Type: MediaTek MT7621 ver:1 eco:3
>>> printk: bootconsole [early0] enabled
>>> CPU0 revision is: 0001992f (MIPS 1004Kc)
>>> OF: fdt: No chosen node found, continuing without
>>> MIPS: machine is Digi EX15
>>> Determined physical RAM map:
>>>    memory: 10000000 @ 00000000 (usable)
>>> Initrd not found or empty - disabling initrd
>>> VPE topology {2,2} total 4
>>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
>>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
>>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
>>> Zone ranges:
>>>     Normal   [mem 0x0000000000000000-0x000000000fffffff]
>>> Movable zone start for each node
>>> Early memory node ranges
>>>     node   0: [mem 0x0000000000000000-0x000000000fffffff]
>>> Initmem setup node 0 [mem 0x0000000000000000-0x000000000fffffff]
>>> random: get_random_bytes called from start_kernel+0xb0/0x51c with crng_init=0
>>> percpu: Embedded 15 pages/cpu s30144 r8192 d23104 u61440
>>> Built 1 zonelists, mobility grouping on.  Total pages: 65024
>>> Kernel command line:  console=ttyS0,115200 ubi.mtd=3 root=/dev/mtdblock5 bootpart=a
>>> Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
>>> Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
>>> Writing ErrCtl register=00030517
>>> Readback ErrCtl register=00030517
>>> Memory: 251176K/262144K available (6464K kernel code, 243K rwdata, 1200K rodata, 272K init, 228K bss, 10968K reserved, 0K cma-reserved)
>>> SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
>>> rcu: Hierarchical RCU implementation.
>>> rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
>>> NR_IRQS: 256
>>> clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
>>> sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps every 21474836475000000ns
>>> Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
>>> pid_max: default: 32768 minimum: 301
>>> Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
>>> Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
>>> rcu: Hierarchical SRCU implementation.
>>> smp: Bringing up secondary CPUs ...
>>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
>>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
>>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
>>> CPU1 revision is: 0001992f (MIPS 1004Kc)
>>> Synchronize counters for CPU 1: done.
>>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
>>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
>>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
>>> CPU2 revision is: 0001992f (MIPS 1004Kc)
>>> Synchronize counters for CPU 2: done.
>>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
>>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
>>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
>>> CPU3 revision is: 0001992f (MIPS 1004Kc)
>>> Synchronize counters for CPU 3: done.
>>> smp: Brought up 1 node, 4 CPUs
>>> devtmpfs: initialized
>>> clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
>>> futex hash table entries: 1024 (order: 3, 32768 bytes)
>>> pinctrl core: initialized pinctrl subsystem
>>> NET: Registered protocol family 16
>>> SCSI subsystem initialized
>>> usbcore: registered new interface driver usbfs
>>> usbcore: registered new interface driver hub
>>> usbcore: registered new device driver usb
>>> pcf857x 0-0026: probed
>>> i2c-mt7621 1e000900.i2c: clock 400KHz, re-start not support
>>> clocksource: Switched to clocksource GIC
>>> NET: Registered protocol family 2
>>> tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes)
>>> TCP established hash table entries: 2048 (order: 1, 8192 bytes)
>>> TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
>>> TCP: Hash tables configured (established 2048 bind 2048)
>>> UDP hash table entries: 256 (order: 1, 8192 bytes)
>>> UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
>>> NET: Registered protocol family 1
>>> workingset: timestamp_bits=30 max_order=16 bucket_order=0
>>> squashfs: version 4.0 (2009/01/31) Phillip Lougher
>>> random: fast init done
>>> Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
>>> mt7621_gpio 1e000600.gpio: registering 32 gpios
>>> mt7621_gpio 1e000600.gpio: registering 32 gpios
>>> mt7621_gpio 1e000600.gpio: registering 32 gpios
>>> Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
>>> printk: console [ttyS0] disabled
>>> 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 18, base_baud = 3125000) is a 16550A
>>> printk: console [ttyS0] enabled
>>> printk: console [ttyS0] enabled
>>> printk: bootconsole [early0] disabled
>>> printk: bootconsole [early0] disabled
>>> 1e000d00.uartlite: ttyS1 at MMIO 0x1e000d00 (irq = 19, base_baud = 3125000) is a 16550A
>>> cacheinfo: Failed to find cpu0 device node
>>> cacheinfo: Unable to detect cache hierarchy for CPU 0
>>> brd: module loaded
>>> mt7621-nand: NAND register bank at 0xbe003000
>>> mt7621-nand: NAND ECC register bank at 0xbe003800
>>> nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xdc
>>> nand: Micron NAND 512MiB 3,3V 8-bit
>>> nand: 512 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
>>> nand: ecc bit: 4, spare_per_sector: 16
>>> Bad block table found at page 262080, version 0x01
>>> Bad block table found at page 262016, version 0x01
>>> 5 fixed-partitions partitions found on MTD device MT7621-NAND
>>> Creating 5 MTD partitions on "MT7621-NAND":
>>> 0x000000000000-0x000000200000 : "u-boot"
>>> 0x000000200000-0x000000300000 : "u-boot-env"
>>> 0x000000300000-0x000000500000 : "log"
>>> 0x000000500000-0x000020000000 : "flash"
>>> 0x000000000000-0x000020000000 : "all"
>>> libphy: Fixed MDIO Bus: probed
>>> tun: Universal TUN/TAP device driver, 1.6
>>> libphy: mdio: probed
>>> mtk_soc_eth 1e100000.ethernet: generated random MAC address c6:f5:21:ba:39:d3
>>> mtk_soc_eth 1e100000.ethernet: connected mac 0 to PHY at fixed-0:00 [uid=00000000, driver=Generic PHY]
>>> mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
>>> PPP generic driver version 2.4.2
>>> PPP BSD Compression module registered
>>> PPP Deflate Compression module registered
>>> PPP MPPE Compression module registered
>>> NET: Registered protocol family 24
>>> SLIP: version 0.8.4-NET3.019-NEWTTY (dynamic channels, max=256).
>>> CSLIP: code copyright 1989 Regents of the University of California.
>>> usbcore: registered new interface driver asix
>>> usbcore: registered new interface driver ax88179_178a
>>> usbcore: registered new interface driver cdc_ether
>>> usbcore: registered new interface driver cdc_eem
>>> usbcore: registered new interface driver rndis_host
>>> usbcore: registered new interface driver cdc_subset
>>> usbcore: registered new interface driver cdc_ncm
>>> usbcore: registered new interface driver qmi_wwan
>>> usbcore: registered new interface driver cdc_mbim
>>> ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>>> ehci-pci: EHCI PCI platform driver
>>> ehci-platform: EHCI generic platform driver
>>> ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>>> ohci-pci: OHCI PCI platform driver
>>> xhci-mtk 1e1c0000.xhci: xHCI Host Controller
>>> xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 1
>>> xhci-mtk 1e1c0000.xhci: hcc params 0x01401198 hci version 0x96 quirks 0x0000000000210010
>>> xhci-mtk 1e1c0000.xhci: irq 20, io mem 0x1e1c0000
>>> usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.01
>>> usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>>> usb usb1: Product: xHCI Host Controller
>>> usb usb1: Manufacturer: Linux 5.1.14-ac0 xhci-hcd
>>> usb usb1: SerialNumber: 1e1c0000.xhci
>>> hub 1-0:1.0: USB hub found
>>> hub 1-0:1.0: 2 ports detected
>>> xhci-mtk 1e1c0000.xhci: xHCI Host Controller
>>> xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 2
>>> xhci-mtk 1e1c0000.xhci: Host supports USB 3.0  SuperSpeed
>>> usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
>>> usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.01
>>> usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>>> usb usb2: Product: xHCI Host Controller
>>> usb usb2: Manufacturer: Linux 5.1.14-ac0 xhci-hcd
>>> usb usb2: SerialNumber: 1e1c0000.xhci
>>> hub 2-0:1.0: USB hub found
>>> hub 2-0:1.0: 1 port detected
>>> usbcore: registered new interface driver cdc_acm
>>> cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
>>> usbcore: registered new interface driver cdc_wdm
>>> usbcore: registered new interface driver usb-storage
>>> usbcore: registered new interface driver usbserial_generic
>>> usbserial: USB Serial support registered for generic
>>> usbcore: registered new interface driver ipw
>>> usbserial: USB Serial support registered for IPWireless converter
>>> usbcore: registered new interface driver option
>>> usbserial: USB Serial support registered for GSM modem (1-port)
>>> usbcore: registered new interface driver qcaux
>>> usbserial: USB Serial support registered for qcaux
>>> usbcore: registered new interface driver qcserial
>>> usbserial: USB Serial support registered for Qualcomm USB modem
>>> usbcore: registered new interface driver quatech2
>>> usbserial: USB Serial support registered for Quatech 2nd gen USB to Serial Driver
>>> usbcore: registered new interface driver usb_serial_simple
>>> usbserial: USB Serial support registered for carelink
>>> usbserial: USB Serial support registered for zio
>>> usbserial: USB Serial support registered for funsoft
>>> usbserial: USB Serial support registered for flashloader
>>> usbserial: USB Serial support registered for google
>>> usbserial: USB Serial support registered for libtransistor
>>> usbserial: USB Serial support registered for vivopay
>>> usbserial: USB Serial support registered for moto_modem
>>> usbserial: USB Serial support registered for motorola_tetra
>>> usbserial: USB Serial support registered for novatel_gps
>>> usbserial: USB Serial support registered for hp4x
>>> usbserial: USB Serial support registered for suunto
>>> usbserial: USB Serial support registered for siemens_mpi
>>> ***** Xtal 40MHz *****
>>> PCIE1 no card, disable it(RST&CLK)
>>> PCIE2 no card, disable it(RST&CLK)
>>> PCIE0 enabled
>>> PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
>>> mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
>>> pci_bus 0000:00: root bus resource [io  0xffffffff]
>>> pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
>>> pci_bus 0000:00: root bus resource [bus 00-ff]
>>> pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
>>> pci 0000:00:00.0: PCI bridge to [bus 01-ff]
>>> pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
>>> pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
>>> pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x601fffff]
>>> pci 0000:00:00.0: BAR 9: assigned [mem 0x60200000-0x602fffff pref]
>>> pci 0000:00:00.0: BAR 1: assigned [mem 0x60300000-0x6030ffff]
>>> pci 0000:00:00.0: BAR 7: no space for [io  size 0x1000]
>>> pci 0000:00:00.0: BAR 7: failed to assign [io  size 0x1000]
>>> pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x601fffff 64bit]
>>> pci 0000:01:00.0: BAR 6: assigned [mem 0x60200000-0x6020ffff pref]
>>> pci 0000:00:00.0: PCI bridge to [bus 01]
>>> pci 0000:00:00.0:   bridge window [mem 0x60000000-0x601fffff]
>>> pci 0000:00:00.0:   bridge window [mem 0x60200000-0x602fffff pref]
>>> pcieport 0000:00:00.0: of_irq_parse_pci: failed with rc=-22
>>> pcieport 0000:00:00.0: enabling device (0004 -> 0006)
>>> u32 classifier
>>>       input device check on
>>> ipip: IPv4 and MPLS over IPv4 tunneling driver
>>> gre: GRE over IPv4 demultiplexor driver
>>> ip_gre: GRE over IPv4 tunneling driver
>>> Initializing XFRM netlink socket
>>> NET: Registered protocol family 10
>>> Segment Routing with IPv6
>>> sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
>>> NET: Registered protocol family 17
>>> NET: Registered protocol family 15
>>> 8021q: 802.1Q VLAN Support v1.8
>>> libphy: dsa slave smi: probed
>>> mt7530 mdio-bus:00 lan (uninitialized): PHY [dsa-0.0:00] driver [Generic PHY]
>>> mt7530 mdio-bus:00 wan (uninitialized): PHY [dsa-0.0:01] driver [Generic PHY]
>>> DSA: tree 0 setup
>>> ubi0: attaching mtd3
>>> ubi0: scanning is finished
>>> ubi0: attached mtd3 (name "flash", size 507 MiB)
>>> ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
>>> ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048
>>> ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096
>>> ubi0: good PEBs: 4052, bad PEBs: 4, corrupted PEBs: 0
>>> ubi0: user volume: 4, internal volumes: 1, max. volumes count: 128
>>> ubi0: max/mean erase counter: 9/4, WL threshold: 4096, image sequence number: 1236486005
>>> ubi0: available PEBs: 0, total reserved PEBs: 4052, PEBs reserved for bad PEB handling: 76
>>> ubi0: background thread "ubi_bgt0d" started, PID 112
>>> hctosys: unable to open rtc device (rtc0)
>>> VFS: Mounted root (squashfs filesystem) readonly on device 31:5.
>>> devtmpfs: mounted
>>> Freeing unused kernel memory: 272K
>>> This architecture does not have kernel memory protection.
>>> Run /sbin/init as init process
>>> Run /etc/init as init process
>>> Run /bin/init as init process
>>>
>>>
> 
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^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-06-26  3:31             ` Greg Ungerer
@ 2019-06-26  7:10               ` Sergio Paracuellos
  2019-06-26 12:18                 ` Greg Ungerer
  0 siblings, 1 reply; 20+ messages in thread
From: Sergio Paracuellos @ 2019-06-26  7:10 UTC (permalink / raw)
  To: Greg Ungerer; +Cc: Greg KH, driverdev-devel, Neil Brown

Hi Greg,

On Wed, Jun 26, 2019 at 5:31 AM Greg Ungerer <gerg@kernel.org> wrote:
>
> Hi Sergio,
>
> On 25/6/19 10:47 pm, Sergio Paracuellos wrote:
> > On Tue, Jun 25, 2019 at 7:18 AM Sergio Paracuellos
> > <sergio.paracuellos@gmail.com> wrote:
> >> On Tue, Jun 25, 2019 at 7:10 AM Greg Ungerer <gerg@kernel.org> wrote:
> >>> On 23/6/19 3:58 pm, Sergio Paracuellos wrote:
> >>>> On Sun, Jun 23, 2019 at 4:15 AM Brett Neumeier <bneumeier@gmail.com> wrote:
> >>>>> On Fri, Jun 21, 2019 at 7:35 AM Greg Ungerer <gerg@kernel.org> wrote:
> >>>>>> On 21/6/19 4:15 pm, Sergio Paracuellos wrote:
> >>>>>>> This patch series properly handle minor issues in this driver. These are:
> >>>>>>> * Disable pcie port clock on pci dirver instead of doing it in the phy
> >>>>>>>      driver. The pci driver is the correct place to do this.
> >>>>>>> * Add a missing call to phy_exit function to properly handle the function
> >>>>>>>      'mt7621_pcie_init_port' error path.
> >>>>>>> * Move driver to init in a later stage using 'module_init' instead of using
> >>>>>>>      'arch_initcall'.
> >>>>>>>
> >>>>>>> Patches are only compile-tested. It would be awasome to be tested before applied
> >>>>>>> them (mainly the change to 'module_init' stuff).
> >>>>>
> >>>>> I have similar results to Greg -- on GnuBee PC1 and PC2, six boot
> >>>>> attempts each on a kernel built from staging-next, I have four hangs
> >>>>> and eight successful boots. The hanging patterns are similar to
> >>>>> previous results. If the full boot logs would be helpful let me know,
> >>>>> I can provide them.
> >>>>
> >>>> Thanks for letting me know. One thing we can try is check init order
> >>>> in v4.20 kernel. Can you please try to compile pci driver for the
> >>>> kernel v4.20 tag changing
> >>>> driver's last line 'arch_initcall' into 'module_init'? Just to know if
> >>>> at that working driver putting all the stuff in a later stage stills
> >>>> work as expected.
> >>>>
> >>>> Full dmesg's of this v4.20 wih the change would be helpful.
> >>>
> >>> Not exactly what you asked for, but just as useful I think.
> >>> I have a linux-5.1.14 kernel with the linux-4.20 pci-mt7621.c
> >>> driver in place. That works great, never hangs, always probes
> >>> PCI and works.
> >>>
> >>> If I change the pci-mt7621.c arch_initcall() to module_init(),
> >>> then I see the PCI probe happen much latter in boot. Running this
> >>> I have booted about 15 times, no hangs, PCI bus probed and working
> >>> on every boot.
> >>
> >> Perfect. That is exactly what I wanted to know. Thanks for testing this.
> >>
> >>>
> >>> Boot log below.
> >>>
> >>> Regards
> >>> Greg
> >
> > Can you please test the following change?
> >
> > diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c
> > b/drivers/staging/mt7621-pci/pci-mt7621.c
> > index a981f4f0ed03..9ae14f722c91 100644
> > --- a/drivers/staging/mt7621-pci/pci-mt7621.c
> > +++ b/drivers/staging/mt7621-pci/pci-mt7621.c
> > @@ -41,8 +41,8 @@
> >
> >   /* MediaTek specific configuration registers */
> >   #define PCIE_FTS_NUM                   0x70c
> > -#define PCIE_FTS_NUM_MASK              GENMASK(15, 8)
> > -#define PCIE_FTS_NUM_L0(x)             ((x) & 0xff << 8)
> > +#define PCIE_FTS_NUM_MASK              GENMASK(7, 0)
> > +#define PCIE_FTS_NUM_L0(x)             ((x) << 8)
> >
> >   /* rt_sysc_membase relative registers */
> >   #define RALINK_CLKCFG1                 0x30
> > @@ -540,7 +540,7 @@ static void mt7621_pcie_enable_ports(struct
> > mt7621_pcie *pcie)
> >                  write_config(pcie, slot, PCI_COMMAND, val);
> >                  /* configure RC FTS number to 250 when it leaves L0s */
> >                  val = read_config(pcie, slot, PCIE_FTS_NUM);
> > -               val &= ~PCIE_FTS_NUM_MASK;
> > +               val &= ~(PCIE_FTS_NUM_MASK) << 8;
> >                  val |= PCIE_FTS_NUM_L0(0x50);
> >                  write_config(pcie, slot, PCIE_FTS_NUM, val);
> >          }
>
> Same result. Occasional hangs on boot, sometimes it boots all the way up
> successfully.

No lucky for us again :(

> But looking at the patch doesn't it do essentiall
> the same thing?

Well, it looks like the same thing but I wrote this two in the way the
are in the original code, But it is not exactly the
same because the following:

#define PCIE_FTS_NUM_L0(x)             ((x) & 0xff << 8)

should be

#define PCIE_FTS_NUM_L0(x)             (((x) & 0xff) << 8)

A parenthesis is missing there to be exactly the same. I rewrote bad
those two. But it seems it doesn't matter...

Original code in v4.20:

val &= ~(0xff) << 8;
val |= 0x50 << 8;
write_config(pcie, 0, 0x70c, val);

Now:

#define PCIE_FTS_NUM                 0x70c
#define PCIE_FTS_NUM_MASK      GENMASK(15, 8)
#define PCIE_FTS_NUM_L0(x)         ((x) & 0xff << 8)

val = read_config(pcie, slot, PCIE_FTS_NUM);
val &= ~PCIE_FTS_NUM_MASK;
val |= PCIE_FTS_NUM_L0(0x50);
write_config(pcie, slot, PCIE_FTS_NUM, val);

Without the parenthesis the 0x50 is getting into 0's right? instead of
just moving itself 8 bits left.

>
> Regards
> Greg
>

Best regards,
    Sergio Paracuellos

>
>
> > Best regards,
> >      Sergio Paracuellos
> >
> >>>
> >>> Linux version 5.1.14 (gerg@goober) (gcc version 5.4.0 (GCC)) #2 SMP Tue Jun 25 14:34:27 AEST 2019
> >>> SoC Type: MediaTek MT7621 ver:1 eco:3
> >>> printk: bootconsole [early0] enabled
> >>> CPU0 revision is: 0001992f (MIPS 1004Kc)
> >>> OF: fdt: No chosen node found, continuing without
> >>> MIPS: machine is Digi EX15
> >>> Determined physical RAM map:
> >>>    memory: 10000000 @ 00000000 (usable)
> >>> Initrd not found or empty - disabling initrd
> >>> VPE topology {2,2} total 4
> >>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> >>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> >>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> >>> Zone ranges:
> >>>     Normal   [mem 0x0000000000000000-0x000000000fffffff]
> >>> Movable zone start for each node
> >>> Early memory node ranges
> >>>     node   0: [mem 0x0000000000000000-0x000000000fffffff]
> >>> Initmem setup node 0 [mem 0x0000000000000000-0x000000000fffffff]
> >>> random: get_random_bytes called from start_kernel+0xb0/0x51c with crng_init=0
> >>> percpu: Embedded 15 pages/cpu s30144 r8192 d23104 u61440
> >>> Built 1 zonelists, mobility grouping on.  Total pages: 65024
> >>> Kernel command line:  console=ttyS0,115200 ubi.mtd=3 root=/dev/mtdblock5 bootpart=a
> >>> Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
> >>> Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
> >>> Writing ErrCtl register=00030517
> >>> Readback ErrCtl register=00030517
> >>> Memory: 251176K/262144K available (6464K kernel code, 243K rwdata, 1200K rodata, 272K init, 228K bss, 10968K reserved, 0K cma-reserved)
> >>> SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
> >>> rcu: Hierarchical RCU implementation.
> >>> rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
> >>> NR_IRQS: 256
> >>> clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
> >>> sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps every 21474836475000000ns
> >>> Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
> >>> pid_max: default: 32768 minimum: 301
> >>> Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
> >>> Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
> >>> rcu: Hierarchical SRCU implementation.
> >>> smp: Bringing up secondary CPUs ...
> >>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> >>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> >>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> >>> CPU1 revision is: 0001992f (MIPS 1004Kc)
> >>> Synchronize counters for CPU 1: done.
> >>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> >>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> >>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> >>> CPU2 revision is: 0001992f (MIPS 1004Kc)
> >>> Synchronize counters for CPU 2: done.
> >>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> >>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> >>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> >>> CPU3 revision is: 0001992f (MIPS 1004Kc)
> >>> Synchronize counters for CPU 3: done.
> >>> smp: Brought up 1 node, 4 CPUs
> >>> devtmpfs: initialized
> >>> clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
> >>> futex hash table entries: 1024 (order: 3, 32768 bytes)
> >>> pinctrl core: initialized pinctrl subsystem
> >>> NET: Registered protocol family 16
> >>> SCSI subsystem initialized
> >>> usbcore: registered new interface driver usbfs
> >>> usbcore: registered new interface driver hub
> >>> usbcore: registered new device driver usb
> >>> pcf857x 0-0026: probed
> >>> i2c-mt7621 1e000900.i2c: clock 400KHz, re-start not support
> >>> clocksource: Switched to clocksource GIC
> >>> NET: Registered protocol family 2
> >>> tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes)
> >>> TCP established hash table entries: 2048 (order: 1, 8192 bytes)
> >>> TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
> >>> TCP: Hash tables configured (established 2048 bind 2048)
> >>> UDP hash table entries: 256 (order: 1, 8192 bytes)
> >>> UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
> >>> NET: Registered protocol family 1
> >>> workingset: timestamp_bits=30 max_order=16 bucket_order=0
> >>> squashfs: version 4.0 (2009/01/31) Phillip Lougher
> >>> random: fast init done
> >>> Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
> >>> mt7621_gpio 1e000600.gpio: registering 32 gpios
> >>> mt7621_gpio 1e000600.gpio: registering 32 gpios
> >>> mt7621_gpio 1e000600.gpio: registering 32 gpios
> >>> Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
> >>> printk: console [ttyS0] disabled
> >>> 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 18, base_baud = 3125000) is a 16550A
> >>> printk: console [ttyS0] enabled
> >>> printk: console [ttyS0] enabled
> >>> printk: bootconsole [early0] disabled
> >>> printk: bootconsole [early0] disabled
> >>> 1e000d00.uartlite: ttyS1 at MMIO 0x1e000d00 (irq = 19, base_baud = 3125000) is a 16550A
> >>> cacheinfo: Failed to find cpu0 device node
> >>> cacheinfo: Unable to detect cache hierarchy for CPU 0
> >>> brd: module loaded
> >>> mt7621-nand: NAND register bank at 0xbe003000
> >>> mt7621-nand: NAND ECC register bank at 0xbe003800
> >>> nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xdc
> >>> nand: Micron NAND 512MiB 3,3V 8-bit
> >>> nand: 512 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
> >>> nand: ecc bit: 4, spare_per_sector: 16
> >>> Bad block table found at page 262080, version 0x01
> >>> Bad block table found at page 262016, version 0x01
> >>> 5 fixed-partitions partitions found on MTD device MT7621-NAND
> >>> Creating 5 MTD partitions on "MT7621-NAND":
> >>> 0x000000000000-0x000000200000 : "u-boot"
> >>> 0x000000200000-0x000000300000 : "u-boot-env"
> >>> 0x000000300000-0x000000500000 : "log"
> >>> 0x000000500000-0x000020000000 : "flash"
> >>> 0x000000000000-0x000020000000 : "all"
> >>> libphy: Fixed MDIO Bus: probed
> >>> tun: Universal TUN/TAP device driver, 1.6
> >>> libphy: mdio: probed
> >>> mtk_soc_eth 1e100000.ethernet: generated random MAC address c6:f5:21:ba:39:d3
> >>> mtk_soc_eth 1e100000.ethernet: connected mac 0 to PHY at fixed-0:00 [uid=00000000, driver=Generic PHY]
> >>> mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
> >>> PPP generic driver version 2.4.2
> >>> PPP BSD Compression module registered
> >>> PPP Deflate Compression module registered
> >>> PPP MPPE Compression module registered
> >>> NET: Registered protocol family 24
> >>> SLIP: version 0.8.4-NET3.019-NEWTTY (dynamic channels, max=256).
> >>> CSLIP: code copyright 1989 Regents of the University of California.
> >>> usbcore: registered new interface driver asix
> >>> usbcore: registered new interface driver ax88179_178a
> >>> usbcore: registered new interface driver cdc_ether
> >>> usbcore: registered new interface driver cdc_eem
> >>> usbcore: registered new interface driver rndis_host
> >>> usbcore: registered new interface driver cdc_subset
> >>> usbcore: registered new interface driver cdc_ncm
> >>> usbcore: registered new interface driver qmi_wwan
> >>> usbcore: registered new interface driver cdc_mbim
> >>> ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
> >>> ehci-pci: EHCI PCI platform driver
> >>> ehci-platform: EHCI generic platform driver
> >>> ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
> >>> ohci-pci: OHCI PCI platform driver
> >>> xhci-mtk 1e1c0000.xhci: xHCI Host Controller
> >>> xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 1
> >>> xhci-mtk 1e1c0000.xhci: hcc params 0x01401198 hci version 0x96 quirks 0x0000000000210010
> >>> xhci-mtk 1e1c0000.xhci: irq 20, io mem 0x1e1c0000
> >>> usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.01
> >>> usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
> >>> usb usb1: Product: xHCI Host Controller
> >>> usb usb1: Manufacturer: Linux 5.1.14-ac0 xhci-hcd
> >>> usb usb1: SerialNumber: 1e1c0000.xhci
> >>> hub 1-0:1.0: USB hub found
> >>> hub 1-0:1.0: 2 ports detected
> >>> xhci-mtk 1e1c0000.xhci: xHCI Host Controller
> >>> xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 2
> >>> xhci-mtk 1e1c0000.xhci: Host supports USB 3.0  SuperSpeed
> >>> usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
> >>> usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.01
> >>> usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
> >>> usb usb2: Product: xHCI Host Controller
> >>> usb usb2: Manufacturer: Linux 5.1.14-ac0 xhci-hcd
> >>> usb usb2: SerialNumber: 1e1c0000.xhci
> >>> hub 2-0:1.0: USB hub found
> >>> hub 2-0:1.0: 1 port detected
> >>> usbcore: registered new interface driver cdc_acm
> >>> cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
> >>> usbcore: registered new interface driver cdc_wdm
> >>> usbcore: registered new interface driver usb-storage
> >>> usbcore: registered new interface driver usbserial_generic
> >>> usbserial: USB Serial support registered for generic
> >>> usbcore: registered new interface driver ipw
> >>> usbserial: USB Serial support registered for IPWireless converter
> >>> usbcore: registered new interface driver option
> >>> usbserial: USB Serial support registered for GSM modem (1-port)
> >>> usbcore: registered new interface driver qcaux
> >>> usbserial: USB Serial support registered for qcaux
> >>> usbcore: registered new interface driver qcserial
> >>> usbserial: USB Serial support registered for Qualcomm USB modem
> >>> usbcore: registered new interface driver quatech2
> >>> usbserial: USB Serial support registered for Quatech 2nd gen USB to Serial Driver
> >>> usbcore: registered new interface driver usb_serial_simple
> >>> usbserial: USB Serial support registered for carelink
> >>> usbserial: USB Serial support registered for zio
> >>> usbserial: USB Serial support registered for funsoft
> >>> usbserial: USB Serial support registered for flashloader
> >>> usbserial: USB Serial support registered for google
> >>> usbserial: USB Serial support registered for libtransistor
> >>> usbserial: USB Serial support registered for vivopay
> >>> usbserial: USB Serial support registered for moto_modem
> >>> usbserial: USB Serial support registered for motorola_tetra
> >>> usbserial: USB Serial support registered for novatel_gps
> >>> usbserial: USB Serial support registered for hp4x
> >>> usbserial: USB Serial support registered for suunto
> >>> usbserial: USB Serial support registered for siemens_mpi
> >>> ***** Xtal 40MHz *****
> >>> PCIE1 no card, disable it(RST&CLK)
> >>> PCIE2 no card, disable it(RST&CLK)
> >>> PCIE0 enabled
> >>> PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
> >>> mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
> >>> pci_bus 0000:00: root bus resource [io  0xffffffff]
> >>> pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
> >>> pci_bus 0000:00: root bus resource [bus 00-ff]
> >>> pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> >>> pci 0000:00:00.0: PCI bridge to [bus 01-ff]
> >>> pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
> >>> pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
> >>> pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x601fffff]
> >>> pci 0000:00:00.0: BAR 9: assigned [mem 0x60200000-0x602fffff pref]
> >>> pci 0000:00:00.0: BAR 1: assigned [mem 0x60300000-0x6030ffff]
> >>> pci 0000:00:00.0: BAR 7: no space for [io  size 0x1000]
> >>> pci 0000:00:00.0: BAR 7: failed to assign [io  size 0x1000]
> >>> pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x601fffff 64bit]
> >>> pci 0000:01:00.0: BAR 6: assigned [mem 0x60200000-0x6020ffff pref]
> >>> pci 0000:00:00.0: PCI bridge to [bus 01]
> >>> pci 0000:00:00.0:   bridge window [mem 0x60000000-0x601fffff]
> >>> pci 0000:00:00.0:   bridge window [mem 0x60200000-0x602fffff pref]
> >>> pcieport 0000:00:00.0: of_irq_parse_pci: failed with rc=-22
> >>> pcieport 0000:00:00.0: enabling device (0004 -> 0006)
> >>> u32 classifier
> >>>       input device check on
> >>> ipip: IPv4 and MPLS over IPv4 tunneling driver
> >>> gre: GRE over IPv4 demultiplexor driver
> >>> ip_gre: GRE over IPv4 tunneling driver
> >>> Initializing XFRM netlink socket
> >>> NET: Registered protocol family 10
> >>> Segment Routing with IPv6
> >>> sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
> >>> NET: Registered protocol family 17
> >>> NET: Registered protocol family 15
> >>> 8021q: 802.1Q VLAN Support v1.8
> >>> libphy: dsa slave smi: probed
> >>> mt7530 mdio-bus:00 lan (uninitialized): PHY [dsa-0.0:00] driver [Generic PHY]
> >>> mt7530 mdio-bus:00 wan (uninitialized): PHY [dsa-0.0:01] driver [Generic PHY]
> >>> DSA: tree 0 setup
> >>> ubi0: attaching mtd3
> >>> ubi0: scanning is finished
> >>> ubi0: attached mtd3 (name "flash", size 507 MiB)
> >>> ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
> >>> ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048
> >>> ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096
> >>> ubi0: good PEBs: 4052, bad PEBs: 4, corrupted PEBs: 0
> >>> ubi0: user volume: 4, internal volumes: 1, max. volumes count: 128
> >>> ubi0: max/mean erase counter: 9/4, WL threshold: 4096, image sequence number: 1236486005
> >>> ubi0: available PEBs: 0, total reserved PEBs: 4052, PEBs reserved for bad PEB handling: 76
> >>> ubi0: background thread "ubi_bgt0d" started, PID 112
> >>> hctosys: unable to open rtc device (rtc0)
> >>> VFS: Mounted root (squashfs filesystem) readonly on device 31:5.
> >>> devtmpfs: mounted
> >>> Freeing unused kernel memory: 272K
> >>> This architecture does not have kernel memory protection.
> >>> Run /sbin/init as init process
> >>> Run /etc/init as init process
> >>> Run /bin/init as init process
> >>>
> >>>
> >
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^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-06-26  7:10               ` Sergio Paracuellos
@ 2019-06-26 12:18                 ` Greg Ungerer
  2019-06-26 12:44                   ` Sergio Paracuellos
  0 siblings, 1 reply; 20+ messages in thread
From: Greg Ungerer @ 2019-06-26 12:18 UTC (permalink / raw)
  To: Sergio Paracuellos; +Cc: Greg KH, driverdev-devel, Neil Brown

Hi Sergio,

On 26/6/19 5:10 pm, Sergio Paracuellos wrote:
> On Wed, Jun 26, 2019 at 5:31 AM Greg Ungerer <gerg@kernel.org> wrote:
>> On 25/6/19 10:47 pm, Sergio Paracuellos wrote:
>>> On Tue, Jun 25, 2019 at 7:18 AM Sergio Paracuellos
>>> <sergio.paracuellos@gmail.com> wrote:
>>>> On Tue, Jun 25, 2019 at 7:10 AM Greg Ungerer <gerg@kernel.org> wrote:
>>>>> On 23/6/19 3:58 pm, Sergio Paracuellos wrote:
>>>>>> On Sun, Jun 23, 2019 at 4:15 AM Brett Neumeier <bneumeier@gmail.com> wrote:
>>>>>>> On Fri, Jun 21, 2019 at 7:35 AM Greg Ungerer <gerg@kernel.org> wrote:
>>>>>>>> On 21/6/19 4:15 pm, Sergio Paracuellos wrote:
>>>>>>>>> This patch series properly handle minor issues in this driver. These are:
>>>>>>>>> * Disable pcie port clock on pci dirver instead of doing it in the phy
>>>>>>>>>       driver. The pci driver is the correct place to do this.
>>>>>>>>> * Add a missing call to phy_exit function to properly handle the function
>>>>>>>>>       'mt7621_pcie_init_port' error path.
>>>>>>>>> * Move driver to init in a later stage using 'module_init' instead of using
>>>>>>>>>       'arch_initcall'.
>>>>>>>>>
>>>>>>>>> Patches are only compile-tested. It would be awasome to be tested before applied
>>>>>>>>> them (mainly the change to 'module_init' stuff).
>>>>>>>
>>>>>>> I have similar results to Greg -- on GnuBee PC1 and PC2, six boot
>>>>>>> attempts each on a kernel built from staging-next, I have four hangs
>>>>>>> and eight successful boots. The hanging patterns are similar to
>>>>>>> previous results. If the full boot logs would be helpful let me know,
>>>>>>> I can provide them.
>>>>>>
>>>>>> Thanks for letting me know. One thing we can try is check init order
>>>>>> in v4.20 kernel. Can you please try to compile pci driver for the
>>>>>> kernel v4.20 tag changing
>>>>>> driver's last line 'arch_initcall' into 'module_init'? Just to know if
>>>>>> at that working driver putting all the stuff in a later stage stills
>>>>>> work as expected.
>>>>>>
>>>>>> Full dmesg's of this v4.20 wih the change would be helpful.
>>>>>
>>>>> Not exactly what you asked for, but just as useful I think.
>>>>> I have a linux-5.1.14 kernel with the linux-4.20 pci-mt7621.c
>>>>> driver in place. That works great, never hangs, always probes
>>>>> PCI and works.
>>>>>
>>>>> If I change the pci-mt7621.c arch_initcall() to module_init(),
>>>>> then I see the PCI probe happen much latter in boot. Running this
>>>>> I have booted about 15 times, no hangs, PCI bus probed and working
>>>>> on every boot.
>>>>
>>>> Perfect. That is exactly what I wanted to know. Thanks for testing this.
>>>>
>>>>>
>>>>> Boot log below.
>>>>>
>>>>> Regards
>>>>> Greg
>>>
>>> Can you please test the following change?
>>>
>>> diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c
>>> b/drivers/staging/mt7621-pci/pci-mt7621.c
>>> index a981f4f0ed03..9ae14f722c91 100644
>>> --- a/drivers/staging/mt7621-pci/pci-mt7621.c
>>> +++ b/drivers/staging/mt7621-pci/pci-mt7621.c
>>> @@ -41,8 +41,8 @@
>>>
>>>    /* MediaTek specific configuration registers */
>>>    #define PCIE_FTS_NUM                   0x70c
>>> -#define PCIE_FTS_NUM_MASK              GENMASK(15, 8)
>>> -#define PCIE_FTS_NUM_L0(x)             ((x) & 0xff << 8)
>>> +#define PCIE_FTS_NUM_MASK              GENMASK(7, 0)
>>> +#define PCIE_FTS_NUM_L0(x)             ((x) << 8)
>>>
>>>    /* rt_sysc_membase relative registers */
>>>    #define RALINK_CLKCFG1                 0x30
>>> @@ -540,7 +540,7 @@ static void mt7621_pcie_enable_ports(struct
>>> mt7621_pcie *pcie)
>>>                   write_config(pcie, slot, PCI_COMMAND, val);
>>>                   /* configure RC FTS number to 250 when it leaves L0s */
>>>                   val = read_config(pcie, slot, PCIE_FTS_NUM);
>>> -               val &= ~PCIE_FTS_NUM_MASK;
>>> +               val &= ~(PCIE_FTS_NUM_MASK) << 8;
>>>                   val |= PCIE_FTS_NUM_L0(0x50);
>>>                   write_config(pcie, slot, PCIE_FTS_NUM, val);
>>>           }
>>
>> Same result. Occasional hangs on boot, sometimes it boots all the way up
>> successfully.
> 
> No lucky for us again :(
> 
>> But looking at the patch doesn't it do essentiall
>> the same thing?
> 
> Well, it looks like the same thing but I wrote this two in the way the
> are in the original code, But it is not exactly the
> same because the following:
> 
> #define PCIE_FTS_NUM_L0(x)             ((x) & 0xff << 8)
> 
> should be
> 
> #define PCIE_FTS_NUM_L0(x)             (((x) & 0xff) << 8)

Ahh, yes, sorry I missed that missing set of brackets.
You are right.

BTW, I applied that on top of your other recent fixes (that ones
you pushed to  gregkh for staging). So I tested with the
updated GPIO reset code.

Regards
Greg



> A parenthesis is missing there to be exactly the same. I rewrote bad
> those two. But it seems it doesn't matter...
> 
> Original code in v4.20:
> 
> val &= ~(0xff) << 8;
> val |= 0x50 << 8;
> write_config(pcie, 0, 0x70c, val);
> 
> Now:
> 
> #define PCIE_FTS_NUM                 0x70c
> #define PCIE_FTS_NUM_MASK      GENMASK(15, 8)
> #define PCIE_FTS_NUM_L0(x)         ((x) & 0xff << 8)
> 
> val = read_config(pcie, slot, PCIE_FTS_NUM);
> val &= ~PCIE_FTS_NUM_MASK;
> val |= PCIE_FTS_NUM_L0(0x50);
> write_config(pcie, slot, PCIE_FTS_NUM, val);
> 
> Without the parenthesis the 0x50 is getting into 0's right? instead of
> just moving itself 8 bits left.
> 
>>
>> Regards
>> Greg
>>
> 
> Best regards,
>      Sergio Paracuellos
> 
>>
>>
>>> Best regards,
>>>       Sergio Paracuellos
>>>
>>>>>
>>>>> Linux version 5.1.14 (gerg@goober) (gcc version 5.4.0 (GCC)) #2 SMP Tue Jun 25 14:34:27 AEST 2019
>>>>> SoC Type: MediaTek MT7621 ver:1 eco:3
>>>>> printk: bootconsole [early0] enabled
>>>>> CPU0 revision is: 0001992f (MIPS 1004Kc)
>>>>> OF: fdt: No chosen node found, continuing without
>>>>> MIPS: machine is Digi EX15
>>>>> Determined physical RAM map:
>>>>>     memory: 10000000 @ 00000000 (usable)
>>>>> Initrd not found or empty - disabling initrd
>>>>> VPE topology {2,2} total 4
>>>>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
>>>>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
>>>>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
>>>>> Zone ranges:
>>>>>      Normal   [mem 0x0000000000000000-0x000000000fffffff]
>>>>> Movable zone start for each node
>>>>> Early memory node ranges
>>>>>      node   0: [mem 0x0000000000000000-0x000000000fffffff]
>>>>> Initmem setup node 0 [mem 0x0000000000000000-0x000000000fffffff]
>>>>> random: get_random_bytes called from start_kernel+0xb0/0x51c with crng_init=0
>>>>> percpu: Embedded 15 pages/cpu s30144 r8192 d23104 u61440
>>>>> Built 1 zonelists, mobility grouping on.  Total pages: 65024
>>>>> Kernel command line:  console=ttyS0,115200 ubi.mtd=3 root=/dev/mtdblock5 bootpart=a
>>>>> Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
>>>>> Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
>>>>> Writing ErrCtl register=00030517
>>>>> Readback ErrCtl register=00030517
>>>>> Memory: 251176K/262144K available (6464K kernel code, 243K rwdata, 1200K rodata, 272K init, 228K bss, 10968K reserved, 0K cma-reserved)
>>>>> SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
>>>>> rcu: Hierarchical RCU implementation.
>>>>> rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
>>>>> NR_IRQS: 256
>>>>> clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
>>>>> sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps every 21474836475000000ns
>>>>> Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
>>>>> pid_max: default: 32768 minimum: 301
>>>>> Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
>>>>> Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
>>>>> rcu: Hierarchical SRCU implementation.
>>>>> smp: Bringing up secondary CPUs ...
>>>>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
>>>>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
>>>>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
>>>>> CPU1 revision is: 0001992f (MIPS 1004Kc)
>>>>> Synchronize counters for CPU 1: done.
>>>>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
>>>>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
>>>>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
>>>>> CPU2 revision is: 0001992f (MIPS 1004Kc)
>>>>> Synchronize counters for CPU 2: done.
>>>>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
>>>>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
>>>>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
>>>>> CPU3 revision is: 0001992f (MIPS 1004Kc)
>>>>> Synchronize counters for CPU 3: done.
>>>>> smp: Brought up 1 node, 4 CPUs
>>>>> devtmpfs: initialized
>>>>> clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
>>>>> futex hash table entries: 1024 (order: 3, 32768 bytes)
>>>>> pinctrl core: initialized pinctrl subsystem
>>>>> NET: Registered protocol family 16
>>>>> SCSI subsystem initialized
>>>>> usbcore: registered new interface driver usbfs
>>>>> usbcore: registered new interface driver hub
>>>>> usbcore: registered new device driver usb
>>>>> pcf857x 0-0026: probed
>>>>> i2c-mt7621 1e000900.i2c: clock 400KHz, re-start not support
>>>>> clocksource: Switched to clocksource GIC
>>>>> NET: Registered protocol family 2
>>>>> tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes)
>>>>> TCP established hash table entries: 2048 (order: 1, 8192 bytes)
>>>>> TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
>>>>> TCP: Hash tables configured (established 2048 bind 2048)
>>>>> UDP hash table entries: 256 (order: 1, 8192 bytes)
>>>>> UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
>>>>> NET: Registered protocol family 1
>>>>> workingset: timestamp_bits=30 max_order=16 bucket_order=0
>>>>> squashfs: version 4.0 (2009/01/31) Phillip Lougher
>>>>> random: fast init done
>>>>> Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
>>>>> mt7621_gpio 1e000600.gpio: registering 32 gpios
>>>>> mt7621_gpio 1e000600.gpio: registering 32 gpios
>>>>> mt7621_gpio 1e000600.gpio: registering 32 gpios
>>>>> Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
>>>>> printk: console [ttyS0] disabled
>>>>> 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 18, base_baud = 3125000) is a 16550A
>>>>> printk: console [ttyS0] enabled
>>>>> printk: console [ttyS0] enabled
>>>>> printk: bootconsole [early0] disabled
>>>>> printk: bootconsole [early0] disabled
>>>>> 1e000d00.uartlite: ttyS1 at MMIO 0x1e000d00 (irq = 19, base_baud = 3125000) is a 16550A
>>>>> cacheinfo: Failed to find cpu0 device node
>>>>> cacheinfo: Unable to detect cache hierarchy for CPU 0
>>>>> brd: module loaded
>>>>> mt7621-nand: NAND register bank at 0xbe003000
>>>>> mt7621-nand: NAND ECC register bank at 0xbe003800
>>>>> nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xdc
>>>>> nand: Micron NAND 512MiB 3,3V 8-bit
>>>>> nand: 512 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
>>>>> nand: ecc bit: 4, spare_per_sector: 16
>>>>> Bad block table found at page 262080, version 0x01
>>>>> Bad block table found at page 262016, version 0x01
>>>>> 5 fixed-partitions partitions found on MTD device MT7621-NAND
>>>>> Creating 5 MTD partitions on "MT7621-NAND":
>>>>> 0x000000000000-0x000000200000 : "u-boot"
>>>>> 0x000000200000-0x000000300000 : "u-boot-env"
>>>>> 0x000000300000-0x000000500000 : "log"
>>>>> 0x000000500000-0x000020000000 : "flash"
>>>>> 0x000000000000-0x000020000000 : "all"
>>>>> libphy: Fixed MDIO Bus: probed
>>>>> tun: Universal TUN/TAP device driver, 1.6
>>>>> libphy: mdio: probed
>>>>> mtk_soc_eth 1e100000.ethernet: generated random MAC address c6:f5:21:ba:39:d3
>>>>> mtk_soc_eth 1e100000.ethernet: connected mac 0 to PHY at fixed-0:00 [uid=00000000, driver=Generic PHY]
>>>>> mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
>>>>> PPP generic driver version 2.4.2
>>>>> PPP BSD Compression module registered
>>>>> PPP Deflate Compression module registered
>>>>> PPP MPPE Compression module registered
>>>>> NET: Registered protocol family 24
>>>>> SLIP: version 0.8.4-NET3.019-NEWTTY (dynamic channels, max=256).
>>>>> CSLIP: code copyright 1989 Regents of the University of California.
>>>>> usbcore: registered new interface driver asix
>>>>> usbcore: registered new interface driver ax88179_178a
>>>>> usbcore: registered new interface driver cdc_ether
>>>>> usbcore: registered new interface driver cdc_eem
>>>>> usbcore: registered new interface driver rndis_host
>>>>> usbcore: registered new interface driver cdc_subset
>>>>> usbcore: registered new interface driver cdc_ncm
>>>>> usbcore: registered new interface driver qmi_wwan
>>>>> usbcore: registered new interface driver cdc_mbim
>>>>> ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>>>>> ehci-pci: EHCI PCI platform driver
>>>>> ehci-platform: EHCI generic platform driver
>>>>> ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>>>>> ohci-pci: OHCI PCI platform driver
>>>>> xhci-mtk 1e1c0000.xhci: xHCI Host Controller
>>>>> xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 1
>>>>> xhci-mtk 1e1c0000.xhci: hcc params 0x01401198 hci version 0x96 quirks 0x0000000000210010
>>>>> xhci-mtk 1e1c0000.xhci: irq 20, io mem 0x1e1c0000
>>>>> usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.01
>>>>> usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>>>>> usb usb1: Product: xHCI Host Controller
>>>>> usb usb1: Manufacturer: Linux 5.1.14-ac0 xhci-hcd
>>>>> usb usb1: SerialNumber: 1e1c0000.xhci
>>>>> hub 1-0:1.0: USB hub found
>>>>> hub 1-0:1.0: 2 ports detected
>>>>> xhci-mtk 1e1c0000.xhci: xHCI Host Controller
>>>>> xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 2
>>>>> xhci-mtk 1e1c0000.xhci: Host supports USB 3.0  SuperSpeed
>>>>> usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
>>>>> usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.01
>>>>> usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>>>>> usb usb2: Product: xHCI Host Controller
>>>>> usb usb2: Manufacturer: Linux 5.1.14-ac0 xhci-hcd
>>>>> usb usb2: SerialNumber: 1e1c0000.xhci
>>>>> hub 2-0:1.0: USB hub found
>>>>> hub 2-0:1.0: 1 port detected
>>>>> usbcore: registered new interface driver cdc_acm
>>>>> cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
>>>>> usbcore: registered new interface driver cdc_wdm
>>>>> usbcore: registered new interface driver usb-storage
>>>>> usbcore: registered new interface driver usbserial_generic
>>>>> usbserial: USB Serial support registered for generic
>>>>> usbcore: registered new interface driver ipw
>>>>> usbserial: USB Serial support registered for IPWireless converter
>>>>> usbcore: registered new interface driver option
>>>>> usbserial: USB Serial support registered for GSM modem (1-port)
>>>>> usbcore: registered new interface driver qcaux
>>>>> usbserial: USB Serial support registered for qcaux
>>>>> usbcore: registered new interface driver qcserial
>>>>> usbserial: USB Serial support registered for Qualcomm USB modem
>>>>> usbcore: registered new interface driver quatech2
>>>>> usbserial: USB Serial support registered for Quatech 2nd gen USB to Serial Driver
>>>>> usbcore: registered new interface driver usb_serial_simple
>>>>> usbserial: USB Serial support registered for carelink
>>>>> usbserial: USB Serial support registered for zio
>>>>> usbserial: USB Serial support registered for funsoft
>>>>> usbserial: USB Serial support registered for flashloader
>>>>> usbserial: USB Serial support registered for google
>>>>> usbserial: USB Serial support registered for libtransistor
>>>>> usbserial: USB Serial support registered for vivopay
>>>>> usbserial: USB Serial support registered for moto_modem
>>>>> usbserial: USB Serial support registered for motorola_tetra
>>>>> usbserial: USB Serial support registered for novatel_gps
>>>>> usbserial: USB Serial support registered for hp4x
>>>>> usbserial: USB Serial support registered for suunto
>>>>> usbserial: USB Serial support registered for siemens_mpi
>>>>> ***** Xtal 40MHz *****
>>>>> PCIE1 no card, disable it(RST&CLK)
>>>>> PCIE2 no card, disable it(RST&CLK)
>>>>> PCIE0 enabled
>>>>> PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
>>>>> mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
>>>>> pci_bus 0000:00: root bus resource [io  0xffffffff]
>>>>> pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
>>>>> pci_bus 0000:00: root bus resource [bus 00-ff]
>>>>> pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
>>>>> pci 0000:00:00.0: PCI bridge to [bus 01-ff]
>>>>> pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
>>>>> pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
>>>>> pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x601fffff]
>>>>> pci 0000:00:00.0: BAR 9: assigned [mem 0x60200000-0x602fffff pref]
>>>>> pci 0000:00:00.0: BAR 1: assigned [mem 0x60300000-0x6030ffff]
>>>>> pci 0000:00:00.0: BAR 7: no space for [io  size 0x1000]
>>>>> pci 0000:00:00.0: BAR 7: failed to assign [io  size 0x1000]
>>>>> pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x601fffff 64bit]
>>>>> pci 0000:01:00.0: BAR 6: assigned [mem 0x60200000-0x6020ffff pref]
>>>>> pci 0000:00:00.0: PCI bridge to [bus 01]
>>>>> pci 0000:00:00.0:   bridge window [mem 0x60000000-0x601fffff]
>>>>> pci 0000:00:00.0:   bridge window [mem 0x60200000-0x602fffff pref]
>>>>> pcieport 0000:00:00.0: of_irq_parse_pci: failed with rc=-22
>>>>> pcieport 0000:00:00.0: enabling device (0004 -> 0006)
>>>>> u32 classifier
>>>>>        input device check on
>>>>> ipip: IPv4 and MPLS over IPv4 tunneling driver
>>>>> gre: GRE over IPv4 demultiplexor driver
>>>>> ip_gre: GRE over IPv4 tunneling driver
>>>>> Initializing XFRM netlink socket
>>>>> NET: Registered protocol family 10
>>>>> Segment Routing with IPv6
>>>>> sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
>>>>> NET: Registered protocol family 17
>>>>> NET: Registered protocol family 15
>>>>> 8021q: 802.1Q VLAN Support v1.8
>>>>> libphy: dsa slave smi: probed
>>>>> mt7530 mdio-bus:00 lan (uninitialized): PHY [dsa-0.0:00] driver [Generic PHY]
>>>>> mt7530 mdio-bus:00 wan (uninitialized): PHY [dsa-0.0:01] driver [Generic PHY]
>>>>> DSA: tree 0 setup
>>>>> ubi0: attaching mtd3
>>>>> ubi0: scanning is finished
>>>>> ubi0: attached mtd3 (name "flash", size 507 MiB)
>>>>> ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
>>>>> ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048
>>>>> ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096
>>>>> ubi0: good PEBs: 4052, bad PEBs: 4, corrupted PEBs: 0
>>>>> ubi0: user volume: 4, internal volumes: 1, max. volumes count: 128
>>>>> ubi0: max/mean erase counter: 9/4, WL threshold: 4096, image sequence number: 1236486005
>>>>> ubi0: available PEBs: 0, total reserved PEBs: 4052, PEBs reserved for bad PEB handling: 76
>>>>> ubi0: background thread "ubi_bgt0d" started, PID 112
>>>>> hctosys: unable to open rtc device (rtc0)
>>>>> VFS: Mounted root (squashfs filesystem) readonly on device 31:5.
>>>>> devtmpfs: mounted
>>>>> Freeing unused kernel memory: 272K
>>>>> This architecture does not have kernel memory protection.
>>>>> Run /sbin/init as init process
>>>>> Run /etc/init as init process
>>>>> Run /bin/init as init process
>>>>>
>>>>>
>>>
> 
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^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-06-26 12:18                 ` Greg Ungerer
@ 2019-06-26 12:44                   ` Sergio Paracuellos
  2019-07-05 18:43                     ` Brett Neumeier
  0 siblings, 1 reply; 20+ messages in thread
From: Sergio Paracuellos @ 2019-06-26 12:44 UTC (permalink / raw)
  To: Greg Ungerer; +Cc: Greg KH, driverdev-devel, Neil Brown

Hi Greg,

On Wed, Jun 26, 2019 at 2:18 PM Greg Ungerer <gerg@kernel.org> wrote:
>
> Hi Sergio,
>
> On 26/6/19 5:10 pm, Sergio Paracuellos wrote:
> > On Wed, Jun 26, 2019 at 5:31 AM Greg Ungerer <gerg@kernel.org> wrote:
> >> On 25/6/19 10:47 pm, Sergio Paracuellos wrote:
> >>> On Tue, Jun 25, 2019 at 7:18 AM Sergio Paracuellos
> >>> <sergio.paracuellos@gmail.com> wrote:
> >>>> On Tue, Jun 25, 2019 at 7:10 AM Greg Ungerer <gerg@kernel.org> wrote:
> >>>>> On 23/6/19 3:58 pm, Sergio Paracuellos wrote:
> >>>>>> On Sun, Jun 23, 2019 at 4:15 AM Brett Neumeier <bneumeier@gmail.com> wrote:
> >>>>>>> On Fri, Jun 21, 2019 at 7:35 AM Greg Ungerer <gerg@kernel.org> wrote:
> >>>>>>>> On 21/6/19 4:15 pm, Sergio Paracuellos wrote:
> >>>>>>>>> This patch series properly handle minor issues in this driver. These are:
> >>>>>>>>> * Disable pcie port clock on pci dirver instead of doing it in the phy
> >>>>>>>>>       driver. The pci driver is the correct place to do this.
> >>>>>>>>> * Add a missing call to phy_exit function to properly handle the function
> >>>>>>>>>       'mt7621_pcie_init_port' error path.
> >>>>>>>>> * Move driver to init in a later stage using 'module_init' instead of using
> >>>>>>>>>       'arch_initcall'.
> >>>>>>>>>
> >>>>>>>>> Patches are only compile-tested. It would be awasome to be tested before applied
> >>>>>>>>> them (mainly the change to 'module_init' stuff).
> >>>>>>>
> >>>>>>> I have similar results to Greg -- on GnuBee PC1 and PC2, six boot
> >>>>>>> attempts each on a kernel built from staging-next, I have four hangs
> >>>>>>> and eight successful boots. The hanging patterns are similar to
> >>>>>>> previous results. If the full boot logs would be helpful let me know,
> >>>>>>> I can provide them.
> >>>>>>
> >>>>>> Thanks for letting me know. One thing we can try is check init order
> >>>>>> in v4.20 kernel. Can you please try to compile pci driver for the
> >>>>>> kernel v4.20 tag changing
> >>>>>> driver's last line 'arch_initcall' into 'module_init'? Just to know if
> >>>>>> at that working driver putting all the stuff in a later stage stills
> >>>>>> work as expected.
> >>>>>>
> >>>>>> Full dmesg's of this v4.20 wih the change would be helpful.
> >>>>>
> >>>>> Not exactly what you asked for, but just as useful I think.
> >>>>> I have a linux-5.1.14 kernel with the linux-4.20 pci-mt7621.c
> >>>>> driver in place. That works great, never hangs, always probes
> >>>>> PCI and works.
> >>>>>
> >>>>> If I change the pci-mt7621.c arch_initcall() to module_init(),
> >>>>> then I see the PCI probe happen much latter in boot. Running this
> >>>>> I have booted about 15 times, no hangs, PCI bus probed and working
> >>>>> on every boot.
> >>>>
> >>>> Perfect. That is exactly what I wanted to know. Thanks for testing this.
> >>>>
> >>>>>
> >>>>> Boot log below.
> >>>>>
> >>>>> Regards
> >>>>> Greg
> >>>
> >>> Can you please test the following change?
> >>>
> >>> diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c
> >>> b/drivers/staging/mt7621-pci/pci-mt7621.c
> >>> index a981f4f0ed03..9ae14f722c91 100644
> >>> --- a/drivers/staging/mt7621-pci/pci-mt7621.c
> >>> +++ b/drivers/staging/mt7621-pci/pci-mt7621.c
> >>> @@ -41,8 +41,8 @@
> >>>
> >>>    /* MediaTek specific configuration registers */
> >>>    #define PCIE_FTS_NUM                   0x70c
> >>> -#define PCIE_FTS_NUM_MASK              GENMASK(15, 8)
> >>> -#define PCIE_FTS_NUM_L0(x)             ((x) & 0xff << 8)
> >>> +#define PCIE_FTS_NUM_MASK              GENMASK(7, 0)
> >>> +#define PCIE_FTS_NUM_L0(x)             ((x) << 8)
> >>>
> >>>    /* rt_sysc_membase relative registers */
> >>>    #define RALINK_CLKCFG1                 0x30
> >>> @@ -540,7 +540,7 @@ static void mt7621_pcie_enable_ports(struct
> >>> mt7621_pcie *pcie)
> >>>                   write_config(pcie, slot, PCI_COMMAND, val);
> >>>                   /* configure RC FTS number to 250 when it leaves L0s */
> >>>                   val = read_config(pcie, slot, PCIE_FTS_NUM);
> >>> -               val &= ~PCIE_FTS_NUM_MASK;
> >>> +               val &= ~(PCIE_FTS_NUM_MASK) << 8;
> >>>                   val |= PCIE_FTS_NUM_L0(0x50);
> >>>                   write_config(pcie, slot, PCIE_FTS_NUM, val);
> >>>           }
> >>
> >> Same result. Occasional hangs on boot, sometimes it boots all the way up
> >> successfully.
> >
> > No lucky for us again :(
> >
> >> But looking at the patch doesn't it do essentiall
> >> the same thing?
> >
> > Well, it looks like the same thing but I wrote this two in the way the
> > are in the original code, But it is not exactly the
> > same because the following:
> >
> > #define PCIE_FTS_NUM_L0(x)             ((x) & 0xff << 8)
> >
> > should be
> >
> > #define PCIE_FTS_NUM_L0(x)             (((x) & 0xff) << 8)
>
> Ahh, yes, sorry I missed that missing set of brackets.
> You are right.

No problem, I also miss them rewritting code. That is bad :((.

>
> BTW, I applied that on top of your other recent fixes (that ones
> you pushed to  gregkh for staging). So I tested with the
> updated GPIO reset code.

Ok, anyway.. I have just sent the change jus to have the same code behaviour
that was being there before.

>
> Regards
> Greg

Best regards,
    Sergio Paracuellos
>
>
>
> > A parenthesis is missing there to be exactly the same. I rewrote bad
> > those two. But it seems it doesn't matter...
> >
> > Original code in v4.20:
> >
> > val &= ~(0xff) << 8;
> > val |= 0x50 << 8;
> > write_config(pcie, 0, 0x70c, val);
> >
> > Now:
> >
> > #define PCIE_FTS_NUM                 0x70c
> > #define PCIE_FTS_NUM_MASK      GENMASK(15, 8)
> > #define PCIE_FTS_NUM_L0(x)         ((x) & 0xff << 8)
> >
> > val = read_config(pcie, slot, PCIE_FTS_NUM);
> > val &= ~PCIE_FTS_NUM_MASK;
> > val |= PCIE_FTS_NUM_L0(0x50);
> > write_config(pcie, slot, PCIE_FTS_NUM, val);
> >
> > Without the parenthesis the 0x50 is getting into 0's right? instead of
> > just moving itself 8 bits left.
> >
> >>
> >> Regards
> >> Greg
> >>
> >
> > Best regards,
> >      Sergio Paracuellos
> >
> >>
> >>
> >>> Best regards,
> >>>       Sergio Paracuellos
> >>>
> >>>>>
> >>>>> Linux version 5.1.14 (gerg@goober) (gcc version 5.4.0 (GCC)) #2 SMP Tue Jun 25 14:34:27 AEST 2019
> >>>>> SoC Type: MediaTek MT7621 ver:1 eco:3
> >>>>> printk: bootconsole [early0] enabled
> >>>>> CPU0 revision is: 0001992f (MIPS 1004Kc)
> >>>>> OF: fdt: No chosen node found, continuing without
> >>>>> MIPS: machine is Digi EX15
> >>>>> Determined physical RAM map:
> >>>>>     memory: 10000000 @ 00000000 (usable)
> >>>>> Initrd not found or empty - disabling initrd
> >>>>> VPE topology {2,2} total 4
> >>>>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> >>>>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> >>>>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> >>>>> Zone ranges:
> >>>>>      Normal   [mem 0x0000000000000000-0x000000000fffffff]
> >>>>> Movable zone start for each node
> >>>>> Early memory node ranges
> >>>>>      node   0: [mem 0x0000000000000000-0x000000000fffffff]
> >>>>> Initmem setup node 0 [mem 0x0000000000000000-0x000000000fffffff]
> >>>>> random: get_random_bytes called from start_kernel+0xb0/0x51c with crng_init=0
> >>>>> percpu: Embedded 15 pages/cpu s30144 r8192 d23104 u61440
> >>>>> Built 1 zonelists, mobility grouping on.  Total pages: 65024
> >>>>> Kernel command line:  console=ttyS0,115200 ubi.mtd=3 root=/dev/mtdblock5 bootpart=a
> >>>>> Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
> >>>>> Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
> >>>>> Writing ErrCtl register=00030517
> >>>>> Readback ErrCtl register=00030517
> >>>>> Memory: 251176K/262144K available (6464K kernel code, 243K rwdata, 1200K rodata, 272K init, 228K bss, 10968K reserved, 0K cma-reserved)
> >>>>> SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
> >>>>> rcu: Hierarchical RCU implementation.
> >>>>> rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
> >>>>> NR_IRQS: 256
> >>>>> clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
> >>>>> sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps every 21474836475000000ns
> >>>>> Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
> >>>>> pid_max: default: 32768 minimum: 301
> >>>>> Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
> >>>>> Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
> >>>>> rcu: Hierarchical SRCU implementation.
> >>>>> smp: Bringing up secondary CPUs ...
> >>>>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> >>>>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> >>>>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> >>>>> CPU1 revision is: 0001992f (MIPS 1004Kc)
> >>>>> Synchronize counters for CPU 1: done.
> >>>>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> >>>>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> >>>>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> >>>>> CPU2 revision is: 0001992f (MIPS 1004Kc)
> >>>>> Synchronize counters for CPU 2: done.
> >>>>> Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
> >>>>> Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
> >>>>> MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
> >>>>> CPU3 revision is: 0001992f (MIPS 1004Kc)
> >>>>> Synchronize counters for CPU 3: done.
> >>>>> smp: Brought up 1 node, 4 CPUs
> >>>>> devtmpfs: initialized
> >>>>> clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
> >>>>> futex hash table entries: 1024 (order: 3, 32768 bytes)
> >>>>> pinctrl core: initialized pinctrl subsystem
> >>>>> NET: Registered protocol family 16
> >>>>> SCSI subsystem initialized
> >>>>> usbcore: registered new interface driver usbfs
> >>>>> usbcore: registered new interface driver hub
> >>>>> usbcore: registered new device driver usb
> >>>>> pcf857x 0-0026: probed
> >>>>> i2c-mt7621 1e000900.i2c: clock 400KHz, re-start not support
> >>>>> clocksource: Switched to clocksource GIC
> >>>>> NET: Registered protocol family 2
> >>>>> tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes)
> >>>>> TCP established hash table entries: 2048 (order: 1, 8192 bytes)
> >>>>> TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
> >>>>> TCP: Hash tables configured (established 2048 bind 2048)
> >>>>> UDP hash table entries: 256 (order: 1, 8192 bytes)
> >>>>> UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
> >>>>> NET: Registered protocol family 1
> >>>>> workingset: timestamp_bits=30 max_order=16 bucket_order=0
> >>>>> squashfs: version 4.0 (2009/01/31) Phillip Lougher
> >>>>> random: fast init done
> >>>>> Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
> >>>>> mt7621_gpio 1e000600.gpio: registering 32 gpios
> >>>>> mt7621_gpio 1e000600.gpio: registering 32 gpios
> >>>>> mt7621_gpio 1e000600.gpio: registering 32 gpios
> >>>>> Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
> >>>>> printk: console [ttyS0] disabled
> >>>>> 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 18, base_baud = 3125000) is a 16550A
> >>>>> printk: console [ttyS0] enabled
> >>>>> printk: console [ttyS0] enabled
> >>>>> printk: bootconsole [early0] disabled
> >>>>> printk: bootconsole [early0] disabled
> >>>>> 1e000d00.uartlite: ttyS1 at MMIO 0x1e000d00 (irq = 19, base_baud = 3125000) is a 16550A
> >>>>> cacheinfo: Failed to find cpu0 device node
> >>>>> cacheinfo: Unable to detect cache hierarchy for CPU 0
> >>>>> brd: module loaded
> >>>>> mt7621-nand: NAND register bank at 0xbe003000
> >>>>> mt7621-nand: NAND ECC register bank at 0xbe003800
> >>>>> nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xdc
> >>>>> nand: Micron NAND 512MiB 3,3V 8-bit
> >>>>> nand: 512 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
> >>>>> nand: ecc bit: 4, spare_per_sector: 16
> >>>>> Bad block table found at page 262080, version 0x01
> >>>>> Bad block table found at page 262016, version 0x01
> >>>>> 5 fixed-partitions partitions found on MTD device MT7621-NAND
> >>>>> Creating 5 MTD partitions on "MT7621-NAND":
> >>>>> 0x000000000000-0x000000200000 : "u-boot"
> >>>>> 0x000000200000-0x000000300000 : "u-boot-env"
> >>>>> 0x000000300000-0x000000500000 : "log"
> >>>>> 0x000000500000-0x000020000000 : "flash"
> >>>>> 0x000000000000-0x000020000000 : "all"
> >>>>> libphy: Fixed MDIO Bus: probed
> >>>>> tun: Universal TUN/TAP device driver, 1.6
> >>>>> libphy: mdio: probed
> >>>>> mtk_soc_eth 1e100000.ethernet: generated random MAC address c6:f5:21:ba:39:d3
> >>>>> mtk_soc_eth 1e100000.ethernet: connected mac 0 to PHY at fixed-0:00 [uid=00000000, driver=Generic PHY]
> >>>>> mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
> >>>>> PPP generic driver version 2.4.2
> >>>>> PPP BSD Compression module registered
> >>>>> PPP Deflate Compression module registered
> >>>>> PPP MPPE Compression module registered
> >>>>> NET: Registered protocol family 24
> >>>>> SLIP: version 0.8.4-NET3.019-NEWTTY (dynamic channels, max=256).
> >>>>> CSLIP: code copyright 1989 Regents of the University of California.
> >>>>> usbcore: registered new interface driver asix
> >>>>> usbcore: registered new interface driver ax88179_178a
> >>>>> usbcore: registered new interface driver cdc_ether
> >>>>> usbcore: registered new interface driver cdc_eem
> >>>>> usbcore: registered new interface driver rndis_host
> >>>>> usbcore: registered new interface driver cdc_subset
> >>>>> usbcore: registered new interface driver cdc_ncm
> >>>>> usbcore: registered new interface driver qmi_wwan
> >>>>> usbcore: registered new interface driver cdc_mbim
> >>>>> ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
> >>>>> ehci-pci: EHCI PCI platform driver
> >>>>> ehci-platform: EHCI generic platform driver
> >>>>> ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
> >>>>> ohci-pci: OHCI PCI platform driver
> >>>>> xhci-mtk 1e1c0000.xhci: xHCI Host Controller
> >>>>> xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 1
> >>>>> xhci-mtk 1e1c0000.xhci: hcc params 0x01401198 hci version 0x96 quirks 0x0000000000210010
> >>>>> xhci-mtk 1e1c0000.xhci: irq 20, io mem 0x1e1c0000
> >>>>> usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.01
> >>>>> usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
> >>>>> usb usb1: Product: xHCI Host Controller
> >>>>> usb usb1: Manufacturer: Linux 5.1.14-ac0 xhci-hcd
> >>>>> usb usb1: SerialNumber: 1e1c0000.xhci
> >>>>> hub 1-0:1.0: USB hub found
> >>>>> hub 1-0:1.0: 2 ports detected
> >>>>> xhci-mtk 1e1c0000.xhci: xHCI Host Controller
> >>>>> xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 2
> >>>>> xhci-mtk 1e1c0000.xhci: Host supports USB 3.0  SuperSpeed
> >>>>> usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
> >>>>> usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.01
> >>>>> usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
> >>>>> usb usb2: Product: xHCI Host Controller
> >>>>> usb usb2: Manufacturer: Linux 5.1.14-ac0 xhci-hcd
> >>>>> usb usb2: SerialNumber: 1e1c0000.xhci
> >>>>> hub 2-0:1.0: USB hub found
> >>>>> hub 2-0:1.0: 1 port detected
> >>>>> usbcore: registered new interface driver cdc_acm
> >>>>> cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
> >>>>> usbcore: registered new interface driver cdc_wdm
> >>>>> usbcore: registered new interface driver usb-storage
> >>>>> usbcore: registered new interface driver usbserial_generic
> >>>>> usbserial: USB Serial support registered for generic
> >>>>> usbcore: registered new interface driver ipw
> >>>>> usbserial: USB Serial support registered for IPWireless converter
> >>>>> usbcore: registered new interface driver option
> >>>>> usbserial: USB Serial support registered for GSM modem (1-port)
> >>>>> usbcore: registered new interface driver qcaux
> >>>>> usbserial: USB Serial support registered for qcaux
> >>>>> usbcore: registered new interface driver qcserial
> >>>>> usbserial: USB Serial support registered for Qualcomm USB modem
> >>>>> usbcore: registered new interface driver quatech2
> >>>>> usbserial: USB Serial support registered for Quatech 2nd gen USB to Serial Driver
> >>>>> usbcore: registered new interface driver usb_serial_simple
> >>>>> usbserial: USB Serial support registered for carelink
> >>>>> usbserial: USB Serial support registered for zio
> >>>>> usbserial: USB Serial support registered for funsoft
> >>>>> usbserial: USB Serial support registered for flashloader
> >>>>> usbserial: USB Serial support registered for google
> >>>>> usbserial: USB Serial support registered for libtransistor
> >>>>> usbserial: USB Serial support registered for vivopay
> >>>>> usbserial: USB Serial support registered for moto_modem
> >>>>> usbserial: USB Serial support registered for motorola_tetra
> >>>>> usbserial: USB Serial support registered for novatel_gps
> >>>>> usbserial: USB Serial support registered for hp4x
> >>>>> usbserial: USB Serial support registered for suunto
> >>>>> usbserial: USB Serial support registered for siemens_mpi
> >>>>> ***** Xtal 40MHz *****
> >>>>> PCIE1 no card, disable it(RST&CLK)
> >>>>> PCIE2 no card, disable it(RST&CLK)
> >>>>> PCIE0 enabled
> >>>>> PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
> >>>>> mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
> >>>>> pci_bus 0000:00: root bus resource [io  0xffffffff]
> >>>>> pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
> >>>>> pci_bus 0000:00: root bus resource [bus 00-ff]
> >>>>> pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> >>>>> pci 0000:00:00.0: PCI bridge to [bus 01-ff]
> >>>>> pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
> >>>>> pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
> >>>>> pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x601fffff]
> >>>>> pci 0000:00:00.0: BAR 9: assigned [mem 0x60200000-0x602fffff pref]
> >>>>> pci 0000:00:00.0: BAR 1: assigned [mem 0x60300000-0x6030ffff]
> >>>>> pci 0000:00:00.0: BAR 7: no space for [io  size 0x1000]
> >>>>> pci 0000:00:00.0: BAR 7: failed to assign [io  size 0x1000]
> >>>>> pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x601fffff 64bit]
> >>>>> pci 0000:01:00.0: BAR 6: assigned [mem 0x60200000-0x6020ffff pref]
> >>>>> pci 0000:00:00.0: PCI bridge to [bus 01]
> >>>>> pci 0000:00:00.0:   bridge window [mem 0x60000000-0x601fffff]
> >>>>> pci 0000:00:00.0:   bridge window [mem 0x60200000-0x602fffff pref]
> >>>>> pcieport 0000:00:00.0: of_irq_parse_pci: failed with rc=-22
> >>>>> pcieport 0000:00:00.0: enabling device (0004 -> 0006)
> >>>>> u32 classifier
> >>>>>        input device check on
> >>>>> ipip: IPv4 and MPLS over IPv4 tunneling driver
> >>>>> gre: GRE over IPv4 demultiplexor driver
> >>>>> ip_gre: GRE over IPv4 tunneling driver
> >>>>> Initializing XFRM netlink socket
> >>>>> NET: Registered protocol family 10
> >>>>> Segment Routing with IPv6
> >>>>> sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
> >>>>> NET: Registered protocol family 17
> >>>>> NET: Registered protocol family 15
> >>>>> 8021q: 802.1Q VLAN Support v1.8
> >>>>> libphy: dsa slave smi: probed
> >>>>> mt7530 mdio-bus:00 lan (uninitialized): PHY [dsa-0.0:00] driver [Generic PHY]
> >>>>> mt7530 mdio-bus:00 wan (uninitialized): PHY [dsa-0.0:01] driver [Generic PHY]
> >>>>> DSA: tree 0 setup
> >>>>> ubi0: attaching mtd3
> >>>>> ubi0: scanning is finished
> >>>>> ubi0: attached mtd3 (name "flash", size 507 MiB)
> >>>>> ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
> >>>>> ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048
> >>>>> ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096
> >>>>> ubi0: good PEBs: 4052, bad PEBs: 4, corrupted PEBs: 0
> >>>>> ubi0: user volume: 4, internal volumes: 1, max. volumes count: 128
> >>>>> ubi0: max/mean erase counter: 9/4, WL threshold: 4096, image sequence number: 1236486005
> >>>>> ubi0: available PEBs: 0, total reserved PEBs: 4052, PEBs reserved for bad PEB handling: 76
> >>>>> ubi0: background thread "ubi_bgt0d" started, PID 112
> >>>>> hctosys: unable to open rtc device (rtc0)
> >>>>> VFS: Mounted root (squashfs filesystem) readonly on device 31:5.
> >>>>> devtmpfs: mounted
> >>>>> Freeing unused kernel memory: 272K
> >>>>> This architecture does not have kernel memory protection.
> >>>>> Run /sbin/init as init process
> >>>>> Run /etc/init as init process
> >>>>> Run /bin/init as init process
> >>>>>
> >>>>>
> >>>
> >
_______________________________________________
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^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-06-26 12:44                   ` Sergio Paracuellos
@ 2019-07-05 18:43                     ` Brett Neumeier
  2019-07-06  9:00                       ` Sergio Paracuellos
  0 siblings, 1 reply; 20+ messages in thread
From: Brett Neumeier @ 2019-07-05 18:43 UTC (permalink / raw)
  To: Sergio Paracuellos; +Cc: Neil Brown, driverdev-devel, Greg Ungerer

On Wed, Jun 26, 2019 at 7:45 AM Sergio Paracuellos
<sergio.paracuellos@gmail.com> wrote:
> No problem, I also miss them rewritting code. That is bad :((.
> > BTW, I applied that on top of your other recent fixes (that ones
> > you pushed to  gregkh for staging). So I tested with the
> > updated GPIO reset code.
> Ok, anyway.. I have just sent the change jus to have the same code behaviour
> that was being there before.

FWIW, I have the same results as Greg -- the 4.2 driver works every
time, staging-next frequently hangs.

Out of curiosity, if it's not too complex an answer to go into, what's
the benefit of the staging-next driver? Is there a reason to prefer it
to the 4.2 driver?

-- 
Brett Neumeier (bneumeier@gmail.com)
_______________________________________________
devel mailing list
devel@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-07-05 18:43                     ` Brett Neumeier
@ 2019-07-06  9:00                       ` Sergio Paracuellos
  2019-07-06 13:43                         ` Brett Neumeier
  0 siblings, 1 reply; 20+ messages in thread
From: Sergio Paracuellos @ 2019-07-06  9:00 UTC (permalink / raw)
  To: Brett Neumeier; +Cc: Neil Brown, driverdev-devel, Greg Ungerer

Hi Brett,

On Fri, Jul 5, 2019 at 8:44 PM Brett Neumeier <bneumeier@gmail.com> wrote:
>
> On Wed, Jun 26, 2019 at 7:45 AM Sergio Paracuellos
> <sergio.paracuellos@gmail.com> wrote:
> > No problem, I also miss them rewritting code. That is bad :((.
> > > BTW, I applied that on top of your other recent fixes (that ones
> > > you pushed to  gregkh for staging). So I tested with the
> > > updated GPIO reset code.
> > Ok, anyway.. I have just sent the change jus to have the same code behaviour
> > that was being there before.
>
> FWIW, I have the same results as Greg -- the 4.2 driver works every
> time, staging-next frequently hangs.

I see, thanks for letting me know. We have to figure out what is wrong
and why we don't get an stable pci link.

>
> Out of curiosity, if it's not too complex an answer to go into, what's
> the benefit of the staging-next driver? Is there a reason to prefer it
> to the 4.2 driver?

In terms of stability, the driver which is in staging-next now is not
always working as expected,
so I really apologize for that because main changes have been done by
myself. In the other hand,
you have to think what is staging tree for. Staging contains drivers
that are not ready to be properly
mainlined into the "real" tree because they are not clean enough, the
use old apis and so on. The idea
of staging is to have a temporal place to properly clean drivers in
order to get them properly added into
the official mainline tree and directories. Doing that it will always
be supported in the kernel and it won't be
deleted for the tree. The mt7621 pci driver is now clean enough to
give it a try to be mainlined but we have to
achieve the problem of pci link stability that sometimes gets the
driver to hang.

Again, sorry for the inconvenience and any debug traces searching for
the problem, ideas or patches repairing the current problem are very
welcome.
I don't have hardware to test my changes on, so it is a bit difficult
for me to help more in these days.

Hope this helps.

Best regards,
    Sergio Paracuellos
>
> --
> Brett Neumeier (bneumeier@gmail.com)
_______________________________________________
devel mailing list
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^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-07-06  9:00                       ` Sergio Paracuellos
@ 2019-07-06 13:43                         ` Brett Neumeier
  2019-07-06 16:24                           ` Sergio Paracuellos
  0 siblings, 1 reply; 20+ messages in thread
From: Brett Neumeier @ 2019-07-06 13:43 UTC (permalink / raw)
  To: Sergio Paracuellos; +Cc: Neil Brown, driverdev-devel, Greg Ungerer

On Sat, Jul 6, 2019 at 4:00 AM Sergio Paracuellos
<sergio.paracuellos@gmail.com> wrote:
> > Out of curiosity, if it's not too complex an answer to go into, what's
> > the benefit of the staging-next driver? Is there a reason to prefer it
> > to the 4.2 driver?
>
> In terms of stability, the driver which is in staging-next now is not
> always working as expected,
> so I really apologize for that because main changes have been done by
> myself. In the other hand,
> you have to think what is staging tree for. Staging contains drivers
> that are not ready to be properly
> mainlined into the "real" tree because they are not clean enough, the
> use old apis and so on. The idea
> of staging is to have a temporal place to properly clean drivers in
> order to get them properly added into
> the official mainline tree and directories. Doing that it will always
> be supported in the kernel and it won't be
> deleted for the tree. The mt7621 pci driver is now clean enough to
> give it a try to be mainlined but we have to
> achieve the problem of pci link stability that sometimes gets the
> driver to hang.

I'm sorry, I think my question was unclear! I am not complaining about
the instability introduced in the current driver. I understand that
dealing with hardware is complicated and sometimes things are broken
for a while -- especially in staging or experimental drivers. That
doesn't bother me!

I am curious, though, about the motivation for this change --
obviously there must be some reason you rewrote the driver, but it's
not at all clear to me. I see that with the staging driver it looks
like maybe the 4.20 driver was split into the PCI controller driver
and a separate PCI PHY driver? If that's the main architectural
change, what's better about splitting them up that way?

Again, I understand that sometimes a question sounds really simple but
the answer is long and involved, and I don't want to take up a lot of
your time or energy. So if it is more complicated than a thirty-second
explanation, that's cool.

-- 
Brett Neumeier (bneumeier@gmail.com)
_______________________________________________
devel mailing list
devel@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 0/4] staging: mt7621-pci: Handle minor issues
  2019-07-06 13:43                         ` Brett Neumeier
@ 2019-07-06 16:24                           ` Sergio Paracuellos
  0 siblings, 0 replies; 20+ messages in thread
From: Sergio Paracuellos @ 2019-07-06 16:24 UTC (permalink / raw)
  To: Brett Neumeier; +Cc: Neil Brown, driverdev-devel, Greg Ungerer

Hi Brett,

On Sat, Jul 6, 2019 at 3:43 PM Brett Neumeier <bneumeier@gmail.com> wrote:
>
> On Sat, Jul 6, 2019 at 4:00 AM Sergio Paracuellos
> <sergio.paracuellos@gmail.com> wrote:
> > > Out of curiosity, if it's not too complex an answer to go into, what's
> > > the benefit of the staging-next driver? Is there a reason to prefer it
> > > to the 4.2 driver?
> >
> > In terms of stability, the driver which is in staging-next now is not
> > always working as expected,
> > so I really apologize for that because main changes have been done by
> > myself. In the other hand,
> > you have to think what is staging tree for. Staging contains drivers
> > that are not ready to be properly
> > mainlined into the "real" tree because they are not clean enough, the
> > use old apis and so on. The idea
> > of staging is to have a temporal place to properly clean drivers in
> > order to get them properly added into
> > the official mainline tree and directories. Doing that it will always
> > be supported in the kernel and it won't be
> > deleted for the tree. The mt7621 pci driver is now clean enough to
> > give it a try to be mainlined but we have to
> > achieve the problem of pci link stability that sometimes gets the
> > driver to hang.
>
> I'm sorry, I think my question was unclear! I am not complaining about
> the instability introduced in the current driver. I understand that
> dealing with hardware is complicated and sometimes things are broken
> for a while -- especially in staging or experimental drivers. That
> doesn't bother me!
>
> I am curious, though, about the motivation for this change --
> obviously there must be some reason you rewrote the driver, but it's
> not at all clear to me.

The original driver was using legacy pci code, the 4.20 version also
have a lot of changes in order to use current generic pci apis which
is the way to go.
Just looking at the code, you can see real differences with
readability and maintainability. Those two are really important. Or at
least for me they are :)

> I see that with the staging driver it looks
> like maybe the 4.20 driver was split into the PCI controller driver
> and a separate PCI PHY driver? If that's the main architectural
> change, what's better about splitting them up that way?

Well, it really depends of the hardware. In this case in order to get
a chance to be properly mainlined (which is the main reason for making
changes in a staging driver and should be the final aim) pci phy part
and pci host controller driver seems neccessary because of how mt7621
SoC is described. There are not the only changes comparing it with the
4.20 version. With current staging version, all is properly described
using device tree instead of having hardcoded stuff which is not clean
at all (reset lines, phy, hw resources...),. The only thing is not
clear yet is that we are using pci clocks for the RC and ports because
there is not a "ralink" clock gate driver and other similar drivers
directly access to registers without using a custom clock driver for
that.

And another important thing for making this changes is because it is
fun and you learn a lot in the way :))

>
> Again, I understand that sometimes a question sounds really simple but
> the answer is long and involved, and I don't want to take up a lot of
> your time or energy. So if it is more complicated than a thirty-second
> explanation, that's cool.

No problem at all :) No time / energy consuming. I think if you are
curious is always better to ask :-).

Best regards,
    Sergio Paracuellos
>
> --
> Brett Neumeier (bneumeier@gmail.com)
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^ permalink raw reply	[flat|nested] 20+ messages in thread

end of thread, other threads:[~2019-07-06 16:24 UTC | newest]

Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-06-21  6:15 [PATCH 0/4] staging: mt7621-pci: Handle minor issues Sergio Paracuellos
2019-06-21  6:15 ` [PATCH 1/4] staging: mt7621-pci: disable pcie port clock if there is no pcie link Sergio Paracuellos
2019-06-21  6:15 ` [PATCH 2/4] staging: mt7621-pci: add phy exit call if phy_power_on call fails Sergio Paracuellos
2019-06-21  6:15 ` [PATCH 3/4] staging: mt7621-pci-phy: remove disable clock from the phy exit function Sergio Paracuellos
2019-06-21  6:15 ` [PATCH 4/4] staging: mt7621-pci: use 'module_init' instead of 'arch_initcall' Sergio Paracuellos
2019-06-21 12:35 ` [PATCH 0/4] staging: mt7621-pci: Handle minor issues Greg Ungerer
2019-06-21 13:23   ` Sergio Paracuellos
2019-06-23  2:15   ` Brett Neumeier
2019-06-23  5:58     ` Sergio Paracuellos
2019-06-25  5:10       ` Greg Ungerer
2019-06-25  5:18         ` Sergio Paracuellos
2019-06-25 12:47           ` Sergio Paracuellos
2019-06-26  3:31             ` Greg Ungerer
2019-06-26  7:10               ` Sergio Paracuellos
2019-06-26 12:18                 ` Greg Ungerer
2019-06-26 12:44                   ` Sergio Paracuellos
2019-07-05 18:43                     ` Brett Neumeier
2019-07-06  9:00                       ` Sergio Paracuellos
2019-07-06 13:43                         ` Brett Neumeier
2019-07-06 16:24                           ` Sergio Paracuellos

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