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From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
To: qemu-devel@nongnu.org
Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org,
	zach.pfeffer@xilinx.com, ozaki.ryota@gmail.com,
	Alistair Francis <alistair.francis@xilinx.com>,
	michals@xilinx.com
Subject: [Qemu-devel] [PATCH target-arm v4 16/16] arm: xlnx-zynqmp: Add PSCI setup
Date: Mon, 23 Mar 2015 04:05:19 -0700	[thread overview]
Message-ID: <c0164e7d61c33ce560936803c9d2ecc86f312748.1427108387.git.peter.crosthwaite@xilinx.com> (raw)
In-Reply-To: <cover.1427108387.git.peter.crosthwaite@xilinx.com>

Use SMC PSCI, with the standard policy of secondaries starting in
power-off.

Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---
changed since v1:
Add &error_abort to property setter calls

 hw/arm/xlnx-zynqmp.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index e015025..0265fba 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -97,6 +97,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
     for (i = 0; i < XLNX_ZYNQMP_NUM_CPUS; i++) {
         qemu_irq irq;
 
+        object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC,
+                                "psci-conduit", &error_abort);
+        if (i > 0) {
+            /* Secondary CPUs start in PSCI powered-down state */
+            object_property_set_bool(OBJECT(&s->cpu[i]), true,
+                                     "start-powered-off", &error_abort);
+        }
+
         object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err);
         ERR_PROP_CHECK_RETURN(err, errp);
 
-- 
2.3.1.2.g90df61e.dirty

  parent reply	other threads:[~2015-03-23 11:05 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-23 11:05 [Qemu-devel] [PATCH target-arm v4 00/16] Next Generation Xilinx Zynq SoC Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 01/16] cpus: Don't kick un-realized cpus Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 02/16] target-arm: cpu64: Factor out ARM cortex init Peter Crosthwaite
2015-04-23 17:35   ` Peter Maydell
2015-04-24 16:39     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 03/16] target-arm: cpu64: Add support for cortex-a53 Peter Crosthwaite
2015-03-23 13:17   ` Ryota Ozaki
2015-04-24 16:42     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 05/16] arm: xlnx-zynqmp: Add GIC Peter Crosthwaite
2015-04-23 17:45   ` Peter Maydell
2015-04-23 23:55     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 04/16] arm: Introduce Xilinx ZynqMP SoC Peter Crosthwaite
2015-03-30  1:17   ` Alistair Francis
2015-04-23 17:42   ` Peter Maydell
2015-04-23 19:21     ` Peter Crosthwaite
2015-04-23 21:38       ` Peter Maydell
2015-04-24 15:26         ` Peter Maydell
2015-04-24 16:31           ` Peter Crosthwaite
2015-04-23 17:47   ` Peter Maydell
2015-04-23 19:30     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 06/16] arm: xlnx-zynqmp: Connect CPU Timers to GIC Peter Crosthwaite
2015-03-30  1:29   ` Alistair Francis
2015-04-24  0:02     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 07/16] net: cadence_gem: Clean up variable names Peter Crosthwaite
2015-04-23 17:50   ` Peter Maydell
2015-04-24 16:51     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 08/16] net: cadence_gem: Split state struct and type into header Peter Crosthwaite
2015-04-23 17:51   ` Peter Maydell
2015-04-24  0:10     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 10/16] char: cadence_uart: Clean up variable names Peter Crosthwaite
2015-04-23 17:59   ` Peter Maydell
2015-04-24  0:25     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 11/16] char: cadence_uart: Split state struct and type into header Peter Crosthwaite
2015-04-23 18:00   ` Peter Maydell
2015-04-24  0:20     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 13/16] arm: Add xlnx-ep108 machine Peter Crosthwaite
2015-03-30  1:11   ` Alistair Francis
2015-04-23 18:09   ` Peter Maydell
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 14/16] arm: xilinx-ep108: Add external RAM Peter Crosthwaite
2015-03-30  1:31   ` Alistair Francis
2015-04-23 18:12   ` Peter Maydell
2015-04-24  0:36     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 15/16] arm: xilinx-ep108: Add bootloading Peter Crosthwaite
2015-03-30  1:42   ` Alistair Francis
2015-04-23 18:15   ` Peter Maydell
2015-04-24  0:43     ` Peter Crosthwaite
2015-04-24 19:10       ` Peter Crosthwaite
2015-03-23 11:05 ` Peter Crosthwaite [this message]
2015-04-23 18:16   ` [Qemu-devel] [PATCH target-arm v4 16/16] arm: xlnx-zynqmp: Add PSCI setup Peter Maydell
2015-04-24  0:46     ` Peter Crosthwaite
2015-03-30  1:21 ` [Qemu-devel] [PATCH target-arm v4 00/16] Next Generation Xilinx Zynq SoC Alistair Francis
     [not found] ` <267e60dda9e3d2ecfbd43d7fa86bf884a955ba44.1427108387.git.peter.crosthwaite@xilinx.com>
2015-04-23 17:52   ` [Qemu-devel] [PATCH target-arm v4 09/16] arm: xilinx-zynqmp: Add GEM support Peter Maydell
2015-04-24  0:12     ` Peter Crosthwaite
     [not found] ` <9c0afa7c2c54b22be3ad95f74efa4ccc3f0ca4ba.1427108387.git.peter.crosthwaite@xilinx.com>
2015-04-23 18:09   ` [Qemu-devel] [PATCH target-arm v4 12/16] arm: xilinx-zynqmp: Add UART support Peter Maydell

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