From: Vincenzo Frascino <vincenzo.frascino@arm.com> To: Catalin Marinas <catalin.marinas@arm.com> Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, Will Deacon <will@kernel.org>, Dmitry Vyukov <dvyukov@google.com>, Andrey Ryabinin <aryabinin@virtuozzo.com>, Alexander Potapenko <glider@google.com>, Marco Elver <elver@google.com>, Evgenii Stepanov <eugenis@google.com>, Branislav Rankov <Branislav.Rankov@arm.com>, Andrey Konovalov <andreyknvl@google.com> Subject: Re: [PATCH v3 3/4] arm64: mte: Enable async tag check fault Date: Mon, 18 Jan 2021 13:37:35 +0000 [thread overview] Message-ID: <c076b1cc-8ce5-91a0-9957-7dcd78026b18@arm.com> (raw) In-Reply-To: <20210118125715.GA4483@gaia> On 1/18/21 12:57 PM, Catalin Marinas wrote: >> +#ifdef CONFIG_KASAN_HW_TAGS >> +void mte_check_tfsr_el1_no_sync(void) >> +{ >> + u64 tfsr_el1; >> + >> + if (!system_supports_mte()) >> + return; >> + >> + tfsr_el1 = read_sysreg_s(SYS_TFSR_EL1); >> + >> + /* >> + * The kernel should never hit the condition TF0 == 1 >> + * at this point because for the futex code we set >> + * PSTATE.TCO. >> + */ >> + WARN_ON(tfsr_el1 & SYS_TFSR_EL1_TF0); > I'd change this to a WARN_ON_ONCE() in case we trip over this due to > model bugs etc. and it floods the log. > I will merge yours and Mark's comment using WARN_ONCE() here. Did not think of potential bug in the model and you are completely right. >> + if (tfsr_el1 & SYS_TFSR_EL1_TF1) { >> + write_sysreg_s(0, SYS_TFSR_EL1); >> + isb(); > While in general we use ISB after a sysreg update, I haven't convinced > myself it's needed here. There's no side-effect to updating this reg and > a subsequent TFSR access should see the new value. Why there is no side-effect? > If a speculated load is allowed to update this reg, we'd probably need an > ISB+DSB (I don't think it does, something to check with the architects). > I will check this with the architects and let you know. -- Regards, Vincenzo
WARNING: multiple messages have this Message-ID (diff)
From: Vincenzo Frascino <vincenzo.frascino@arm.com> To: Catalin Marinas <catalin.marinas@arm.com> Cc: Branislav Rankov <Branislav.Rankov@arm.com>, Marco Elver <elver@google.com>, Andrey Konovalov <andreyknvl@google.com>, Evgenii Stepanov <eugenis@google.com>, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, Alexander Potapenko <glider@google.com>, linux-arm-kernel@lists.infradead.org, Andrey Ryabinin <aryabinin@virtuozzo.com>, Will Deacon <will@kernel.org>, Dmitry Vyukov <dvyukov@google.com> Subject: Re: [PATCH v3 3/4] arm64: mte: Enable async tag check fault Date: Mon, 18 Jan 2021 13:37:35 +0000 [thread overview] Message-ID: <c076b1cc-8ce5-91a0-9957-7dcd78026b18@arm.com> (raw) In-Reply-To: <20210118125715.GA4483@gaia> On 1/18/21 12:57 PM, Catalin Marinas wrote: >> +#ifdef CONFIG_KASAN_HW_TAGS >> +void mte_check_tfsr_el1_no_sync(void) >> +{ >> + u64 tfsr_el1; >> + >> + if (!system_supports_mte()) >> + return; >> + >> + tfsr_el1 = read_sysreg_s(SYS_TFSR_EL1); >> + >> + /* >> + * The kernel should never hit the condition TF0 == 1 >> + * at this point because for the futex code we set >> + * PSTATE.TCO. >> + */ >> + WARN_ON(tfsr_el1 & SYS_TFSR_EL1_TF0); > I'd change this to a WARN_ON_ONCE() in case we trip over this due to > model bugs etc. and it floods the log. > I will merge yours and Mark's comment using WARN_ONCE() here. Did not think of potential bug in the model and you are completely right. >> + if (tfsr_el1 & SYS_TFSR_EL1_TF1) { >> + write_sysreg_s(0, SYS_TFSR_EL1); >> + isb(); > While in general we use ISB after a sysreg update, I haven't convinced > myself it's needed here. There's no side-effect to updating this reg and > a subsequent TFSR access should see the new value. Why there is no side-effect? > If a speculated load is allowed to update this reg, we'd probably need an > ISB+DSB (I don't think it does, something to check with the architects). > I will check this with the architects and let you know. -- Regards, Vincenzo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-01-18 13:38 UTC|newest] Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-15 12:00 [PATCH v3 0/4] arm64: ARMv8.5-A: MTE: Add async mode support Vincenzo Frascino 2021-01-15 12:00 ` Vincenzo Frascino 2021-01-15 12:00 ` [PATCH v3 1/4] kasan, arm64: Add KASAN light mode Vincenzo Frascino 2021-01-15 12:00 ` Vincenzo Frascino 2021-01-15 15:08 ` Mark Rutland 2021-01-15 15:08 ` Mark Rutland 2021-01-16 13:47 ` Vincenzo Frascino 2021-01-16 13:47 ` Vincenzo Frascino 2021-01-16 14:09 ` Andrey Konovalov 2021-01-16 14:09 ` Andrey Konovalov 2021-01-18 10:24 ` Mark Rutland 2021-01-18 10:24 ` Mark Rutland 2021-01-15 18:59 ` Andrey Konovalov 2021-01-15 18:59 ` Andrey Konovalov 2021-01-16 13:40 ` Vincenzo Frascino 2021-01-16 13:40 ` Vincenzo Frascino 2021-01-16 13:59 ` Andrey Konovalov 2021-01-16 13:59 ` Andrey Konovalov 2021-01-16 14:06 ` Vincenzo Frascino 2021-01-16 14:06 ` Vincenzo Frascino 2021-01-15 12:00 ` [PATCH v3 2/4] arm64: mte: Add asynchronous mode support Vincenzo Frascino 2021-01-15 12:00 ` Vincenzo Frascino 2021-01-15 15:13 ` Mark Rutland 2021-01-15 15:13 ` Mark Rutland 2021-01-16 13:49 ` Vincenzo Frascino 2021-01-16 13:49 ` Vincenzo Frascino 2021-01-15 12:00 ` [PATCH v3 3/4] arm64: mte: Enable async tag check fault Vincenzo Frascino 2021-01-15 12:00 ` Vincenzo Frascino 2021-01-15 15:37 ` Mark Rutland 2021-01-15 15:37 ` Mark Rutland 2021-01-18 12:57 ` Catalin Marinas 2021-01-18 12:57 ` Catalin Marinas 2021-01-18 13:37 ` Vincenzo Frascino [this message] 2021-01-18 13:37 ` Vincenzo Frascino 2021-01-18 14:14 ` Mark Rutland 2021-01-18 14:14 ` Mark Rutland 2021-01-18 14:48 ` Vincenzo Frascino 2021-01-18 14:48 ` Vincenzo Frascino 2021-01-18 15:39 ` Vincenzo Frascino 2021-01-18 15:39 ` Vincenzo Frascino 2021-01-18 15:40 ` Vincenzo Frascino 2021-01-18 15:40 ` Vincenzo Frascino 2021-01-15 12:00 ` [PATCH v3 4/4] arm64: mte: Optimize mte_assign_mem_tag_range() Vincenzo Frascino 2021-01-15 12:00 ` Vincenzo Frascino 2021-01-15 15:45 ` Mark Rutland 2021-01-15 15:45 ` Mark Rutland 2021-01-16 14:22 ` Vincenzo Frascino 2021-01-16 14:22 ` Vincenzo Frascino 2021-01-17 12:27 ` Vincenzo Frascino 2021-01-17 12:27 ` Vincenzo Frascino 2021-01-18 10:41 ` Mark Rutland 2021-01-18 10:41 ` Mark Rutland 2021-01-18 11:00 ` Vincenzo Frascino 2021-01-18 11:00 ` Vincenzo Frascino
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