From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Matthew Brost <matthew.brost@intel.com>,
intel-gfx@lists.freedesktop.org,
dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 47/51] drm/i915/selftest: Increase some timeouts in live_requests
Date: Thu, 22 Jul 2021 09:13:45 +0100 [thread overview]
Message-ID: <d15aeb2c-3fa1-a78c-2d23-0f64112f3ca3@linux.intel.com> (raw)
In-Reply-To: <20210716201724.54804-48-matthew.brost@intel.com>
On 16/07/2021 21:17, Matthew Brost wrote:
> Requests may take slightly longer with GuC submission, let's increase
> the timeouts in live_requests.
Hm "slightly" ends up 5x longer here and one second feels a lot.
Out of curiosity, given this is about a simple submit of a no-op batches
in a tight loop, where does the huge amount of extra latency come from?
Is it single H2G channel shared for all engines, the firmware, or GuC
speed itself?
Regards,
Tvrtko
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/i915/selftests/i915_request.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c
> index bd5c96a77ba3..d67710d10615 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_request.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_request.c
> @@ -1313,7 +1313,7 @@ static int __live_parallel_engine1(void *arg)
> i915_request_add(rq);
>
> err = 0;
> - if (i915_request_wait(rq, 0, HZ / 5) < 0)
> + if (i915_request_wait(rq, 0, HZ) < 0)
> err = -ETIME;
> i915_request_put(rq);
> if (err)
> @@ -1419,7 +1419,7 @@ static int __live_parallel_spin(void *arg)
> }
> igt_spinner_end(&spin);
>
> - if (err == 0 && i915_request_wait(rq, 0, HZ / 5) < 0)
> + if (err == 0 && i915_request_wait(rq, 0, HZ) < 0)
> err = -EIO;
> i915_request_put(rq);
>
>
WARNING: multiple messages have this Message-ID (diff)
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Matthew Brost <matthew.brost@intel.com>,
intel-gfx@lists.freedesktop.org,
dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 47/51] drm/i915/selftest: Increase some timeouts in live_requests
Date: Thu, 22 Jul 2021 09:13:45 +0100 [thread overview]
Message-ID: <d15aeb2c-3fa1-a78c-2d23-0f64112f3ca3@linux.intel.com> (raw)
In-Reply-To: <20210716201724.54804-48-matthew.brost@intel.com>
On 16/07/2021 21:17, Matthew Brost wrote:
> Requests may take slightly longer with GuC submission, let's increase
> the timeouts in live_requests.
Hm "slightly" ends up 5x longer here and one second feels a lot.
Out of curiosity, given this is about a simple submit of a no-op batches
in a tight loop, where does the huge amount of extra latency come from?
Is it single H2G channel shared for all engines, the firmware, or GuC
speed itself?
Regards,
Tvrtko
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/i915/selftests/i915_request.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c
> index bd5c96a77ba3..d67710d10615 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_request.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_request.c
> @@ -1313,7 +1313,7 @@ static int __live_parallel_engine1(void *arg)
> i915_request_add(rq);
>
> err = 0;
> - if (i915_request_wait(rq, 0, HZ / 5) < 0)
> + if (i915_request_wait(rq, 0, HZ) < 0)
> err = -ETIME;
> i915_request_put(rq);
> if (err)
> @@ -1419,7 +1419,7 @@ static int __live_parallel_spin(void *arg)
> }
> igt_spinner_end(&spin);
>
> - if (err == 0 && i915_request_wait(rq, 0, HZ / 5) < 0)
> + if (err == 0 && i915_request_wait(rq, 0, HZ) < 0)
> err = -EIO;
> i915_request_put(rq);
>
>
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next prev parent reply other threads:[~2021-07-22 8:13 UTC|newest]
Thread overview: 221+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-16 20:16 [PATCH 00/51] GuC submission support Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 01/51] drm/i915/guc: Add new GuC interface defines and structures Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 02/51] drm/i915/guc: Remove GuC stage descriptor, add LRC descriptor Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 03/51] drm/i915/guc: Add LRC descriptor context lookup array Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 04/51] drm/i915/guc: Implement GuC submission tasklet Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-19 23:01 ` John Harrison
2021-07-19 23:01 ` [Intel-gfx] " John Harrison
2021-07-19 22:55 ` Matthew Brost
2021-07-19 22:55 ` [Intel-gfx] " Matthew Brost
2021-07-20 0:26 ` John Harrison
2021-07-20 0:26 ` [Intel-gfx] " John Harrison
2021-07-16 20:16 ` [PATCH 05/51] drm/i915/guc: Add bypass tasklet submission path to GuC Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 06/51] drm/i915/guc: Implement GuC context operations for new inteface Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-20 0:23 ` John Harrison
2021-07-20 0:23 ` [Intel-gfx] " John Harrison
2021-07-20 2:45 ` Matthew Brost
2021-07-20 2:45 ` [Intel-gfx] " Matthew Brost
2021-07-20 0:51 ` Daniele Ceraolo Spurio
2021-07-20 0:51 ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-07-20 4:04 ` Matthew Brost
2021-07-20 4:04 ` [Intel-gfx] " Matthew Brost
2021-07-21 23:51 ` Daniele Ceraolo Spurio
2021-07-21 23:51 ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-07-22 7:57 ` Michal Wajdeczko
2021-07-22 7:57 ` Michal Wajdeczko
2021-07-22 15:48 ` Matthew Brost
2021-07-22 15:48 ` Matthew Brost
2021-07-16 20:16 ` [PATCH 07/51] drm/i915/guc: Insert fence on context when deregistering Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 08/51] drm/i915/guc: Defer context unpin until scheduling is disabled Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 09/51] drm/i915/guc: Disable engine barriers with GuC during unpin Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 10/51] drm/i915/guc: Extend deregistration fence to schedule disable Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 11/51] drm/i915: Disable preempt busywait when using GuC scheduling Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 12/51] drm/i915/guc: Ensure request ordering via completion fences Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-19 23:46 ` Daniele Ceraolo Spurio
2021-07-19 23:46 ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-07-20 2:48 ` Matthew Brost
2021-07-20 2:48 ` [Intel-gfx] " Matthew Brost
2021-07-20 2:50 ` Matthew Brost
2021-07-20 2:50 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 13/51] drm/i915/guc: Disable semaphores when using GuC scheduling Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-20 0:33 ` John Harrison
2021-07-20 0:33 ` [Intel-gfx] " John Harrison
2021-07-16 20:16 ` [PATCH 14/51] drm/i915/guc: Ensure G2H response has space in buffer Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 15/51] drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-20 1:03 ` John Harrison
2021-07-20 1:03 ` [Intel-gfx] " John Harrison
2021-07-20 1:53 ` Matthew Brost
2021-07-20 1:53 ` [Intel-gfx] " Matthew Brost
2021-07-20 19:49 ` John Harrison
2021-07-20 19:49 ` [Intel-gfx] " John Harrison
2021-07-16 20:16 ` [PATCH 16/51] drm/i915/guc: Update GuC debugfs to support new GuC Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-20 1:13 ` John Harrison
2021-07-20 1:13 ` [Intel-gfx] " John Harrison
2021-07-16 20:16 ` [PATCH 17/51] drm/i915/guc: Add several request trace points Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-20 1:27 ` John Harrison
2021-07-20 1:27 ` [Intel-gfx] " John Harrison
2021-07-20 2:10 ` Matthew Brost
2021-07-20 2:10 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 18/51] drm/i915: Add intel_context tracing Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 19/51] drm/i915/guc: GuC virtual engines Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-19 23:33 ` Daniele Ceraolo Spurio
2021-07-19 23:33 ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-07-19 23:27 ` Matthew Brost
2021-07-19 23:27 ` [Intel-gfx] " Matthew Brost
2021-07-19 23:42 ` Daniele Ceraolo Spurio
2021-07-19 23:42 ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-07-19 23:32 ` Matthew Brost
2021-07-19 23:32 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 20/51] drm/i915: Track 'serial' counts for " Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-20 1:28 ` John Harrison
2021-07-20 1:28 ` [Intel-gfx] " John Harrison
2021-07-20 1:54 ` Matthew Brost
2021-07-20 1:54 ` [Intel-gfx] " Matthew Brost
2021-07-20 16:47 ` Matthew Brost
2021-07-20 16:47 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 21/51] drm/i915: Hold reference to intel_context over life of i915_request Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 22/51] drm/i915/guc: Disable bonding extension with GuC submission Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 23/51] drm/i915/guc: Direct all breadcrumbs for a class to single breadcrumbs Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-20 19:45 ` John Harrison
2021-07-20 19:45 ` [Intel-gfx] " John Harrison
2021-07-22 12:46 ` Tvrtko Ursulin
2021-07-22 12:46 ` Tvrtko Ursulin
2021-07-26 22:25 ` Matthew Brost
2021-07-26 22:25 ` Matthew Brost
2021-07-16 20:16 ` [PATCH 24/51] drm/i915: Add i915_sched_engine destroy vfunc Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-20 19:55 ` John Harrison
2021-07-20 19:55 ` [Intel-gfx] " John Harrison
2021-07-20 19:53 ` Matthew Brost
2021-07-20 19:53 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:16 ` [PATCH 25/51] drm/i915: Move active request tracking to a vfunc Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-20 20:05 ` John Harrison
2021-07-20 20:05 ` [Intel-gfx] " John Harrison
2021-07-16 20:16 ` [PATCH 26/51] drm/i915/guc: Reset implementation for new GuC interface Matthew Brost
2021-07-16 20:16 ` [Intel-gfx] " Matthew Brost
2021-07-20 20:19 ` John Harrison
2021-07-20 20:19 ` [Intel-gfx] " John Harrison
2021-07-20 20:59 ` Matthew Brost
2021-07-20 20:59 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 27/51] drm/i915: Reset GPU immediately if submission is disabled Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 28/51] drm/i915/guc: Add disable interrupts to guc sanitize Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 29/51] drm/i915/guc: Suspend/resume implementation for new interface Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 30/51] drm/i915/guc: Handle context reset notification Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-20 20:29 ` John Harrison
2021-07-20 20:29 ` [Intel-gfx] " John Harrison
2021-07-20 20:38 ` Matthew Brost
2021-07-20 20:38 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 31/51] drm/i915/guc: Handle engine reset failure notification Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 32/51] drm/i915/guc: Enable the timer expired interrupt for GuC Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 33/51] drm/i915/guc: Provide mmio list to be saved/restored on engine reset Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-22 4:47 ` Matthew Brost
2021-07-22 4:47 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 34/51] drm/i915/guc: Don't complain about reset races Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 35/51] drm/i915/guc: Enable GuC engine reset Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 36/51] drm/i915/guc: Capture error state on context reset Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 37/51] drm/i915/guc: Fix for error capture after full GPU reset with GuC Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 38/51] drm/i915/guc: Hook GuC scheduling policies up Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 39/51] drm/i915/guc: Connect reset modparam updates to GuC policy flags Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:04 ` Matthew Brost
2021-07-16 20:04 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 40/51] drm/i915/guc: Include scheduling policies in the debugfs state dump Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 41/51] drm/i915/guc: Add golden context to GuC ADS Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-19 17:24 ` Matthew Brost
2021-07-19 17:24 ` Matthew Brost
2021-07-19 18:25 ` John Harrison
2021-07-19 18:25 ` John Harrison
2021-07-19 18:30 ` Matthew Brost
2021-07-19 18:30 ` Matthew Brost
2021-07-16 20:17 ` [PATCH 42/51] drm/i915/guc: Implement banned contexts for GuC submission Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-20 21:41 ` John Harrison
2021-07-20 21:41 ` [Intel-gfx] " John Harrison
2021-07-16 20:17 ` [PATCH 43/51] drm/i915/guc: Support request cancellation Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-22 19:56 ` Daniele Ceraolo Spurio
2021-07-22 19:56 ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-07-22 20:13 ` Matthew Brost
2021-07-22 20:13 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 44/51] drm/i915/selftest: Better error reporting from hangcheck selftest Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:13 ` Matthew Brost
2021-07-16 20:13 ` Matthew Brost
2021-07-16 20:17 ` [PATCH 45/51] drm/i915/selftest: Fix workarounds selftest for GuC submission Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-20 17:14 ` Matthew Brost
2021-07-20 17:14 ` Matthew Brost
2021-07-16 20:17 ` [PATCH 46/51] drm/i915/selftest: Fix MOCS " Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 23:57 ` Matthew Brost
2021-07-16 23:57 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 47/51] drm/i915/selftest: Increase some timeouts in live_requests Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-20 21:46 ` John Harrison
2021-07-20 21:46 ` [Intel-gfx] " John Harrison
2021-07-22 8:13 ` Tvrtko Ursulin [this message]
2021-07-22 8:13 ` Tvrtko Ursulin
2021-07-16 20:17 ` [PATCH 48/51] drm/i915/selftest: Fix hangcheck self test for GuC submission Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 23:43 ` Matthew Brost
2021-07-16 23:43 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 49/51] drm/i915/selftest: Bump selftest timeouts for hangcheck Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-16 22:23 ` Matthew Brost
2021-07-16 22:23 ` [Intel-gfx] " Matthew Brost
2021-07-22 8:17 ` Tvrtko Ursulin
2021-07-22 8:17 ` Tvrtko Ursulin
2021-07-16 20:17 ` [PATCH 50/51] drm/i915/guc: Implement GuC priority management Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-22 20:26 ` Daniele Ceraolo Spurio
2021-07-22 20:26 ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-07-22 21:38 ` Matthew Brost
2021-07-22 21:38 ` [Intel-gfx] " Matthew Brost
2021-07-22 21:50 ` Daniele Ceraolo Spurio
2021-07-22 21:50 ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-07-22 21:55 ` Matthew Brost
2021-07-22 21:55 ` [Intel-gfx] " Matthew Brost
2021-07-16 20:17 ` [PATCH 51/51] drm/i915/guc: Unblock GuC submission on Gen11+ Matthew Brost
2021-07-16 20:17 ` [Intel-gfx] " Matthew Brost
2021-07-17 1:10 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for GuC submission support (rev3) Patchwork
2021-07-19 9:06 ` [Intel-gfx] [PATCH 00/51] GuC submission support Tvrtko Ursulin
2021-07-19 9:06 ` Tvrtko Ursulin
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