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From: "Sharma, Swati2" <swati2.sharma@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 3/9] drm/i915: Split i9xx_read_lut_8() to gmch vs. ilk variants
Date: Fri, 6 Mar 2020 20:30:28 +0530	[thread overview]
Message-ID: <ba32ae21-d9cb-8f2c-d4d8-329abb06ea4c@intel.com> (raw)
In-Reply-To: <20200303173313.28117-4-ville.syrjala@linux.intel.com>



On 03-Mar-20 11:03 PM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> To mirror the load_luts path let's clone an ilk+ version
> from i9xx_read_lut_8(). I guess the extra branch isn't a huge
> issue but feels better to make a clean split.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Swati Sharma <swati2.sharma@intel.com>

> ---
>   drivers/gpu/drm/i915/display/intel_color.c | 41 ++++++++++++++++++----
>   1 file changed, 35 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index cf8ed4e2ae13..e3abaa1908a9 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -1706,10 +1706,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
>   	blob_data = blob->data;
>   
>   	for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
> -		if (HAS_GMCH(dev_priv))
> -			val = intel_de_read(dev_priv, PALETTE(pipe, i));
> -		else
> -			val = intel_de_read(dev_priv, LGC_PALETTE(pipe, i));
> +		val = intel_de_read(dev_priv, PALETTE(pipe, i));
>   
>   		blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
>   							LGC_PALETTE_RED_MASK, val), 8);
> @@ -1824,6 +1821,38 @@ static void chv_read_luts(struct intel_crtc_state *crtc_state)
>   		i965_read_luts(crtc_state);
>   }
>   
> +static struct drm_property_blob *
> +ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> +	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> +	enum pipe pipe = crtc->pipe;
> +	struct drm_property_blob *blob;
> +	struct drm_color_lut *blob_data;
> +	u32 i, val;
> +
> +	blob = drm_property_create_blob(&dev_priv->drm,
> +					sizeof(struct drm_color_lut) * LEGACY_LUT_LENGTH,
> +					NULL);
> +	if (IS_ERR(blob))
> +		return NULL;
> +
> +	blob_data = blob->data;
> +
> +	for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
> +		val = intel_de_read(dev_priv, LGC_PALETTE(pipe, i));
> +
> +		blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
> +							LGC_PALETTE_RED_MASK, val), 8);
> +		blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
> +							  LGC_PALETTE_GREEN_MASK, val), 8);
> +		blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
> +							 LGC_PALETTE_BLUE_MASK, val), 8);
> +	}
> +
> +	return blob;
> +}
> +
>   static struct drm_property_blob *
>   ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
>   {
> @@ -1866,7 +1895,7 @@ static void ilk_read_luts(struct intel_crtc_state *crtc_state)
>   		return;
>   
>   	if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
> -		crtc_state->hw.gamma_lut = i9xx_read_lut_8(crtc_state);
> +		crtc_state->hw.gamma_lut = ilk_read_lut_8(crtc_state);
>   	else
>   		crtc_state->hw.gamma_lut = ilk_read_lut_10(crtc_state);
>   }
> @@ -1915,7 +1944,7 @@ static void glk_read_luts(struct intel_crtc_state *crtc_state)
>   		return;
>   
>   	if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
> -		crtc_state->hw.gamma_lut = i9xx_read_lut_8(crtc_state);
> +		crtc_state->hw.gamma_lut = ilk_read_lut_8(crtc_state);
>   	else
>   		crtc_state->hw.gamma_lut = glk_read_lut_10(crtc_state, PAL_PREC_INDEX_VALUE(0));
>   }
> 

-- 
~Swati Sharma
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-03-06 15:00 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-03 17:33 [Intel-gfx] [PATCH v2 0/9] drm/i915: Gamma cleanups Ville Syrjala
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 1/9] drm/i915: Polish CHV CGM CSC loading Ville Syrjala
2020-03-06  8:44   ` Sharma, Swati2
2020-03-06 11:49     ` Ville Syrjälä
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 2/9] drm/i915: Clean up i9xx_load_luts_internal() Ville Syrjala
2020-03-06 14:42   ` Sharma, Swati2
2020-03-06 14:46     ` Ville Syrjälä
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Split i9xx_read_lut_8() to gmch vs. ilk variants Ville Syrjala
2020-03-04  2:54   ` kbuild test robot
2020-03-04  2:54     ` kbuild test robot
2020-03-04 11:51     ` Ville Syrjälä
2020-03-04 11:51       ` Ville Syrjälä
2020-03-06 15:00   ` Sharma, Swati2 [this message]
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 4/9] drm/i915: s/blob_data/lut/ Ville Syrjala
2020-03-06 15:03   ` Sharma, Swati2
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 5/9] drm/i915: s/chv_read_cgm_lut/chv_read_cgm_gamma/ Ville Syrjala
2020-03-06 15:18   ` Sharma, Swati2
2020-03-06 15:32     ` Ville Syrjälä
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 6/9] drm/i915: Clean up integer types in color code Ville Syrjala
2020-03-06 15:24   ` Sharma, Swati2
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 7/9] drm/i915: Refactor LUT read functions Ville Syrjala
2020-03-06 15:28   ` Sharma, Swati2
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 8/9] drm/i915: Fix readout of PIPEGCMAX Ville Syrjala
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 9/9] drm/i915: Pass the crtc to the low level read_lut() funcs Ville Syrjala
2020-03-06 15:36   ` Sharma, Swati2
2020-03-03 19:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma cleanups (rev3) Patchwork
2020-03-03 19:38 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-03-03 20:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-03-06 15:40 ` [Intel-gfx] [PATCH v2 0/9] drm/i915: Gamma cleanups Sharma, Swati2
2020-03-09 20:26   ` Ville Syrjälä
2020-03-07  0:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma cleanups (rev4) Patchwork
2020-03-07  0:27 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-03-07  0:45 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-03-09 13:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-09 19:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-03-09 19:46 ` Patchwork

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