From: "Sharma, Swati2" <swati2.sharma@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 6/9] drm/i915: Clean up integer types in color code
Date: Fri, 6 Mar 2020 20:54:07 +0530 [thread overview]
Message-ID: <ef07b13d-4399-d058-6f51-45b37335532c@intel.com> (raw)
In-Reply-To: <20200303173313.28117-7-ville.syrjala@linux.intel.com>
On 03-Mar-20 11:03 PM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> A variable called 'i' having an unsigned type is just looking for
> trouble, and using a sized type generally makes no sense either.
> Change all of them to just plain old int. And do the same for some
> 'lut_size' variables which generally provide the loop end codition
> for 'i'.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Swati Sharma <swati2.sharma@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_color.c | 43 ++++++++++------------
> 1 file changed, 19 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index ab23b24e7be3..934f00817c5c 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -740,9 +740,8 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state)
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum pipe pipe = crtc->pipe;
> - const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
> + int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
> const struct drm_color_lut *lut = crtc_state->hw.degamma_lut->data;
> - u32 i;
>
> /*
> * When setting the auto-increment bit, the hardware seems to
> @@ -781,8 +780,7 @@ static void glk_load_degamma_lut_linear(const struct intel_crtc_state *crtc_stat
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum pipe pipe = crtc->pipe;
> - const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
> - u32 i;
> + int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
>
> /*
> * When setting the auto-increment bit, the hardware seems to
> @@ -867,7 +865,7 @@ icl_program_gamma_superfine_segment(const struct intel_crtc_state *crtc_state)
> const struct drm_color_lut *lut = blob->data;
> struct intel_dsb *dsb = intel_dsb_get(crtc);
> enum pipe pipe = crtc->pipe;
> - u32 i;
> + int i;
>
> /*
> * Program Super Fine segment (let's call it seg1)...
> @@ -900,7 +898,7 @@ icl_program_gamma_multi_segment(const struct intel_crtc_state *crtc_state)
> const struct drm_color_lut *entry;
> struct intel_dsb *dsb = intel_dsb_get(crtc);
> enum pipe pipe = crtc->pipe;
> - u32 i;
> + int i;
>
> /*
> * Program Fine segment (let's call it seg2)...
> @@ -1675,7 +1673,7 @@ bool intel_color_lut_equal(struct drm_property_blob *blob1,
> }
>
> /* convert hw value with given bit_precision to lut property val */
> -static u32 intel_color_lut_pack(u32 val, u32 bit_precision)
> +static u32 intel_color_lut_pack(u32 val, int bit_precision)
> {
> u32 max = 0xffff >> (16 - bit_precision);
>
> @@ -1695,7 +1693,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
> enum pipe pipe = crtc->pipe;
> struct drm_property_blob *blob;
> struct drm_color_lut *lut;
> - u32 i, val;
> + int i;
>
> blob = drm_property_create_blob(&dev_priv->drm,
> sizeof(struct drm_color_lut) * LEGACY_LUT_LENGTH,
> @@ -1706,7 +1704,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
> lut = blob->data;
>
> for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
> - val = intel_de_read(dev_priv, PALETTE(pipe, i));
> + u32 val = intel_de_read(dev_priv, PALETTE(pipe, i));
>
> lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
> LGC_PALETTE_RED_MASK, val), 8);
> @@ -1732,11 +1730,10 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> - u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
> + int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
> enum pipe pipe = crtc->pipe;
> struct drm_property_blob *blob;
> struct drm_color_lut *lut;
> - u32 i, val1, val2;
>
> blob = drm_property_create_blob(&dev_priv->drm,
> sizeof(struct drm_color_lut) * lut_size,
> @@ -1747,8 +1744,8 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
> lut = blob->data;
>
> for (i = 0; i < lut_size - 1; i++) {
> - val1 = intel_de_read(dev_priv, PALETTE(pipe, 2 * i + 0));
> - val2 = intel_de_read(dev_priv, PALETTE(pipe, 2 * i + 1));
> + u32 val1 = intel_de_read(dev_priv, PALETTE(pipe, 2 * i + 0));
> + u32 val2 = intel_de_read(dev_priv, PALETTE(pipe, 2 * i + 1));
>
> lut[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val2) << 8 |
> REG_FIELD_GET(PALETTE_RED_MASK, val1);
> @@ -1784,11 +1781,10 @@ chv_read_cgm_gamma(const struct intel_crtc_state *crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> - u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
> + int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
> enum pipe pipe = crtc->pipe;
> struct drm_property_blob *blob;
> struct drm_color_lut *lut;
> - u32 i, val;
>
> blob = drm_property_create_blob(&dev_priv->drm,
> sizeof(struct drm_color_lut) * lut_size,
> @@ -1799,7 +1795,8 @@ chv_read_cgm_gamma(const struct intel_crtc_state *crtc_state)
> lut = blob->data;
>
> for (i = 0; i < lut_size; i++) {
> - val = intel_de_read(dev_priv, CGM_PIPE_GAMMA(pipe, i, 0));
> + u32 val = intel_de_read(dev_priv, CGM_PIPE_GAMMA(pipe, i, 0));
> +
> lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
> CGM_PIPE_GAMMA_GREEN_MASK, val), 10);
> lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
> @@ -1829,7 +1826,7 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
> enum pipe pipe = crtc->pipe;
> struct drm_property_blob *blob;
> struct drm_color_lut *lut;
> - u32 i, val;
> + int i;
>
> blob = drm_property_create_blob(&dev_priv->drm,
> sizeof(struct drm_color_lut) * LEGACY_LUT_LENGTH,
> @@ -1840,7 +1837,7 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
> lut = blob->data;
>
> for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
> - val = intel_de_read(dev_priv, LGC_PALETTE(pipe, i));
> + u32 val = intel_de_read(dev_priv, LGC_PALETTE(pipe, i));
>
> lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
> LGC_PALETTE_RED_MASK, val), 8);
> @@ -1858,11 +1855,10 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> - u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
> + int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
> enum pipe pipe = crtc->pipe;
> struct drm_property_blob *blob;
> struct drm_color_lut *lut;
> - u32 i, val;
>
> blob = drm_property_create_blob(&dev_priv->drm,
> sizeof(struct drm_color_lut) * lut_size,
> @@ -1873,7 +1869,7 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
> lut = blob->data;
>
> for (i = 0; i < lut_size; i++) {
> - val = intel_de_read(dev_priv, PREC_PALETTE(pipe, i));
> + u32 val = intel_de_read(dev_priv, PREC_PALETTE(pipe, i));
>
> lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
> PREC_PALETTE_RED_MASK, val), 10);
> @@ -1905,11 +1901,10 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> - int hw_lut_size = ivb_lut_10_size(prec_index);
> + int i, hw_lut_size = ivb_lut_10_size(prec_index);
> enum pipe pipe = crtc->pipe;
> struct drm_property_blob *blob;
> struct drm_color_lut *lut;
> - u32 i, val;
>
> blob = drm_property_create_blob(&dev_priv->drm,
> sizeof(struct drm_color_lut) * hw_lut_size,
> @@ -1923,7 +1918,7 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
> prec_index | PAL_PREC_AUTO_INCREMENT);
>
> for (i = 0; i < hw_lut_size; i++) {
> - val = intel_de_read(dev_priv, PREC_PAL_DATA(pipe));
> + u32 val = intel_de_read(dev_priv, PREC_PAL_DATA(pipe));
>
> lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
> PREC_PAL_DATA_RED_MASK, val), 10);
>
--
~Swati Sharma
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-03-06 15:24 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-03 17:33 [Intel-gfx] [PATCH v2 0/9] drm/i915: Gamma cleanups Ville Syrjala
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 1/9] drm/i915: Polish CHV CGM CSC loading Ville Syrjala
2020-03-06 8:44 ` Sharma, Swati2
2020-03-06 11:49 ` Ville Syrjälä
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 2/9] drm/i915: Clean up i9xx_load_luts_internal() Ville Syrjala
2020-03-06 14:42 ` Sharma, Swati2
2020-03-06 14:46 ` Ville Syrjälä
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Split i9xx_read_lut_8() to gmch vs. ilk variants Ville Syrjala
2020-03-04 2:54 ` kbuild test robot
2020-03-04 2:54 ` kbuild test robot
2020-03-04 11:51 ` Ville Syrjälä
2020-03-04 11:51 ` Ville Syrjälä
2020-03-06 15:00 ` Sharma, Swati2
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 4/9] drm/i915: s/blob_data/lut/ Ville Syrjala
2020-03-06 15:03 ` Sharma, Swati2
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 5/9] drm/i915: s/chv_read_cgm_lut/chv_read_cgm_gamma/ Ville Syrjala
2020-03-06 15:18 ` Sharma, Swati2
2020-03-06 15:32 ` Ville Syrjälä
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 6/9] drm/i915: Clean up integer types in color code Ville Syrjala
2020-03-06 15:24 ` Sharma, Swati2 [this message]
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 7/9] drm/i915: Refactor LUT read functions Ville Syrjala
2020-03-06 15:28 ` Sharma, Swati2
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 8/9] drm/i915: Fix readout of PIPEGCMAX Ville Syrjala
2020-03-03 17:33 ` [Intel-gfx] [PATCH v2 9/9] drm/i915: Pass the crtc to the low level read_lut() funcs Ville Syrjala
2020-03-06 15:36 ` Sharma, Swati2
2020-03-03 19:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma cleanups (rev3) Patchwork
2020-03-03 19:38 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-03-03 20:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-03-06 15:40 ` [Intel-gfx] [PATCH v2 0/9] drm/i915: Gamma cleanups Sharma, Swati2
2020-03-09 20:26 ` Ville Syrjälä
2020-03-07 0:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma cleanups (rev4) Patchwork
2020-03-07 0:27 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-03-07 0:45 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-03-09 13:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-09 19:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-03-09 19:46 ` Patchwork
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