* [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting
@ 2020-05-15 8:32 Thomas Zimmermann
2020-05-15 8:32 ` [PATCH v3 01/15] drm/mgag200: Remove HW cursor Thomas Zimmermann
` (14 more replies)
0 siblings, 15 replies; 25+ messages in thread
From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw)
To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly
Cc: Thomas Zimmermann, dri-devel
This patchset converts mgag200 to atomic modesetting. It uses simple
KMS helpers and SHMEM. I'm posting v3 mostly for reference. These patches
will land soon if no one objects.
Patch 1 removes cursor support. The HW cursor is not usable with the
way universal planes work.
Patches 2 to 11 untangle the existing modesetting code into smaller
functions. Specifically, mode setting and plane updates are being
separated from each other.
Patch 12 to 14 convert mgag200 to simple KMS helpers and enables atomic
mode setting.
Atomically switching plane framebuffers, requires either source or target
buffer to be located at a non-0 offet. As some HW revisions seem to require
a framebuffer offset of 0 within the video memory, they do not work with
atomic modesetting. To resolve this problem, patch 15 converts mgag200
from VRAM helpers to SHMEM helpers. During plane updates, the content of
the SHMEM BO is memcpy'd to VRAM. From my observation, performance is not
nuch different from the original code.
The patchset has been tested on MGA G200EH hardware.
v3:
* update commit messages
* remove unused defines
v2:
* rebase patchset
* replace uint{8,32}_t with u{8,32} through-out patchset
* define additional register constants
* use helper functions around bpp-shift computations
* split conversion patch
* keep busy-waiting in DPMS code
* cleanups
Thomas Zimmermann (15):
drm/mgag200: Remove HW cursor
drm/mgag200: Clean up mga_set_start_address()
drm/mgag200: Clean up mga_crtc_do_set_base()
drm/mgag200: Move mode-setting code into separate helper function
drm/mgag200: Split MISC register update into PLL selection, SYNC and
I/O
drm/mgag200: Update mode registers after plane registers
drm/mgag200: Set pitch in a separate helper function
drm/mgag200: Set primary plane's format in separate helper function
drm/mgag200: Move TAGFIFO reset into separate function
drm/mgag200: Move hiprilvl setting into separate functions
drm/mgag200: Move register initialization into separate function
drm/mgag200: Remove out-commented suspend/resume helpers
drm/mgag200: Use simple-display data structures
drm/mgag200: Convert to simple KMS helper
drm/mgag200: Replace VRAM helpers with SHMEM helpers
drivers/gpu/drm/mgag200/Kconfig | 4 +-
drivers/gpu/drm/mgag200/Makefile | 2 +-
drivers/gpu/drm/mgag200/mgag200_drv.c | 51 +-
drivers/gpu/drm/mgag200/mgag200_drv.h | 45 +-
drivers/gpu/drm/mgag200/mgag200_main.c | 5 -
drivers/gpu/drm/mgag200/mgag200_mode.c | 871 ++++++++++++++-----------
drivers/gpu/drm/mgag200/mgag200_reg.h | 11 +-
drivers/gpu/drm/mgag200/mgag200_ttm.c | 28 +-
8 files changed, 528 insertions(+), 489 deletions(-)
--
2.26.2
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^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH v3 01/15] drm/mgag200: Remove HW cursor 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 02/15] drm/mgag200: Clean up mga_set_start_address() Thomas Zimmermann ` (13 subsequent siblings) 14 siblings, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel The HW cursor of Matrox G200 cards only supports a 16-color palette format. Univeral planes require at least ARGB or a similar component- based format, so remove the HW cursor. Alternatively, the driver could dither a cursor image from ARGB to 16 colors. But this does not produce pleasent-looking results in general, so it's useless for modern compositors. Without HW support, compositors will use software rendering. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/Makefile | 2 +- drivers/gpu/drm/mgag200/mgag200_drv.h | 13 ------------- drivers/gpu/drm/mgag200/mgag200_main.c | 5 ----- drivers/gpu/drm/mgag200/mgag200_mode.c | 2 -- 4 files changed, 1 insertion(+), 21 deletions(-) diff --git a/drivers/gpu/drm/mgag200/Makefile b/drivers/gpu/drm/mgag200/Makefile index 04b281bcf6558..63403133638a3 100644 --- a/drivers/gpu/drm/mgag200/Makefile +++ b/drivers/gpu/drm/mgag200/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only -mgag200-y := mgag200_main.o mgag200_mode.o mgag200_cursor.o \ +mgag200-y := mgag200_main.o mgag200_mode.o \ mgag200_drv.o mgag200_i2c.o mgag200_ttm.o obj-$(CONFIG_DRM_MGAG200) += mgag200.o diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h b/drivers/gpu/drm/mgag200/mgag200_drv.h index d9b7e96b214f8..bc372c2ec79e9 100644 --- a/drivers/gpu/drm/mgag200/mgag200_drv.h +++ b/drivers/gpu/drm/mgag200/mgag200_drv.h @@ -116,11 +116,6 @@ struct mga_connector { struct mga_i2c_chan *i2c; }; -struct mga_cursor { - struct drm_gem_vram_object *gbo[2]; - unsigned int next_index; -}; - struct mga_mc { resource_size_t vram_size; resource_size_t vram_base; @@ -156,8 +151,6 @@ struct mga_device { struct mga_mc mc; - struct mga_cursor cursor; - size_t vram_fb_available; bool suspended; @@ -207,10 +200,4 @@ int mgag200_mm_init(struct mga_device *mdev); void mgag200_mm_fini(struct mga_device *mdev); int mgag200_mmap(struct file *filp, struct vm_area_struct *vma); -int mgag200_cursor_init(struct mga_device *mdev); -void mgag200_cursor_fini(struct mga_device *mdev); -int mgag200_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, - uint32_t handle, uint32_t width, uint32_t height); -int mgag200_crtc_cursor_move(struct drm_crtc *crtc, int x, int y); - #endif /* __MGAG200_DRV_H__ */ diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c b/drivers/gpu/drm/mgag200/mgag200_main.c index 86df799fd38c5..3298eff7bd1b4 100644 --- a/drivers/gpu/drm/mgag200/mgag200_main.c +++ b/drivers/gpu/drm/mgag200/mgag200_main.c @@ -135,10 +135,6 @@ int mgag200_driver_load(struct drm_device *dev, unsigned long flags) goto err_mgag200_mm_fini; } - ret = mgag200_cursor_init(mdev); - if (ret) - drm_err(dev, "Could not initialize cursors. Not doing hardware cursors.\n"); - return 0; err_mgag200_mm_fini: @@ -154,7 +150,6 @@ void mgag200_driver_unload(struct drm_device *dev) if (mdev == NULL) return; - mgag200_cursor_fini(mdev); mgag200_mm_fini(mdev); dev->dev_private = NULL; } diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 5f4ac36a97760..c68ed8b6faf9b 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -1412,8 +1412,6 @@ static void mga_crtc_disable(struct drm_crtc *crtc) /* These provide the minimum set of functions required to handle a CRTC */ static const struct drm_crtc_funcs mga_crtc_funcs = { - .cursor_set = mgag200_crtc_cursor_set, - .cursor_move = mgag200_crtc_cursor_move, .gamma_set = mga_crtc_gamma_set, .set_config = drm_crtc_helper_set_config, .destroy = mga_crtc_destroy, -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 02/15] drm/mgag200: Clean up mga_set_start_address() 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 01/15] drm/mgag200: Remove HW cursor Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 03/15] drm/mgag200: Clean up mga_crtc_do_set_base() Thomas Zimmermann ` (12 subsequent siblings) 14 siblings, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel All register names and fields are now named according to the MGA programming manuals. The function doesn't need the CRTC, so callers pass in the device structure directly. The logging now uses device-specific macros. The original implementation busy-waited for the VSYNC flag to go up, to synchronize the page flip with the display's vblank. This code has been moved to mga_crtc_mode_set_base(). It's still present in the non-atomic code paths, but won't be used in atomic commits. With atomic, we should use interrupts to synchronize with vblanks. v3: * clarify commit message wrt. vblank busy-waiting v2: * use to_mga_device() * use MiB instead of MB * replace empty while loop with do-while, fixes checkpatch warning * replace uint{8,32}_t with u{8,32} Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/mgag200_drv.h | 5 ++ drivers/gpu/drm/mgag200/mgag200_mode.c | 82 +++++++++++++++----------- 2 files changed, 53 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h b/drivers/gpu/drm/mgag200/mgag200_drv.h index bc372c2ec79e9..1963876ef3b8c 100644 --- a/drivers/gpu/drm/mgag200/mgag200_drv.h +++ b/drivers/gpu/drm/mgag200/mgag200_drv.h @@ -61,6 +61,11 @@ WREG8(MGAREG_CRTC_DATA, v); \ } while (0) \ +#define RREG_ECRT(reg, v) \ + do { \ + WREG8(MGAREG_CRTCEXT_INDEX, reg); \ + v = RREG8(MGAREG_CRTCEXT_DATA); \ + } while (0) \ #define WREG_ECRT(reg, v) \ do { \ diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index c68ed8b6faf9b..80a3a805c0c4e 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -819,49 +819,53 @@ static void mga_g200wb_commit(struct drm_crtc *crtc) } /* - This is how the framebuffer base address is stored in g200 cards: - * Assume @offset is the gpu_addr variable of the framebuffer object - * Then addr is the number of _pixels_ (not bytes) from the start of - VRAM to the first pixel we want to display. (divided by 2 for 32bit - framebuffers) - * addr is stored in the CRTCEXT0, CRTCC and CRTCD registers - addr<20> -> CRTCEXT0<6> - addr<19-16> -> CRTCEXT0<3-0> - addr<15-8> -> CRTCC<7-0> - addr<7-0> -> CRTCD<7-0> - CRTCEXT0 has to be programmed last to trigger an update and make the - new addr variable take effect. + * This is how the framebuffer base address is stored in g200 cards: + * * Assume @offset is the gpu_addr variable of the framebuffer object + * * Then addr is the number of _pixels_ (not bytes) from the start of + * VRAM to the first pixel we want to display. (divided by 2 for 32bit + * framebuffers) + * * addr is stored in the CRTCEXT0, CRTCC and CRTCD registers + * addr<20> -> CRTCEXT0<6> + * addr<19-16> -> CRTCEXT0<3-0> + * addr<15-8> -> CRTCC<7-0> + * addr<7-0> -> CRTCD<7-0> + * + * CRTCEXT0 has to be programmed last to trigger an update and make the + * new addr variable take effect. */ -static void mga_set_start_address(struct drm_crtc *crtc, unsigned offset) +static void mgag200_set_startadd(struct mga_device *mdev, + unsigned long offset) { - struct mga_device *mdev = to_mga_device(crtc->dev); - u32 addr; - int count; - u8 crtcext0; + struct drm_device *dev = mdev->dev; + u32 startadd; + u8 crtcc, crtcd, crtcext0; - while (RREG8(0x1fda) & 0x08); - while (!(RREG8(0x1fda) & 0x08)); + startadd = offset / 8; - count = RREG8(MGAREG_VCOUNT) + 2; - while (RREG8(MGAREG_VCOUNT) < count); - - WREG8(MGAREG_CRTCEXT_INDEX, 0); - crtcext0 = RREG8(MGAREG_CRTCEXT_DATA); - crtcext0 &= 0xB0; - addr = offset / 8; - /* Can't store addresses any higher than that... - but we also don't have more than 16MB of memory, so it should be fine. */ - WARN_ON(addr > 0x1fffff); - crtcext0 |= (!!(addr & (1<<20)))<<6; - WREG_CRT(0x0d, (u8)(addr & 0xff)); - WREG_CRT(0x0c, (u8)(addr >> 8) & 0xff); - WREG_ECRT(0x0, ((u8)(addr >> 16) & 0xf) | crtcext0); + /* + * Can't store addresses any higher than that, but we also + * don't have more than 16 MiB of memory, so it should be fine. + */ + drm_WARN_ON(dev, startadd > 0x1fffff); + + RREG_ECRT(0x00, crtcext0); + + crtcc = (startadd >> 8) & 0xff; + crtcd = startadd & 0xff; + crtcext0 &= 0xb0; + crtcext0 |= ((startadd >> 14) & BIT(6)) | + ((startadd >> 16) & 0x0f); + + WREG_CRT(0x0c, crtcc); + WREG_CRT(0x0d, crtcd); + WREG_ECRT(0x00, crtcext0); } static int mga_crtc_do_set_base(struct drm_crtc *crtc, struct drm_framebuffer *fb, int x, int y, int atomic) { + struct mga_device *mdev = to_mga_device(crtc->dev); struct drm_gem_vram_object *gbo; int ret; s64 gpu_addr; @@ -882,7 +886,7 @@ static int mga_crtc_do_set_base(struct drm_crtc *crtc, goto err_drm_gem_vram_unpin; } - mga_set_start_address(crtc, (u32)gpu_addr); + mgag200_set_startadd(mdev, (unsigned long)gpu_addr); return 0; @@ -894,6 +898,16 @@ static int mga_crtc_do_set_base(struct drm_crtc *crtc, static int mga_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, struct drm_framebuffer *old_fb) { + struct drm_device *dev = crtc->dev; + struct mga_device *mdev = dev->dev_private; + unsigned int count; + + do { } while (RREG8(0x1fda) & 0x08); + do { } while (!(RREG8(0x1fda) & 0x08)); + + count = RREG8(MGAREG_VCOUNT) + 2; + do { } while (RREG8(MGAREG_VCOUNT) < count); + return mga_crtc_do_set_base(crtc, old_fb, x, y, 0); } -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 03/15] drm/mgag200: Clean up mga_crtc_do_set_base() 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 01/15] drm/mgag200: Remove HW cursor Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 02/15] drm/mgag200: Clean up mga_set_start_address() Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 04/15] drm/mgag200: Move mode-setting code into separate helper function Thomas Zimmermann ` (11 subsequent siblings) 14 siblings, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel The function now only takes the device structure, and the old and new framebuffers. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/mgag200_mode.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 80a3a805c0c4e..9aa6addbbb895 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -861,21 +861,20 @@ static void mgag200_set_startadd(struct mga_device *mdev, WREG_ECRT(0x00, crtcext0); } -static int mga_crtc_do_set_base(struct drm_crtc *crtc, - struct drm_framebuffer *fb, - int x, int y, int atomic) +static int mga_crtc_do_set_base(struct mga_device *mdev, + const struct drm_framebuffer *fb, + const struct drm_framebuffer *old_fb) { - struct mga_device *mdev = to_mga_device(crtc->dev); struct drm_gem_vram_object *gbo; int ret; s64 gpu_addr; - if (!atomic && fb) { - gbo = drm_gem_vram_of_gem(fb->obj[0]); + if (old_fb) { + gbo = drm_gem_vram_of_gem(old_fb->obj[0]); drm_gem_vram_unpin(gbo); } - gbo = drm_gem_vram_of_gem(crtc->primary->fb->obj[0]); + gbo = drm_gem_vram_of_gem(fb->obj[0]); ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM); if (ret) @@ -900,6 +899,7 @@ static int mga_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, { struct drm_device *dev = crtc->dev; struct mga_device *mdev = dev->dev_private; + struct drm_framebuffer *fb = crtc->primary->fb; unsigned int count; do { } while (RREG8(0x1fda) & 0x08); @@ -908,7 +908,7 @@ static int mga_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, count = RREG8(MGAREG_VCOUNT) + 2; do { } while (RREG8(MGAREG_VCOUNT) < count); - return mga_crtc_do_set_base(crtc, old_fb, x, y, 0); + return mga_crtc_do_set_base(mdev, fb, old_fb); } static int mga_crtc_mode_set(struct drm_crtc *crtc, @@ -1150,7 +1150,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, WREG8(MGA_MISC_OUT, misc); - mga_crtc_do_set_base(crtc, old_fb, x, y, 0); + mga_crtc_do_set_base(mdev, fb, old_fb); /* reset tagfifo */ if (mdev->type == G200_ER) { -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 04/15] drm/mgag200: Move mode-setting code into separate helper function 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann ` (2 preceding siblings ...) 2020-05-15 8:32 ` [PATCH v3 03/15] drm/mgag200: Clean up mga_crtc_do_set_base() Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 05/15] drm/mgag200: Split MISC register update into PLL selection, SYNC and I/O Thomas Zimmermann ` (10 subsequent siblings) 14 siblings, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel The mode-setting code is now located in mgag200_set_mode_regs(), sans a few flags that will be moved in a later patch for clarity. v2: * replace uint8_t with u8 Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/mgag200_mode.c | 140 ++++++++++++++----------- 1 file changed, 78 insertions(+), 62 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 9aa6addbbb895..7c41bd43f79e0 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -911,6 +911,79 @@ static int mga_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, return mga_crtc_do_set_base(mdev, fb, old_fb); } +static void mgag200_set_mode_regs(struct mga_device *mdev, + const struct drm_display_mode *mode) +{ + unsigned int hdisplay, hsyncstart, hsyncend, htotal; + unsigned int vdisplay, vsyncstart, vsyncend, vtotal; + u8 misc = 0; + u8 crtcext1, crtcext2, crtcext5; + + hdisplay = mode->hdisplay / 8 - 1; + hsyncstart = mode->hsync_start / 8 - 1; + hsyncend = mode->hsync_end / 8 - 1; + htotal = mode->htotal / 8 - 1; + + /* Work around hardware quirk */ + if ((htotal & 0x07) == 0x06 || (htotal & 0x07) == 0x04) + htotal++; + + vdisplay = mode->vdisplay - 1; + vsyncstart = mode->vsync_start - 1; + vsyncend = mode->vsync_end - 1; + vtotal = mode->vtotal - 2; + + if (mode->flags & DRM_MODE_FLAG_NHSYNC) + misc |= 0x40; + if (mode->flags & DRM_MODE_FLAG_NVSYNC) + misc |= 0x80; + + crtcext1 = (((htotal - 4) & 0x100) >> 8) | + ((hdisplay & 0x100) >> 7) | + ((hsyncstart & 0x100) >> 6) | + (htotal & 0x40); + if (mdev->type == G200_WB || mdev->type == G200_EW3) + crtcext1 |= BIT(7) | /* vrsten */ + BIT(3); /* hrsten */ + + crtcext2 = ((vtotal & 0xc00) >> 10) | + ((vdisplay & 0x400) >> 8) | + ((vdisplay & 0xc00) >> 7) | + ((vsyncstart & 0xc00) >> 5) | + ((vdisplay & 0x400) >> 3); + crtcext5 = 0x00; + + WREG_CRT(0, htotal - 4); + WREG_CRT(1, hdisplay); + WREG_CRT(2, hdisplay); + WREG_CRT(3, (htotal & 0x1F) | 0x80); + WREG_CRT(4, hsyncstart); + WREG_CRT(5, ((htotal & 0x20) << 2) | (hsyncend & 0x1F)); + WREG_CRT(6, vtotal & 0xFF); + WREG_CRT(7, ((vtotal & 0x100) >> 8) | + ((vdisplay & 0x100) >> 7) | + ((vsyncstart & 0x100) >> 6) | + ((vdisplay & 0x100) >> 5) | + ((vdisplay & 0x100) >> 4) | /* linecomp */ + ((vtotal & 0x200) >> 4) | + ((vdisplay & 0x200) >> 3) | + ((vsyncstart & 0x200) >> 2)); + WREG_CRT(9, ((vdisplay & 0x200) >> 4) | + ((vdisplay & 0x200) >> 3)); + WREG_CRT(16, vsyncstart & 0xFF); + WREG_CRT(17, (vsyncend & 0x0F) | 0x20); + WREG_CRT(18, vdisplay & 0xFF); + WREG_CRT(20, 0); + WREG_CRT(21, vdisplay & 0xFF); + WREG_CRT(22, (vtotal + 1) & 0xFF); + WREG_CRT(23, 0xc3); + WREG_CRT(24, vdisplay & 0xFF); + + WREG_ECRT(0x01, crtcext1); + WREG_ECRT(0x02, crtcext2); + WREG_ECRT(0x05, crtcext5); +} + static int mga_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, @@ -919,8 +992,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, struct drm_device *dev = crtc->dev; struct mga_device *mdev = to_mga_device(dev); const struct drm_framebuffer *fb = crtc->primary->fb; - int hdisplay, hsyncstart, hsyncend, htotal; - int vdisplay, vsyncstart, vsyncend, vtotal; int pitch; int option = 0, option2 = 0; int i; @@ -999,12 +1070,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, break; } - if (mode->flags & DRM_MODE_FLAG_NHSYNC) - misc |= 0x40; - if (mode->flags & DRM_MODE_FLAG_NVSYNC) - misc |= 0x80; - - for (i = 0; i < sizeof(dacvalue); i++) { if ((i <= 0x17) || (i == 0x1b) || @@ -1044,20 +1109,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, else pitch = pitch >> (4 - bppshift); - hdisplay = mode->hdisplay / 8 - 1; - hsyncstart = mode->hsync_start / 8 - 1; - hsyncend = mode->hsync_end / 8 - 1; - htotal = mode->htotal / 8 - 1; - - /* Work around hardware quirk */ - if ((htotal & 0x07) == 0x06 || (htotal & 0x07) == 0x04) - htotal++; - - vdisplay = mode->vdisplay - 1; - vsyncstart = mode->vsync_start - 1; - vsyncend = mode->vsync_end - 1; - vtotal = mode->vtotal - 2; - WREG_GFX(0, 0); WREG_GFX(1, 0); WREG_GFX(2, 0); @@ -1068,61 +1119,26 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, WREG_GFX(7, 0xf); WREG_GFX(8, 0xf); - WREG_CRT(0, htotal - 4); - WREG_CRT(1, hdisplay); - WREG_CRT(2, hdisplay); - WREG_CRT(3, (htotal & 0x1F) | 0x80); - WREG_CRT(4, hsyncstart); - WREG_CRT(5, ((htotal & 0x20) << 2) | (hsyncend & 0x1F)); - WREG_CRT(6, vtotal & 0xFF); - WREG_CRT(7, ((vtotal & 0x100) >> 8) | - ((vdisplay & 0x100) >> 7) | - ((vsyncstart & 0x100) >> 6) | - ((vdisplay & 0x100) >> 5) | - ((vdisplay & 0x100) >> 4) | /* linecomp */ - ((vtotal & 0x200) >> 4)| - ((vdisplay & 0x200) >> 3) | - ((vsyncstart & 0x200) >> 2)); - WREG_CRT(9, ((vdisplay & 0x200) >> 4) | - ((vdisplay & 0x200) >> 3)); WREG_CRT(10, 0); WREG_CRT(11, 0); WREG_CRT(12, 0); WREG_CRT(13, 0); WREG_CRT(14, 0); WREG_CRT(15, 0); - WREG_CRT(16, vsyncstart & 0xFF); - WREG_CRT(17, (vsyncend & 0x0F) | 0x20); - WREG_CRT(18, vdisplay & 0xFF); WREG_CRT(19, pitch & 0xFF); - WREG_CRT(20, 0); - WREG_CRT(21, vdisplay & 0xFF); - WREG_CRT(22, (vtotal + 1) & 0xFF); - WREG_CRT(23, 0xc3); - WREG_CRT(24, vdisplay & 0xFF); + + mgag200_set_mode_regs(mdev, mode); ext_vga[0] = 0; - ext_vga[5] = 0; /* TODO interlace */ ext_vga[0] |= (pitch & 0x300) >> 4; - ext_vga[1] = (((htotal - 4) & 0x100) >> 8) | - ((hdisplay & 0x100) >> 7) | - ((hsyncstart & 0x100) >> 6) | - (htotal & 0x40); - ext_vga[2] = ((vtotal & 0xc00) >> 10) | - ((vdisplay & 0x400) >> 8) | - ((vdisplay & 0xc00) >> 7) | - ((vsyncstart & 0xc00) >> 5) | - ((vdisplay & 0x400) >> 3); if (fb->format->cpp[0] * 8 == 24) ext_vga[3] = (((1 << bppshift) * 3) - 1) | 0x80; else ext_vga[3] = ((1 << bppshift) - 1) | 0x80; ext_vga[4] = 0; - if (mdev->type == G200_WB || mdev->type == G200_EW3) - ext_vga[1] |= 0x88; /* Set pixel clocks */ misc = 0x2d; @@ -1130,9 +1146,9 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, mga_crtc_set_plls(mdev, mode->clock); - for (i = 0; i < 6; i++) { - WREG_ECRT(i, ext_vga[i]); - } + WREG_ECRT(0, ext_vga[0]); + WREG_ECRT(3, ext_vga[3]); + WREG_ECRT(4, ext_vga[4]); if (mdev->type == G200_ER) WREG_ECRT(0x24, 0x5); -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 05/15] drm/mgag200: Split MISC register update into PLL selection, SYNC and I/O 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann ` (3 preceding siblings ...) 2020-05-15 8:32 ` [PATCH v3 04/15] drm/mgag200: Move mode-setting code into separate helper function Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 2020-06-03 9:09 ` [drm/mgag200] e44e907dd8: phoronix-test-suite.glmark2.800x600.score -64.9% regression kernel test robot 2020-05-15 8:32 ` [PATCH v3 06/15] drm/mgag200: Update mode registers after plane registers Thomas Zimmermann ` (9 subsequent siblings) 14 siblings, 1 reply; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel Set different fields in MISC in their rsp location in the code. This patch also fixes a bug in the original code where the mode's SYNC flags were never written into the MISC register. v2: * use u8 instead of uint8_t * define MGAREG_MISC_CLK_SEL_MASK Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/mgag200_mode.c | 38 ++++++++++++++++++-------- drivers/gpu/drm/mgag200/mgag200_reg.h | 6 +++- 2 files changed, 31 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 7c41bd43f79e0..2007d7a4754ac 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -704,6 +704,8 @@ static int mga_g200er_set_plls(struct mga_device *mdev, long clock) static int mga_crtc_set_plls(struct mga_device *mdev, long clock) { + u8 misc; + switch(mdev->type) { case G200_SE_A: case G200_SE_B: @@ -724,6 +726,12 @@ static int mga_crtc_set_plls(struct mga_device *mdev, long clock) return mga_g200er_set_plls(mdev, clock); break; } + + misc = RREG8(MGA_MISC_IN); + misc &= ~MGAREG_MISC_CLK_SEL_MASK; + misc |= MGAREG_MISC_CLK_SEL_MGA_MSK; + WREG8(MGA_MISC_OUT, misc); + return 0; } @@ -916,8 +924,7 @@ static void mgag200_set_mode_regs(struct mga_device *mdev, { unsigned int hdisplay, hsyncstart, hsyncend, htotal; unsigned int vdisplay, vsyncstart, vsyncend, vtotal; - u8 misc = 0; - u8 crtcext1, crtcext2, crtcext5; + u8 misc, crtcext1, crtcext2, crtcext5; hdisplay = mode->hdisplay / 8 - 1; hsyncstart = mode->hsync_start / 8 - 1; @@ -933,10 +940,17 @@ static void mgag200_set_mode_regs(struct mga_device *mdev, vsyncend = mode->vsync_end - 1; vtotal = mode->vtotal - 2; + misc = RREG8(MGA_MISC_IN); + if (mode->flags & DRM_MODE_FLAG_NHSYNC) - misc |= 0x40; + misc |= MGAREG_MISC_HSYNCPOL; + else + misc &= ~MGAREG_MISC_HSYNCPOL; + if (mode->flags & DRM_MODE_FLAG_NVSYNC) - misc |= 0x80; + misc |= MGAREG_MISC_VSYNCPOL; + else + misc &= ~MGAREG_MISC_VSYNCPOL; crtcext1 = (((htotal - 4) & 0x100) >> 8) | ((hdisplay & 0x100) >> 7) | @@ -982,6 +996,10 @@ static void mgag200_set_mode_regs(struct mga_device *mdev, WREG_ECRT(0x01, crtcext1); WREG_ECRT(0x02, crtcext2); WREG_ECRT(0x05, crtcext5); + + WREG8(MGA_MISC_OUT, misc); + + mga_crtc_set_plls(mdev, mode->clock); } static int mga_crtc_mode_set(struct drm_crtc *crtc, @@ -1140,12 +1158,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, ext_vga[3] = ((1 << bppshift) - 1) | 0x80; ext_vga[4] = 0; - /* Set pixel clocks */ - misc = 0x2d; - WREG8(MGA_MISC_OUT, misc); - - mga_crtc_set_plls(mdev, mode->clock); - WREG_ECRT(0, ext_vga[0]); WREG_ECRT(3, ext_vga[3]); WREG_ECRT(4, ext_vga[4]); @@ -1161,9 +1173,11 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, } WREG_ECRT(0, ext_vga[0]); - /* Enable mga pixel clock */ - misc = 0x2d; + misc = RREG8(MGA_MISC_IN); + misc |= MGAREG_MISC_IOADSEL | + MGAREG_MISC_RAMMAPEN | + MGAREG_MISC_HIGH_PG_SEL; WREG8(MGA_MISC_OUT, misc); mga_crtc_do_set_base(mdev, fb, old_fb); diff --git a/drivers/gpu/drm/mgag200/mgag200_reg.h b/drivers/gpu/drm/mgag200/mgag200_reg.h index c096a9d6bcbc1..0ba6e15e97106 100644 --- a/drivers/gpu/drm/mgag200/mgag200_reg.h +++ b/drivers/gpu/drm/mgag200/mgag200_reg.h @@ -16,10 +16,11 @@ * MGA1064SG Mystique register file */ - #ifndef _MGA_REG_H_ #define _MGA_REG_H_ +#include <linux/bits.h> + #define MGAREG_DWGCTL 0x1c00 #define MGAREG_MACCESS 0x1c04 /* the following is a mystique only register */ @@ -221,12 +222,15 @@ #define MGAREG_MISC_IOADSEL (0x1 << 0) #define MGAREG_MISC_RAMMAPEN (0x1 << 1) +#define MGAREG_MISC_CLK_SEL_MASK GENMASK(3, 2) #define MGAREG_MISC_CLK_SEL_VGA25 (0x0 << 2) #define MGAREG_MISC_CLK_SEL_VGA28 (0x1 << 2) #define MGAREG_MISC_CLK_SEL_MGA_PIX (0x2 << 2) #define MGAREG_MISC_CLK_SEL_MGA_MSK (0x3 << 2) #define MGAREG_MISC_VIDEO_DIS (0x1 << 4) #define MGAREG_MISC_HIGH_PG_SEL (0x1 << 5) +#define MGAREG_MISC_HSYNCPOL BIT(6) +#define MGAREG_MISC_VSYNCPOL BIT(7) /* MMIO VGA registers */ #define MGAREG_SEQ_INDEX 0x1fc4 -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [drm/mgag200] e44e907dd8: phoronix-test-suite.glmark2.800x600.score -64.9% regression 2020-05-15 8:32 ` [PATCH v3 05/15] drm/mgag200: Split MISC register update into PLL selection, SYNC and I/O Thomas Zimmermann @ 2020-06-03 9:09 ` kernel test robot 2020-06-15 20:58 ` Emil Velikov 0 siblings, 1 reply; 25+ messages in thread From: kernel test robot @ 2020-06-03 9:09 UTC (permalink / raw) To: Thomas Zimmermann Cc: john.p.donnelly, Thomas Zimmermann, dri-devel, lkp, OTC LSE PnP, kraxel, airlied, sam, emil.velikov [-- Attachment #1: Type: text/plain, Size: 5683 bytes --] Greeting, FYI, we noticed a -64.9% regression of phoronix-test-suite.glmark2.800x600.score due to commit: commit: e44e907dd8f937313d35615d799d54162c56d173 ("[PATCH v3 05/15] drm/mgag200: Split MISC register update into PLL selection, SYNC and I/O") url: https://github.com/0day-ci/linux/commits/Thomas-Zimmermann/drm-mgag200-Convert-to-atomic-modesetting/20200515-163744 base: git://anongit.freedesktop.org/drm/drm-tip drm-tip in testcase: phoronix-test-suite on test machine: 16 threads Intel(R) Xeon(R) CPU X5570 @ 2.93GHz with 48G memory with following parameters: need_x: true test: glmark2-1.1.0 cpufreq_governor: performance ucode: 0x1d test-description: The Phoronix Test Suite is the most comprehensive testing and benchmarking platform available that provides an extensible framework for which new tests can be easily added. test-url: http://www.phoronix-test-suite.com/ If you fix the issue, kindly add following tag Reported-by: kernel test robot <rong.a.chen@intel.com> Details are as below: --------------------------------------------------------------------------------------------------> To reproduce: git clone https://github.com/intel/lkp-tests.git cd lkp-tests bin/lkp install job.yaml # job file is attached in this email bin/lkp run job.yaml ========================================================================================= compiler/cpufreq_governor/kconfig/need_x/rootfs/tbox_group/test/testcase/ucode: gcc-7/performance/x86_64-rhel-7.6/true/debian-x86_64-phoronix/lkp-nhm-2ep1/glmark2-1.1.0/phoronix-test-suite/0x1d commit: bef2303526 ("drm/mgag200: Move mode-setting code into separate helper function") e44e907dd8 ("drm/mgag200: Split MISC register update into PLL selection, SYNC and I/O") bef2303526adb575 e44e907dd8f937313d35615d799 ---------------- --------------------------- %stddev %change %stddev \ | \ 66.00 -51.1% 32.25 phoronix-test-suite.glmark2.1024x768.score 97.00 -64.9% 34.00 phoronix-test-suite.glmark2.800x600.score phoronix-test-suite.glmark2.800x600.score 100 +---------------------------------------------------------------------+ 90 |-+ + + +.+ + + + + + : | | : : : : : : : : : : : | 80 |-: : : : : : : : : : : | 70 |-:: : :: : : : :: :: : :: : | |: : : : : : : : : : : : : : : : : : : | 60 |:+: : : : : : : : : : : : : : : : : : | 50 |:+: : : : : : : : : : : : : : : : : : | 40 |:+ : : : : : : : : : : : : : : : : : : | |: : : : : : : : : : : : : : : : : : :O O O O O | 30 |:+ : : : : : : : : : : : : : : : : : : | 20 |-+ :: : : : : : :: : : :: : : O : | | : : : : : : : : : : : : : | 10 |-+ : : : : : : : : : : : : : | 0 +---------------------------------------------------------------------+ phoronix-test-suite.glmark2.1024x768.score 70 +----------------------------------------------------------------------+ | + + + +..+ + + + + + +.+ | 60 |-: : : : : : : : : : : | | : : : : : : : : : : : | 50 |-:: : :: : : :: : : :: :: : | |: : : : : : : : : : : : : : : : : : : | 40 |:+: : : : : : : : : : : : : : : : : : | |: : : : : : : : : : : : : : : : : : : O | 30 |:+ : : : : : : : : : : : : : : : : : :O O O O | |: : : : : : : : : : : : : : : : : : : | 20 |:+ : : : : : : : : : : : : : : : : : : | | :: : : : : : :: : : :: : : O :: | 10 |-+ : : : : : : : : : : : : : | | : : : O : O : : O : : : O : : : : | 0 +----------------------------------------------------------------------+ [*] bisect-good sample [O] bisect-bad sample Disclaimer: Results have been estimated based on internal Intel analysis and are provided for informational purposes only. Any difference in system hardware or software design or configuration may affect actual performance. Thanks, Rong Chen [-- Attachment #2: config-5.7.0-rc5-01428-ge44e907dd8f937 --] [-- Type: text/plain, Size: 202647 bytes --] # # Automatically generated file; DO NOT EDIT. # Linux/x86_64 5.7.0-rc5 Kernel Configuration # # # Compiler: gcc-7 (Ubuntu 7.5.0-6ubuntu2) 7.5.0 # CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=70500 CONFIG_LD_VERSION=234000000 CONFIG_CLANG_VERSION=0 CONFIG_CC_CAN_LINK=y CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y CONFIG_THREAD_INFO_IN_TASK=y # # General setup # CONFIG_INIT_ENV_ARG_LIMIT=32 # CONFIG_COMPILE_TEST is not set CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_BUILD_SALT="" CONFIG_HAVE_KERNEL_GZIP=y CONFIG_HAVE_KERNEL_BZIP2=y CONFIG_HAVE_KERNEL_LZMA=y CONFIG_HAVE_KERNEL_XZ=y CONFIG_HAVE_KERNEL_LZO=y CONFIG_HAVE_KERNEL_LZ4=y CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_BZIP2 is not set # CONFIG_KERNEL_LZMA is not set # CONFIG_KERNEL_XZ is not set # CONFIG_KERNEL_LZO is not set # CONFIG_KERNEL_LZ4 is not set CONFIG_DEFAULT_HOSTNAME="(none)" CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_USELIB=y CONFIG_AUDIT=y CONFIG_HAVE_ARCH_AUDITSYSCALL=y CONFIG_AUDITSYSCALL=y # # IRQ subsystem # CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_PENDING_IRQ=y CONFIG_GENERIC_IRQ_MIGRATION=y CONFIG_GENERIC_IRQ_INJECTION=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_GENERIC_MSI_IRQ=y CONFIG_GENERIC_MSI_IRQ_DOMAIN=y CONFIG_IRQ_MSI_IOMMU=y CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y CONFIG_GENERIC_IRQ_RESERVATION_MODE=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y # CONFIG_GENERIC_IRQ_DEBUGFS is not set # end of IRQ subsystem CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_ARCH_CLOCKSOURCE_INIT=y CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y CONFIG_GENERIC_CMOS_UPDATE=y # # Timers subsystem # CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ_COMMON=y # CONFIG_HZ_PERIODIC is not set # CONFIG_NO_HZ_IDLE is not set CONFIG_NO_HZ_FULL=y CONFIG_CONTEXT_TRACKING=y # CONFIG_CONTEXT_TRACKING_FORCE is not set CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y # end of Timers subsystem # CONFIG_PREEMPT_NONE is not set CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_PREEMPT is not set CONFIG_PREEMPT_COUNT=y # # CPU/Task time and stats accounting # CONFIG_VIRT_CPU_ACCOUNTING=y CONFIG_VIRT_CPU_ACCOUNTING_GEN=y # CONFIG_IRQ_TIME_ACCOUNTING is not set CONFIG_HAVE_SCHED_AVG_IRQ=y # CONFIG_SCHED_THERMAL_PRESSURE is not set CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y CONFIG_TASK_DELAY_ACCT=y CONFIG_TASK_XACCT=y CONFIG_TASK_IO_ACCOUNTING=y # CONFIG_PSI is not set # end of CPU/Task time and stats accounting CONFIG_CPU_ISOLATION=y # # RCU Subsystem # CONFIG_TREE_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_SRCU=y CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_NOCB_CPU=y # end of RCU Subsystem CONFIG_BUILD_BIN2C=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y # CONFIG_IKHEADERS is not set CONFIG_LOG_BUF_SHIFT=20 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y # # Scheduler features # # CONFIG_UCLAMP_TASK is not set # end of Scheduler features CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y CONFIG_CC_HAS_INT128=y CONFIG_ARCH_SUPPORTS_INT128=y CONFIG_NUMA_BALANCING=y CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y CONFIG_MEMCG_SWAP_ENABLED=y CONFIG_MEMCG_KMEM=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y CONFIG_RT_GROUP_SCHED=y CONFIG_CGROUP_PIDS=y CONFIG_CGROUP_RDMA=y CONFIG_CGROUP_FREEZER=y CONFIG_CGROUP_HUGETLB=y CONFIG_CPUSETS=y CONFIG_PROC_PID_CPUSET=y CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y # CONFIG_CGROUP_BPF is not set # CONFIG_CGROUP_DEBUG is not set CONFIG_SOCK_CGROUP_DATA=y CONFIG_NAMESPACES=y CONFIG_UTS_NS=y CONFIG_TIME_NS=y CONFIG_IPC_NS=y CONFIG_USER_NS=y CONFIG_PID_NS=y CONFIG_NET_NS=y CONFIG_CHECKPOINT_RESTORE=y CONFIG_SCHED_AUTOGROUP=y # CONFIG_SYSFS_DEPRECATED is not set CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" CONFIG_RD_GZIP=y CONFIG_RD_BZIP2=y CONFIG_RD_LZMA=y CONFIG_RD_XZ=y CONFIG_RD_LZO=y CONFIG_RD_LZ4=y # CONFIG_BOOT_CONFIG is not set CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_HAVE_PCSPKR_PLATFORM=y CONFIG_BPF=y # CONFIG_EXPERT is not set CONFIG_UID16=y CONFIG_MULTIUSER=y CONFIG_SGETMASK_SYSCALL=y CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_PRINTK_NMI=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_PCSPKR_PLATFORM=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_HAVE_ARCH_USERFAULTFD_WP=y CONFIG_MEMBARRIER=y CONFIG_KALLSYMS=y CONFIG_KALLSYMS_ALL=y CONFIG_KALLSYMS_ABSOLUTE_PERCPU=y CONFIG_KALLSYMS_BASE_RELATIVE=y # CONFIG_BPF_LSM is not set CONFIG_BPF_SYSCALL=y CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y CONFIG_BPF_JIT_ALWAYS_ON=y CONFIG_BPF_JIT_DEFAULT_ON=y CONFIG_USERFAULTFD=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_RSEQ=y # CONFIG_EMBEDDED is not set CONFIG_HAVE_PERF_EVENTS=y # # Kernel Performance Events And Counters # CONFIG_PERF_EVENTS=y # CONFIG_DEBUG_PERF_USE_VMALLOC is not set # end of Kernel Performance Events And Counters CONFIG_VM_EVENT_COUNTERS=y CONFIG_SLUB_DEBUG=y # CONFIG_COMPAT_BRK is not set # CONFIG_SLAB is not set CONFIG_SLUB=y CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set CONFIG_SLUB_CPU_PARTIAL=y CONFIG_SYSTEM_DATA_VERIFICATION=y CONFIG_PROFILING=y CONFIG_TRACEPOINTS=y # end of General setup CONFIG_64BIT=y CONFIG_X86_64=y CONFIG_X86=y CONFIG_INSTRUCTION_DECODER=y CONFIG_OUTPUT_FORMAT="elf64-x86-64" CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_MMU=y CONFIG_ARCH_MMAP_RND_BITS_MIN=28 CONFIG_ARCH_MMAP_RND_BITS_MAX=32 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_ARCH_MAY_HAVE_PC_FDC=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ARCH_HAS_CPU_RELAX=y CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_HAS_FILTER_PGPROT=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ZONE_DMA32=y CONFIG_AUDIT_ARCH=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_HAVE_INTEL_TXT=y CONFIG_X86_64_SMP=y CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_DYNAMIC_PHYSICAL_MASK=y CONFIG_PGTABLE_LEVELS=5 CONFIG_CC_HAS_SANE_STACKPROTECTOR=y # # Processor type and features # CONFIG_ZONE_DMA=y CONFIG_SMP=y CONFIG_X86_FEATURE_NAMES=y CONFIG_X86_X2APIC=y CONFIG_X86_MPPARSE=y # CONFIG_GOLDFISH is not set CONFIG_RETPOLINE=y CONFIG_X86_CPU_RESCTRL=y CONFIG_X86_EXTENDED_PLATFORM=y # CONFIG_X86_NUMACHIP is not set # CONFIG_X86_VSMP is not set CONFIG_X86_UV=y # CONFIG_X86_GOLDFISH is not set # CONFIG_X86_INTEL_MID is not set CONFIG_X86_INTEL_LPSS=y CONFIG_X86_AMD_PLATFORM_DEVICE=y CONFIG_IOSF_MBI=y # CONFIG_IOSF_MBI_DEBUG is not set CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y # CONFIG_SCHED_OMIT_FRAME_POINTER is not set CONFIG_HYPERVISOR_GUEST=y CONFIG_PARAVIRT=y CONFIG_PARAVIRT_XXL=y # CONFIG_PARAVIRT_DEBUG is not set CONFIG_PARAVIRT_SPINLOCKS=y CONFIG_X86_HV_CALLBACK_VECTOR=y CONFIG_XEN=y CONFIG_XEN_PV=y CONFIG_XEN_PV_SMP=y # CONFIG_XEN_DOM0 is not set CONFIG_XEN_PVHVM=y CONFIG_XEN_PVHVM_SMP=y CONFIG_XEN_512GB=y CONFIG_XEN_SAVE_RESTORE=y # CONFIG_XEN_DEBUG_FS is not set # CONFIG_XEN_PVH is not set CONFIG_KVM_GUEST=y CONFIG_ARCH_CPUIDLE_HALTPOLL=y # CONFIG_PVH is not set # CONFIG_KVM_DEBUG_FS is not set CONFIG_PARAVIRT_TIME_ACCOUNTING=y CONFIG_PARAVIRT_CLOCK=y # CONFIG_JAILHOUSE_GUEST is not set # CONFIG_ACRN_GUEST is not set # CONFIG_MK8 is not set # CONFIG_MPSC is not set # CONFIG_MCORE2 is not set # CONFIG_MATOM is not set CONFIG_GENERIC_CPU=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_TSC=y CONFIG_X86_CMPXCHG64=y CONFIG_X86_CMOV=y CONFIG_X86_MINIMUM_CPU_FAMILY=64 CONFIG_X86_DEBUGCTLMSR=y CONFIG_IA32_FEAT_CTL=y CONFIG_X86_VMX_FEATURE_NAMES=y CONFIG_CPU_SUP_INTEL=y CONFIG_CPU_SUP_AMD=y CONFIG_CPU_SUP_HYGON=y CONFIG_CPU_SUP_CENTAUR=y CONFIG_CPU_SUP_ZHAOXIN=y CONFIG_HPET_TIMER=y CONFIG_HPET_EMULATE_RTC=y CONFIG_DMI=y CONFIG_GART_IOMMU=y CONFIG_MAXSMP=y CONFIG_NR_CPUS_RANGE_BEGIN=8192 CONFIG_NR_CPUS_RANGE_END=8192 CONFIG_NR_CPUS_DEFAULT=8192 CONFIG_NR_CPUS=8192 CONFIG_SCHED_SMT=y CONFIG_SCHED_MC=y CONFIG_SCHED_MC_PRIO=y CONFIG_X86_LOCAL_APIC=y CONFIG_X86_IO_APIC=y CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y CONFIG_X86_MCE=y CONFIG_X86_MCELOG_LEGACY=y CONFIG_X86_MCE_INTEL=y CONFIG_X86_MCE_AMD=y CONFIG_X86_MCE_THRESHOLD=y CONFIG_X86_MCE_INJECT=m CONFIG_X86_THERMAL_VECTOR=y # # Performance monitoring # CONFIG_PERF_EVENTS_INTEL_UNCORE=y CONFIG_PERF_EVENTS_INTEL_RAPL=y CONFIG_PERF_EVENTS_INTEL_CSTATE=y # CONFIG_PERF_EVENTS_AMD_POWER is not set # end of Performance monitoring CONFIG_X86_16BIT=y CONFIG_X86_ESPFIX64=y CONFIG_X86_VSYSCALL_EMULATION=y CONFIG_X86_IOPL_IOPERM=y CONFIG_I8K=m CONFIG_MICROCODE=y CONFIG_MICROCODE_INTEL=y CONFIG_MICROCODE_AMD=y CONFIG_MICROCODE_OLD_INTERFACE=y CONFIG_X86_MSR=y CONFIG_X86_CPUID=y CONFIG_X86_5LEVEL=y CONFIG_X86_DIRECT_GBPAGES=y # CONFIG_X86_CPA_STATISTICS is not set CONFIG_AMD_MEM_ENCRYPT=y # CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT is not set CONFIG_NUMA=y CONFIG_AMD_NUMA=y CONFIG_X86_64_ACPI_NUMA=y CONFIG_NODES_SPAN_OTHER_NODES=y CONFIG_NUMA_EMU=y CONFIG_NODES_SHIFT=10 CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_DEFAULT=y CONFIG_ARCH_SELECT_MEMORY_MODEL=y CONFIG_ARCH_MEMORY_PROBE=y CONFIG_ARCH_PROC_KCORE_TEXT=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_X86_PMEM_LEGACY_DEVICE=y CONFIG_X86_PMEM_LEGACY=m CONFIG_X86_CHECK_BIOS_CORRUPTION=y # CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set CONFIG_X86_RESERVE_LOW=64 CONFIG_MTRR=y CONFIG_MTRR_SANITIZER=y CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=1 CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1 CONFIG_X86_PAT=y CONFIG_ARCH_USES_PG_UNCACHED=y CONFIG_ARCH_RANDOM=y CONFIG_X86_SMAP=y CONFIG_X86_UMIP=y CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y CONFIG_X86_INTEL_TSX_MODE_OFF=y # CONFIG_X86_INTEL_TSX_MODE_ON is not set # CONFIG_X86_INTEL_TSX_MODE_AUTO is not set CONFIG_EFI=y CONFIG_EFI_STUB=y CONFIG_EFI_MIXED=y CONFIG_SECCOMP=y # CONFIG_HZ_100 is not set # CONFIG_HZ_250 is not set # CONFIG_HZ_300 is not set CONFIG_HZ_1000=y CONFIG_HZ=1000 CONFIG_SCHED_HRTICK=y CONFIG_KEXEC=y CONFIG_KEXEC_FILE=y CONFIG_ARCH_HAS_KEXEC_PURGATORY=y # CONFIG_KEXEC_SIG is not set CONFIG_CRASH_DUMP=y CONFIG_KEXEC_JUMP=y CONFIG_PHYSICAL_START=0x1000000 CONFIG_RELOCATABLE=y CONFIG_RANDOMIZE_BASE=y CONFIG_X86_NEED_RELOCS=y CONFIG_PHYSICAL_ALIGN=0x200000 CONFIG_DYNAMIC_MEMORY_LAYOUT=y CONFIG_RANDOMIZE_MEMORY=y CONFIG_RANDOMIZE_MEMORY_PHYSICAL_PADDING=0xa CONFIG_HOTPLUG_CPU=y CONFIG_BOOTPARAM_HOTPLUG_CPU0=y # CONFIG_DEBUG_HOTPLUG_CPU0 is not set # CONFIG_COMPAT_VDSO is not set CONFIG_LEGACY_VSYSCALL_EMULATE=y # CONFIG_LEGACY_VSYSCALL_XONLY is not set # CONFIG_LEGACY_VSYSCALL_NONE is not set # CONFIG_CMDLINE_BOOL is not set CONFIG_MODIFY_LDT_SYSCALL=y CONFIG_HAVE_LIVEPATCH=y CONFIG_LIVEPATCH=y # end of Processor type and features CONFIG_ARCH_HAS_ADD_PAGES=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y CONFIG_USE_PERCPU_NUMA_NODE_ID=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y CONFIG_ARCH_ENABLE_THP_MIGRATION=y # # Power management and ACPI options # CONFIG_ARCH_HIBERNATION_HEADER=y CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y CONFIG_HIBERNATE_CALLBACKS=y CONFIG_HIBERNATION=y CONFIG_PM_STD_PARTITION="" CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set # CONFIG_PM_WAKELOCKS is not set CONFIG_PM=y CONFIG_PM_DEBUG=y CONFIG_PM_ADVANCED_DEBUG=y # CONFIG_PM_TEST_SUSPEND is not set CONFIG_PM_SLEEP_DEBUG=y CONFIG_PM_TRACE=y CONFIG_PM_TRACE_RTC=y CONFIG_PM_CLK=y # CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set # CONFIG_ENERGY_MODEL is not set CONFIG_ARCH_SUPPORTS_ACPI=y CONFIG_ACPI=y CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y # CONFIG_ACPI_DEBUGGER is not set CONFIG_ACPI_SPCR_TABLE=y CONFIG_ACPI_LPIT=y CONFIG_ACPI_SLEEP=y # CONFIG_ACPI_PROCFS_POWER is not set CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y CONFIG_ACPI_EC_DEBUGFS=m CONFIG_ACPI_AC=y CONFIG_ACPI_BATTERY=y CONFIG_ACPI_BUTTON=y CONFIG_ACPI_VIDEO=m CONFIG_ACPI_FAN=y # CONFIG_ACPI_TAD is not set CONFIG_ACPI_DOCK=y CONFIG_ACPI_CPU_FREQ_PSS=y CONFIG_ACPI_PROCESSOR_CSTATE=y CONFIG_ACPI_PROCESSOR_IDLE=y CONFIG_ACPI_CPPC_LIB=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_IPMI=m CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=m CONFIG_ACPI_THERMAL=y CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y CONFIG_ACPI_TABLE_UPGRADE=y # CONFIG_ACPI_DEBUG is not set CONFIG_ACPI_PCI_SLOT=y CONFIG_ACPI_CONTAINER=y CONFIG_ACPI_HOTPLUG_MEMORY=y CONFIG_ACPI_HOTPLUG_IOAPIC=y CONFIG_ACPI_SBS=m CONFIG_ACPI_HED=y CONFIG_ACPI_CUSTOM_METHOD=m CONFIG_ACPI_BGRT=y CONFIG_ACPI_NFIT=m # CONFIG_NFIT_SECURITY_DEBUG is not set CONFIG_ACPI_NUMA=y # CONFIG_ACPI_HMAT is not set CONFIG_HAVE_ACPI_APEI=y CONFIG_HAVE_ACPI_APEI_NMI=y CONFIG_ACPI_APEI=y CONFIG_ACPI_APEI_GHES=y CONFIG_ACPI_APEI_PCIEAER=y CONFIG_ACPI_APEI_MEMORY_FAILURE=y CONFIG_ACPI_APEI_EINJ=m CONFIG_ACPI_APEI_ERST_DEBUG=y # CONFIG_DPTF_POWER is not set CONFIG_ACPI_WATCHDOG=y CONFIG_ACPI_EXTLOG=m CONFIG_ACPI_ADXL=y # CONFIG_PMIC_OPREGION is not set # CONFIG_ACPI_CONFIGFS is not set CONFIG_X86_PM_TIMER=y CONFIG_SFI=y # # CPU Frequency scaling # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_GOV_ATTR_SET=y CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set CONFIG_CPU_FREQ_GOV_PERFORMANCE=y CONFIG_CPU_FREQ_GOV_POWERSAVE=y CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y # # CPU frequency scaling drivers # CONFIG_X86_INTEL_PSTATE=y CONFIG_X86_PCC_CPUFREQ=m CONFIG_X86_ACPI_CPUFREQ=m CONFIG_X86_ACPI_CPUFREQ_CPB=y CONFIG_X86_POWERNOW_K8=m CONFIG_X86_AMD_FREQ_SENSITIVITY=m # CONFIG_X86_SPEEDSTEP_CENTRINO is not set CONFIG_X86_P4_CLOCKMOD=m # # shared options # CONFIG_X86_SPEEDSTEP_LIB=m # end of CPU Frequency scaling # # CPU Idle # CONFIG_CPU_IDLE=y # CONFIG_CPU_IDLE_GOV_LADDER is not set CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_CPU_IDLE_GOV_TEO is not set # CONFIG_CPU_IDLE_GOV_HALTPOLL is not set CONFIG_HALTPOLL_CPUIDLE=y # end of CPU Idle CONFIG_INTEL_IDLE=y # end of Power management and ACPI options # # Bus options (PCI etc.) # CONFIG_PCI_DIRECT=y CONFIG_PCI_MMCONFIG=y CONFIG_PCI_XEN=y CONFIG_MMCONF_FAM10H=y CONFIG_ISA_DMA_API=y CONFIG_AMD_NB=y # CONFIG_X86_SYSFB is not set # end of Bus options (PCI etc.) # # Binary Emulations # CONFIG_IA32_EMULATION=y # CONFIG_X86_X32 is not set CONFIG_COMPAT_32=y CONFIG_COMPAT=y CONFIG_COMPAT_FOR_U64_ALIGNMENT=y CONFIG_SYSVIPC_COMPAT=y # end of Binary Emulations # # Firmware Drivers # CONFIG_EDD=m # CONFIG_EDD_OFF is not set CONFIG_FIRMWARE_MEMMAP=y CONFIG_DMIID=y CONFIG_DMI_SYSFS=y CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y CONFIG_ISCSI_IBFT_FIND=y CONFIG_ISCSI_IBFT=m CONFIG_FW_CFG_SYSFS=y # CONFIG_FW_CFG_SYSFS_CMDLINE is not set # CONFIG_GOOGLE_FIRMWARE is not set # # EFI (Extensible Firmware Interface) Support # CONFIG_EFI_VARS=y CONFIG_EFI_ESRT=y CONFIG_EFI_VARS_PSTORE=y CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y CONFIG_EFI_RUNTIME_MAP=y # CONFIG_EFI_FAKE_MEMMAP is not set CONFIG_EFI_RUNTIME_WRAPPERS=y # CONFIG_EFI_BOOTLOADER_CONTROL is not set # CONFIG_EFI_CAPSULE_LOADER is not set # CONFIG_EFI_TEST is not set CONFIG_APPLE_PROPERTIES=y # CONFIG_RESET_ATTACK_MITIGATION is not set # CONFIG_EFI_RCI2_TABLE is not set # CONFIG_EFI_DISABLE_PCI_DMA is not set # end of EFI (Extensible Firmware Interface) Support CONFIG_UEFI_CPER=y CONFIG_UEFI_CPER_X86=y CONFIG_EFI_DEV_PATH_PARSER=y CONFIG_EFI_EARLYCON=y # # Tegra firmware driver # # end of Tegra firmware driver # end of Firmware Drivers CONFIG_HAVE_KVM=y CONFIG_HAVE_KVM_IRQCHIP=y CONFIG_HAVE_KVM_IRQFD=y CONFIG_HAVE_KVM_IRQ_ROUTING=y CONFIG_HAVE_KVM_EVENTFD=y CONFIG_KVM_MMIO=y CONFIG_KVM_ASYNC_PF=y CONFIG_HAVE_KVM_MSI=y CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y CONFIG_KVM_VFIO=y CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y CONFIG_KVM_COMPAT=y CONFIG_HAVE_KVM_IRQ_BYPASS=y CONFIG_HAVE_KVM_NO_POLL=y CONFIG_VIRTUALIZATION=y CONFIG_KVM=m CONFIG_KVM_INTEL=m CONFIG_KVM_AMD=m CONFIG_KVM_AMD_SEV=y CONFIG_KVM_MMU_AUDIT=y CONFIG_AS_AVX512=y CONFIG_AS_SHA1_NI=y CONFIG_AS_SHA256_NI=y # # General architecture-dependent options # CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y CONFIG_HOTPLUG_SMT=y CONFIG_OPROFILE=m CONFIG_OPROFILE_EVENT_MULTIPLEX=y CONFIG_HAVE_OPROFILE=y CONFIG_OPROFILE_NMI_TIMER=y CONFIG_KPROBES=y CONFIG_JUMP_LABEL=y # CONFIG_STATIC_KEYS_SELFTEST is not set CONFIG_OPTPROBES=y CONFIG_KPROBES_ON_FTRACE=y CONFIG_UPROBES=y CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_KRETPROBES=y CONFIG_USER_RETURN_NOTIFIER=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_OPTPROBES=y CONFIG_HAVE_KPROBES_ON_FTRACE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_ARCH_HAS_FORTIFY_SOURCE=y CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SET_DIRECT_MAP=y CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_CLK=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y CONFIG_HAVE_USER_RETURN_NOTIFIER=y CONFIG_HAVE_PERF_EVENTS_NMI=y CONFIG_HAVE_HARDLOCKUP_DETECTOR_PERF=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y CONFIG_MMU_GATHER_TABLE_FREE=y CONFIG_MMU_GATHER_RCU_TABLE_FREE=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y CONFIG_ARCH_WANT_OLD_COMPAT_IPC=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_HAVE_STACKPROTECTOR=y CONFIG_CC_HAS_STACKPROTECTOR_NONE=y CONFIG_STACKPROTECTOR=y CONFIG_STACKPROTECTOR_STRONG=y CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_MOVE_PMD=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD=y CONFIG_HAVE_ARCH_HUGE_VMAP=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_HAVE_ARCH_SOFT_DIRTY=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS=28 CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y CONFIG_ARCH_MMAP_RND_COMPAT_BITS=8 CONFIG_HAVE_ARCH_COMPAT_MMAP_BASES=y CONFIG_HAVE_COPY_THREAD_TLS=y CONFIG_HAVE_STACK_VALIDATION=y CONFIG_HAVE_RELIABLE_STACKTRACE=y CONFIG_OLD_SIGSUSPEND3=y CONFIG_COMPAT_OLD_SIGACTION=y CONFIG_COMPAT_32BIT_TIME=y CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_VMAP_STACK=y CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y CONFIG_STRICT_KERNEL_RWX=y CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_STRICT_MODULE_RWX=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_USE_MEMREMAP_PROT=y # CONFIG_LOCK_EVENT_COUNTS is not set CONFIG_ARCH_HAS_MEM_ENCRYPT=y # # GCOV-based kernel profiling # # CONFIG_GCOV_KERNEL is not set CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y # end of GCOV-based kernel profiling CONFIG_HAVE_GCC_PLUGINS=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y CONFIG_BASE_SMALL=0 CONFIG_MODULE_SIG_FORMAT=y CONFIG_MODULES=y CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_MODULE_SIG=y # CONFIG_MODULE_SIG_FORCE is not set CONFIG_MODULE_SIG_ALL=y # CONFIG_MODULE_SIG_SHA1 is not set # CONFIG_MODULE_SIG_SHA224 is not set CONFIG_MODULE_SIG_SHA256=y # CONFIG_MODULE_SIG_SHA384 is not set # CONFIG_MODULE_SIG_SHA512 is not set CONFIG_MODULE_SIG_HASH="sha256" # CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set # CONFIG_UNUSED_SYMBOLS is not set # CONFIG_TRIM_UNUSED_KSYMS is not set CONFIG_MODULES_TREE_LOOKUP=y CONFIG_BLOCK=y CONFIG_BLK_SCSI_REQUEST=y CONFIG_BLK_CGROUP_RWSTAT=y CONFIG_BLK_DEV_BSG=y CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_INTEGRITY=y CONFIG_BLK_DEV_INTEGRITY_T10=m CONFIG_BLK_DEV_ZONED=y CONFIG_BLK_DEV_THROTTLING=y # CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_CMDLINE_PARSER is not set # CONFIG_BLK_WBT is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_IOCOST is not set CONFIG_BLK_DEBUG_FS=y CONFIG_BLK_DEBUG_FS_ZONED=y # CONFIG_BLK_SED_OPAL is not set # # Partition Types # CONFIG_PARTITION_ADVANCED=y # CONFIG_ACORN_PARTITION is not set # CONFIG_AIX_PARTITION is not set CONFIG_OSF_PARTITION=y CONFIG_AMIGA_PARTITION=y # CONFIG_ATARI_PARTITION is not set CONFIG_MAC_PARTITION=y CONFIG_MSDOS_PARTITION=y CONFIG_BSD_DISKLABEL=y CONFIG_MINIX_SUBPARTITION=y CONFIG_SOLARIS_X86_PARTITION=y CONFIG_UNIXWARE_DISKLABEL=y # CONFIG_LDM_PARTITION is not set CONFIG_SGI_PARTITION=y # CONFIG_ULTRIX_PARTITION is not set CONFIG_SUN_PARTITION=y CONFIG_KARMA_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_SYSV68_PARTITION is not set # CONFIG_CMDLINE_PARTITION is not set # end of Partition Types CONFIG_BLOCK_COMPAT=y CONFIG_BLK_MQ_PCI=y CONFIG_BLK_MQ_VIRTIO=y CONFIG_BLK_MQ_RDMA=y CONFIG_BLK_PM=y # # IO Schedulers # CONFIG_MQ_IOSCHED_DEADLINE=y CONFIG_MQ_IOSCHED_KYBER=y # CONFIG_IOSCHED_BFQ is not set # end of IO Schedulers CONFIG_PREEMPT_NOTIFIERS=y CONFIG_PADATA=y CONFIG_ASN1=y CONFIG_INLINE_SPIN_UNLOCK_IRQ=y CONFIG_INLINE_READ_UNLOCK=y CONFIG_INLINE_READ_UNLOCK_IRQ=y CONFIG_INLINE_WRITE_UNLOCK=y CONFIG_INLINE_WRITE_UNLOCK_IRQ=y CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_RWSEM_SPIN_ON_OWNER=y CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y CONFIG_QUEUED_SPINLOCKS=y CONFIG_ARCH_USE_QUEUED_RWLOCKS=y CONFIG_QUEUED_RWLOCKS=y CONFIG_ARCH_HAS_SYNC_CORE_BEFORE_USERMODE=y CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y CONFIG_FREEZER=y # # Executable file formats # CONFIG_BINFMT_ELF=y CONFIG_COMPAT_BINFMT_ELF=y CONFIG_ELFCORE=y CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y CONFIG_BINFMT_SCRIPT=y CONFIG_BINFMT_MISC=m CONFIG_COREDUMP=y # end of Executable file formats # # Memory Management options # CONFIG_SELECT_MEMORY_MODEL=y CONFIG_SPARSEMEM_MANUAL=y CONFIG_SPARSEMEM=y CONFIG_NEED_MULTIPLE_NODES=y CONFIG_HAVE_MEMORY_PRESENT=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y CONFIG_HAVE_MEMBLOCK_NODE_MAP=y CONFIG_HAVE_FAST_GUP=y CONFIG_NUMA_KEEP_MEMINFO=y CONFIG_MEMORY_ISOLATION=y CONFIG_HAVE_BOOTMEM_INFO_NODE=y CONFIG_MEMORY_HOTPLUG=y CONFIG_MEMORY_HOTPLUG_SPARSE=y # CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE is not set CONFIG_MEMORY_HOTREMOVE=y CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_MEMORY_BALLOON=y CONFIG_BALLOON_COMPACTION=y CONFIG_COMPACTION=y CONFIG_PAGE_REPORTING=y CONFIG_MIGRATION=y CONFIG_CONTIG_ALLOC=y CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_BOUNCE=y CONFIG_VIRT_TO_BUS=y CONFIG_MMU_NOTIFIER=y CONFIG_KSM=y CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y CONFIG_MEMORY_FAILURE=y CONFIG_HWPOISON_INJECT=m CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set CONFIG_ARCH_WANTS_THP_SWAP=y CONFIG_THP_SWAP=y CONFIG_CLEANCACHE=y CONFIG_FRONTSWAP=y CONFIG_CMA=y # CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set CONFIG_CMA_AREAS=7 CONFIG_MEM_SOFT_DIRTY=y CONFIG_ZSWAP=y # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO=y # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD is not set CONFIG_ZSWAP_COMPRESSOR_DEFAULT="lzo" CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y # CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set # CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" # CONFIG_ZSWAP_DEFAULT_ON is not set CONFIG_ZPOOL=y CONFIG_ZBUD=y # CONFIG_Z3FOLD is not set CONFIG_ZSMALLOC=y # CONFIG_PGTABLE_MAPPING is not set # CONFIG_ZSMALLOC_STAT is not set CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_DEFERRED_STRUCT_PAGE_INIT=y CONFIG_IDLE_PAGE_TRACKING=y CONFIG_ARCH_HAS_PTE_DEVMAP=y CONFIG_ZONE_DEVICE=y CONFIG_DEV_PAGEMAP_OPS=y # CONFIG_DEVICE_PRIVATE is not set CONFIG_FRAME_VECTOR=y CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y CONFIG_ARCH_HAS_PKEYS=y # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_BENCHMARK is not set # CONFIG_READ_ONLY_THP_FOR_FS is not set CONFIG_ARCH_HAS_PTE_SPECIAL=y CONFIG_MAPPING_DIRTY_HELPERS=y # end of Memory Management options CONFIG_NET=y CONFIG_COMPAT_NETLINK_MESSAGES=y CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_REDIRECT=y CONFIG_SKB_EXTENSIONS=y # # Networking options # CONFIG_PACKET=y CONFIG_PACKET_DIAG=m CONFIG_UNIX=y CONFIG_UNIX_SCM=y CONFIG_UNIX_DIAG=m # CONFIG_TLS is not set CONFIG_XFRM=y CONFIG_XFRM_ALGO=y CONFIG_XFRM_USER=y # CONFIG_XFRM_INTERFACE is not set CONFIG_XFRM_SUB_POLICY=y CONFIG_XFRM_MIGRATE=y CONFIG_XFRM_STATISTICS=y CONFIG_XFRM_IPCOMP=m CONFIG_NET_KEY=m CONFIG_NET_KEY_MIGRATE=y # CONFIG_SMC is not set # CONFIG_XDP_SOCKETS is not set CONFIG_INET=y CONFIG_IP_MULTICAST=y CONFIG_IP_ADVANCED_ROUTER=y CONFIG_IP_FIB_TRIE_STATS=y CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_VERBOSE=y CONFIG_IP_ROUTE_CLASSID=y CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y # CONFIG_IP_PNP_BOOTP is not set # CONFIG_IP_PNP_RARP is not set CONFIG_NET_IPIP=m CONFIG_NET_IPGRE_DEMUX=m CONFIG_NET_IP_TUNNEL=m CONFIG_NET_IPGRE=m CONFIG_NET_IPGRE_BROADCAST=y CONFIG_IP_MROUTE_COMMON=y CONFIG_IP_MROUTE=y CONFIG_IP_MROUTE_MULTIPLE_TABLES=y CONFIG_IP_PIMSM_V1=y CONFIG_IP_PIMSM_V2=y CONFIG_SYN_COOKIES=y CONFIG_NET_IPVTI=m CONFIG_NET_UDP_TUNNEL=m # CONFIG_NET_FOU is not set # CONFIG_NET_FOU_IP_TUNNELS is not set CONFIG_INET_AH=m CONFIG_INET_ESP=m # CONFIG_INET_ESP_OFFLOAD is not set # CONFIG_INET_ESPINTCP is not set CONFIG_INET_IPCOMP=m CONFIG_INET_XFRM_TUNNEL=m CONFIG_INET_TUNNEL=m CONFIG_INET_DIAG=m CONFIG_INET_TCP_DIAG=m CONFIG_INET_UDP_DIAG=m # CONFIG_INET_RAW_DIAG is not set # CONFIG_INET_DIAG_DESTROY is not set CONFIG_TCP_CONG_ADVANCED=y CONFIG_TCP_CONG_BIC=m CONFIG_TCP_CONG_CUBIC=y CONFIG_TCP_CONG_WESTWOOD=m CONFIG_TCP_CONG_HTCP=m CONFIG_TCP_CONG_HSTCP=m CONFIG_TCP_CONG_HYBLA=m CONFIG_TCP_CONG_VEGAS=m # CONFIG_TCP_CONG_NV is not set CONFIG_TCP_CONG_SCALABLE=m CONFIG_TCP_CONG_LP=m CONFIG_TCP_CONG_VENO=m CONFIG_TCP_CONG_YEAH=m CONFIG_TCP_CONG_ILLINOIS=m CONFIG_TCP_CONG_DCTCP=m # CONFIG_TCP_CONG_CDG is not set # CONFIG_TCP_CONG_BBR is not set CONFIG_DEFAULT_CUBIC=y # CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="cubic" CONFIG_TCP_MD5SIG=y CONFIG_IPV6=y CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTE_INFO=y CONFIG_IPV6_OPTIMISTIC_DAD=y CONFIG_INET6_AH=m CONFIG_INET6_ESP=m # CONFIG_INET6_ESP_OFFLOAD is not set CONFIG_INET6_IPCOMP=m CONFIG_IPV6_MIP6=m # CONFIG_IPV6_ILA is not set CONFIG_INET6_XFRM_TUNNEL=m CONFIG_INET6_TUNNEL=m CONFIG_IPV6_VTI=m CONFIG_IPV6_SIT=m CONFIG_IPV6_SIT_6RD=y CONFIG_IPV6_NDISC_NODETYPE=y CONFIG_IPV6_TUNNEL=m CONFIG_IPV6_GRE=m CONFIG_IPV6_MULTIPLE_TABLES=y # CONFIG_IPV6_SUBTREES is not set CONFIG_IPV6_MROUTE=y CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y CONFIG_IPV6_PIMSM_V2=y # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set # CONFIG_IPV6_RPL_LWTUNNEL is not set CONFIG_NETLABEL=y # CONFIG_MPTCP is not set CONFIG_NETWORK_SECMARK=y CONFIG_NET_PTP_CLASSIFY=y CONFIG_NETWORK_PHY_TIMESTAMPING=y CONFIG_NETFILTER=y CONFIG_NETFILTER_ADVANCED=y CONFIG_BRIDGE_NETFILTER=m # # Core Netfilter Configuration # CONFIG_NETFILTER_INGRESS=y CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_FAMILY_BRIDGE=y CONFIG_NETFILTER_FAMILY_ARP=y CONFIG_NETFILTER_NETLINK_ACCT=m CONFIG_NETFILTER_NETLINK_QUEUE=m CONFIG_NETFILTER_NETLINK_LOG=m CONFIG_NETFILTER_NETLINK_OSF=m CONFIG_NF_CONNTRACK=m CONFIG_NF_LOG_COMMON=m # CONFIG_NF_LOG_NETDEV is not set CONFIG_NETFILTER_CONNCOUNT=m CONFIG_NF_CONNTRACK_MARK=y CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_ZONES=y CONFIG_NF_CONNTRACK_PROCFS=y CONFIG_NF_CONNTRACK_EVENTS=y CONFIG_NF_CONNTRACK_TIMEOUT=y CONFIG_NF_CONNTRACK_TIMESTAMP=y CONFIG_NF_CONNTRACK_LABELS=y CONFIG_NF_CT_PROTO_DCCP=y CONFIG_NF_CT_PROTO_GRE=y CONFIG_NF_CT_PROTO_SCTP=y CONFIG_NF_CT_PROTO_UDPLITE=y CONFIG_NF_CONNTRACK_AMANDA=m CONFIG_NF_CONNTRACK_FTP=m CONFIG_NF_CONNTRACK_H323=m CONFIG_NF_CONNTRACK_IRC=m CONFIG_NF_CONNTRACK_BROADCAST=m CONFIG_NF_CONNTRACK_NETBIOS_NS=m CONFIG_NF_CONNTRACK_SNMP=m CONFIG_NF_CONNTRACK_PPTP=m CONFIG_NF_CONNTRACK_SANE=m CONFIG_NF_CONNTRACK_SIP=m CONFIG_NF_CONNTRACK_TFTP=m CONFIG_NF_CT_NETLINK=m CONFIG_NF_CT_NETLINK_TIMEOUT=m # CONFIG_NETFILTER_NETLINK_GLUE_CT is not set CONFIG_NF_NAT=m CONFIG_NF_NAT_AMANDA=m CONFIG_NF_NAT_FTP=m CONFIG_NF_NAT_IRC=m CONFIG_NF_NAT_SIP=m CONFIG_NF_NAT_TFTP=m CONFIG_NF_NAT_REDIRECT=y CONFIG_NF_NAT_MASQUERADE=y CONFIG_NETFILTER_SYNPROXY=m CONFIG_NF_TABLES=m # CONFIG_NF_TABLES_INET is not set # CONFIG_NF_TABLES_NETDEV is not set # CONFIG_NFT_NUMGEN is not set CONFIG_NFT_CT=m CONFIG_NFT_COUNTER=m # CONFIG_NFT_CONNLIMIT is not set CONFIG_NFT_LOG=m CONFIG_NFT_LIMIT=m CONFIG_NFT_MASQ=m CONFIG_NFT_REDIR=m # CONFIG_NFT_TUNNEL is not set # CONFIG_NFT_OBJREF is not set CONFIG_NFT_QUEUE=m # CONFIG_NFT_QUOTA is not set CONFIG_NFT_REJECT=m CONFIG_NFT_COMPAT=m CONFIG_NFT_HASH=m # CONFIG_NFT_XFRM is not set # CONFIG_NFT_SOCKET is not set # CONFIG_NFT_OSF is not set # CONFIG_NFT_TPROXY is not set # CONFIG_NFT_SYNPROXY is not set # CONFIG_NF_FLOW_TABLE is not set CONFIG_NETFILTER_XTABLES=y # # Xtables combined modules # CONFIG_NETFILTER_XT_MARK=m CONFIG_NETFILTER_XT_CONNMARK=m CONFIG_NETFILTER_XT_SET=m # # Xtables targets # CONFIG_NETFILTER_XT_TARGET_AUDIT=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CONNMARK=m CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m CONFIG_NETFILTER_XT_TARGET_CT=m CONFIG_NETFILTER_XT_TARGET_DSCP=m CONFIG_NETFILTER_XT_TARGET_HL=m CONFIG_NETFILTER_XT_TARGET_HMARK=m CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m CONFIG_NETFILTER_XT_TARGET_LED=m CONFIG_NETFILTER_XT_TARGET_LOG=m CONFIG_NETFILTER_XT_TARGET_MARK=m CONFIG_NETFILTER_XT_NAT=m CONFIG_NETFILTER_XT_TARGET_NETMAP=m CONFIG_NETFILTER_XT_TARGET_NFLOG=m CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m CONFIG_NETFILTER_XT_TARGET_NOTRACK=m CONFIG_NETFILTER_XT_TARGET_RATEEST=m CONFIG_NETFILTER_XT_TARGET_REDIRECT=m CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m CONFIG_NETFILTER_XT_TARGET_TEE=m CONFIG_NETFILTER_XT_TARGET_TPROXY=m CONFIG_NETFILTER_XT_TARGET_TRACE=m CONFIG_NETFILTER_XT_TARGET_SECMARK=m CONFIG_NETFILTER_XT_TARGET_TCPMSS=m CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m # # Xtables matches # CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m CONFIG_NETFILTER_XT_MATCH_BPF=m CONFIG_NETFILTER_XT_MATCH_CGROUP=m CONFIG_NETFILTER_XT_MATCH_CLUSTER=m CONFIG_NETFILTER_XT_MATCH_COMMENT=m CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m CONFIG_NETFILTER_XT_MATCH_CONNMARK=m CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m CONFIG_NETFILTER_XT_MATCH_CPU=m CONFIG_NETFILTER_XT_MATCH_DCCP=m CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m CONFIG_NETFILTER_XT_MATCH_DSCP=m CONFIG_NETFILTER_XT_MATCH_ECN=m CONFIG_NETFILTER_XT_MATCH_ESP=m CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m CONFIG_NETFILTER_XT_MATCH_HELPER=m CONFIG_NETFILTER_XT_MATCH_HL=m # CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set CONFIG_NETFILTER_XT_MATCH_IPRANGE=m CONFIG_NETFILTER_XT_MATCH_IPVS=m CONFIG_NETFILTER_XT_MATCH_L2TP=m CONFIG_NETFILTER_XT_MATCH_LENGTH=m CONFIG_NETFILTER_XT_MATCH_LIMIT=m CONFIG_NETFILTER_XT_MATCH_MAC=m CONFIG_NETFILTER_XT_MATCH_MARK=m CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m CONFIG_NETFILTER_XT_MATCH_NFACCT=m CONFIG_NETFILTER_XT_MATCH_OSF=m CONFIG_NETFILTER_XT_MATCH_OWNER=m CONFIG_NETFILTER_XT_MATCH_POLICY=m CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m CONFIG_NETFILTER_XT_MATCH_QUOTA=m CONFIG_NETFILTER_XT_MATCH_RATEEST=m CONFIG_NETFILTER_XT_MATCH_REALM=m CONFIG_NETFILTER_XT_MATCH_RECENT=m CONFIG_NETFILTER_XT_MATCH_SCTP=m CONFIG_NETFILTER_XT_MATCH_SOCKET=m CONFIG_NETFILTER_XT_MATCH_STATE=m CONFIG_NETFILTER_XT_MATCH_STATISTIC=m CONFIG_NETFILTER_XT_MATCH_STRING=m CONFIG_NETFILTER_XT_MATCH_TCPMSS=m CONFIG_NETFILTER_XT_MATCH_TIME=m CONFIG_NETFILTER_XT_MATCH_U32=m # end of Core Netfilter Configuration CONFIG_IP_SET=m CONFIG_IP_SET_MAX=256 CONFIG_IP_SET_BITMAP_IP=m CONFIG_IP_SET_BITMAP_IPMAC=m CONFIG_IP_SET_BITMAP_PORT=m CONFIG_IP_SET_HASH_IP=m CONFIG_IP_SET_HASH_IPMARK=m CONFIG_IP_SET_HASH_IPPORT=m CONFIG_IP_SET_HASH_IPPORTIP=m CONFIG_IP_SET_HASH_IPPORTNET=m CONFIG_IP_SET_HASH_IPMAC=m CONFIG_IP_SET_HASH_MAC=m CONFIG_IP_SET_HASH_NETPORTNET=m CONFIG_IP_SET_HASH_NET=m CONFIG_IP_SET_HASH_NETNET=m CONFIG_IP_SET_HASH_NETPORT=m CONFIG_IP_SET_HASH_NETIFACE=m CONFIG_IP_SET_LIST_SET=m CONFIG_IP_VS=m CONFIG_IP_VS_IPV6=y # CONFIG_IP_VS_DEBUG is not set CONFIG_IP_VS_TAB_BITS=12 # # IPVS transport protocol load balancing support # CONFIG_IP_VS_PROTO_TCP=y CONFIG_IP_VS_PROTO_UDP=y CONFIG_IP_VS_PROTO_AH_ESP=y CONFIG_IP_VS_PROTO_ESP=y CONFIG_IP_VS_PROTO_AH=y CONFIG_IP_VS_PROTO_SCTP=y # # IPVS scheduler # CONFIG_IP_VS_RR=m CONFIG_IP_VS_WRR=m CONFIG_IP_VS_LC=m CONFIG_IP_VS_WLC=m # CONFIG_IP_VS_FO is not set # CONFIG_IP_VS_OVF is not set CONFIG_IP_VS_LBLC=m CONFIG_IP_VS_LBLCR=m CONFIG_IP_VS_DH=m CONFIG_IP_VS_SH=m # CONFIG_IP_VS_MH is not set CONFIG_IP_VS_SED=m CONFIG_IP_VS_NQ=m # # IPVS SH scheduler # CONFIG_IP_VS_SH_TAB_BITS=8 # # IPVS MH scheduler # CONFIG_IP_VS_MH_TAB_INDEX=12 # # IPVS application helper # CONFIG_IP_VS_FTP=m CONFIG_IP_VS_NFCT=y CONFIG_IP_VS_PE_SIP=m # # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m CONFIG_NF_SOCKET_IPV4=m CONFIG_NF_TPROXY_IPV4=m # CONFIG_NF_TABLES_IPV4 is not set # CONFIG_NF_TABLES_ARP is not set CONFIG_NF_DUP_IPV4=m # CONFIG_NF_LOG_ARP is not set CONFIG_NF_LOG_IPV4=m CONFIG_NF_REJECT_IPV4=m CONFIG_NF_NAT_SNMP_BASIC=m CONFIG_NF_NAT_PPTP=m CONFIG_NF_NAT_H323=m CONFIG_IP_NF_IPTABLES=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m CONFIG_IP_NF_MATCH_RPFILTER=m CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m CONFIG_IP_NF_TARGET_SYNPROXY=m CONFIG_IP_NF_NAT=m CONFIG_IP_NF_TARGET_MASQUERADE=m CONFIG_IP_NF_TARGET_NETMAP=m CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_TARGET_CLUSTERIP=m CONFIG_IP_NF_TARGET_ECN=m CONFIG_IP_NF_TARGET_TTL=m CONFIG_IP_NF_RAW=m CONFIG_IP_NF_SECURITY=m CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # CONFIG_NF_SOCKET_IPV6=m CONFIG_NF_TPROXY_IPV6=m # CONFIG_NF_TABLES_IPV6 is not set CONFIG_NF_DUP_IPV6=m CONFIG_NF_REJECT_IPV6=m CONFIG_NF_LOG_IPV6=m CONFIG_IP6_NF_IPTABLES=m CONFIG_IP6_NF_MATCH_AH=m CONFIG_IP6_NF_MATCH_EUI64=m CONFIG_IP6_NF_MATCH_FRAG=m CONFIG_IP6_NF_MATCH_OPTS=m CONFIG_IP6_NF_MATCH_HL=m CONFIG_IP6_NF_MATCH_IPV6HEADER=m CONFIG_IP6_NF_MATCH_MH=m CONFIG_IP6_NF_MATCH_RPFILTER=m CONFIG_IP6_NF_MATCH_RT=m # CONFIG_IP6_NF_MATCH_SRH is not set CONFIG_IP6_NF_TARGET_HL=m CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_IP6_NF_TARGET_SYNPROXY=m CONFIG_IP6_NF_MANGLE=m CONFIG_IP6_NF_RAW=m CONFIG_IP6_NF_SECURITY=m CONFIG_IP6_NF_NAT=m CONFIG_IP6_NF_TARGET_MASQUERADE=m CONFIG_IP6_NF_TARGET_NPT=m # end of IPv6: Netfilter Configuration CONFIG_NF_DEFRAG_IPV6=m # CONFIG_NF_TABLES_BRIDGE is not set # CONFIG_NF_CONNTRACK_BRIDGE is not set CONFIG_BRIDGE_NF_EBTABLES=m CONFIG_BRIDGE_EBT_BROUTE=m CONFIG_BRIDGE_EBT_T_FILTER=m CONFIG_BRIDGE_EBT_T_NAT=m CONFIG_BRIDGE_EBT_802_3=m CONFIG_BRIDGE_EBT_AMONG=m CONFIG_BRIDGE_EBT_ARP=m CONFIG_BRIDGE_EBT_IP=m CONFIG_BRIDGE_EBT_IP6=m CONFIG_BRIDGE_EBT_LIMIT=m CONFIG_BRIDGE_EBT_MARK=m CONFIG_BRIDGE_EBT_PKTTYPE=m CONFIG_BRIDGE_EBT_STP=m CONFIG_BRIDGE_EBT_VLAN=m CONFIG_BRIDGE_EBT_ARPREPLY=m CONFIG_BRIDGE_EBT_DNAT=m CONFIG_BRIDGE_EBT_MARK_T=m CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m CONFIG_BRIDGE_EBT_NFLOG=m # CONFIG_BPFILTER is not set CONFIG_IP_DCCP=m CONFIG_INET_DCCP_DIAG=m # # DCCP CCIDs Configuration # # CONFIG_IP_DCCP_CCID2_DEBUG is not set CONFIG_IP_DCCP_CCID3=y # CONFIG_IP_DCCP_CCID3_DEBUG is not set CONFIG_IP_DCCP_TFRC_LIB=y # end of DCCP CCIDs Configuration # # DCCP Kernel Hacking # # CONFIG_IP_DCCP_DEBUG is not set # end of DCCP Kernel Hacking CONFIG_IP_SCTP=m # CONFIG_SCTP_DBG_OBJCNT is not set # CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5 is not set CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1=y # CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set CONFIG_SCTP_COOKIE_HMAC_MD5=y CONFIG_SCTP_COOKIE_HMAC_SHA1=y CONFIG_INET_SCTP_DIAG=m # CONFIG_RDS is not set # CONFIG_TIPC is not set CONFIG_ATM=m CONFIG_ATM_CLIP=m # CONFIG_ATM_CLIP_NO_ICMP is not set CONFIG_ATM_LANE=m # CONFIG_ATM_MPOA is not set CONFIG_ATM_BR2684=m # CONFIG_ATM_BR2684_IPFILTER is not set CONFIG_L2TP=m CONFIG_L2TP_DEBUGFS=m CONFIG_L2TP_V3=y CONFIG_L2TP_IP=m CONFIG_L2TP_ETH=m CONFIG_STP=m CONFIG_GARP=m CONFIG_MRP=m CONFIG_BRIDGE=m CONFIG_BRIDGE_IGMP_SNOOPING=y CONFIG_BRIDGE_VLAN_FILTERING=y CONFIG_HAVE_NET_DSA=y # CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=m CONFIG_VLAN_8021Q_GVRP=y CONFIG_VLAN_8021Q_MVRP=y # CONFIG_DECNET is not set CONFIG_LLC=m # CONFIG_LLC2 is not set # CONFIG_ATALK is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set # CONFIG_PHONET is not set CONFIG_6LOWPAN=m # CONFIG_6LOWPAN_DEBUGFS is not set CONFIG_6LOWPAN_NHC=m CONFIG_6LOWPAN_NHC_DEST=m CONFIG_6LOWPAN_NHC_FRAGMENT=m CONFIG_6LOWPAN_NHC_HOP=m CONFIG_6LOWPAN_NHC_IPV6=m CONFIG_6LOWPAN_NHC_MOBILITY=m CONFIG_6LOWPAN_NHC_ROUTING=m CONFIG_6LOWPAN_NHC_UDP=m # CONFIG_6LOWPAN_GHC_EXT_HDR_HOP is not set # CONFIG_6LOWPAN_GHC_UDP is not set # CONFIG_6LOWPAN_GHC_ICMPV6 is not set # CONFIG_6LOWPAN_GHC_EXT_HDR_DEST is not set # CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG is not set # CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE is not set CONFIG_IEEE802154=m # CONFIG_IEEE802154_NL802154_EXPERIMENTAL is not set CONFIG_IEEE802154_SOCKET=m CONFIG_IEEE802154_6LOWPAN=m CONFIG_MAC802154=m CONFIG_NET_SCHED=y # # Queueing/Scheduling # CONFIG_NET_SCH_CBQ=m CONFIG_NET_SCH_HTB=m CONFIG_NET_SCH_HFSC=m CONFIG_NET_SCH_ATM=m CONFIG_NET_SCH_PRIO=m CONFIG_NET_SCH_MULTIQ=m CONFIG_NET_SCH_RED=m CONFIG_NET_SCH_SFB=m CONFIG_NET_SCH_SFQ=m CONFIG_NET_SCH_TEQL=m CONFIG_NET_SCH_TBF=m # CONFIG_NET_SCH_CBS is not set # CONFIG_NET_SCH_ETF is not set # CONFIG_NET_SCH_TAPRIO is not set CONFIG_NET_SCH_GRED=m CONFIG_NET_SCH_DSMARK=m CONFIG_NET_SCH_NETEM=m CONFIG_NET_SCH_DRR=m CONFIG_NET_SCH_MQPRIO=m # CONFIG_NET_SCH_SKBPRIO is not set CONFIG_NET_SCH_CHOKE=m CONFIG_NET_SCH_QFQ=m CONFIG_NET_SCH_CODEL=m CONFIG_NET_SCH_FQ_CODEL=m # CONFIG_NET_SCH_CAKE is not set CONFIG_NET_SCH_FQ=m # CONFIG_NET_SCH_HHF is not set # CONFIG_NET_SCH_PIE is not set CONFIG_NET_SCH_INGRESS=m CONFIG_NET_SCH_PLUG=m # CONFIG_NET_SCH_ETS is not set # CONFIG_NET_SCH_DEFAULT is not set # # Classification # CONFIG_NET_CLS=y CONFIG_NET_CLS_BASIC=m CONFIG_NET_CLS_TCINDEX=m CONFIG_NET_CLS_ROUTE4=m CONFIG_NET_CLS_FW=m CONFIG_NET_CLS_U32=m CONFIG_CLS_U32_PERF=y CONFIG_CLS_U32_MARK=y CONFIG_NET_CLS_RSVP=m CONFIG_NET_CLS_RSVP6=m CONFIG_NET_CLS_FLOW=m CONFIG_NET_CLS_CGROUP=y CONFIG_NET_CLS_BPF=m CONFIG_NET_CLS_FLOWER=m CONFIG_NET_CLS_MATCHALL=m CONFIG_NET_EMATCH=y CONFIG_NET_EMATCH_STACK=32 CONFIG_NET_EMATCH_CMP=m CONFIG_NET_EMATCH_NBYTE=m CONFIG_NET_EMATCH_U32=m CONFIG_NET_EMATCH_META=m CONFIG_NET_EMATCH_TEXT=m # CONFIG_NET_EMATCH_CANID is not set CONFIG_NET_EMATCH_IPSET=m # CONFIG_NET_EMATCH_IPT is not set CONFIG_NET_CLS_ACT=y CONFIG_NET_ACT_POLICE=m CONFIG_NET_ACT_GACT=m CONFIG_GACT_PROB=y CONFIG_NET_ACT_MIRRED=m CONFIG_NET_ACT_SAMPLE=m CONFIG_NET_ACT_IPT=m CONFIG_NET_ACT_NAT=m CONFIG_NET_ACT_PEDIT=m CONFIG_NET_ACT_SIMP=m CONFIG_NET_ACT_SKBEDIT=m CONFIG_NET_ACT_CSUM=m # CONFIG_NET_ACT_MPLS is not set CONFIG_NET_ACT_VLAN=m # CONFIG_NET_ACT_BPF is not set CONFIG_NET_ACT_CONNMARK=m # CONFIG_NET_ACT_CTINFO is not set CONFIG_NET_ACT_SKBMOD=m # CONFIG_NET_ACT_IFE is not set CONFIG_NET_ACT_TUNNEL_KEY=m # CONFIG_NET_TC_SKB_EXT is not set CONFIG_NET_SCH_FIFO=y CONFIG_DCB=y CONFIG_DNS_RESOLVER=m # CONFIG_BATMAN_ADV is not set CONFIG_OPENVSWITCH=m CONFIG_OPENVSWITCH_GRE=m CONFIG_OPENVSWITCH_VXLAN=m CONFIG_OPENVSWITCH_GENEVE=m CONFIG_VSOCKETS=m CONFIG_VSOCKETS_DIAG=m CONFIG_VSOCKETS_LOOPBACK=m CONFIG_VMWARE_VMCI_VSOCKETS=m CONFIG_VIRTIO_VSOCKETS=m CONFIG_VIRTIO_VSOCKETS_COMMON=m CONFIG_HYPERV_VSOCKETS=m CONFIG_NETLINK_DIAG=m CONFIG_MPLS=y CONFIG_NET_MPLS_GSO=y # CONFIG_MPLS_ROUTING is not set CONFIG_NET_NSH=m # CONFIG_HSR is not set CONFIG_NET_SWITCHDEV=y # CONFIG_NET_L3_MASTER_DEV is not set # CONFIG_NET_NCSI is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y CONFIG_XPS=y # CONFIG_CGROUP_NET_PRIO is not set CONFIG_CGROUP_NET_CLASSID=y CONFIG_NET_RX_BUSY_POLL=y CONFIG_BQL=y CONFIG_BPF_JIT=y CONFIG_NET_FLOW_LIMIT=y # # Network testing # CONFIG_NET_PKTGEN=m CONFIG_NET_DROP_MONITOR=y # end of Network testing # end of Networking options # CONFIG_HAMRADIO is not set CONFIG_CAN=m CONFIG_CAN_RAW=m CONFIG_CAN_BCM=m CONFIG_CAN_GW=m # CONFIG_CAN_J1939 is not set # # CAN Device Drivers # CONFIG_CAN_VCAN=m # CONFIG_CAN_VXCAN is not set CONFIG_CAN_SLCAN=m CONFIG_CAN_DEV=m CONFIG_CAN_CALC_BITTIMING=y # CONFIG_CAN_KVASER_PCIEFD is not set CONFIG_CAN_C_CAN=m CONFIG_CAN_C_CAN_PLATFORM=m CONFIG_CAN_C_CAN_PCI=m CONFIG_CAN_CC770=m # CONFIG_CAN_CC770_ISA is not set CONFIG_CAN_CC770_PLATFORM=m # CONFIG_CAN_IFI_CANFD is not set # CONFIG_CAN_M_CAN is not set # CONFIG_CAN_PEAK_PCIEFD is not set CONFIG_CAN_SJA1000=m CONFIG_CAN_EMS_PCI=m # CONFIG_CAN_F81601 is not set CONFIG_CAN_KVASER_PCI=m CONFIG_CAN_PEAK_PCI=m CONFIG_CAN_PEAK_PCIEC=y CONFIG_CAN_PLX_PCI=m # CONFIG_CAN_SJA1000_ISA is not set CONFIG_CAN_SJA1000_PLATFORM=m CONFIG_CAN_SOFTING=m # # CAN SPI interfaces # # CONFIG_CAN_HI311X is not set # CONFIG_CAN_MCP251X is not set # end of CAN SPI interfaces # # CAN USB interfaces # CONFIG_CAN_8DEV_USB=m CONFIG_CAN_EMS_USB=m CONFIG_CAN_ESD_USB2=m # CONFIG_CAN_GS_USB is not set CONFIG_CAN_KVASER_USB=m # CONFIG_CAN_MCBA_USB is not set CONFIG_CAN_PEAK_USB=m # CONFIG_CAN_UCAN is not set # end of CAN USB interfaces # CONFIG_CAN_DEBUG_DEVICES is not set # end of CAN Device Drivers CONFIG_BT=m CONFIG_BT_BREDR=y CONFIG_BT_RFCOMM=m CONFIG_BT_RFCOMM_TTY=y CONFIG_BT_BNEP=m CONFIG_BT_BNEP_MC_FILTER=y CONFIG_BT_BNEP_PROTO_FILTER=y CONFIG_BT_CMTP=m CONFIG_BT_HIDP=m CONFIG_BT_HS=y CONFIG_BT_LE=y # CONFIG_BT_6LOWPAN is not set # CONFIG_BT_LEDS is not set # CONFIG_BT_SELFTEST is not set CONFIG_BT_DEBUGFS=y # # Bluetooth device drivers # CONFIG_BT_INTEL=m CONFIG_BT_BCM=m CONFIG_BT_RTL=m CONFIG_BT_HCIBTUSB=m # CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set CONFIG_BT_HCIBTUSB_BCM=y # CONFIG_BT_HCIBTUSB_MTK is not set CONFIG_BT_HCIBTUSB_RTL=y CONFIG_BT_HCIBTSDIO=m CONFIG_BT_HCIUART=m CONFIG_BT_HCIUART_H4=y CONFIG_BT_HCIUART_BCSP=y CONFIG_BT_HCIUART_ATH3K=y # CONFIG_BT_HCIUART_INTEL is not set # CONFIG_BT_HCIUART_AG6XX is not set CONFIG_BT_HCIBCM203X=m CONFIG_BT_HCIBPA10X=m CONFIG_BT_HCIBFUSB=m CONFIG_BT_HCIVHCI=m CONFIG_BT_MRVL=m CONFIG_BT_MRVL_SDIO=m CONFIG_BT_ATH3K=m # CONFIG_BT_MTKSDIO is not set # end of Bluetooth device drivers # CONFIG_AF_RXRPC is not set # CONFIG_AF_KCM is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y CONFIG_WIRELESS_EXT=y CONFIG_WEXT_CORE=y CONFIG_WEXT_PROC=y CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set CONFIG_CFG80211_CRDA_SUPPORT=y CONFIG_CFG80211_WEXT=y CONFIG_LIB80211=m # CONFIG_LIB80211_DEBUG is not set CONFIG_MAC80211=m CONFIG_MAC80211_HAS_RC=y CONFIG_MAC80211_RC_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" CONFIG_MAC80211_MESH=y CONFIG_MAC80211_LEDS=y CONFIG_MAC80211_DEBUGFS=y # CONFIG_MAC80211_MESSAGE_TRACING is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 # CONFIG_WIMAX is not set CONFIG_RFKILL=m CONFIG_RFKILL_LEDS=y CONFIG_RFKILL_INPUT=y # CONFIG_RFKILL_GPIO is not set CONFIG_NET_9P=y CONFIG_NET_9P_VIRTIO=y # CONFIG_NET_9P_XEN is not set # CONFIG_NET_9P_RDMA is not set # CONFIG_NET_9P_DEBUG is not set # CONFIG_CAIF is not set CONFIG_CEPH_LIB=m # CONFIG_CEPH_LIB_PRETTYDEBUG is not set CONFIG_CEPH_LIB_USE_DNS_RESOLVER=y # CONFIG_NFC is not set CONFIG_PSAMPLE=m # CONFIG_NET_IFE is not set CONFIG_LWTUNNEL=y CONFIG_LWTUNNEL_BPF=y CONFIG_DST_CACHE=y CONFIG_GRO_CELLS=y CONFIG_NET_DEVLINK=y CONFIG_PAGE_POOL=y CONFIG_FAILOVER=m CONFIG_ETHTOOL_NETLINK=y CONFIG_HAVE_EBPF_JIT=y # # Device Drivers # CONFIG_HAVE_EISA=y # CONFIG_EISA is not set CONFIG_HAVE_PCI=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCIEPORTBUS=y CONFIG_HOTPLUG_PCI_PCIE=y CONFIG_PCIEAER=y CONFIG_PCIEAER_INJECT=m CONFIG_PCIE_ECRC=y CONFIG_PCIEASPM=y CONFIG_PCIEASPM_DEFAULT=y # CONFIG_PCIEASPM_POWERSAVE is not set # CONFIG_PCIEASPM_POWER_SUPERSAVE is not set # CONFIG_PCIEASPM_PERFORMANCE is not set CONFIG_PCIE_PME=y # CONFIG_PCIE_DPC is not set # CONFIG_PCIE_PTM is not set # CONFIG_PCIE_BW is not set CONFIG_PCI_MSI=y CONFIG_PCI_MSI_IRQ_DOMAIN=y CONFIG_PCI_QUIRKS=y # CONFIG_PCI_DEBUG is not set # CONFIG_PCI_REALLOC_ENABLE_AUTO is not set CONFIG_PCI_STUB=y # CONFIG_PCI_PF_STUB is not set # CONFIG_XEN_PCIDEV_FRONTEND is not set CONFIG_PCI_ATS=y CONFIG_PCI_LOCKLESS_CONFIG=y CONFIG_PCI_IOV=y CONFIG_PCI_PRI=y CONFIG_PCI_PASID=y # CONFIG_PCI_P2PDMA is not set CONFIG_PCI_LABEL=y CONFIG_PCI_HYPERV=m CONFIG_HOTPLUG_PCI=y CONFIG_HOTPLUG_PCI_ACPI=y CONFIG_HOTPLUG_PCI_ACPI_IBM=m # CONFIG_HOTPLUG_PCI_CPCI is not set CONFIG_HOTPLUG_PCI_SHPC=y # # PCI controller drivers # CONFIG_VMD=y CONFIG_PCI_HYPERV_INTERFACE=m # # DesignWare PCI Core Support # # CONFIG_PCIE_DW_PLAT_HOST is not set # CONFIG_PCI_MESON is not set # end of DesignWare PCI Core Support # # Mobiveil PCIe Core Support # # end of Mobiveil PCIe Core Support # # Cadence PCIe controllers support # # end of Cadence PCIe controllers support # end of PCI controller drivers # # PCI Endpoint # # CONFIG_PCI_ENDPOINT is not set # end of PCI Endpoint # # PCI switch controller drivers # # CONFIG_PCI_SW_SWITCHTEC is not set # end of PCI switch controller drivers CONFIG_PCCARD=y # CONFIG_PCMCIA is not set CONFIG_CARDBUS=y # # PC-card bridges # CONFIG_YENTA=m CONFIG_YENTA_O2=y CONFIG_YENTA_RICOH=y CONFIG_YENTA_TI=y CONFIG_YENTA_ENE_TUNE=y CONFIG_YENTA_TOSHIBA=y # CONFIG_RAPIDIO is not set # # Generic Driver Options # CONFIG_UEVENT_HELPER=y CONFIG_UEVENT_HELPER_PATH="" CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # # Firmware loader # CONFIG_FW_LOADER=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_EXTRA_FIRMWARE="" CONFIG_FW_LOADER_USER_HELPER=y # CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set # CONFIG_FW_LOADER_COMPRESS is not set CONFIG_FW_CACHE=y # end of Firmware loader CONFIG_WANT_DEV_COREDUMP=y CONFIG_ALLOW_DEV_COREDUMP=y CONFIG_DEV_COREDUMP=y # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_PM_QOS_KUNIT_TEST is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set # CONFIG_KUNIT_DRIVER_PE_TEST is not set CONFIG_SYS_HYPERVISOR=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=m CONFIG_REGMAP_SPI=m CONFIG_REGMAP_IRQ=y CONFIG_DMA_SHARED_BUFFER=y # CONFIG_DMA_FENCE_TRACE is not set # end of Generic Driver Options # # Bus devices # # CONFIG_MHI_BUS is not set # end of Bus devices CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_GNSS is not set CONFIG_MTD=m # CONFIG_MTD_TESTS is not set # # Partition parsers # # CONFIG_MTD_AR7_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set # CONFIG_MTD_REDBOOT_PARTS is not set # end of Partition parsers # # User Modules And Translation Layers # CONFIG_MTD_BLKDEVS=m CONFIG_MTD_BLOCK=m # CONFIG_MTD_BLOCK_RO is not set # CONFIG_FTL is not set # CONFIG_NFTL is not set # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set # CONFIG_SSFDC is not set # CONFIG_SM_FTL is not set # CONFIG_MTD_OOPS is not set # CONFIG_MTD_SWAP is not set # CONFIG_MTD_PARTITIONED_MASTER is not set # # RAM/ROM/Flash chip drivers # # CONFIG_MTD_CFI is not set # CONFIG_MTD_JEDECPROBE is not set CONFIG_MTD_MAP_BANK_WIDTH_1=y CONFIG_MTD_MAP_BANK_WIDTH_2=y CONFIG_MTD_MAP_BANK_WIDTH_4=y CONFIG_MTD_CFI_I1=y CONFIG_MTD_CFI_I2=y # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set # end of RAM/ROM/Flash chip drivers # # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set # CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # end of Mapping drivers for chip access # # Self-contained MTD device drivers # # CONFIG_MTD_PMC551 is not set # CONFIG_MTD_DATAFLASH is not set # CONFIG_MTD_MCHP23K256 is not set # CONFIG_MTD_SST25L is not set # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_PHRAM is not set # CONFIG_MTD_MTDRAM is not set # CONFIG_MTD_BLOCK2MTD is not set # # Disk-On-Chip Device Drivers # # CONFIG_MTD_DOCG3 is not set # end of Self-contained MTD device drivers # CONFIG_MTD_ONENAND is not set # CONFIG_MTD_RAW_NAND is not set # CONFIG_MTD_SPI_NAND is not set # # LPDDR & LPDDR2 PCM memory drivers # # CONFIG_MTD_LPDDR is not set # end of LPDDR & LPDDR2 PCM memory drivers # CONFIG_MTD_SPI_NOR is not set CONFIG_MTD_UBI=m CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_MTD_UBI_BEB_LIMIT=20 # CONFIG_MTD_UBI_FASTMAP is not set # CONFIG_MTD_UBI_GLUEBI is not set # CONFIG_MTD_UBI_BLOCK is not set # CONFIG_MTD_HYPERBUS is not set # CONFIG_OF is not set CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y CONFIG_PARPORT=m CONFIG_PARPORT_PC=m CONFIG_PARPORT_SERIAL=m # CONFIG_PARPORT_PC_FIFO is not set # CONFIG_PARPORT_PC_SUPERIO is not set # CONFIG_PARPORT_AX88796 is not set CONFIG_PARPORT_1284=y CONFIG_PARPORT_NOT_PC=y CONFIG_PNP=y # CONFIG_PNP_DEBUG_MESSAGES is not set # # Protocols # CONFIG_PNPACPI=y CONFIG_BLK_DEV=y CONFIG_BLK_DEV_NULL_BLK=m CONFIG_BLK_DEV_NULL_BLK_FAULT_INJECTION=y CONFIG_BLK_DEV_FD=m CONFIG_CDROM=m # CONFIG_PARIDE is not set CONFIG_BLK_DEV_PCIESSD_MTIP32XX=m # CONFIG_ZRAM is not set # CONFIG_BLK_DEV_UMEM is not set CONFIG_BLK_DEV_LOOP=m CONFIG_BLK_DEV_LOOP_MIN_COUNT=0 # CONFIG_BLK_DEV_CRYPTOLOOP is not set # CONFIG_BLK_DEV_DRBD is not set CONFIG_BLK_DEV_NBD=m # CONFIG_BLK_DEV_SKD is not set CONFIG_BLK_DEV_SX8=m CONFIG_BLK_DEV_RAM=m CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=16384 CONFIG_CDROM_PKTCDVD=m CONFIG_CDROM_PKTCDVD_BUFFERS=8 # CONFIG_CDROM_PKTCDVD_WCACHE is not set CONFIG_ATA_OVER_ETH=m CONFIG_XEN_BLKDEV_FRONTEND=m CONFIG_VIRTIO_BLK=y CONFIG_BLK_DEV_RBD=m # CONFIG_BLK_DEV_RSXX is not set # # NVME Support # CONFIG_NVME_CORE=m CONFIG_BLK_DEV_NVME=m CONFIG_NVME_MULTIPATH=y # CONFIG_NVME_HWMON is not set CONFIG_NVME_FABRICS=m # CONFIG_NVME_RDMA is not set CONFIG_NVME_FC=m # CONFIG_NVME_TCP is not set CONFIG_NVME_TARGET=m CONFIG_NVME_TARGET_LOOP=m # CONFIG_NVME_TARGET_RDMA is not set CONFIG_NVME_TARGET_FC=m CONFIG_NVME_TARGET_FCLOOP=m # CONFIG_NVME_TARGET_TCP is not set # end of NVME Support # # Misc devices # CONFIG_SENSORS_LIS3LV02D=m # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set # CONFIG_IBM_ASM is not set # CONFIG_PHANTOM is not set CONFIG_TIFM_CORE=m CONFIG_TIFM_7XX1=m # CONFIG_ICS932S401 is not set CONFIG_ENCLOSURE_SERVICES=m CONFIG_SGI_XP=m CONFIG_HP_ILO=m CONFIG_SGI_GRU=m # CONFIG_SGI_GRU_DEBUG is not set CONFIG_APDS9802ALS=m CONFIG_ISL29003=m CONFIG_ISL29020=m CONFIG_SENSORS_TSL2550=m CONFIG_SENSORS_BH1770=m CONFIG_SENSORS_APDS990X=m # CONFIG_HMC6352 is not set # CONFIG_DS1682 is not set CONFIG_VMWARE_BALLOON=m # CONFIG_LATTICE_ECP3_CONFIG is not set # CONFIG_SRAM is not set # CONFIG_PCI_ENDPOINT_TEST is not set # CONFIG_XILINX_SDFEC is not set CONFIG_PVPANIC=y # CONFIG_C2PORT is not set # # EEPROM support # CONFIG_EEPROM_AT24=m # CONFIG_EEPROM_AT25 is not set CONFIG_EEPROM_LEGACY=m CONFIG_EEPROM_MAX6875=m CONFIG_EEPROM_93CX6=m # CONFIG_EEPROM_93XX46 is not set # CONFIG_EEPROM_IDT_89HPESX is not set # CONFIG_EEPROM_EE1004 is not set # end of EEPROM support CONFIG_CB710_CORE=m # CONFIG_CB710_DEBUG is not set CONFIG_CB710_DEBUG_ASSUMPTIONS=y # # Texas Instruments shared transport line discipline # # CONFIG_TI_ST is not set # end of Texas Instruments shared transport line discipline CONFIG_SENSORS_LIS3_I2C=m CONFIG_ALTERA_STAPL=m CONFIG_INTEL_MEI=m CONFIG_INTEL_MEI_ME=m # CONFIG_INTEL_MEI_TXE is not set # CONFIG_INTEL_MEI_HDCP is not set CONFIG_VMWARE_VMCI=m # # Intel MIC & related support # # CONFIG_INTEL_MIC_BUS is not set # CONFIG_SCIF_BUS is not set # CONFIG_VOP_BUS is not set # end of Intel MIC & related support # CONFIG_GENWQE is not set # CONFIG_ECHO is not set # CONFIG_MISC_ALCOR_PCI is not set # CONFIG_MISC_RTSX_PCI is not set # CONFIG_MISC_RTSX_USB is not set # CONFIG_HABANA_AI is not set # CONFIG_UACCE is not set # end of Misc devices CONFIG_HAVE_IDE=y # CONFIG_IDE is not set # # SCSI device support # CONFIG_SCSI_MOD=y CONFIG_RAID_ATTRS=m CONFIG_SCSI=y CONFIG_SCSI_DMA=y CONFIG_SCSI_NETLINK=y CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) # CONFIG_BLK_DEV_SD=m CONFIG_CHR_DEV_ST=m CONFIG_BLK_DEV_SR=m CONFIG_CHR_DEV_SG=m CONFIG_CHR_DEV_SCH=m CONFIG_SCSI_ENCLOSURE=m CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y # # SCSI Transports # CONFIG_SCSI_SPI_ATTRS=m CONFIG_SCSI_FC_ATTRS=m CONFIG_SCSI_ISCSI_ATTRS=m CONFIG_SCSI_SAS_ATTRS=m CONFIG_SCSI_SAS_LIBSAS=m CONFIG_SCSI_SAS_ATA=y CONFIG_SCSI_SAS_HOST_SMP=y CONFIG_SCSI_SRP_ATTRS=m # end of SCSI Transports CONFIG_SCSI_LOWLEVEL=y CONFIG_ISCSI_TCP=m CONFIG_ISCSI_BOOT_SYSFS=m CONFIG_SCSI_CXGB3_ISCSI=m CONFIG_SCSI_CXGB4_ISCSI=m CONFIG_SCSI_BNX2_ISCSI=m CONFIG_SCSI_BNX2X_FCOE=m CONFIG_BE2ISCSI=m # CONFIG_BLK_DEV_3W_XXXX_RAID is not set CONFIG_SCSI_HPSA=m CONFIG_SCSI_3W_9XXX=m CONFIG_SCSI_3W_SAS=m # CONFIG_SCSI_ACARD is not set CONFIG_SCSI_AACRAID=m # CONFIG_SCSI_AIC7XXX is not set CONFIG_SCSI_AIC79XX=m CONFIG_AIC79XX_CMDS_PER_DEVICE=4 CONFIG_AIC79XX_RESET_DELAY_MS=15000 # CONFIG_AIC79XX_DEBUG_ENABLE is not set CONFIG_AIC79XX_DEBUG_MASK=0 # CONFIG_AIC79XX_REG_PRETTY_PRINT is not set # CONFIG_SCSI_AIC94XX is not set CONFIG_SCSI_MVSAS=m # CONFIG_SCSI_MVSAS_DEBUG is not set CONFIG_SCSI_MVSAS_TASKLET=y CONFIG_SCSI_MVUMI=m # CONFIG_SCSI_DPT_I2O is not set # CONFIG_SCSI_ADVANSYS is not set CONFIG_SCSI_ARCMSR=m # CONFIG_SCSI_ESAS2R is not set # CONFIG_MEGARAID_NEWGEN is not set # CONFIG_MEGARAID_LEGACY is not set CONFIG_MEGARAID_SAS=m CONFIG_SCSI_MPT3SAS=m CONFIG_SCSI_MPT2SAS_MAX_SGE=128 CONFIG_SCSI_MPT3SAS_MAX_SGE=128 CONFIG_SCSI_MPT2SAS=m # CONFIG_SCSI_SMARTPQI is not set CONFIG_SCSI_UFSHCD=m CONFIG_SCSI_UFSHCD_PCI=m # CONFIG_SCSI_UFS_DWC_TC_PCI is not set # CONFIG_SCSI_UFSHCD_PLATFORM is not set # CONFIG_SCSI_UFS_BSG is not set CONFIG_SCSI_HPTIOP=m # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_MYRB is not set # CONFIG_SCSI_MYRS is not set CONFIG_VMWARE_PVSCSI=m # CONFIG_XEN_SCSI_FRONTEND is not set CONFIG_HYPERV_STORAGE=m CONFIG_LIBFC=m CONFIG_LIBFCOE=m CONFIG_FCOE=m CONFIG_FCOE_FNIC=m # CONFIG_SCSI_SNIC is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_FDOMAIN_PCI is not set # CONFIG_SCSI_GDTH is not set CONFIG_SCSI_ISCI=m # CONFIG_SCSI_IPS is not set CONFIG_SCSI_INITIO=m # CONFIG_SCSI_INIA100 is not set # CONFIG_SCSI_PPA is not set # CONFIG_SCSI_IMM is not set CONFIG_SCSI_STEX=m # CONFIG_SCSI_SYM53C8XX_2 is not set # CONFIG_SCSI_IPR is not set # CONFIG_SCSI_QLOGIC_1280 is not set CONFIG_SCSI_QLA_FC=m CONFIG_TCM_QLA2XXX=m # CONFIG_TCM_QLA2XXX_DEBUG is not set CONFIG_SCSI_QLA_ISCSI=m # CONFIG_QEDI is not set # CONFIG_QEDF is not set # CONFIG_SCSI_LPFC is not set # CONFIG_SCSI_DC395x is not set # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_WD719X is not set CONFIG_SCSI_DEBUG=m CONFIG_SCSI_PMCRAID=m CONFIG_SCSI_PM8001=m # CONFIG_SCSI_BFA_FC is not set CONFIG_SCSI_VIRTIO=m # CONFIG_SCSI_CHELSIO_FCOE is not set CONFIG_SCSI_DH=y CONFIG_SCSI_DH_RDAC=y CONFIG_SCSI_DH_HP_SW=y CONFIG_SCSI_DH_EMC=y CONFIG_SCSI_DH_ALUA=y # end of SCSI device support CONFIG_ATA=m CONFIG_SATA_HOST=y CONFIG_PATA_TIMINGS=y CONFIG_ATA_VERBOSE_ERROR=y CONFIG_ATA_FORCE=y CONFIG_ATA_ACPI=y # CONFIG_SATA_ZPODD is not set CONFIG_SATA_PMP=y # # Controllers with non-SFF native interface # CONFIG_SATA_AHCI=m CONFIG_SATA_MOBILE_LPM_POLICY=0 CONFIG_SATA_AHCI_PLATFORM=m # CONFIG_SATA_INIC162X is not set CONFIG_SATA_ACARD_AHCI=m CONFIG_SATA_SIL24=m CONFIG_ATA_SFF=y # # SFF controllers with custom DMA interface # CONFIG_PDC_ADMA=m CONFIG_SATA_QSTOR=m CONFIG_SATA_SX4=m CONFIG_ATA_BMDMA=y # # SATA SFF controllers with BMDMA # CONFIG_ATA_PIIX=m # CONFIG_SATA_DWC is not set CONFIG_SATA_MV=m CONFIG_SATA_NV=m CONFIG_SATA_PROMISE=m CONFIG_SATA_SIL=m CONFIG_SATA_SIS=m CONFIG_SATA_SVW=m CONFIG_SATA_ULI=m CONFIG_SATA_VIA=m CONFIG_SATA_VITESSE=m # # PATA SFF controllers with BMDMA # CONFIG_PATA_ALI=m CONFIG_PATA_AMD=m CONFIG_PATA_ARTOP=m CONFIG_PATA_ATIIXP=m CONFIG_PATA_ATP867X=m CONFIG_PATA_CMD64X=m # CONFIG_PATA_CYPRESS is not set # CONFIG_PATA_EFAR is not set CONFIG_PATA_HPT366=m CONFIG_PATA_HPT37X=m CONFIG_PATA_HPT3X2N=m CONFIG_PATA_HPT3X3=m # CONFIG_PATA_HPT3X3_DMA is not set CONFIG_PATA_IT8213=m CONFIG_PATA_IT821X=m CONFIG_PATA_JMICRON=m CONFIG_PATA_MARVELL=m CONFIG_PATA_NETCELL=m CONFIG_PATA_NINJA32=m # CONFIG_PATA_NS87415 is not set CONFIG_PATA_OLDPIIX=m # CONFIG_PATA_OPTIDMA is not set CONFIG_PATA_PDC2027X=m CONFIG_PATA_PDC_OLD=m # CONFIG_PATA_RADISYS is not set CONFIG_PATA_RDC=m CONFIG_PATA_SCH=m CONFIG_PATA_SERVERWORKS=m CONFIG_PATA_SIL680=m CONFIG_PATA_SIS=m CONFIG_PATA_TOSHIBA=m # CONFIG_PATA_TRIFLEX is not set CONFIG_PATA_VIA=m # CONFIG_PATA_WINBOND is not set # # PIO-only SFF controllers # # CONFIG_PATA_CMD640_PCI is not set # CONFIG_PATA_MPIIX is not set # CONFIG_PATA_NS87410 is not set # CONFIG_PATA_OPTI is not set # CONFIG_PATA_RZ1000 is not set # # Generic fallback / legacy drivers # CONFIG_PATA_ACPI=m CONFIG_ATA_GENERIC=m # CONFIG_PATA_LEGACY is not set CONFIG_MD=y CONFIG_BLK_DEV_MD=y CONFIG_MD_AUTODETECT=y CONFIG_MD_LINEAR=m CONFIG_MD_RAID0=m CONFIG_MD_RAID1=m CONFIG_MD_RAID10=m CONFIG_MD_RAID456=m CONFIG_MD_MULTIPATH=m CONFIG_MD_FAULTY=m # CONFIG_MD_CLUSTER is not set # CONFIG_BCACHE is not set CONFIG_BLK_DEV_DM_BUILTIN=y CONFIG_BLK_DEV_DM=m CONFIG_DM_DEBUG=y CONFIG_DM_BUFIO=m # CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set CONFIG_DM_BIO_PRISON=m CONFIG_DM_PERSISTENT_DATA=m # CONFIG_DM_UNSTRIPED is not set CONFIG_DM_CRYPT=m CONFIG_DM_SNAPSHOT=m CONFIG_DM_THIN_PROVISIONING=m CONFIG_DM_CACHE=m CONFIG_DM_CACHE_SMQ=m # CONFIG_DM_WRITECACHE is not set CONFIG_DM_ERA=m # CONFIG_DM_CLONE is not set CONFIG_DM_MIRROR=m CONFIG_DM_LOG_USERSPACE=m CONFIG_DM_RAID=m CONFIG_DM_ZERO=m CONFIG_DM_MULTIPATH=m CONFIG_DM_MULTIPATH_QL=m CONFIG_DM_MULTIPATH_ST=m CONFIG_DM_DELAY=m # CONFIG_DM_DUST is not set CONFIG_DM_UEVENT=y CONFIG_DM_FLAKEY=m CONFIG_DM_VERITY=m # CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG is not set # CONFIG_DM_VERITY_FEC is not set CONFIG_DM_SWITCH=m CONFIG_DM_LOG_WRITES=m # CONFIG_DM_INTEGRITY is not set # CONFIG_DM_ZONED is not set CONFIG_TARGET_CORE=m CONFIG_TCM_IBLOCK=m CONFIG_TCM_FILEIO=m CONFIG_TCM_PSCSI=m CONFIG_TCM_USER2=m CONFIG_LOOPBACK_TARGET=m CONFIG_TCM_FC=m CONFIG_ISCSI_TARGET=m CONFIG_ISCSI_TARGET_CXGB4=m # CONFIG_SBP_TARGET is not set CONFIG_FUSION=y CONFIG_FUSION_SPI=m # CONFIG_FUSION_FC is not set CONFIG_FUSION_SAS=m CONFIG_FUSION_MAX_SGE=128 CONFIG_FUSION_CTL=m CONFIG_FUSION_LOGGING=y # # IEEE 1394 (FireWire) support # CONFIG_FIREWIRE=m CONFIG_FIREWIRE_OHCI=m CONFIG_FIREWIRE_SBP2=m CONFIG_FIREWIRE_NET=m # CONFIG_FIREWIRE_NOSY is not set # end of IEEE 1394 (FireWire) support CONFIG_MACINTOSH_DRIVERS=y CONFIG_MAC_EMUMOUSEBTN=y CONFIG_NETDEVICES=y CONFIG_MII=y CONFIG_NET_CORE=y CONFIG_BONDING=m CONFIG_DUMMY=m # CONFIG_WIREGUARD is not set # CONFIG_EQUALIZER is not set CONFIG_NET_FC=y CONFIG_IFB=m CONFIG_NET_TEAM=m CONFIG_NET_TEAM_MODE_BROADCAST=m CONFIG_NET_TEAM_MODE_ROUNDROBIN=m CONFIG_NET_TEAM_MODE_RANDOM=m CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m CONFIG_NET_TEAM_MODE_LOADBALANCE=m CONFIG_MACVLAN=m CONFIG_MACVTAP=m # CONFIG_IPVLAN is not set CONFIG_VXLAN=m CONFIG_GENEVE=m # CONFIG_BAREUDP is not set # CONFIG_GTP is not set CONFIG_MACSEC=m CONFIG_NETCONSOLE=m CONFIG_NETCONSOLE_DYNAMIC=y CONFIG_NETPOLL=y CONFIG_NET_POLL_CONTROLLER=y CONFIG_NTB_NETDEV=m CONFIG_TUN=m CONFIG_TAP=m # CONFIG_TUN_VNET_CROSS_LE is not set CONFIG_VETH=m CONFIG_VIRTIO_NET=m CONFIG_NLMON=m CONFIG_VSOCKMON=m # CONFIG_ARCNET is not set # CONFIG_ATM_DRIVERS is not set # # Distributed Switch Architecture drivers # # end of Distributed Switch Architecture drivers CONFIG_ETHERNET=y CONFIG_MDIO=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set CONFIG_NET_VENDOR_AGERE=y # CONFIG_ET131X is not set CONFIG_NET_VENDOR_ALACRITECH=y # CONFIG_SLICOSS is not set # CONFIG_NET_VENDOR_ALTEON is not set # CONFIG_ALTERA_TSE is not set CONFIG_NET_VENDOR_AMAZON=y CONFIG_ENA_ETHERNET=m CONFIG_NET_VENDOR_AMD=y CONFIG_AMD8111_ETH=m CONFIG_PCNET32=m CONFIG_AMD_XGBE=m # CONFIG_AMD_XGBE_DCB is not set CONFIG_AMD_XGBE_HAVE_ECC=y CONFIG_NET_VENDOR_AQUANTIA=y CONFIG_AQTION=m CONFIG_NET_VENDOR_ARC=y CONFIG_NET_VENDOR_ATHEROS=y CONFIG_ATL2=m CONFIG_ATL1=m CONFIG_ATL1E=m CONFIG_ATL1C=m CONFIG_ALX=m CONFIG_NET_VENDOR_AURORA=y # CONFIG_AURORA_NB8800 is not set CONFIG_NET_VENDOR_BROADCOM=y CONFIG_B44=m CONFIG_B44_PCI_AUTOSELECT=y CONFIG_B44_PCICORE_AUTOSELECT=y CONFIG_B44_PCI=y # CONFIG_BCMGENET is not set CONFIG_BNX2=m CONFIG_CNIC=m CONFIG_TIGON3=y CONFIG_TIGON3_HWMON=y CONFIG_BNX2X=m CONFIG_BNX2X_SRIOV=y # CONFIG_SYSTEMPORT is not set CONFIG_BNXT=m CONFIG_BNXT_SRIOV=y CONFIG_BNXT_FLOWER_OFFLOAD=y CONFIG_BNXT_DCB=y CONFIG_BNXT_HWMON=y CONFIG_NET_VENDOR_BROCADE=y CONFIG_BNA=m CONFIG_NET_VENDOR_CADENCE=y CONFIG_MACB=m CONFIG_MACB_USE_HWSTAMP=y # CONFIG_MACB_PCI is not set CONFIG_NET_VENDOR_CAVIUM=y # CONFIG_THUNDER_NIC_PF is not set # CONFIG_THUNDER_NIC_VF is not set # CONFIG_THUNDER_NIC_BGX is not set # CONFIG_THUNDER_NIC_RGX is not set CONFIG_CAVIUM_PTP=y CONFIG_LIQUIDIO=m CONFIG_LIQUIDIO_VF=m CONFIG_NET_VENDOR_CHELSIO=y # CONFIG_CHELSIO_T1 is not set CONFIG_CHELSIO_T3=m CONFIG_CHELSIO_T4=m # CONFIG_CHELSIO_T4_DCB is not set CONFIG_CHELSIO_T4VF=m CONFIG_CHELSIO_LIB=m CONFIG_NET_VENDOR_CISCO=y CONFIG_ENIC=m CONFIG_NET_VENDOR_CORTINA=y # CONFIG_CX_ECAT is not set CONFIG_DNET=m CONFIG_NET_VENDOR_DEC=y CONFIG_NET_TULIP=y CONFIG_DE2104X=m CONFIG_DE2104X_DSL=0 CONFIG_TULIP=y # CONFIG_TULIP_MWI is not set CONFIG_TULIP_MMIO=y # CONFIG_TULIP_NAPI is not set CONFIG_DE4X5=m CONFIG_WINBOND_840=m CONFIG_DM9102=m CONFIG_ULI526X=m CONFIG_PCMCIA_XIRCOM=m # CONFIG_NET_VENDOR_DLINK is not set CONFIG_NET_VENDOR_EMULEX=y CONFIG_BE2NET=m CONFIG_BE2NET_HWMON=y CONFIG_BE2NET_BE2=y CONFIG_BE2NET_BE3=y CONFIG_BE2NET_LANCER=y CONFIG_BE2NET_SKYHAWK=y CONFIG_NET_VENDOR_EZCHIP=y CONFIG_NET_VENDOR_GOOGLE=y # CONFIG_GVE is not set CONFIG_NET_VENDOR_HUAWEI=y # CONFIG_HINIC is not set # CONFIG_NET_VENDOR_I825XX is not set CONFIG_NET_VENDOR_INTEL=y # CONFIG_E100 is not set CONFIG_E1000=y CONFIG_E1000E=y CONFIG_E1000E_HWTS=y CONFIG_IGB=y CONFIG_IGB_HWMON=y CONFIG_IGBVF=m # CONFIG_IXGB is not set CONFIG_IXGBE=y CONFIG_IXGBE_HWMON=y CONFIG_IXGBE_DCB=y CONFIG_IXGBEVF=m CONFIG_I40E=y CONFIG_I40E_DCB=y CONFIG_IAVF=m CONFIG_I40EVF=m # CONFIG_ICE is not set CONFIG_FM10K=m # CONFIG_IGC is not set CONFIG_JME=m CONFIG_NET_VENDOR_MARVELL=y CONFIG_MVMDIO=m CONFIG_SKGE=y # CONFIG_SKGE_DEBUG is not set CONFIG_SKGE_GENESIS=y CONFIG_SKY2=m # CONFIG_SKY2_DEBUG is not set CONFIG_NET_VENDOR_MELLANOX=y CONFIG_MLX4_EN=m CONFIG_MLX4_EN_DCB=y CONFIG_MLX4_CORE=m CONFIG_MLX4_DEBUG=y CONFIG_MLX4_CORE_GEN2=y # CONFIG_MLX5_CORE is not set # CONFIG_MLXSW_CORE is not set # CONFIG_MLXFW is not set # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set CONFIG_NET_VENDOR_MICROSEMI=y # CONFIG_MSCC_OCELOT_SWITCH is not set CONFIG_NET_VENDOR_MYRI=y CONFIG_MYRI10GE=m CONFIG_MYRI10GE_DCA=y # CONFIG_FEALNX is not set # CONFIG_NET_VENDOR_NATSEMI is not set CONFIG_NET_VENDOR_NETERION=y # CONFIG_S2IO is not set # CONFIG_VXGE is not set CONFIG_NET_VENDOR_NETRONOME=y CONFIG_NFP=m CONFIG_NFP_APP_FLOWER=y CONFIG_NFP_APP_ABM_NIC=y # CONFIG_NFP_DEBUG is not set CONFIG_NET_VENDOR_NI=y # CONFIG_NI_XGE_MANAGEMENT_ENET is not set # CONFIG_NET_VENDOR_NVIDIA is not set CONFIG_NET_VENDOR_OKI=y CONFIG_ETHOC=m CONFIG_NET_VENDOR_PACKET_ENGINES=y # CONFIG_HAMACHI is not set CONFIG_YELLOWFIN=m CONFIG_NET_VENDOR_PENSANDO=y # CONFIG_IONIC is not set CONFIG_NET_VENDOR_QLOGIC=y CONFIG_QLA3XXX=m CONFIG_QLCNIC=m CONFIG_QLCNIC_SRIOV=y CONFIG_QLCNIC_DCB=y CONFIG_QLCNIC_HWMON=y CONFIG_NETXEN_NIC=m CONFIG_QED=m CONFIG_QED_SRIOV=y CONFIG_QEDE=m CONFIG_NET_VENDOR_QUALCOMM=y # CONFIG_QCOM_EMAC is not set # CONFIG_RMNET is not set # CONFIG_NET_VENDOR_RDC is not set CONFIG_NET_VENDOR_REALTEK=y # CONFIG_ATP is not set CONFIG_8139CP=y CONFIG_8139TOO=y # CONFIG_8139TOO_PIO is not set # CONFIG_8139TOO_TUNE_TWISTER is not set CONFIG_8139TOO_8129=y # CONFIG_8139_OLD_RX_RESET is not set CONFIG_R8169=y CONFIG_NET_VENDOR_RENESAS=y CONFIG_NET_VENDOR_ROCKER=y CONFIG_ROCKER=m CONFIG_NET_VENDOR_SAMSUNG=y # CONFIG_SXGBE_ETH is not set # CONFIG_NET_VENDOR_SEEQ is not set CONFIG_NET_VENDOR_SOLARFLARE=y CONFIG_SFC=m CONFIG_SFC_MTD=y CONFIG_SFC_MCDI_MON=y CONFIG_SFC_SRIOV=y CONFIG_SFC_MCDI_LOGGING=y CONFIG_SFC_FALCON=m CONFIG_SFC_FALCON_MTD=y # CONFIG_NET_VENDOR_SILAN is not set # CONFIG_NET_VENDOR_SIS is not set CONFIG_NET_VENDOR_SMSC=y CONFIG_EPIC100=m # CONFIG_SMSC911X is not set CONFIG_SMSC9420=m CONFIG_NET_VENDOR_SOCIONEXT=y # CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_SUN is not set CONFIG_NET_VENDOR_SYNOPSYS=y # CONFIG_DWC_XLGMAC is not set # CONFIG_NET_VENDOR_TEHUTI is not set CONFIG_NET_VENDOR_TI=y # CONFIG_TI_CPSW_PHY_SEL is not set CONFIG_TLAN=m # CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_WIZNET is not set CONFIG_NET_VENDOR_XILINX=y # CONFIG_XILINX_AXI_EMAC is not set # CONFIG_XILINX_LL_TEMAC is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set # CONFIG_NET_SB1000 is not set CONFIG_MDIO_DEVICE=y CONFIG_MDIO_BUS=y # CONFIG_MDIO_BCM_UNIMAC is not set CONFIG_MDIO_BITBANG=m # CONFIG_MDIO_GPIO is not set # CONFIG_MDIO_MSCC_MIIM is not set # CONFIG_MDIO_MVUSB is not set # CONFIG_MDIO_THUNDER is not set # CONFIG_MDIO_XPCS is not set CONFIG_PHYLINK=m CONFIG_PHYLIB=y CONFIG_SWPHY=y # CONFIG_LED_TRIGGER_PHY is not set # # MII PHY device drivers # # CONFIG_SFP is not set # CONFIG_ADIN_PHY is not set CONFIG_AMD_PHY=m # CONFIG_AQUANTIA_PHY is not set # CONFIG_AX88796B_PHY is not set # CONFIG_BCM7XXX_PHY is not set CONFIG_BCM87XX_PHY=m CONFIG_BCM_NET_PHYLIB=m CONFIG_BROADCOM_PHY=m # CONFIG_BCM84881_PHY is not set CONFIG_CICADA_PHY=m # CONFIG_CORTINA_PHY is not set CONFIG_DAVICOM_PHY=m # CONFIG_DP83822_PHY is not set # CONFIG_DP83TC811_PHY is not set # CONFIG_DP83848_PHY is not set # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set CONFIG_FIXED_PHY=y CONFIG_ICPLUS_PHY=m # CONFIG_INTEL_XWAY_PHY is not set CONFIG_LSI_ET1011C_PHY=m CONFIG_LXT_PHY=m CONFIG_MARVELL_PHY=m # CONFIG_MARVELL_10G_PHY is not set CONFIG_MICREL_PHY=m # CONFIG_MICROCHIP_PHY is not set # CONFIG_MICROCHIP_T1_PHY is not set # CONFIG_MICROSEMI_PHY is not set CONFIG_NATIONAL_PHY=m # CONFIG_NXP_TJA11XX_PHY is not set CONFIG_QSEMI_PHY=m CONFIG_REALTEK_PHY=y # CONFIG_RENESAS_PHY is not set # CONFIG_ROCKCHIP_PHY is not set CONFIG_SMSC_PHY=m CONFIG_STE10XP=m # CONFIG_TERANETICS_PHY is not set CONFIG_VITESSE_PHY=m # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set # CONFIG_PLIP is not set CONFIG_PPP=m CONFIG_PPP_BSDCOMP=m CONFIG_PPP_DEFLATE=m CONFIG_PPP_FILTER=y CONFIG_PPP_MPPE=m CONFIG_PPP_MULTILINK=y CONFIG_PPPOATM=m CONFIG_PPPOE=m CONFIG_PPTP=m CONFIG_PPPOL2TP=m CONFIG_PPP_ASYNC=m CONFIG_PPP_SYNC_TTY=m CONFIG_SLIP=m CONFIG_SLHC=m CONFIG_SLIP_COMPRESSED=y CONFIG_SLIP_SMART=y # CONFIG_SLIP_MODE_SLIP6 is not set CONFIG_USB_NET_DRIVERS=y CONFIG_USB_CATC=y CONFIG_USB_KAWETH=y CONFIG_USB_PEGASUS=y CONFIG_USB_RTL8150=y CONFIG_USB_RTL8152=m # CONFIG_USB_LAN78XX is not set CONFIG_USB_USBNET=y CONFIG_USB_NET_AX8817X=y CONFIG_USB_NET_AX88179_178A=m CONFIG_USB_NET_CDCETHER=y CONFIG_USB_NET_CDC_EEM=y CONFIG_USB_NET_CDC_NCM=m CONFIG_USB_NET_HUAWEI_CDC_NCM=m CONFIG_USB_NET_CDC_MBIM=m CONFIG_USB_NET_DM9601=y # CONFIG_USB_NET_SR9700 is not set # CONFIG_USB_NET_SR9800 is not set CONFIG_USB_NET_SMSC75XX=y CONFIG_USB_NET_SMSC95XX=y CONFIG_USB_NET_GL620A=y CONFIG_USB_NET_NET1080=y CONFIG_USB_NET_PLUSB=y CONFIG_USB_NET_MCS7830=y CONFIG_USB_NET_RNDIS_HOST=y CONFIG_USB_NET_CDC_SUBSET_ENABLE=y CONFIG_USB_NET_CDC_SUBSET=y CONFIG_USB_ALI_M5632=y CONFIG_USB_AN2720=y CONFIG_USB_BELKIN=y CONFIG_USB_ARMLINUX=y CONFIG_USB_EPSON2888=y CONFIG_USB_KC2190=y CONFIG_USB_NET_ZAURUS=y CONFIG_USB_NET_CX82310_ETH=m CONFIG_USB_NET_KALMIA=m CONFIG_USB_NET_QMI_WWAN=m CONFIG_USB_HSO=m CONFIG_USB_NET_INT51X1=y CONFIG_USB_IPHETH=y CONFIG_USB_SIERRA_NET=y CONFIG_USB_VL600=m # CONFIG_USB_NET_CH9200 is not set # CONFIG_USB_NET_AQC111 is not set CONFIG_WLAN=y CONFIG_WLAN_VENDOR_ADMTEK=y # CONFIG_ADM8211 is not set CONFIG_ATH_COMMON=m CONFIG_WLAN_VENDOR_ATH=y # CONFIG_ATH_DEBUG is not set # CONFIG_ATH5K is not set # CONFIG_ATH5K_PCI is not set CONFIG_ATH9K_HW=m CONFIG_ATH9K_COMMON=m CONFIG_ATH9K_BTCOEX_SUPPORT=y # CONFIG_ATH9K is not set CONFIG_ATH9K_HTC=m # CONFIG_ATH9K_HTC_DEBUGFS is not set # CONFIG_CARL9170 is not set # CONFIG_ATH6KL is not set # CONFIG_AR5523 is not set # CONFIG_WIL6210 is not set # CONFIG_ATH10K is not set # CONFIG_WCN36XX is not set CONFIG_WLAN_VENDOR_ATMEL=y # CONFIG_ATMEL is not set # CONFIG_AT76C50X_USB is not set CONFIG_WLAN_VENDOR_BROADCOM=y # CONFIG_B43 is not set # CONFIG_B43LEGACY is not set # CONFIG_BRCMSMAC is not set # CONFIG_BRCMFMAC is not set CONFIG_WLAN_VENDOR_CISCO=y # CONFIG_AIRO is not set CONFIG_WLAN_VENDOR_INTEL=y # CONFIG_IPW2100 is not set # CONFIG_IPW2200 is not set CONFIG_IWLEGACY=m CONFIG_IWL4965=m CONFIG_IWL3945=m # # iwl3945 / iwl4965 Debugging Options # CONFIG_IWLEGACY_DEBUG=y CONFIG_IWLEGACY_DEBUGFS=y # end of iwl3945 / iwl4965 Debugging Options CONFIG_IWLWIFI=m CONFIG_IWLWIFI_LEDS=y CONFIG_IWLDVM=m CONFIG_IWLMVM=m CONFIG_IWLWIFI_OPMODE_MODULAR=y # CONFIG_IWLWIFI_BCAST_FILTERING is not set # # Debugging Options # # CONFIG_IWLWIFI_DEBUG is not set CONFIG_IWLWIFI_DEBUGFS=y # CONFIG_IWLWIFI_DEVICE_TRACING is not set # end of Debugging Options CONFIG_WLAN_VENDOR_INTERSIL=y # CONFIG_HOSTAP is not set # CONFIG_HERMES is not set # CONFIG_P54_COMMON is not set # CONFIG_PRISM54 is not set CONFIG_WLAN_VENDOR_MARVELL=y # CONFIG_LIBERTAS is not set # CONFIG_LIBERTAS_THINFIRM is not set # CONFIG_MWIFIEX is not set # CONFIG_MWL8K is not set CONFIG_WLAN_VENDOR_MEDIATEK=y # CONFIG_MT7601U is not set # CONFIG_MT76x0U is not set # CONFIG_MT76x0E is not set # CONFIG_MT76x2E is not set # CONFIG_MT76x2U is not set # CONFIG_MT7603E is not set # CONFIG_MT7615E is not set CONFIG_WLAN_VENDOR_RALINK=y # CONFIG_RT2X00 is not set CONFIG_WLAN_VENDOR_REALTEK=y # CONFIG_RTL8180 is not set # CONFIG_RTL8187 is not set # CONFIG_RTL_CARDS is not set # CONFIG_RTL8XXXU is not set # CONFIG_RTW88 is not set CONFIG_WLAN_VENDOR_RSI=y # CONFIG_RSI_91X is not set CONFIG_WLAN_VENDOR_ST=y # CONFIG_CW1200 is not set CONFIG_WLAN_VENDOR_TI=y # CONFIG_WL1251 is not set # CONFIG_WL12XX is not set # CONFIG_WL18XX is not set # CONFIG_WLCORE is not set CONFIG_WLAN_VENDOR_ZYDAS=y # CONFIG_USB_ZD1201 is not set # CONFIG_ZD1211RW is not set CONFIG_WLAN_VENDOR_QUANTENNA=y # CONFIG_QTNFMAC_PCIE is not set CONFIG_MAC80211_HWSIM=m # CONFIG_USB_NET_RNDIS_WLAN is not set # CONFIG_VIRT_WIFI is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers # CONFIG_WAN=y # CONFIG_LANMEDIA is not set CONFIG_HDLC=m CONFIG_HDLC_RAW=m # CONFIG_HDLC_RAW_ETH is not set CONFIG_HDLC_CISCO=m CONFIG_HDLC_FR=m CONFIG_HDLC_PPP=m # # X.25/LAPB support is disabled # # CONFIG_PCI200SYN is not set # CONFIG_WANXL is not set # CONFIG_PC300TOO is not set # CONFIG_FARSYNC is not set CONFIG_DLCI=m CONFIG_DLCI_MAX=8 # CONFIG_SBNI is not set CONFIG_IEEE802154_DRIVERS=m CONFIG_IEEE802154_FAKELB=m # CONFIG_IEEE802154_AT86RF230 is not set # CONFIG_IEEE802154_MRF24J40 is not set # CONFIG_IEEE802154_CC2520 is not set # CONFIG_IEEE802154_ATUSB is not set # CONFIG_IEEE802154_ADF7242 is not set # CONFIG_IEEE802154_CA8210 is not set # CONFIG_IEEE802154_MCR20A is not set # CONFIG_IEEE802154_HWSIM is not set CONFIG_XEN_NETDEV_FRONTEND=m CONFIG_VMXNET3=m CONFIG_FUJITSU_ES=m CONFIG_HYPERV_NET=m CONFIG_NETDEVSIM=m CONFIG_NET_FAILOVER=m CONFIG_ISDN=y CONFIG_ISDN_CAPI=y CONFIG_CAPI_TRACE=y CONFIG_ISDN_CAPI_MIDDLEWARE=y CONFIG_MISDN=m CONFIG_MISDN_DSP=m CONFIG_MISDN_L1OIP=m # # mISDN hardware drivers # CONFIG_MISDN_HFCPCI=m CONFIG_MISDN_HFCMULTI=m CONFIG_MISDN_HFCUSB=m CONFIG_MISDN_AVMFRITZ=m CONFIG_MISDN_SPEEDFAX=m CONFIG_MISDN_INFINEON=m CONFIG_MISDN_W6692=m CONFIG_MISDN_NETJET=m CONFIG_MISDN_HDLC=m CONFIG_MISDN_IPAC=m CONFIG_MISDN_ISAR=m CONFIG_NVM=y # CONFIG_NVM_PBLK is not set # # Input device support # CONFIG_INPUT=y CONFIG_INPUT_LEDS=y CONFIG_INPUT_FF_MEMLESS=y CONFIG_INPUT_POLLDEV=m CONFIG_INPUT_SPARSEKMAP=m # CONFIG_INPUT_MATRIXKMAP is not set # # Userland interfaces # CONFIG_INPUT_MOUSEDEV=y # CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 CONFIG_INPUT_JOYDEV=m CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_EVBUG is not set # # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y # CONFIG_KEYBOARD_ADC is not set # CONFIG_KEYBOARD_ADP5588 is not set # CONFIG_KEYBOARD_ADP5589 is not set # CONFIG_KEYBOARD_APPLESPI is not set CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_QT1050 is not set # CONFIG_KEYBOARD_QT1070 is not set # CONFIG_KEYBOARD_QT2160 is not set # CONFIG_KEYBOARD_DLINK_DIR685 is not set # CONFIG_KEYBOARD_LKKBD is not set # CONFIG_KEYBOARD_GPIO is not set # CONFIG_KEYBOARD_GPIO_POLLED is not set # CONFIG_KEYBOARD_TCA6416 is not set # CONFIG_KEYBOARD_TCA8418 is not set # CONFIG_KEYBOARD_MATRIX is not set # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set # CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_SAMSUNG is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_KEYBOARD_TM2_TOUCHKEY is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y CONFIG_MOUSE_PS2_ALPS=y CONFIG_MOUSE_PS2_BYD=y CONFIG_MOUSE_PS2_LOGIPS2PP=y CONFIG_MOUSE_PS2_SYNAPTICS=y CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y CONFIG_MOUSE_PS2_CYPRESS=y CONFIG_MOUSE_PS2_LIFEBOOK=y CONFIG_MOUSE_PS2_TRACKPOINT=y CONFIG_MOUSE_PS2_ELANTECH=y CONFIG_MOUSE_PS2_ELANTECH_SMBUS=y CONFIG_MOUSE_PS2_SENTELIC=y # CONFIG_MOUSE_PS2_TOUCHKIT is not set CONFIG_MOUSE_PS2_FOCALTECH=y CONFIG_MOUSE_PS2_VMMOUSE=y CONFIG_MOUSE_PS2_SMBUS=y CONFIG_MOUSE_SERIAL=m CONFIG_MOUSE_APPLETOUCH=m CONFIG_MOUSE_BCM5974=m CONFIG_MOUSE_CYAPA=m # CONFIG_MOUSE_ELAN_I2C is not set CONFIG_MOUSE_VSXXXAA=m # CONFIG_MOUSE_GPIO is not set CONFIG_MOUSE_SYNAPTICS_I2C=m CONFIG_MOUSE_SYNAPTICS_USB=m # CONFIG_INPUT_JOYSTICK is not set CONFIG_INPUT_TABLET=y CONFIG_TABLET_USB_ACECAD=m CONFIG_TABLET_USB_AIPTEK=m CONFIG_TABLET_USB_GTCO=m # CONFIG_TABLET_USB_HANWANG is not set CONFIG_TABLET_USB_KBTAB=m # CONFIG_TABLET_USB_PEGASUS is not set # CONFIG_TABLET_SERIAL_WACOM4 is not set CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_PROPERTIES=y # CONFIG_TOUCHSCREEN_ADS7846 is not set # CONFIG_TOUCHSCREEN_AD7877 is not set # CONFIG_TOUCHSCREEN_AD7879 is not set # CONFIG_TOUCHSCREEN_ADC is not set # CONFIG_TOUCHSCREEN_ATMEL_MXT is not set # CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set # CONFIG_TOUCHSCREEN_BU21013 is not set # CONFIG_TOUCHSCREEN_BU21029 is not set # CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set # CONFIG_TOUCHSCREEN_DYNAPRO is not set # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set # CONFIG_TOUCHSCREEN_EETI is not set # CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set # CONFIG_TOUCHSCREEN_EXC3000 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GOODIX is not set # CONFIG_TOUCHSCREEN_HIDEEP is not set # CONFIG_TOUCHSCREEN_ILI210X is not set # CONFIG_TOUCHSCREEN_S6SY761 is not set # CONFIG_TOUCHSCREEN_GUNZE is not set # CONFIG_TOUCHSCREEN_EKTF2127 is not set # CONFIG_TOUCHSCREEN_ELAN is not set CONFIG_TOUCHSCREEN_ELO=m CONFIG_TOUCHSCREEN_WACOM_W8001=m CONFIG_TOUCHSCREEN_WACOM_I2C=m # CONFIG_TOUCHSCREEN_MAX11801 is not set # CONFIG_TOUCHSCREEN_MCS5000 is not set # CONFIG_TOUCHSCREEN_MMS114 is not set # CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set # CONFIG_TOUCHSCREEN_MTOUCH is not set # CONFIG_TOUCHSCREEN_INEXIO is not set # CONFIG_TOUCHSCREEN_MK712 is not set # CONFIG_TOUCHSCREEN_PENMOUNT is not set # CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set # CONFIG_TOUCHSCREEN_TOUCHWIN is not set # CONFIG_TOUCHSCREEN_PIXCIR is not set # CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set # CONFIG_TOUCHSCREEN_WM97XX is not set # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set # CONFIG_TOUCHSCREEN_TSC_SERIO is not set # CONFIG_TOUCHSCREEN_TSC2004 is not set # CONFIG_TOUCHSCREEN_TSC2005 is not set # CONFIG_TOUCHSCREEN_TSC2007 is not set # CONFIG_TOUCHSCREEN_RM_TS is not set # CONFIG_TOUCHSCREEN_SILEAD is not set # CONFIG_TOUCHSCREEN_SIS_I2C is not set # CONFIG_TOUCHSCREEN_ST1232 is not set # CONFIG_TOUCHSCREEN_STMFTS is not set # CONFIG_TOUCHSCREEN_SUR40 is not set # CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set # CONFIG_TOUCHSCREEN_SX8654 is not set # CONFIG_TOUCHSCREEN_TPS6507X is not set # CONFIG_TOUCHSCREEN_ZET6223 is not set # CONFIG_TOUCHSCREEN_ZFORCE is not set # CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set # CONFIG_TOUCHSCREEN_IQS5XX is not set CONFIG_INPUT_MISC=y # CONFIG_INPUT_AD714X is not set # CONFIG_INPUT_BMA150 is not set # CONFIG_INPUT_E3X0_BUTTON is not set # CONFIG_INPUT_MSM_VIBRATOR is not set CONFIG_INPUT_PCSPKR=m # CONFIG_INPUT_MMA8450 is not set CONFIG_INPUT_APANEL=m CONFIG_INPUT_GP2A=m # CONFIG_INPUT_GPIO_BEEPER is not set # CONFIG_INPUT_GPIO_DECODER is not set # CONFIG_INPUT_GPIO_VIBRA is not set CONFIG_INPUT_ATLAS_BTNS=m CONFIG_INPUT_ATI_REMOTE2=m CONFIG_INPUT_KEYSPAN_REMOTE=m # CONFIG_INPUT_KXTJ9 is not set CONFIG_INPUT_POWERMATE=m CONFIG_INPUT_YEALINK=m CONFIG_INPUT_CM109=m CONFIG_INPUT_UINPUT=m # CONFIG_INPUT_PCF8574 is not set # CONFIG_INPUT_PWM_BEEPER is not set # CONFIG_INPUT_PWM_VIBRA is not set CONFIG_INPUT_GPIO_ROTARY_ENCODER=m # CONFIG_INPUT_ADXL34X is not set # CONFIG_INPUT_IMS_PCU is not set # CONFIG_INPUT_CMA3000 is not set CONFIG_INPUT_XEN_KBDDEV_FRONTEND=m # CONFIG_INPUT_IDEAPAD_SLIDEBAR is not set # CONFIG_INPUT_DRV260X_HAPTICS is not set # CONFIG_INPUT_DRV2665_HAPTICS is not set # CONFIG_INPUT_DRV2667_HAPTICS is not set CONFIG_RMI4_CORE=m # CONFIG_RMI4_I2C is not set # CONFIG_RMI4_SPI is not set CONFIG_RMI4_SMB=m CONFIG_RMI4_F03=y CONFIG_RMI4_F03_SERIO=m CONFIG_RMI4_2D_SENSOR=y CONFIG_RMI4_F11=y CONFIG_RMI4_F12=y CONFIG_RMI4_F30=y # CONFIG_RMI4_F34 is not set # CONFIG_RMI4_F54 is not set # CONFIG_RMI4_F55 is not set # # Hardware I/O ports # CONFIG_SERIO=y CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y CONFIG_SERIO_I8042=y CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set # CONFIG_SERIO_PARKBD is not set # CONFIG_SERIO_PCIPS2 is not set CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_RAW=m CONFIG_SERIO_ALTERA_PS2=m # CONFIG_SERIO_PS2MULT is not set CONFIG_SERIO_ARC_PS2=m CONFIG_HYPERV_KEYBOARD=m # CONFIG_SERIO_GPIO_PS2 is not set # CONFIG_USERIO is not set # CONFIG_GAMEPORT is not set # end of Hardware I/O ports # end of Input device support # # Character devices # CONFIG_TTY=y CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set CONFIG_LDISC_AUTOLOAD=y # # Serial drivers # CONFIG_SERIAL_EARLYCON=y CONFIG_SERIAL_8250=y # CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set CONFIG_SERIAL_8250_PNP=y # CONFIG_SERIAL_8250_16550A_VARIANTS is not set # CONFIG_SERIAL_8250_FINTEK is not set CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DMA=y CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_EXAR=y CONFIG_SERIAL_8250_NR_UARTS=32 CONFIG_SERIAL_8250_RUNTIME_UARTS=4 CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_MANY_PORTS=y CONFIG_SERIAL_8250_SHARE_IRQ=y # CONFIG_SERIAL_8250_DETECT_IRQ is not set CONFIG_SERIAL_8250_RSA=y CONFIG_SERIAL_8250_DWLIB=y CONFIG_SERIAL_8250_DW=y # CONFIG_SERIAL_8250_RT288X is not set CONFIG_SERIAL_8250_LPSS=y CONFIG_SERIAL_8250_MID=y # # Non-8250 serial port support # # CONFIG_SERIAL_MAX3100 is not set # CONFIG_SERIAL_MAX310X is not set # CONFIG_SERIAL_UARTLITE is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_SERIAL_JSM=m # CONFIG_SERIAL_SCCNXP is not set # CONFIG_SERIAL_SC16IS7XX is not set # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_IFX6X60 is not set CONFIG_SERIAL_ARC=m CONFIG_SERIAL_ARC_NR_PORTS=1 # CONFIG_SERIAL_RP2 is not set # CONFIG_SERIAL_FSL_LPUART is not set # CONFIG_SERIAL_FSL_LINFLEXUART is not set # CONFIG_SERIAL_SPRD is not set # end of Serial drivers CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_NONSTANDARD=y # CONFIG_ROCKETPORT is not set CONFIG_CYCLADES=m # CONFIG_CYZ_INTR is not set # CONFIG_MOXA_INTELLIO is not set # CONFIG_MOXA_SMARTIO is not set CONFIG_SYNCLINK=m CONFIG_SYNCLINKMP=m CONFIG_SYNCLINK_GT=m # CONFIG_ISI is not set CONFIG_N_HDLC=m CONFIG_N_GSM=m CONFIG_NOZOMI=m # CONFIG_NULL_TTY is not set # CONFIG_TRACE_SINK is not set CONFIG_HVC_DRIVER=y CONFIG_HVC_IRQ=y CONFIG_HVC_XEN=y CONFIG_HVC_XEN_FRONTEND=y # CONFIG_SERIAL_DEV_BUS is not set CONFIG_PRINTER=m # CONFIG_LP_CONSOLE is not set CONFIG_PPDEV=m CONFIG_VIRTIO_CONSOLE=y CONFIG_IPMI_HANDLER=m CONFIG_IPMI_DMI_DECODE=y CONFIG_IPMI_PLAT_DATA=y # CONFIG_IPMI_PANIC_EVENT is not set CONFIG_IPMI_DEVICE_INTERFACE=m CONFIG_IPMI_SI=m CONFIG_IPMI_SSIF=m CONFIG_IPMI_WATCHDOG=m CONFIG_IPMI_POWEROFF=m CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_TIMERIOMEM=m CONFIG_HW_RANDOM_INTEL=m CONFIG_HW_RANDOM_AMD=m CONFIG_HW_RANDOM_VIA=m CONFIG_HW_RANDOM_VIRTIO=y # CONFIG_APPLICOM is not set # CONFIG_MWAVE is not set CONFIG_DEVMEM=y # CONFIG_DEVKMEM is not set CONFIG_NVRAM=y CONFIG_RAW_DRIVER=y CONFIG_MAX_RAW_DEVS=8192 CONFIG_DEVPORT=y CONFIG_HPET=y CONFIG_HPET_MMAP=y # CONFIG_HPET_MMAP_DEFAULT is not set CONFIG_HANGCHECK_TIMER=m CONFIG_UV_MMTIMER=m CONFIG_TCG_TPM=y CONFIG_HW_RANDOM_TPM=y CONFIG_TCG_TIS_CORE=y CONFIG_TCG_TIS=y # CONFIG_TCG_TIS_SPI is not set CONFIG_TCG_TIS_I2C_ATMEL=m CONFIG_TCG_TIS_I2C_INFINEON=m CONFIG_TCG_TIS_I2C_NUVOTON=m CONFIG_TCG_NSC=m CONFIG_TCG_ATMEL=m CONFIG_TCG_INFINEON=m # CONFIG_TCG_XEN is not set CONFIG_TCG_CRB=y # CONFIG_TCG_VTPM_PROXY is not set CONFIG_TCG_TIS_ST33ZP24=m CONFIG_TCG_TIS_ST33ZP24_I2C=m # CONFIG_TCG_TIS_ST33ZP24_SPI is not set CONFIG_TELCLOCK=m # CONFIG_XILLYBUS is not set # end of Character devices # CONFIG_RANDOM_TRUST_CPU is not set # CONFIG_RANDOM_TRUST_BOOTLOADER is not set # # I2C support # CONFIG_I2C=y CONFIG_ACPI_I2C_OPREGION=y CONFIG_I2C_BOARDINFO=y CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=m CONFIG_I2C_MUX=m # # Multiplexer I2C Chip support # # CONFIG_I2C_MUX_GPIO is not set # CONFIG_I2C_MUX_LTC4306 is not set # CONFIG_I2C_MUX_PCA9541 is not set # CONFIG_I2C_MUX_PCA954x is not set # CONFIG_I2C_MUX_REG is not set # CONFIG_I2C_MUX_MLXCPLD is not set # end of Multiplexer I2C Chip support CONFIG_I2C_HELPER_AUTO=y CONFIG_I2C_SMBUS=y CONFIG_I2C_ALGOBIT=y CONFIG_I2C_ALGOPCA=m # # I2C Hardware Bus support # # # PC SMBus host controller drivers # # CONFIG_I2C_ALI1535 is not set # CONFIG_I2C_ALI1563 is not set # CONFIG_I2C_ALI15X3 is not set CONFIG_I2C_AMD756=m CONFIG_I2C_AMD756_S4882=m CONFIG_I2C_AMD8111=m # CONFIG_I2C_AMD_MP2 is not set CONFIG_I2C_I801=y CONFIG_I2C_ISCH=m CONFIG_I2C_ISMT=m CONFIG_I2C_PIIX4=m CONFIG_I2C_NFORCE2=m CONFIG_I2C_NFORCE2_S4985=m # CONFIG_I2C_NVIDIA_GPU is not set # CONFIG_I2C_SIS5595 is not set # CONFIG_I2C_SIS630 is not set CONFIG_I2C_SIS96X=m CONFIG_I2C_VIA=m CONFIG_I2C_VIAPRO=m # # ACPI drivers # CONFIG_I2C_SCMI=m # # I2C system bus drivers (mostly embedded / system-on-chip) # # CONFIG_I2C_CBUS_GPIO is not set CONFIG_I2C_DESIGNWARE_CORE=m CONFIG_I2C_DESIGNWARE_PLATFORM=m # CONFIG_I2C_DESIGNWARE_SLAVE is not set # CONFIG_I2C_DESIGNWARE_PCI is not set # CONFIG_I2C_DESIGNWARE_BAYTRAIL is not set # CONFIG_I2C_EMEV2 is not set # CONFIG_I2C_GPIO is not set # CONFIG_I2C_OCORES is not set CONFIG_I2C_PCA_PLATFORM=m CONFIG_I2C_SIMTEC=m # CONFIG_I2C_XILINX is not set # # External I2C/SMBus adapter drivers # CONFIG_I2C_DIOLAN_U2C=m CONFIG_I2C_PARPORT=m # CONFIG_I2C_ROBOTFUZZ_OSIF is not set # CONFIG_I2C_TAOS_EVM is not set CONFIG_I2C_TINY_USB=m CONFIG_I2C_VIPERBOARD=m # # Other I2C/SMBus bus drivers # # CONFIG_I2C_MLXCPLD is not set # end of I2C Hardware Bus support CONFIG_I2C_STUB=m # CONFIG_I2C_SLAVE is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # end of I2C support # CONFIG_I3C is not set CONFIG_SPI=y # CONFIG_SPI_DEBUG is not set CONFIG_SPI_MASTER=y # CONFIG_SPI_MEM is not set # # SPI Master Controller Drivers # # CONFIG_SPI_ALTERA is not set # CONFIG_SPI_AXI_SPI_ENGINE is not set # CONFIG_SPI_BITBANG is not set # CONFIG_SPI_BUTTERFLY is not set # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_DESIGNWARE is not set # CONFIG_SPI_NXP_FLEXSPI is not set # CONFIG_SPI_GPIO is not set # CONFIG_SPI_LM70_LLP is not set # CONFIG_SPI_OC_TINY is not set CONFIG_SPI_PXA2XX=m CONFIG_SPI_PXA2XX_PCI=m # CONFIG_SPI_ROCKCHIP is not set # CONFIG_SPI_SC18IS602 is not set # CONFIG_SPI_SIFIVE is not set # CONFIG_SPI_MXIC is not set # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set # # SPI Multiplexer support # # CONFIG_SPI_MUX is not set # # SPI Protocol Masters # # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_LOOPBACK_TEST is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_SPI_SLAVE is not set # CONFIG_SPMI is not set # CONFIG_HSI is not set CONFIG_PPS=y # CONFIG_PPS_DEBUG is not set # # PPS clients support # # CONFIG_PPS_CLIENT_KTIMER is not set CONFIG_PPS_CLIENT_LDISC=m CONFIG_PPS_CLIENT_PARPORT=m CONFIG_PPS_CLIENT_GPIO=m # # PPS generators support # # # PTP clock support # CONFIG_PTP_1588_CLOCK=y CONFIG_DP83640_PHY=m # CONFIG_PTP_1588_CLOCK_INES is not set CONFIG_PTP_1588_CLOCK_KVM=m # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set # CONFIG_PTP_1588_CLOCK_VMW is not set # end of PTP clock support CONFIG_PINCTRL=y CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set CONFIG_PINCTRL_AMD=m # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_SX150X is not set CONFIG_PINCTRL_BAYTRAIL=y # CONFIG_PINCTRL_CHERRYVIEW is not set # CONFIG_PINCTRL_LYNXPOINT is not set CONFIG_PINCTRL_INTEL=m # CONFIG_PINCTRL_BROXTON is not set CONFIG_PINCTRL_CANNONLAKE=m # CONFIG_PINCTRL_CEDARFORK is not set CONFIG_PINCTRL_DENVERTON=m CONFIG_PINCTRL_GEMINILAKE=m # CONFIG_PINCTRL_ICELAKE is not set CONFIG_PINCTRL_LEWISBURG=m CONFIG_PINCTRL_SUNRISEPOINT=m # CONFIG_PINCTRL_TIGERLAKE is not set CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_GPIO_ACPI=y CONFIG_GPIOLIB_IRQCHIP=y # CONFIG_DEBUG_GPIO is not set CONFIG_GPIO_SYSFS=y CONFIG_GPIO_GENERIC=m # # Memory mapped GPIO drivers # CONFIG_GPIO_AMDPT=m # CONFIG_GPIO_DWAPB is not set # CONFIG_GPIO_EXAR is not set # CONFIG_GPIO_GENERIC_PLATFORM is not set CONFIG_GPIO_ICH=m # CONFIG_GPIO_MB86S7X is not set # CONFIG_GPIO_VX855 is not set # CONFIG_GPIO_XILINX is not set # CONFIG_GPIO_AMD_FCH is not set # end of Memory mapped GPIO drivers # # Port-mapped I/O GPIO drivers # # CONFIG_GPIO_F7188X is not set # CONFIG_GPIO_IT87 is not set # CONFIG_GPIO_SCH is not set # CONFIG_GPIO_SCH311X is not set # CONFIG_GPIO_WINBOND is not set # CONFIG_GPIO_WS16C48 is not set # end of Port-mapped I/O GPIO drivers # # I2C GPIO expanders # # CONFIG_GPIO_ADP5588 is not set # CONFIG_GPIO_MAX7300 is not set # CONFIG_GPIO_MAX732X is not set # CONFIG_GPIO_PCA953X is not set # CONFIG_GPIO_PCF857X is not set # CONFIG_GPIO_TPIC2810 is not set # end of I2C GPIO expanders # # MFD GPIO expanders # # end of MFD GPIO expanders # # PCI GPIO expanders # # CONFIG_GPIO_AMD8111 is not set # CONFIG_GPIO_ML_IOH is not set # CONFIG_GPIO_PCI_IDIO_16 is not set # CONFIG_GPIO_PCIE_IDIO_24 is not set # CONFIG_GPIO_RDC321X is not set # end of PCI GPIO expanders # # SPI GPIO expanders # # CONFIG_GPIO_MAX3191X is not set # CONFIG_GPIO_MAX7301 is not set # CONFIG_GPIO_MC33880 is not set # CONFIG_GPIO_PISOSR is not set # CONFIG_GPIO_XRA1403 is not set # end of SPI GPIO expanders # # USB GPIO expanders # CONFIG_GPIO_VIPERBOARD=m # end of USB GPIO expanders # CONFIG_GPIO_MOCKUP is not set # CONFIG_W1 is not set # CONFIG_POWER_AVS is not set CONFIG_POWER_RESET=y # CONFIG_POWER_RESET_RESTART is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_PDA_POWER is not set # CONFIG_GENERIC_ADC_BATTERY is not set # CONFIG_TEST_POWER is not set # CONFIG_CHARGER_ADP5061 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set # CONFIG_BATTERY_SBS is not set # CONFIG_CHARGER_SBS is not set # CONFIG_MANAGER_SBS is not set # CONFIG_BATTERY_BQ27XXX is not set # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set # CONFIG_CHARGER_GPIO is not set # CONFIG_CHARGER_LT3651 is not set # CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_BQ24257 is not set # CONFIG_CHARGER_BQ24735 is not set # CONFIG_CHARGER_BQ25890 is not set CONFIG_CHARGER_SMB347=m # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_CHARGER_RT9455 is not set CONFIG_HWMON=y CONFIG_HWMON_VID=m # CONFIG_HWMON_DEBUG_CHIP is not set # # Native drivers # CONFIG_SENSORS_ABITUGURU=m CONFIG_SENSORS_ABITUGURU3=m # CONFIG_SENSORS_AD7314 is not set CONFIG_SENSORS_AD7414=m CONFIG_SENSORS_AD7418=m CONFIG_SENSORS_ADM1021=m CONFIG_SENSORS_ADM1025=m CONFIG_SENSORS_ADM1026=m CONFIG_SENSORS_ADM1029=m CONFIG_SENSORS_ADM1031=m # CONFIG_SENSORS_ADM1177 is not set CONFIG_SENSORS_ADM9240=m CONFIG_SENSORS_ADT7X10=m # CONFIG_SENSORS_ADT7310 is not set CONFIG_SENSORS_ADT7410=m CONFIG_SENSORS_ADT7411=m CONFIG_SENSORS_ADT7462=m CONFIG_SENSORS_ADT7470=m CONFIG_SENSORS_ADT7475=m # CONFIG_SENSORS_AS370 is not set CONFIG_SENSORS_ASC7621=m # CONFIG_SENSORS_AXI_FAN_CONTROL is not set CONFIG_SENSORS_K8TEMP=m CONFIG_SENSORS_K10TEMP=m CONFIG_SENSORS_FAM15H_POWER=m CONFIG_SENSORS_APPLESMC=m CONFIG_SENSORS_ASB100=m # CONFIG_SENSORS_ASPEED is not set CONFIG_SENSORS_ATXP1=m # CONFIG_SENSORS_DRIVETEMP is not set CONFIG_SENSORS_DS620=m CONFIG_SENSORS_DS1621=m CONFIG_SENSORS_DELL_SMM=m CONFIG_SENSORS_I5K_AMB=m CONFIG_SENSORS_F71805F=m CONFIG_SENSORS_F71882FG=m CONFIG_SENSORS_F75375S=m CONFIG_SENSORS_FSCHMD=m # CONFIG_SENSORS_FTSTEUTATES is not set CONFIG_SENSORS_GL518SM=m CONFIG_SENSORS_GL520SM=m CONFIG_SENSORS_G760A=m # CONFIG_SENSORS_G762 is not set # CONFIG_SENSORS_HIH6130 is not set CONFIG_SENSORS_IBMAEM=m CONFIG_SENSORS_IBMPEX=m # CONFIG_SENSORS_IIO_HWMON is not set # CONFIG_SENSORS_I5500 is not set CONFIG_SENSORS_CORETEMP=m CONFIG_SENSORS_IT87=m CONFIG_SENSORS_JC42=m # CONFIG_SENSORS_POWR1220 is not set CONFIG_SENSORS_LINEAGE=m # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set CONFIG_SENSORS_LTC4151=m CONFIG_SENSORS_LTC4215=m # CONFIG_SENSORS_LTC4222 is not set CONFIG_SENSORS_LTC4245=m # CONFIG_SENSORS_LTC4260 is not set CONFIG_SENSORS_LTC4261=m # CONFIG_SENSORS_MAX1111 is not set CONFIG_SENSORS_MAX16065=m CONFIG_SENSORS_MAX1619=m CONFIG_SENSORS_MAX1668=m CONFIG_SENSORS_MAX197=m # CONFIG_SENSORS_MAX31722 is not set # CONFIG_SENSORS_MAX31730 is not set # CONFIG_SENSORS_MAX6621 is not set CONFIG_SENSORS_MAX6639=m CONFIG_SENSORS_MAX6642=m CONFIG_SENSORS_MAX6650=m CONFIG_SENSORS_MAX6697=m # CONFIG_SENSORS_MAX31790 is not set CONFIG_SENSORS_MCP3021=m # CONFIG_SENSORS_TC654 is not set # CONFIG_SENSORS_ADCXX is not set CONFIG_SENSORS_LM63=m # CONFIG_SENSORS_LM70 is not set CONFIG_SENSORS_LM73=m CONFIG_SENSORS_LM75=m CONFIG_SENSORS_LM77=m CONFIG_SENSORS_LM78=m CONFIG_SENSORS_LM80=m CONFIG_SENSORS_LM83=m CONFIG_SENSORS_LM85=m CONFIG_SENSORS_LM87=m CONFIG_SENSORS_LM90=m CONFIG_SENSORS_LM92=m CONFIG_SENSORS_LM93=m CONFIG_SENSORS_LM95234=m CONFIG_SENSORS_LM95241=m CONFIG_SENSORS_LM95245=m CONFIG_SENSORS_PC87360=m CONFIG_SENSORS_PC87427=m CONFIG_SENSORS_NTC_THERMISTOR=m # CONFIG_SENSORS_NCT6683 is not set CONFIG_SENSORS_NCT6775=m # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set CONFIG_SENSORS_PCF8591=m CONFIG_PMBUS=m CONFIG_SENSORS_PMBUS=m CONFIG_SENSORS_ADM1275=m # CONFIG_SENSORS_BEL_PFE is not set # CONFIG_SENSORS_IBM_CFFPS is not set # CONFIG_SENSORS_INSPUR_IPSPS is not set # CONFIG_SENSORS_IR35221 is not set # CONFIG_SENSORS_IR38064 is not set # CONFIG_SENSORS_IRPS5401 is not set # CONFIG_SENSORS_ISL68137 is not set CONFIG_SENSORS_LM25066=m CONFIG_SENSORS_LTC2978=m # CONFIG_SENSORS_LTC3815 is not set CONFIG_SENSORS_MAX16064=m # CONFIG_SENSORS_MAX20730 is not set # CONFIG_SENSORS_MAX20751 is not set # CONFIG_SENSORS_MAX31785 is not set CONFIG_SENSORS_MAX34440=m CONFIG_SENSORS_MAX8688=m # CONFIG_SENSORS_PXE1610 is not set # CONFIG_SENSORS_TPS40422 is not set # CONFIG_SENSORS_TPS53679 is not set CONFIG_SENSORS_UCD9000=m CONFIG_SENSORS_UCD9200=m # CONFIG_SENSORS_XDPE122 is not set CONFIG_SENSORS_ZL6100=m CONFIG_SENSORS_SHT15=m CONFIG_SENSORS_SHT21=m # CONFIG_SENSORS_SHT3x is not set # CONFIG_SENSORS_SHTC1 is not set CONFIG_SENSORS_SIS5595=m CONFIG_SENSORS_DME1737=m CONFIG_SENSORS_EMC1403=m # CONFIG_SENSORS_EMC2103 is not set CONFIG_SENSORS_EMC6W201=m CONFIG_SENSORS_SMSC47M1=m CONFIG_SENSORS_SMSC47M192=m CONFIG_SENSORS_SMSC47B397=m CONFIG_SENSORS_SCH56XX_COMMON=m CONFIG_SENSORS_SCH5627=m CONFIG_SENSORS_SCH5636=m # CONFIG_SENSORS_STTS751 is not set # CONFIG_SENSORS_SMM665 is not set # CONFIG_SENSORS_ADC128D818 is not set CONFIG_SENSORS_ADS7828=m # CONFIG_SENSORS_ADS7871 is not set CONFIG_SENSORS_AMC6821=m CONFIG_SENSORS_INA209=m CONFIG_SENSORS_INA2XX=m # CONFIG_SENSORS_INA3221 is not set # CONFIG_SENSORS_TC74 is not set CONFIG_SENSORS_THMC50=m CONFIG_SENSORS_TMP102=m # CONFIG_SENSORS_TMP103 is not set # CONFIG_SENSORS_TMP108 is not set CONFIG_SENSORS_TMP401=m CONFIG_SENSORS_TMP421=m # CONFIG_SENSORS_TMP513 is not set CONFIG_SENSORS_VIA_CPUTEMP=m CONFIG_SENSORS_VIA686A=m CONFIG_SENSORS_VT1211=m CONFIG_SENSORS_VT8231=m # CONFIG_SENSORS_W83773G is not set CONFIG_SENSORS_W83781D=m CONFIG_SENSORS_W83791D=m CONFIG_SENSORS_W83792D=m CONFIG_SENSORS_W83793=m CONFIG_SENSORS_W83795=m # CONFIG_SENSORS_W83795_FANCTRL is not set CONFIG_SENSORS_W83L785TS=m CONFIG_SENSORS_W83L786NG=m CONFIG_SENSORS_W83627HF=m CONFIG_SENSORS_W83627EHF=m # CONFIG_SENSORS_XGENE is not set # # ACPI drivers # CONFIG_SENSORS_ACPI_POWER=m CONFIG_SENSORS_ATK0110=m CONFIG_THERMAL=y # CONFIG_THERMAL_STATISTICS is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_WRITABLE_TRIPS=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set CONFIG_THERMAL_GOV_FAIR_SHARE=y CONFIG_THERMAL_GOV_STEP_WISE=y CONFIG_THERMAL_GOV_BANG_BANG=y CONFIG_THERMAL_GOV_USER_SPACE=y # CONFIG_CLOCK_THERMAL is not set # CONFIG_DEVFREQ_THERMAL is not set # CONFIG_THERMAL_EMULATION is not set # # Intel thermal drivers # CONFIG_INTEL_POWERCLAMP=m CONFIG_X86_PKG_TEMP_THERMAL=m CONFIG_INTEL_SOC_DTS_IOSF_CORE=m # CONFIG_INTEL_SOC_DTS_THERMAL is not set # # ACPI INT340X thermal drivers # CONFIG_INT340X_THERMAL=m CONFIG_ACPI_THERMAL_REL=m # CONFIG_INT3406_THERMAL is not set CONFIG_PROC_THERMAL_MMIO_RAPL=y # end of ACPI INT340X thermal drivers # CONFIG_INTEL_PCH_THERMAL is not set # end of Intel thermal drivers # CONFIG_GENERIC_ADC_THERMAL is not set CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y # CONFIG_WATCHDOG_NOWAYOUT is not set CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y CONFIG_WATCHDOG_OPEN_TIMEOUT=0 CONFIG_WATCHDOG_SYSFS=y # # Watchdog Pretimeout Governors # # CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set # # Watchdog Device Drivers # CONFIG_SOFT_WATCHDOG=m CONFIG_WDAT_WDT=m # CONFIG_XILINX_WATCHDOG is not set # CONFIG_ZIIRAVE_WATCHDOG is not set # CONFIG_CADENCE_WATCHDOG is not set # CONFIG_DW_WATCHDOG is not set # CONFIG_MAX63XX_WATCHDOG is not set # CONFIG_ACQUIRE_WDT is not set # CONFIG_ADVANTECH_WDT is not set CONFIG_ALIM1535_WDT=m CONFIG_ALIM7101_WDT=m # CONFIG_EBC_C384_WDT is not set CONFIG_F71808E_WDT=m CONFIG_SP5100_TCO=m CONFIG_SBC_FITPC2_WATCHDOG=m # CONFIG_EUROTECH_WDT is not set CONFIG_IB700_WDT=m CONFIG_IBMASR=m # CONFIG_WAFER_WDT is not set CONFIG_I6300ESB_WDT=y CONFIG_IE6XX_WDT=m CONFIG_ITCO_WDT=y CONFIG_ITCO_VENDOR_SUPPORT=y CONFIG_IT8712F_WDT=m CONFIG_IT87_WDT=m CONFIG_HP_WATCHDOG=m CONFIG_HPWDT_NMI_DECODING=y # CONFIG_SC1200_WDT is not set # CONFIG_PC87413_WDT is not set CONFIG_NV_TCO=m # CONFIG_60XX_WDT is not set # CONFIG_CPU5_WDT is not set CONFIG_SMSC_SCH311X_WDT=m # CONFIG_SMSC37B787_WDT is not set # CONFIG_TQMX86_WDT is not set CONFIG_VIA_WDT=m CONFIG_W83627HF_WDT=m CONFIG_W83877F_WDT=m CONFIG_W83977F_WDT=m CONFIG_MACHZ_WDT=m # CONFIG_SBC_EPX_C3_WATCHDOG is not set CONFIG_INTEL_MEI_WDT=m # CONFIG_NI903X_WDT is not set # CONFIG_NIC7018_WDT is not set # CONFIG_MEN_A21_WDT is not set CONFIG_XEN_WDT=m # # PCI-based Watchdog Cards # CONFIG_PCIPCWATCHDOG=m CONFIG_WDTPCI=m # # USB-based Watchdog Cards # CONFIG_USBPCWATCHDOG=m CONFIG_SSB_POSSIBLE=y CONFIG_SSB=m CONFIG_SSB_SPROM=y CONFIG_SSB_PCIHOST_POSSIBLE=y CONFIG_SSB_PCIHOST=y CONFIG_SSB_SDIOHOST_POSSIBLE=y CONFIG_SSB_SDIOHOST=y CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y CONFIG_SSB_DRIVER_PCICORE=y CONFIG_SSB_DRIVER_GPIO=y CONFIG_BCMA_POSSIBLE=y CONFIG_BCMA=m CONFIG_BCMA_HOST_PCI_POSSIBLE=y CONFIG_BCMA_HOST_PCI=y # CONFIG_BCMA_HOST_SOC is not set CONFIG_BCMA_DRIVER_PCI=y CONFIG_BCMA_DRIVER_GMAC_CMN=y CONFIG_BCMA_DRIVER_GPIO=y # CONFIG_BCMA_DEBUG is not set # # Multifunction device drivers # CONFIG_MFD_CORE=y # CONFIG_MFD_AS3711 is not set # CONFIG_PMIC_ADP5520 is not set # CONFIG_MFD_AAT2870_CORE is not set # CONFIG_MFD_BCM590XX is not set # CONFIG_MFD_BD9571MWV is not set # CONFIG_MFD_AXP20X_I2C is not set # CONFIG_MFD_MADERA is not set # CONFIG_PMIC_DA903X is not set # CONFIG_MFD_DA9052_SPI is not set # CONFIG_MFD_DA9052_I2C is not set # CONFIG_MFD_DA9055 is not set # CONFIG_MFD_DA9062 is not set # CONFIG_MFD_DA9063 is not set # CONFIG_MFD_DA9150 is not set # CONFIG_MFD_DLN2 is not set # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_MC13XXX_I2C is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set # CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set CONFIG_LPC_ICH=y CONFIG_LPC_SCH=m # CONFIG_INTEL_SOC_PMIC_CHTDC_TI is not set CONFIG_MFD_INTEL_LPSS=y CONFIG_MFD_INTEL_LPSS_ACPI=y CONFIG_MFD_INTEL_LPSS_PCI=y # CONFIG_MFD_IQS62X is not set # CONFIG_MFD_JANZ_CMODIO is not set # CONFIG_MFD_KEMPLD is not set # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77693 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set # CONFIG_MFD_MAX8925 is not set # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set # CONFIG_EZX_PCAP is not set CONFIG_MFD_VIPERBOARD=m # CONFIG_MFD_RETU is not set # CONFIG_MFD_PCF50633 is not set # CONFIG_UCB1400_CORE is not set # CONFIG_MFD_RDC321X is not set # CONFIG_MFD_RT5033 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_SEC_CORE is not set # CONFIG_MFD_SI476X_CORE is not set CONFIG_MFD_SM501=m CONFIG_MFD_SM501_GPIO=y # CONFIG_MFD_SKY81452 is not set # CONFIG_MFD_SMSC is not set # CONFIG_ABX500_CORE is not set # CONFIG_MFD_SYSCON is not set # CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_MFD_LP3943 is not set # CONFIG_MFD_LP8788 is not set # CONFIG_MFD_TI_LMU is not set # CONFIG_MFD_PALMAS is not set # CONFIG_TPS6105X is not set # CONFIG_TPS65010 is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65086 is not set # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_TI_LP873X is not set # CONFIG_MFD_TPS6586X is not set # CONFIG_MFD_TPS65910 is not set # CONFIG_MFD_TPS65912_I2C is not set # CONFIG_MFD_TPS65912_SPI is not set # CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_WL1273_CORE is not set # CONFIG_MFD_LM3533 is not set # CONFIG_MFD_TQMX86 is not set CONFIG_MFD_VX855=m # CONFIG_MFD_ARIZONA_I2C is not set # CONFIG_MFD_ARIZONA_SPI is not set # CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM831X_I2C is not set # CONFIG_MFD_WM831X_SPI is not set # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_WM8994 is not set # end of Multifunction device drivers # CONFIG_REGULATOR is not set CONFIG_RC_CORE=m CONFIG_RC_MAP=m # CONFIG_LIRC is not set CONFIG_RC_DECODERS=y CONFIG_IR_NEC_DECODER=m CONFIG_IR_RC5_DECODER=m CONFIG_IR_RC6_DECODER=m CONFIG_IR_JVC_DECODER=m CONFIG_IR_SONY_DECODER=m CONFIG_IR_SANYO_DECODER=m # CONFIG_IR_SHARP_DECODER is not set CONFIG_IR_MCE_KBD_DECODER=m # CONFIG_IR_XMP_DECODER is not set # CONFIG_IR_IMON_DECODER is not set # CONFIG_IR_RCMM_DECODER is not set CONFIG_RC_DEVICES=y CONFIG_RC_ATI_REMOTE=m CONFIG_IR_ENE=m CONFIG_IR_IMON=m # CONFIG_IR_IMON_RAW is not set CONFIG_IR_MCEUSB=m CONFIG_IR_ITE_CIR=m CONFIG_IR_FINTEK=m CONFIG_IR_NUVOTON=m CONFIG_IR_REDRAT3=m CONFIG_IR_STREAMZAP=m CONFIG_IR_WINBOND_CIR=m # CONFIG_IR_IGORPLUGUSB is not set CONFIG_IR_IGUANA=m CONFIG_IR_TTUSBIR=m # CONFIG_RC_LOOPBACK is not set # CONFIG_IR_SERIAL is not set # CONFIG_IR_SIR is not set # CONFIG_RC_XBOX_DVD is not set CONFIG_MEDIA_SUPPORT=m # # Multimedia core support # CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_ANALOG_TV_SUPPORT=y CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y CONFIG_MEDIA_RADIO_SUPPORT=y # CONFIG_MEDIA_SDR_SUPPORT is not set # CONFIG_MEDIA_CEC_SUPPORT is not set CONFIG_MEDIA_CONTROLLER=y CONFIG_MEDIA_CONTROLLER_DVB=y CONFIG_VIDEO_DEV=m # CONFIG_VIDEO_V4L2_SUBDEV_API is not set CONFIG_VIDEO_V4L2=m CONFIG_VIDEO_V4L2_I2C=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_TUNER=m CONFIG_VIDEOBUF_GEN=m CONFIG_VIDEOBUF_DMA_SG=m CONFIG_VIDEOBUF_VMALLOC=m CONFIG_DVB_CORE=m # CONFIG_DVB_MMAP is not set CONFIG_DVB_NET=y CONFIG_TTPCI_EEPROM=m CONFIG_DVB_MAX_ADAPTERS=8 CONFIG_DVB_DYNAMIC_MINORS=y # CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set # CONFIG_DVB_ULE_DEBUG is not set # # Media drivers # CONFIG_MEDIA_USB_SUPPORT=y # # Webcam devices # CONFIG_USB_VIDEO_CLASS=m CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y CONFIG_USB_GSPCA=m CONFIG_USB_M5602=m CONFIG_USB_STV06XX=m CONFIG_USB_GL860=m CONFIG_USB_GSPCA_BENQ=m CONFIG_USB_GSPCA_CONEX=m CONFIG_USB_GSPCA_CPIA1=m # CONFIG_USB_GSPCA_DTCS033 is not set CONFIG_USB_GSPCA_ETOMS=m CONFIG_USB_GSPCA_FINEPIX=m CONFIG_USB_GSPCA_JEILINJ=m CONFIG_USB_GSPCA_JL2005BCD=m # CONFIG_USB_GSPCA_KINECT is not set CONFIG_USB_GSPCA_KONICA=m CONFIG_USB_GSPCA_MARS=m CONFIG_USB_GSPCA_MR97310A=m CONFIG_USB_GSPCA_NW80X=m CONFIG_USB_GSPCA_OV519=m CONFIG_USB_GSPCA_OV534=m CONFIG_USB_GSPCA_OV534_9=m CONFIG_USB_GSPCA_PAC207=m CONFIG_USB_GSPCA_PAC7302=m CONFIG_USB_GSPCA_PAC7311=m CONFIG_USB_GSPCA_SE401=m CONFIG_USB_GSPCA_SN9C2028=m CONFIG_USB_GSPCA_SN9C20X=m CONFIG_USB_GSPCA_SONIXB=m CONFIG_USB_GSPCA_SONIXJ=m CONFIG_USB_GSPCA_SPCA500=m CONFIG_USB_GSPCA_SPCA501=m CONFIG_USB_GSPCA_SPCA505=m CONFIG_USB_GSPCA_SPCA506=m CONFIG_USB_GSPCA_SPCA508=m CONFIG_USB_GSPCA_SPCA561=m CONFIG_USB_GSPCA_SPCA1528=m CONFIG_USB_GSPCA_SQ905=m CONFIG_USB_GSPCA_SQ905C=m CONFIG_USB_GSPCA_SQ930X=m CONFIG_USB_GSPCA_STK014=m # CONFIG_USB_GSPCA_STK1135 is not set CONFIG_USB_GSPCA_STV0680=m CONFIG_USB_GSPCA_SUNPLUS=m CONFIG_USB_GSPCA_T613=m CONFIG_USB_GSPCA_TOPRO=m # CONFIG_USB_GSPCA_TOUPTEK is not set CONFIG_USB_GSPCA_TV8532=m CONFIG_USB_GSPCA_VC032X=m CONFIG_USB_GSPCA_VICAM=m CONFIG_USB_GSPCA_XIRLINK_CIT=m CONFIG_USB_GSPCA_ZC3XX=m CONFIG_USB_PWC=m # CONFIG_USB_PWC_DEBUG is not set CONFIG_USB_PWC_INPUT_EVDEV=y # CONFIG_VIDEO_CPIA2 is not set CONFIG_USB_ZR364XX=m CONFIG_USB_STKWEBCAM=m CONFIG_USB_S2255=m # CONFIG_VIDEO_USBTV is not set # # Analog TV USB devices # CONFIG_VIDEO_PVRUSB2=m CONFIG_VIDEO_PVRUSB2_SYSFS=y CONFIG_VIDEO_PVRUSB2_DVB=y # CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set CONFIG_VIDEO_HDPVR=m # CONFIG_VIDEO_STK1160_COMMON is not set # CONFIG_VIDEO_GO7007 is not set # # Analog/digital TV USB devices # CONFIG_VIDEO_AU0828=m CONFIG_VIDEO_AU0828_V4L2=y # CONFIG_VIDEO_AU0828_RC is not set CONFIG_VIDEO_CX231XX=m CONFIG_VIDEO_CX231XX_RC=y CONFIG_VIDEO_CX231XX_ALSA=m CONFIG_VIDEO_CX231XX_DVB=m CONFIG_VIDEO_TM6000=m CONFIG_VIDEO_TM6000_ALSA=m CONFIG_VIDEO_TM6000_DVB=m # # Digital TV USB devices # CONFIG_DVB_USB=m # CONFIG_DVB_USB_DEBUG is not set CONFIG_DVB_USB_DIB3000MC=m CONFIG_DVB_USB_A800=m CONFIG_DVB_USB_DIBUSB_MB=m # CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set CONFIG_DVB_USB_DIBUSB_MC=m CONFIG_DVB_USB_DIB0700=m CONFIG_DVB_USB_UMT_010=m CONFIG_DVB_USB_CXUSB=m # CONFIG_DVB_USB_CXUSB_ANALOG is not set CONFIG_DVB_USB_M920X=m CONFIG_DVB_USB_DIGITV=m CONFIG_DVB_USB_VP7045=m CONFIG_DVB_USB_VP702X=m CONFIG_DVB_USB_GP8PSK=m CONFIG_DVB_USB_NOVA_T_USB2=m CONFIG_DVB_USB_TTUSB2=m CONFIG_DVB_USB_DTT200U=m CONFIG_DVB_USB_OPERA1=m CONFIG_DVB_USB_AF9005=m CONFIG_DVB_USB_AF9005_REMOTE=m CONFIG_DVB_USB_PCTV452E=m CONFIG_DVB_USB_DW2102=m CONFIG_DVB_USB_CINERGY_T2=m CONFIG_DVB_USB_DTV5100=m CONFIG_DVB_USB_AZ6027=m CONFIG_DVB_USB_TECHNISAT_USB2=m CONFIG_DVB_USB_V2=m CONFIG_DVB_USB_AF9015=m CONFIG_DVB_USB_AF9035=m CONFIG_DVB_USB_ANYSEE=m CONFIG_DVB_USB_AU6610=m CONFIG_DVB_USB_AZ6007=m CONFIG_DVB_USB_CE6230=m CONFIG_DVB_USB_EC168=m CONFIG_DVB_USB_GL861=m CONFIG_DVB_USB_LME2510=m CONFIG_DVB_USB_MXL111SF=m CONFIG_DVB_USB_RTL28XXU=m # CONFIG_DVB_USB_DVBSKY is not set # CONFIG_DVB_USB_ZD1301 is not set CONFIG_DVB_TTUSB_BUDGET=m CONFIG_DVB_TTUSB_DEC=m CONFIG_SMS_USB_DRV=m CONFIG_DVB_B2C2_FLEXCOP_USB=m # CONFIG_DVB_B2C2_FLEXCOP_USB_DEBUG is not set # CONFIG_DVB_AS102 is not set # # Webcam, TV (analog/digital) USB devices # CONFIG_VIDEO_EM28XX=m # CONFIG_VIDEO_EM28XX_V4L2 is not set CONFIG_VIDEO_EM28XX_ALSA=m CONFIG_VIDEO_EM28XX_DVB=m CONFIG_VIDEO_EM28XX_RC=m CONFIG_MEDIA_PCI_SUPPORT=y # # Media capture support # # CONFIG_VIDEO_MEYE is not set # CONFIG_VIDEO_SOLO6X10 is not set # CONFIG_VIDEO_TW5864 is not set # CONFIG_VIDEO_TW68 is not set # CONFIG_VIDEO_TW686X is not set # # Media capture/analog TV support # CONFIG_VIDEO_IVTV=m # CONFIG_VIDEO_IVTV_DEPRECATED_IOCTLS is not set # CONFIG_VIDEO_IVTV_ALSA is not set CONFIG_VIDEO_FB_IVTV=m # CONFIG_VIDEO_FB_IVTV_FORCE_PAT is not set # CONFIG_VIDEO_HEXIUM_GEMINI is not set # CONFIG_VIDEO_HEXIUM_ORION is not set # CONFIG_VIDEO_MXB is not set # CONFIG_VIDEO_DT3155 is not set # # Media capture/analog/hybrid TV support # CONFIG_VIDEO_CX18=m CONFIG_VIDEO_CX18_ALSA=m CONFIG_VIDEO_CX23885=m CONFIG_MEDIA_ALTERA_CI=m # CONFIG_VIDEO_CX25821 is not set CONFIG_VIDEO_CX88=m CONFIG_VIDEO_CX88_ALSA=m CONFIG_VIDEO_CX88_BLACKBIRD=m CONFIG_VIDEO_CX88_DVB=m CONFIG_VIDEO_CX88_ENABLE_VP3054=y CONFIG_VIDEO_CX88_VP3054=m CONFIG_VIDEO_CX88_MPEG=m CONFIG_VIDEO_BT848=m CONFIG_DVB_BT8XX=m CONFIG_VIDEO_SAA7134=m CONFIG_VIDEO_SAA7134_ALSA=m CONFIG_VIDEO_SAA7134_RC=y CONFIG_VIDEO_SAA7134_DVB=m CONFIG_VIDEO_SAA7164=m # # Media digital TV PCI Adapters # CONFIG_DVB_AV7110_IR=y CONFIG_DVB_AV7110=m CONFIG_DVB_AV7110_OSD=y CONFIG_DVB_BUDGET_CORE=m CONFIG_DVB_BUDGET=m CONFIG_DVB_BUDGET_CI=m CONFIG_DVB_BUDGET_AV=m CONFIG_DVB_BUDGET_PATCH=m CONFIG_DVB_B2C2_FLEXCOP_PCI=m # CONFIG_DVB_B2C2_FLEXCOP_PCI_DEBUG is not set CONFIG_DVB_PLUTO2=m CONFIG_DVB_DM1105=m CONFIG_DVB_PT1=m # CONFIG_DVB_PT3 is not set CONFIG_MANTIS_CORE=m CONFIG_DVB_MANTIS=m CONFIG_DVB_HOPPER=m CONFIG_DVB_NGENE=m CONFIG_DVB_DDBRIDGE=m # CONFIG_DVB_DDBRIDGE_MSIENABLE is not set # CONFIG_DVB_SMIPCIE is not set # CONFIG_DVB_NETUP_UNIDVB is not set # CONFIG_V4L_PLATFORM_DRIVERS is not set # CONFIG_V4L_MEM2MEM_DRIVERS is not set # CONFIG_V4L_TEST_DRIVERS is not set # CONFIG_DVB_PLATFORM_DRIVERS is not set # # Supported MMC/SDIO adapters # CONFIG_SMS_SDIO_DRV=m CONFIG_RADIO_ADAPTERS=y CONFIG_RADIO_TEA575X=m # CONFIG_RADIO_SI470X is not set # CONFIG_RADIO_SI4713 is not set # CONFIG_USB_MR800 is not set # CONFIG_USB_DSBR is not set # CONFIG_RADIO_MAXIRADIO is not set # CONFIG_RADIO_SHARK is not set # CONFIG_RADIO_SHARK2 is not set # CONFIG_USB_KEENE is not set # CONFIG_USB_RAREMONO is not set # CONFIG_USB_MA901 is not set # CONFIG_RADIO_TEA5764 is not set # CONFIG_RADIO_SAA7706H is not set # CONFIG_RADIO_TEF6862 is not set # CONFIG_RADIO_WL1273 is not set # # Texas Instruments WL128x FM driver (ST based) # # end of Texas Instruments WL128x FM driver (ST based) # # Supported FireWire (IEEE 1394) Adapters # CONFIG_DVB_FIREDTV=m CONFIG_DVB_FIREDTV_INPUT=y CONFIG_MEDIA_COMMON_OPTIONS=y # # common driver options # CONFIG_VIDEO_CX2341X=m CONFIG_VIDEO_TVEEPROM=m CONFIG_CYPRESS_FIRMWARE=m CONFIG_VIDEOBUF2_CORE=m CONFIG_VIDEOBUF2_V4L2=m CONFIG_VIDEOBUF2_MEMOPS=m CONFIG_VIDEOBUF2_VMALLOC=m CONFIG_VIDEOBUF2_DMA_SG=m CONFIG_VIDEOBUF2_DVB=m CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y # CONFIG_SMS_SIANO_DEBUGFS is not set # # Media ancillary drivers (tuners, sensors, i2c, spi, frontends) # CONFIG_MEDIA_SUBDRV_AUTOSELECT=y CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y CONFIG_MEDIA_ATTACH=y CONFIG_VIDEO_IR_I2C=m # # I2C drivers hidden by 'Autoselect ancillary drivers' # # # Audio decoders, processors and mixers # CONFIG_VIDEO_TVAUDIO=m CONFIG_VIDEO_TDA7432=m CONFIG_VIDEO_MSP3400=m CONFIG_VIDEO_CS3308=m CONFIG_VIDEO_CS5345=m CONFIG_VIDEO_CS53L32A=m CONFIG_VIDEO_WM8775=m CONFIG_VIDEO_WM8739=m CONFIG_VIDEO_VP27SMPX=m # # RDS decoders # CONFIG_VIDEO_SAA6588=m # # Video decoders # CONFIG_VIDEO_SAA711X=m # # Video and audio decoders # CONFIG_VIDEO_SAA717X=m CONFIG_VIDEO_CX25840=m # # Video encoders # CONFIG_VIDEO_SAA7127=m # # Camera sensor devices # # # Lens drivers # # # Flash devices # # # Video improvement chips # CONFIG_VIDEO_UPD64031A=m CONFIG_VIDEO_UPD64083=m # # Audio/Video compression chips # CONFIG_VIDEO_SAA6752HS=m # # SDR tuner chips # # # Miscellaneous helper chips # CONFIG_VIDEO_M52790=m # # SPI drivers hidden by 'Autoselect ancillary drivers' # # # Media SPI Adapters # # CONFIG_CXD2880_SPI_DRV is not set # end of Media SPI Adapters CONFIG_MEDIA_TUNER=m # # Tuner drivers hidden by 'Autoselect ancillary drivers' # CONFIG_MEDIA_TUNER_SIMPLE=m CONFIG_MEDIA_TUNER_TDA18250=m CONFIG_MEDIA_TUNER_TDA8290=m CONFIG_MEDIA_TUNER_TDA827X=m CONFIG_MEDIA_TUNER_TDA18271=m CONFIG_MEDIA_TUNER_TDA9887=m CONFIG_MEDIA_TUNER_TEA5761=m CONFIG_MEDIA_TUNER_TEA5767=m CONFIG_MEDIA_TUNER_MT20XX=m CONFIG_MEDIA_TUNER_MT2060=m CONFIG_MEDIA_TUNER_MT2063=m CONFIG_MEDIA_TUNER_MT2266=m CONFIG_MEDIA_TUNER_MT2131=m CONFIG_MEDIA_TUNER_QT1010=m CONFIG_MEDIA_TUNER_XC2028=m CONFIG_MEDIA_TUNER_XC5000=m CONFIG_MEDIA_TUNER_XC4000=m CONFIG_MEDIA_TUNER_MXL5005S=m CONFIG_MEDIA_TUNER_MXL5007T=m CONFIG_MEDIA_TUNER_MC44S803=m CONFIG_MEDIA_TUNER_MAX2165=m CONFIG_MEDIA_TUNER_TDA18218=m CONFIG_MEDIA_TUNER_FC0011=m CONFIG_MEDIA_TUNER_FC0012=m CONFIG_MEDIA_TUNER_FC0013=m CONFIG_MEDIA_TUNER_TDA18212=m CONFIG_MEDIA_TUNER_E4000=m CONFIG_MEDIA_TUNER_FC2580=m CONFIG_MEDIA_TUNER_M88RS6000T=m CONFIG_MEDIA_TUNER_TUA9001=m CONFIG_MEDIA_TUNER_SI2157=m CONFIG_MEDIA_TUNER_IT913X=m CONFIG_MEDIA_TUNER_R820T=m CONFIG_MEDIA_TUNER_QM1D1C0042=m CONFIG_MEDIA_TUNER_QM1D1B0004=m # # DVB Frontend drivers hidden by 'Autoselect ancillary drivers' # # # Multistandard (satellite) frontends # CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m CONFIG_DVB_STV0910=m CONFIG_DVB_STV6110x=m CONFIG_DVB_STV6111=m CONFIG_DVB_MXL5XX=m CONFIG_DVB_M88DS3103=m # # Multistandard (cable + terrestrial) frontends # CONFIG_DVB_DRXK=m CONFIG_DVB_TDA18271C2DD=m CONFIG_DVB_SI2165=m CONFIG_DVB_MN88472=m CONFIG_DVB_MN88473=m # # DVB-S (satellite) frontends # CONFIG_DVB_CX24110=m CONFIG_DVB_CX24123=m CONFIG_DVB_MT312=m CONFIG_DVB_ZL10036=m CONFIG_DVB_ZL10039=m CONFIG_DVB_S5H1420=m CONFIG_DVB_STV0288=m CONFIG_DVB_STB6000=m CONFIG_DVB_STV0299=m CONFIG_DVB_STV6110=m CONFIG_DVB_STV0900=m CONFIG_DVB_TDA8083=m CONFIG_DVB_TDA10086=m CONFIG_DVB_TDA8261=m CONFIG_DVB_VES1X93=m CONFIG_DVB_TUNER_ITD1000=m CONFIG_DVB_TUNER_CX24113=m CONFIG_DVB_TDA826X=m CONFIG_DVB_TUA6100=m CONFIG_DVB_CX24116=m CONFIG_DVB_CX24117=m CONFIG_DVB_CX24120=m CONFIG_DVB_SI21XX=m CONFIG_DVB_TS2020=m CONFIG_DVB_DS3000=m CONFIG_DVB_MB86A16=m CONFIG_DVB_TDA10071=m # # DVB-T (terrestrial) frontends # CONFIG_DVB_SP8870=m CONFIG_DVB_SP887X=m CONFIG_DVB_CX22700=m CONFIG_DVB_CX22702=m CONFIG_DVB_DRXD=m CONFIG_DVB_L64781=m CONFIG_DVB_TDA1004X=m CONFIG_DVB_NXT6000=m CONFIG_DVB_MT352=m CONFIG_DVB_ZL10353=m CONFIG_DVB_DIB3000MB=m CONFIG_DVB_DIB3000MC=m CONFIG_DVB_DIB7000M=m CONFIG_DVB_DIB7000P=m CONFIG_DVB_TDA10048=m CONFIG_DVB_AF9013=m CONFIG_DVB_EC100=m CONFIG_DVB_STV0367=m CONFIG_DVB_CXD2820R=m CONFIG_DVB_CXD2841ER=m CONFIG_DVB_RTL2830=m CONFIG_DVB_RTL2832=m CONFIG_DVB_SI2168=m CONFIG_DVB_GP8PSK_FE=m # # DVB-C (cable) frontends # CONFIG_DVB_VES1820=m CONFIG_DVB_TDA10021=m CONFIG_DVB_TDA10023=m CONFIG_DVB_STV0297=m # # ATSC (North American/Korean Terrestrial/Cable DTV) frontends # CONFIG_DVB_NXT200X=m CONFIG_DVB_OR51211=m CONFIG_DVB_OR51132=m CONFIG_DVB_BCM3510=m CONFIG_DVB_LGDT330X=m CONFIG_DVB_LGDT3305=m CONFIG_DVB_LGDT3306A=m CONFIG_DVB_LG2160=m CONFIG_DVB_S5H1409=m CONFIG_DVB_AU8522=m CONFIG_DVB_AU8522_DTV=m CONFIG_DVB_AU8522_V4L=m CONFIG_DVB_S5H1411=m # # ISDB-T (terrestrial) frontends # CONFIG_DVB_S921=m CONFIG_DVB_DIB8000=m CONFIG_DVB_MB86A20S=m # # ISDB-S (satellite) & ISDB-T (terrestrial) frontends # CONFIG_DVB_TC90522=m # # Digital terrestrial only tuners/PLL # CONFIG_DVB_PLL=m CONFIG_DVB_TUNER_DIB0070=m CONFIG_DVB_TUNER_DIB0090=m # # SEC control devices for DVB-S # CONFIG_DVB_DRX39XYJ=m CONFIG_DVB_LNBH25=m CONFIG_DVB_LNBP21=m CONFIG_DVB_LNBP22=m CONFIG_DVB_ISL6405=m CONFIG_DVB_ISL6421=m CONFIG_DVB_ISL6423=m CONFIG_DVB_A8293=m CONFIG_DVB_LGS8GXX=m CONFIG_DVB_ATBM8830=m CONFIG_DVB_TDA665x=m CONFIG_DVB_IX2505V=m CONFIG_DVB_M88RS2000=m CONFIG_DVB_AF9033=m # # Common Interface (EN50221) controller drivers # CONFIG_DVB_CXD2099=m # # Tools to develop new frontends # CONFIG_DVB_DUMMY_FE=m # # Graphics support # CONFIG_AGP=y CONFIG_AGP_AMD64=y CONFIG_AGP_INTEL=y CONFIG_AGP_SIS=y CONFIG_AGP_VIA=y CONFIG_INTEL_GTT=y CONFIG_VGA_ARB=y CONFIG_VGA_ARB_MAX_GPUS=64 CONFIG_VGA_SWITCHEROO=y CONFIG_DRM=m CONFIG_DRM_MIPI_DSI=y CONFIG_DRM_DP_AUX_CHARDEV=y # CONFIG_DRM_DEBUG_SELFTEST is not set CONFIG_DRM_KMS_HELPER=m CONFIG_DRM_KMS_FB_HELPER=y CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 CONFIG_DRM_LOAD_EDID_FIRMWARE=y # CONFIG_DRM_DP_CEC is not set CONFIG_DRM_TTM=m CONFIG_DRM_TTM_DMA_PAGE_POOL=y CONFIG_DRM_VRAM_HELPER=m CONFIG_DRM_TTM_HELPER=m CONFIG_DRM_GEM_SHMEM_HELPER=y # # I2C encoder or helper chips # CONFIG_DRM_I2C_CH7006=m CONFIG_DRM_I2C_SIL164=m # CONFIG_DRM_I2C_NXP_TDA998X is not set # CONFIG_DRM_I2C_NXP_TDA9950 is not set # end of I2C encoder or helper chips # # ARM devices # # end of ARM devices # CONFIG_DRM_RADEON is not set # CONFIG_DRM_AMDGPU is not set # CONFIG_DRM_NOUVEAU is not set CONFIG_DRM_I915=m CONFIG_DRM_I915_FORCE_PROBE="" CONFIG_DRM_I915_CAPTURE_ERROR=y CONFIG_DRM_I915_COMPRESS_ERROR=y CONFIG_DRM_I915_USERPTR=y CONFIG_DRM_I915_GVT=y CONFIG_DRM_I915_GVT_KVMGT=m CONFIG_DRM_I915_FENCE_TIMEOUT=10000 CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND=250 CONFIG_DRM_I915_HEARTBEAT_INTERVAL=2500 CONFIG_DRM_I915_PREEMPT_TIMEOUT=640 CONFIG_DRM_I915_MAX_REQUEST_BUSYWAIT=8000 CONFIG_DRM_I915_STOP_TIMEOUT=100 CONFIG_DRM_I915_TIMESLICE_DURATION=1 CONFIG_DRM_VGEM=m # CONFIG_DRM_VKMS is not set CONFIG_DRM_VMWGFX=m CONFIG_DRM_VMWGFX_FBCON=y CONFIG_DRM_GMA500=m CONFIG_DRM_GMA600=y CONFIG_DRM_GMA3600=y CONFIG_DRM_UDL=m CONFIG_DRM_AST=m CONFIG_DRM_MGAG200=m CONFIG_DRM_QXL=m CONFIG_DRM_BOCHS=m CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_PANEL=y # # Display Panels # # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set # end of Display Panels CONFIG_DRM_BRIDGE=y CONFIG_DRM_PANEL_BRIDGE=y # # Display Interface Bridges # # CONFIG_DRM_ANALOGIX_ANX78XX is not set # end of Display Interface Bridges # CONFIG_DRM_ETNAVIV is not set CONFIG_DRM_CIRRUS_QEMU=m # CONFIG_DRM_GM12U320 is not set # CONFIG_TINYDRM_HX8357D is not set # CONFIG_TINYDRM_ILI9225 is not set # CONFIG_TINYDRM_ILI9341 is not set # CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set # CONFIG_TINYDRM_ST7586 is not set # CONFIG_TINYDRM_ST7735R is not set # CONFIG_DRM_XEN is not set # CONFIG_DRM_VBOXVIDEO is not set # CONFIG_DRM_LEGACY is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # # Frame buffer Devices # CONFIG_FB_CMDLINE=y CONFIG_FB_NOTIFY=y CONFIG_FB=y # CONFIG_FIRMWARE_EDID is not set CONFIG_FB_BOOT_VESA_SUPPORT=y CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_IMAGEBLIT=y CONFIG_FB_SYS_FILLRECT=m CONFIG_FB_SYS_COPYAREA=m CONFIG_FB_SYS_IMAGEBLIT=m # CONFIG_FB_FOREIGN_ENDIAN is not set CONFIG_FB_SYS_FOPS=m CONFIG_FB_DEFERRED_IO=y # CONFIG_FB_MODE_HELPERS is not set CONFIG_FB_TILEBLITTING=y # # Frame buffer hardware drivers # # CONFIG_FB_CIRRUS is not set # CONFIG_FB_PM2 is not set # CONFIG_FB_CYBER2000 is not set # CONFIG_FB_ARC is not set # CONFIG_FB_ASILIANT is not set # CONFIG_FB_IMSTT is not set # CONFIG_FB_VGA16 is not set # CONFIG_FB_UVESA is not set CONFIG_FB_VESA=y CONFIG_FB_EFI=y # CONFIG_FB_N411 is not set # CONFIG_FB_HGA is not set # CONFIG_FB_OPENCORES is not set # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_NVIDIA is not set # CONFIG_FB_RIVA is not set # CONFIG_FB_I740 is not set # CONFIG_FB_LE80578 is not set # CONFIG_FB_MATROX is not set # CONFIG_FB_RADEON is not set # CONFIG_FB_ATY128 is not set # CONFIG_FB_ATY is not set # CONFIG_FB_S3 is not set # CONFIG_FB_SAVAGE is not set # CONFIG_FB_SIS is not set # CONFIG_FB_VIA is not set # CONFIG_FB_NEOMAGIC is not set # CONFIG_FB_KYRO is not set # CONFIG_FB_3DFX is not set # CONFIG_FB_VOODOO1 is not set # CONFIG_FB_VT8623 is not set # CONFIG_FB_TRIDENT is not set # CONFIG_FB_ARK is not set # CONFIG_FB_PM3 is not set # CONFIG_FB_CARMINE is not set # CONFIG_FB_SM501 is not set # CONFIG_FB_SMSCUFX is not set # CONFIG_FB_UDL is not set # CONFIG_FB_IBM_GXT4500 is not set # CONFIG_FB_VIRTUAL is not set # CONFIG_XEN_FBDEV_FRONTEND is not set # CONFIG_FB_METRONOME is not set # CONFIG_FB_MB862XX is not set CONFIG_FB_HYPERV=m # CONFIG_FB_SIMPLE is not set # CONFIG_FB_SM712 is not set # end of Frame buffer Devices # # Backlight & LCD device support # CONFIG_LCD_CLASS_DEVICE=m # CONFIG_LCD_L4F00242T03 is not set # CONFIG_LCD_LMS283GF05 is not set # CONFIG_LCD_LTV350QV is not set # CONFIG_LCD_ILI922X is not set # CONFIG_LCD_ILI9320 is not set # CONFIG_LCD_TDO24M is not set # CONFIG_LCD_VGG2432A4 is not set CONFIG_LCD_PLATFORM=m # CONFIG_LCD_AMS369FG06 is not set # CONFIG_LCD_LMS501KF03 is not set # CONFIG_LCD_HX8357 is not set # CONFIG_LCD_OTM3225A is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_GENERIC is not set # CONFIG_BACKLIGHT_PWM is not set CONFIG_BACKLIGHT_APPLE=m # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_SAHARA is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set CONFIG_BACKLIGHT_LP855X=m # CONFIG_BACKLIGHT_GPIO is not set # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set # CONFIG_BACKLIGHT_ARCXCNN is not set # end of Backlight & LCD device support CONFIG_HDMI=y # # Console display driver support # CONFIG_VGA_CONSOLE=y CONFIG_VGACON_SOFT_SCROLLBACK=y CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 # CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT is not set CONFIG_DUMMY_CONSOLE=y CONFIG_DUMMY_CONSOLE_COLUMNS=80 CONFIG_DUMMY_CONSOLE_ROWS=25 CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y # CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set # end of Console display driver support CONFIG_LOGO=y # CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_VGA16 is not set CONFIG_LOGO_LINUX_CLUT224=y # end of Graphics support CONFIG_SOUND=m CONFIG_SOUND_OSS_CORE=y CONFIG_SOUND_OSS_CORE_PRECLAIM=y CONFIG_SND=m CONFIG_SND_TIMER=m CONFIG_SND_PCM=m CONFIG_SND_PCM_ELD=y CONFIG_SND_HWDEP=m CONFIG_SND_SEQ_DEVICE=m CONFIG_SND_RAWMIDI=m CONFIG_SND_COMPRESS_OFFLOAD=m CONFIG_SND_JACK=y CONFIG_SND_JACK_INPUT_DEV=y CONFIG_SND_OSSEMUL=y # CONFIG_SND_MIXER_OSS is not set # CONFIG_SND_PCM_OSS is not set CONFIG_SND_PCM_TIMER=y CONFIG_SND_HRTIMER=m CONFIG_SND_DYNAMIC_MINORS=y CONFIG_SND_MAX_CARDS=32 # CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set CONFIG_SND_VMASTER=y CONFIG_SND_DMA_SGBUF=y CONFIG_SND_SEQUENCER=m CONFIG_SND_SEQ_DUMMY=m CONFIG_SND_SEQUENCER_OSS=m CONFIG_SND_SEQ_HRTIMER_DEFAULT=y CONFIG_SND_SEQ_MIDI_EVENT=m CONFIG_SND_SEQ_MIDI=m CONFIG_SND_SEQ_MIDI_EMUL=m CONFIG_SND_SEQ_VIRMIDI=m CONFIG_SND_MPU401_UART=m CONFIG_SND_OPL3_LIB=m CONFIG_SND_OPL3_LIB_SEQ=m CONFIG_SND_VX_LIB=m CONFIG_SND_AC97_CODEC=m CONFIG_SND_DRIVERS=y CONFIG_SND_PCSP=m CONFIG_SND_DUMMY=m CONFIG_SND_ALOOP=m CONFIG_SND_VIRMIDI=m CONFIG_SND_MTPAV=m # CONFIG_SND_MTS64 is not set # CONFIG_SND_SERIAL_U16550 is not set CONFIG_SND_MPU401=m # CONFIG_SND_PORTMAN2X4 is not set CONFIG_SND_AC97_POWER_SAVE=y CONFIG_SND_AC97_POWER_SAVE_DEFAULT=5 CONFIG_SND_PCI=y CONFIG_SND_AD1889=m # CONFIG_SND_ALS300 is not set # CONFIG_SND_ALS4000 is not set CONFIG_SND_ALI5451=m CONFIG_SND_ASIHPI=m CONFIG_SND_ATIIXP=m CONFIG_SND_ATIIXP_MODEM=m CONFIG_SND_AU8810=m CONFIG_SND_AU8820=m CONFIG_SND_AU8830=m # CONFIG_SND_AW2 is not set # CONFIG_SND_AZT3328 is not set CONFIG_SND_BT87X=m # CONFIG_SND_BT87X_OVERCLOCK is not set CONFIG_SND_CA0106=m CONFIG_SND_CMIPCI=m CONFIG_SND_OXYGEN_LIB=m CONFIG_SND_OXYGEN=m # CONFIG_SND_CS4281 is not set CONFIG_SND_CS46XX=m CONFIG_SND_CS46XX_NEW_DSP=y CONFIG_SND_CTXFI=m CONFIG_SND_DARLA20=m CONFIG_SND_GINA20=m CONFIG_SND_LAYLA20=m CONFIG_SND_DARLA24=m CONFIG_SND_GINA24=m CONFIG_SND_LAYLA24=m CONFIG_SND_MONA=m CONFIG_SND_MIA=m CONFIG_SND_ECHO3G=m CONFIG_SND_INDIGO=m CONFIG_SND_INDIGOIO=m CONFIG_SND_INDIGODJ=m CONFIG_SND_INDIGOIOX=m CONFIG_SND_INDIGODJX=m CONFIG_SND_EMU10K1=m CONFIG_SND_EMU10K1_SEQ=m CONFIG_SND_EMU10K1X=m CONFIG_SND_ENS1370=m CONFIG_SND_ENS1371=m # CONFIG_SND_ES1938 is not set CONFIG_SND_ES1968=m CONFIG_SND_ES1968_INPUT=y CONFIG_SND_ES1968_RADIO=y # CONFIG_SND_FM801 is not set CONFIG_SND_HDSP=m CONFIG_SND_HDSPM=m CONFIG_SND_ICE1712=m CONFIG_SND_ICE1724=m CONFIG_SND_INTEL8X0=m CONFIG_SND_INTEL8X0M=m CONFIG_SND_KORG1212=m CONFIG_SND_LOLA=m CONFIG_SND_LX6464ES=m CONFIG_SND_MAESTRO3=m CONFIG_SND_MAESTRO3_INPUT=y CONFIG_SND_MIXART=m # CONFIG_SND_NM256 is not set CONFIG_SND_PCXHR=m # CONFIG_SND_RIPTIDE is not set CONFIG_SND_RME32=m CONFIG_SND_RME96=m CONFIG_SND_RME9652=m # CONFIG_SND_SONICVIBES is not set CONFIG_SND_TRIDENT=m CONFIG_SND_VIA82XX=m CONFIG_SND_VIA82XX_MODEM=m CONFIG_SND_VIRTUOSO=m CONFIG_SND_VX222=m # CONFIG_SND_YMFPCI is not set # # HD-Audio # CONFIG_SND_HDA=m CONFIG_SND_HDA_INTEL=m CONFIG_SND_HDA_HWDEP=y CONFIG_SND_HDA_RECONFIG=y CONFIG_SND_HDA_INPUT_BEEP=y CONFIG_SND_HDA_INPUT_BEEP_MODE=0 CONFIG_SND_HDA_PATCH_LOADER=y CONFIG_SND_HDA_CODEC_REALTEK=m CONFIG_SND_HDA_CODEC_ANALOG=m CONFIG_SND_HDA_CODEC_SIGMATEL=m CONFIG_SND_HDA_CODEC_VIA=m CONFIG_SND_HDA_CODEC_HDMI=m CONFIG_SND_HDA_CODEC_CIRRUS=m CONFIG_SND_HDA_CODEC_CONEXANT=m CONFIG_SND_HDA_CODEC_CA0110=m CONFIG_SND_HDA_CODEC_CA0132=m CONFIG_SND_HDA_CODEC_CA0132_DSP=y CONFIG_SND_HDA_CODEC_CMEDIA=m CONFIG_SND_HDA_CODEC_SI3054=m CONFIG_SND_HDA_GENERIC=m CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 # end of HD-Audio CONFIG_SND_HDA_CORE=m CONFIG_SND_HDA_DSP_LOADER=y CONFIG_SND_HDA_COMPONENT=y CONFIG_SND_HDA_I915=y CONFIG_SND_HDA_EXT_CORE=m CONFIG_SND_HDA_PREALLOC_SIZE=512 CONFIG_SND_INTEL_NHLT=y CONFIG_SND_INTEL_DSP_CONFIG=m # CONFIG_SND_SPI is not set CONFIG_SND_USB=y CONFIG_SND_USB_AUDIO=m CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y CONFIG_SND_USB_UA101=m CONFIG_SND_USB_USX2Y=m CONFIG_SND_USB_CAIAQ=m CONFIG_SND_USB_CAIAQ_INPUT=y CONFIG_SND_USB_US122L=m CONFIG_SND_USB_6FIRE=m CONFIG_SND_USB_HIFACE=m CONFIG_SND_BCD2000=m CONFIG_SND_USB_LINE6=m CONFIG_SND_USB_POD=m CONFIG_SND_USB_PODHD=m CONFIG_SND_USB_TONEPORT=m CONFIG_SND_USB_VARIAX=m CONFIG_SND_FIREWIRE=y CONFIG_SND_FIREWIRE_LIB=m # CONFIG_SND_DICE is not set # CONFIG_SND_OXFW is not set CONFIG_SND_ISIGHT=m # CONFIG_SND_FIREWORKS is not set # CONFIG_SND_BEBOB is not set # CONFIG_SND_FIREWIRE_DIGI00X is not set # CONFIG_SND_FIREWIRE_TASCAM is not set # CONFIG_SND_FIREWIRE_MOTU is not set # CONFIG_SND_FIREFACE is not set CONFIG_SND_SOC=m CONFIG_SND_SOC_COMPRESS=y CONFIG_SND_SOC_TOPOLOGY=y CONFIG_SND_SOC_ACPI=m # CONFIG_SND_SOC_AMD_ACP is not set # CONFIG_SND_SOC_AMD_ACP3x is not set # CONFIG_SND_ATMEL_SOC is not set # CONFIG_SND_BCM63XX_I2S_WHISTLER is not set # CONFIG_SND_DESIGNWARE_I2S is not set # # SoC Audio for Freescale CPUs # # # Common SoC Audio options for Freescale CPUs: # # CONFIG_SND_SOC_FSL_ASRC is not set # CONFIG_SND_SOC_FSL_SAI is not set # CONFIG_SND_SOC_FSL_AUDMIX is not set # CONFIG_SND_SOC_FSL_SSI is not set # CONFIG_SND_SOC_FSL_SPDIF is not set # CONFIG_SND_SOC_FSL_ESAI is not set # CONFIG_SND_SOC_FSL_MICFIL is not set # CONFIG_SND_SOC_IMX_AUDMUX is not set # end of SoC Audio for Freescale CPUs # CONFIG_SND_I2S_HI6210_I2S is not set # CONFIG_SND_SOC_IMG is not set CONFIG_SND_SOC_INTEL_SST_TOPLEVEL=y CONFIG_SND_SST_IPC=m CONFIG_SND_SST_IPC_ACPI=m CONFIG_SND_SOC_INTEL_SST_ACPI=m CONFIG_SND_SOC_INTEL_SST=m CONFIG_SND_SOC_INTEL_SST_FIRMWARE=m CONFIG_SND_SOC_INTEL_HASWELL=m CONFIG_SND_SST_ATOM_HIFI2_PLATFORM=m # CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_PCI is not set CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_ACPI=m CONFIG_SND_SOC_INTEL_SKYLAKE=m CONFIG_SND_SOC_INTEL_SKL=m CONFIG_SND_SOC_INTEL_APL=m CONFIG_SND_SOC_INTEL_KBL=m CONFIG_SND_SOC_INTEL_GLK=m CONFIG_SND_SOC_INTEL_CNL=m CONFIG_SND_SOC_INTEL_CFL=m # CONFIG_SND_SOC_INTEL_CML_H is not set # CONFIG_SND_SOC_INTEL_CML_LP is not set CONFIG_SND_SOC_INTEL_SKYLAKE_FAMILY=m CONFIG_SND_SOC_INTEL_SKYLAKE_SSP_CLK=m # CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC is not set CONFIG_SND_SOC_INTEL_SKYLAKE_COMMON=m CONFIG_SND_SOC_ACPI_INTEL_MATCH=m CONFIG_SND_SOC_INTEL_MACH=y # CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES is not set CONFIG_SND_SOC_INTEL_HASWELL_MACH=m # CONFIG_SND_SOC_INTEL_BDW_RT5650_MACH is not set CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH=m CONFIG_SND_SOC_INTEL_BROADWELL_MACH=m CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH=m CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH=m CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH=m CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH=m CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH=m # CONFIG_SND_SOC_INTEL_CHT_BSW_NAU8824_MACH is not set # CONFIG_SND_SOC_INTEL_BYT_CHT_CX2072X_MACH is not set CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH=m CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH=m CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH=m CONFIG_SND_SOC_INTEL_SKL_RT286_MACH=m CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH=m CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=m CONFIG_SND_SOC_INTEL_DA7219_MAX98357A_GENERIC=m CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_COMMON=m CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH=m CONFIG_SND_SOC_INTEL_BXT_RT298_MACH=m CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH=m CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH=m # CONFIG_SND_SOC_INTEL_KBL_DA7219_MAX98357A_MACH is not set # CONFIG_SND_SOC_INTEL_KBL_DA7219_MAX98927_MACH is not set # CONFIG_SND_SOC_INTEL_KBL_RT5660_MACH is not set # CONFIG_SND_SOC_MTK_BTCVSD is not set # CONFIG_SND_SOC_SOF_TOPLEVEL is not set # # STMicroelectronics STM32 SOC audio support # # end of STMicroelectronics STM32 SOC audio support # CONFIG_SND_SOC_XILINX_I2S is not set # CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set # CONFIG_SND_SOC_XILINX_SPDIF is not set # CONFIG_SND_SOC_XTFPGA_I2S is not set # CONFIG_ZX_TDM is not set CONFIG_SND_SOC_I2C_AND_SPI=m # # CODEC drivers # # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set # CONFIG_SND_SOC_ADAU1761_SPI is not set # CONFIG_SND_SOC_ADAU7002 is not set # CONFIG_SND_SOC_ADAU7118_HW is not set # CONFIG_SND_SOC_ADAU7118_I2C is not set # CONFIG_SND_SOC_AK4104 is not set # CONFIG_SND_SOC_AK4118 is not set # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set # CONFIG_SND_SOC_AK4613 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK5558 is not set # CONFIG_SND_SOC_ALC5623 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CS35L32 is not set # CONFIG_SND_SOC_CS35L33 is not set # CONFIG_SND_SOC_CS35L34 is not set # CONFIG_SND_SOC_CS35L35 is not set # CONFIG_SND_SOC_CS35L36 is not set # CONFIG_SND_SOC_CS42L42 is not set # CONFIG_SND_SOC_CS42L51_I2C is not set # CONFIG_SND_SOC_CS42L52 is not set # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set # CONFIG_SND_SOC_CS4271_I2C is not set # CONFIG_SND_SOC_CS4271_SPI is not set # CONFIG_SND_SOC_CS42XX8_I2C is not set # CONFIG_SND_SOC_CS43130 is not set # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set # CONFIG_SND_SOC_CX2072X is not set CONFIG_SND_SOC_DA7213=m CONFIG_SND_SOC_DA7219=m CONFIG_SND_SOC_DMIC=m # CONFIG_SND_SOC_ES7134 is not set # CONFIG_SND_SOC_ES7241 is not set CONFIG_SND_SOC_ES8316=m # CONFIG_SND_SOC_ES8328_I2C is not set # CONFIG_SND_SOC_ES8328_SPI is not set # CONFIG_SND_SOC_GTM601 is not set CONFIG_SND_SOC_HDAC_HDMI=m # CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_MAX98088 is not set CONFIG_SND_SOC_MAX98090=m CONFIG_SND_SOC_MAX98357A=m # CONFIG_SND_SOC_MAX98504 is not set # CONFIG_SND_SOC_MAX9867 is not set CONFIG_SND_SOC_MAX98927=m # CONFIG_SND_SOC_MAX98373 is not set # CONFIG_SND_SOC_MAX9860 is not set # CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set # CONFIG_SND_SOC_PCM1681 is not set # CONFIG_SND_SOC_PCM1789_I2C is not set # CONFIG_SND_SOC_PCM179X_I2C is not set # CONFIG_SND_SOC_PCM179X_SPI is not set # CONFIG_SND_SOC_PCM186X_I2C is not set # CONFIG_SND_SOC_PCM186X_SPI is not set # CONFIG_SND_SOC_PCM3060_I2C is not set # CONFIG_SND_SOC_PCM3060_SPI is not set # CONFIG_SND_SOC_PCM3168A_I2C is not set # CONFIG_SND_SOC_PCM3168A_SPI is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set # CONFIG_SND_SOC_RK3328 is not set CONFIG_SND_SOC_RL6231=m CONFIG_SND_SOC_RL6347A=m CONFIG_SND_SOC_RT286=m CONFIG_SND_SOC_RT298=m CONFIG_SND_SOC_RT5514=m CONFIG_SND_SOC_RT5514_SPI=m # CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set CONFIG_SND_SOC_RT5640=m CONFIG_SND_SOC_RT5645=m CONFIG_SND_SOC_RT5651=m CONFIG_SND_SOC_RT5663=m CONFIG_SND_SOC_RT5670=m CONFIG_SND_SOC_RT5677=m CONFIG_SND_SOC_RT5677_SPI=m # CONFIG_SND_SOC_SGTL5000 is not set # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set # CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set # CONFIG_SND_SOC_SPDIF is not set # CONFIG_SND_SOC_SSM2305 is not set # CONFIG_SND_SOC_SSM2602_SPI is not set # CONFIG_SND_SOC_SSM2602_I2C is not set CONFIG_SND_SOC_SSM4567=m # CONFIG_SND_SOC_STA32X is not set # CONFIG_SND_SOC_STA350 is not set # CONFIG_SND_SOC_STI_SAS is not set # CONFIG_SND_SOC_TAS2552 is not set # CONFIG_SND_SOC_TAS2562 is not set # CONFIG_SND_SOC_TAS2770 is not set # CONFIG_SND_SOC_TAS5086 is not set # CONFIG_SND_SOC_TAS571X is not set # CONFIG_SND_SOC_TAS5720 is not set # CONFIG_SND_SOC_TAS6424 is not set # CONFIG_SND_SOC_TDA7419 is not set # CONFIG_SND_SOC_TFA9879 is not set # CONFIG_SND_SOC_TLV320AIC23_I2C is not set # CONFIG_SND_SOC_TLV320AIC23_SPI is not set # CONFIG_SND_SOC_TLV320AIC31XX is not set # CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set # CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set # CONFIG_SND_SOC_TLV320AIC3X is not set # CONFIG_SND_SOC_TLV320ADCX140 is not set CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set # CONFIG_SND_SOC_WM8524 is not set # CONFIG_SND_SOC_WM8580 is not set # CONFIG_SND_SOC_WM8711 is not set # CONFIG_SND_SOC_WM8728 is not set # CONFIG_SND_SOC_WM8731 is not set # CONFIG_SND_SOC_WM8737 is not set # CONFIG_SND_SOC_WM8741 is not set # CONFIG_SND_SOC_WM8750 is not set # CONFIG_SND_SOC_WM8753 is not set # CONFIG_SND_SOC_WM8770 is not set # CONFIG_SND_SOC_WM8776 is not set # CONFIG_SND_SOC_WM8782 is not set # CONFIG_SND_SOC_WM8804_I2C is not set # CONFIG_SND_SOC_WM8804_SPI is not set # CONFIG_SND_SOC_WM8903 is not set # CONFIG_SND_SOC_WM8904 is not set # CONFIG_SND_SOC_WM8960 is not set # CONFIG_SND_SOC_WM8962 is not set # CONFIG_SND_SOC_WM8974 is not set # CONFIG_SND_SOC_WM8978 is not set # CONFIG_SND_SOC_WM8985 is not set # CONFIG_SND_SOC_ZX_AUD96P22 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_MT6660 is not set # CONFIG_SND_SOC_NAU8540 is not set # CONFIG_SND_SOC_NAU8810 is not set # CONFIG_SND_SOC_NAU8822 is not set CONFIG_SND_SOC_NAU8824=m CONFIG_SND_SOC_NAU8825=m # CONFIG_SND_SOC_TPA6130A2 is not set # end of CODEC drivers # CONFIG_SND_SIMPLE_CARD is not set CONFIG_SND_X86=y CONFIG_HDMI_LPE_AUDIO=m CONFIG_SND_SYNTH_EMUX=m # CONFIG_SND_XEN_FRONTEND is not set CONFIG_AC97_BUS=m # # HID support # CONFIG_HID=y CONFIG_HID_BATTERY_STRENGTH=y CONFIG_HIDRAW=y CONFIG_UHID=m CONFIG_HID_GENERIC=y # # Special HID drivers # CONFIG_HID_A4TECH=y # CONFIG_HID_ACCUTOUCH is not set CONFIG_HID_ACRUX=m # CONFIG_HID_ACRUX_FF is not set CONFIG_HID_APPLE=y CONFIG_HID_APPLEIR=m # CONFIG_HID_ASUS is not set CONFIG_HID_AUREAL=m CONFIG_HID_BELKIN=y # CONFIG_HID_BETOP_FF is not set # CONFIG_HID_BIGBEN_FF is not set CONFIG_HID_CHERRY=y CONFIG_HID_CHICONY=y # CONFIG_HID_CORSAIR is not set # CONFIG_HID_COUGAR is not set # CONFIG_HID_MACALLY is not set CONFIG_HID_PRODIKEYS=m # CONFIG_HID_CMEDIA is not set # CONFIG_HID_CP2112 is not set # CONFIG_HID_CREATIVE_SB0540 is not set CONFIG_HID_CYPRESS=y CONFIG_HID_DRAGONRISE=m # CONFIG_DRAGONRISE_FF is not set # CONFIG_HID_EMS_FF is not set # CONFIG_HID_ELAN is not set CONFIG_HID_ELECOM=m # CONFIG_HID_ELO is not set CONFIG_HID_EZKEY=y # CONFIG_HID_GEMBIRD is not set # CONFIG_HID_GFRM is not set # CONFIG_HID_GLORIOUS is not set CONFIG_HID_HOLTEK=m # CONFIG_HOLTEK_FF is not set # CONFIG_HID_GT683R is not set CONFIG_HID_KEYTOUCH=m CONFIG_HID_KYE=m CONFIG_HID_UCLOGIC=m CONFIG_HID_WALTOP=m # CONFIG_HID_VIEWSONIC is not set CONFIG_HID_GYRATION=m CONFIG_HID_ICADE=m CONFIG_HID_ITE=y # CONFIG_HID_JABRA is not set CONFIG_HID_TWINHAN=m CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=m CONFIG_HID_LED=m # CONFIG_HID_LENOVO is not set CONFIG_HID_LOGITECH=y CONFIG_HID_LOGITECH_DJ=m CONFIG_HID_LOGITECH_HIDPP=m # CONFIG_LOGITECH_FF is not set # CONFIG_LOGIRUMBLEPAD2_FF is not set # CONFIG_LOGIG940_FF is not set # CONFIG_LOGIWHEELS_FF is not set CONFIG_HID_MAGICMOUSE=y # CONFIG_HID_MALTRON is not set # CONFIG_HID_MAYFLASH is not set CONFIG_HID_REDRAGON=y CONFIG_HID_MICROSOFT=y CONFIG_HID_MONTEREY=y CONFIG_HID_MULTITOUCH=m # CONFIG_HID_NTI is not set CONFIG_HID_NTRIG=y CONFIG_HID_ORTEK=m CONFIG_HID_PANTHERLORD=m # CONFIG_PANTHERLORD_FF is not set # CONFIG_HID_PENMOUNT is not set CONFIG_HID_PETALYNX=m CONFIG_HID_PICOLCD=m CONFIG_HID_PICOLCD_FB=y CONFIG_HID_PICOLCD_BACKLIGHT=y CONFIG_HID_PICOLCD_LCD=y CONFIG_HID_PICOLCD_LEDS=y CONFIG_HID_PICOLCD_CIR=y CONFIG_HID_PLANTRONICS=y CONFIG_HID_PRIMAX=m # CONFIG_HID_RETRODE is not set CONFIG_HID_ROCCAT=m CONFIG_HID_SAITEK=m CONFIG_HID_SAMSUNG=m CONFIG_HID_SONY=m # CONFIG_SONY_FF is not set CONFIG_HID_SPEEDLINK=m # CONFIG_HID_STEAM is not set CONFIG_HID_STEELSERIES=m CONFIG_HID_SUNPLUS=m CONFIG_HID_RMI=m CONFIG_HID_GREENASIA=m # CONFIG_GREENASIA_FF is not set CONFIG_HID_HYPERV_MOUSE=m CONFIG_HID_SMARTJOYPLUS=m # CONFIG_SMARTJOYPLUS_FF is not set CONFIG_HID_TIVO=m CONFIG_HID_TOPSEED=m CONFIG_HID_THINGM=m CONFIG_HID_THRUSTMASTER=m # CONFIG_THRUSTMASTER_FF is not set # CONFIG_HID_UDRAW_PS3 is not set # CONFIG_HID_U2FZERO is not set CONFIG_HID_WACOM=m CONFIG_HID_WIIMOTE=m # CONFIG_HID_XINMO is not set CONFIG_HID_ZEROPLUS=m # CONFIG_ZEROPLUS_FF is not set CONFIG_HID_ZYDACRON=m CONFIG_HID_SENSOR_HUB=m CONFIG_HID_SENSOR_CUSTOM_SENSOR=m CONFIG_HID_ALPS=m # CONFIG_HID_MCP2221 is not set # end of Special HID drivers # # USB HID support # CONFIG_USB_HID=y CONFIG_HID_PID=y CONFIG_USB_HIDDEV=y # end of USB HID support # # I2C HID support # CONFIG_I2C_HID=m # end of I2C HID support # # Intel ISH HID support # CONFIG_INTEL_ISH_HID=y # CONFIG_INTEL_ISH_FIRMWARE_DOWNLOADER is not set # end of Intel ISH HID support # end of HID support CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y # CONFIG_USB_LED_TRIG is not set # CONFIG_USB_ULPI_BUS is not set # CONFIG_USB_CONN_GPIO is not set CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y CONFIG_USB_PCI=y CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # # Miscellaneous USB options # CONFIG_USB_DEFAULT_PERSIST=y # CONFIG_USB_DYNAMIC_MINORS is not set # CONFIG_USB_OTG is not set # CONFIG_USB_OTG_WHITELIST is not set CONFIG_USB_LEDS_TRIGGER_USBPORT=m CONFIG_USB_AUTOSUSPEND_DELAY=2 CONFIG_USB_MON=y # # USB Host Controller Drivers # # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DBGCAP is not set CONFIG_USB_XHCI_PCI=y # CONFIG_USB_XHCI_PLATFORM is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y CONFIG_USB_EHCI_PCI=y # CONFIG_USB_EHCI_FSL is not set # CONFIG_USB_EHCI_HCD_PLATFORM is not set # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_FOTG210_HCD is not set # CONFIG_USB_MAX3421_HCD is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_PCI=y # CONFIG_USB_OHCI_HCD_PLATFORM is not set CONFIG_USB_UHCI_HCD=y # CONFIG_USB_U132_HCD is not set # CONFIG_USB_SL811_HCD is not set # CONFIG_USB_R8A66597_HCD is not set # CONFIG_USB_HCD_BCMA is not set # CONFIG_USB_HCD_SSB is not set # CONFIG_USB_HCD_TEST_MODE is not set # # USB Device Class drivers # CONFIG_USB_ACM=m CONFIG_USB_PRINTER=m CONFIG_USB_WDM=m CONFIG_USB_TMC=m # # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may # # # also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=m # CONFIG_USB_STORAGE_DEBUG is not set CONFIG_USB_STORAGE_REALTEK=m CONFIG_REALTEK_AUTOPM=y CONFIG_USB_STORAGE_DATAFAB=m CONFIG_USB_STORAGE_FREECOM=m CONFIG_USB_STORAGE_ISD200=m CONFIG_USB_STORAGE_USBAT=m CONFIG_USB_STORAGE_SDDR09=m CONFIG_USB_STORAGE_SDDR55=m CONFIG_USB_STORAGE_JUMPSHOT=m CONFIG_USB_STORAGE_ALAUDA=m CONFIG_USB_STORAGE_ONETOUCH=m CONFIG_USB_STORAGE_KARMA=m CONFIG_USB_STORAGE_CYPRESS_ATACB=m CONFIG_USB_STORAGE_ENE_UB6250=m CONFIG_USB_UAS=m # # USB Imaging devices # CONFIG_USB_MDC800=m CONFIG_USB_MICROTEK=m CONFIG_USBIP_CORE=m # CONFIG_USBIP_VHCI_HCD is not set # CONFIG_USBIP_HOST is not set # CONFIG_USBIP_DEBUG is not set # CONFIG_USB_CDNS3 is not set # CONFIG_USB_MUSB_HDRC is not set # CONFIG_USB_DWC3 is not set # CONFIG_USB_DWC2 is not set # CONFIG_USB_CHIPIDEA is not set # CONFIG_USB_ISP1760 is not set # # USB port drivers # CONFIG_USB_USS720=m CONFIG_USB_SERIAL=y CONFIG_USB_SERIAL_CONSOLE=y CONFIG_USB_SERIAL_GENERIC=y # CONFIG_USB_SERIAL_SIMPLE is not set CONFIG_USB_SERIAL_AIRCABLE=m CONFIG_USB_SERIAL_ARK3116=m CONFIG_USB_SERIAL_BELKIN=m CONFIG_USB_SERIAL_CH341=m CONFIG_USB_SERIAL_WHITEHEAT=m CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m CONFIG_USB_SERIAL_CP210X=m CONFIG_USB_SERIAL_CYPRESS_M8=m CONFIG_USB_SERIAL_EMPEG=m CONFIG_USB_SERIAL_FTDI_SIO=m CONFIG_USB_SERIAL_VISOR=m CONFIG_USB_SERIAL_IPAQ=m CONFIG_USB_SERIAL_IR=m CONFIG_USB_SERIAL_EDGEPORT=m CONFIG_USB_SERIAL_EDGEPORT_TI=m # CONFIG_USB_SERIAL_F81232 is not set # CONFIG_USB_SERIAL_F8153X is not set CONFIG_USB_SERIAL_GARMIN=m CONFIG_USB_SERIAL_IPW=m CONFIG_USB_SERIAL_IUU=m CONFIG_USB_SERIAL_KEYSPAN_PDA=m CONFIG_USB_SERIAL_KEYSPAN=m CONFIG_USB_SERIAL_KLSI=m CONFIG_USB_SERIAL_KOBIL_SCT=m CONFIG_USB_SERIAL_MCT_U232=m # CONFIG_USB_SERIAL_METRO is not set CONFIG_USB_SERIAL_MOS7720=m CONFIG_USB_SERIAL_MOS7715_PARPORT=y CONFIG_USB_SERIAL_MOS7840=m # CONFIG_USB_SERIAL_MXUPORT is not set CONFIG_USB_SERIAL_NAVMAN=m CONFIG_USB_SERIAL_PL2303=m CONFIG_USB_SERIAL_OTI6858=m CONFIG_USB_SERIAL_QCAUX=m CONFIG_USB_SERIAL_QUALCOMM=m CONFIG_USB_SERIAL_SPCP8X5=m CONFIG_USB_SERIAL_SAFE=m CONFIG_USB_SERIAL_SAFE_PADDED=y CONFIG_USB_SERIAL_SIERRAWIRELESS=m CONFIG_USB_SERIAL_SYMBOL=m # CONFIG_USB_SERIAL_TI is not set CONFIG_USB_SERIAL_CYBERJACK=m CONFIG_USB_SERIAL_XIRCOM=m CONFIG_USB_SERIAL_WWAN=m CONFIG_USB_SERIAL_OPTION=m CONFIG_USB_SERIAL_OMNINET=m CONFIG_USB_SERIAL_OPTICON=m CONFIG_USB_SERIAL_XSENS_MT=m # CONFIG_USB_SERIAL_WISHBONE is not set CONFIG_USB_SERIAL_SSU100=m CONFIG_USB_SERIAL_QT2=m # CONFIG_USB_SERIAL_UPD78F0730 is not set CONFIG_USB_SERIAL_DEBUG=m # # USB Miscellaneous drivers # CONFIG_USB_EMI62=m CONFIG_USB_EMI26=m CONFIG_USB_ADUTUX=m CONFIG_USB_SEVSEG=m CONFIG_USB_LEGOTOWER=m CONFIG_USB_LCD=m # CONFIG_USB_CYPRESS_CY7C63 is not set # CONFIG_USB_CYTHERM is not set CONFIG_USB_IDMOUSE=m CONFIG_USB_FTDI_ELAN=m CONFIG_USB_APPLEDISPLAY=m # CONFIG_APPLE_MFI_FASTCHARGE is not set CONFIG_USB_SISUSBVGA=m CONFIG_USB_SISUSBVGA_CON=y CONFIG_USB_LD=m # CONFIG_USB_TRANCEVIBRATOR is not set CONFIG_USB_IOWARRIOR=m # CONFIG_USB_TEST is not set # CONFIG_USB_EHSET_TEST_FIXTURE is not set CONFIG_USB_ISIGHTFW=m # CONFIG_USB_YUREX is not set CONFIG_USB_EZUSB_FX2=m # CONFIG_USB_HUB_USB251XB is not set CONFIG_USB_HSIC_USB3503=m # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set CONFIG_USB_ATM=m CONFIG_USB_SPEEDTOUCH=m CONFIG_USB_CXACRU=m CONFIG_USB_UEAGLEATM=m CONFIG_USB_XUSBATM=m # # USB Physical Layer drivers # # CONFIG_NOP_USB_XCEIV is not set # CONFIG_USB_GPIO_VBUS is not set # CONFIG_USB_ISP1301 is not set # end of USB Physical Layer drivers # CONFIG_USB_GADGET is not set CONFIG_TYPEC=y # CONFIG_TYPEC_TCPM is not set CONFIG_TYPEC_UCSI=y # CONFIG_UCSI_CCG is not set CONFIG_UCSI_ACPI=y # CONFIG_TYPEC_TPS6598X is not set # # USB Type-C Multiplexer/DeMultiplexer Switch support # # CONFIG_TYPEC_MUX_PI3USB30532 is not set # end of USB Type-C Multiplexer/DeMultiplexer Switch support # # USB Type-C Alternate Mode drivers # # CONFIG_TYPEC_DP_ALTMODE is not set # end of USB Type-C Alternate Mode drivers # CONFIG_USB_ROLE_SWITCH is not set CONFIG_MMC=m CONFIG_MMC_BLOCK=m CONFIG_MMC_BLOCK_MINORS=8 CONFIG_SDIO_UART=m # CONFIG_MMC_TEST is not set # # MMC/SD/SDIO Host Controller Drivers # # CONFIG_MMC_DEBUG is not set CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_IO_ACCESSORS=y CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_RICOH_MMC=y CONFIG_MMC_SDHCI_ACPI=m CONFIG_MMC_SDHCI_PLTFM=m # CONFIG_MMC_SDHCI_F_SDH30 is not set # CONFIG_MMC_WBSD is not set CONFIG_MMC_TIFM_SD=m # CONFIG_MMC_SPI is not set CONFIG_MMC_CB710=m CONFIG_MMC_VIA_SDMMC=m CONFIG_MMC_VUB300=m CONFIG_MMC_USHC=m # CONFIG_MMC_USDHI6ROL0 is not set CONFIG_MMC_CQHCI=m # CONFIG_MMC_HSQ is not set # CONFIG_MMC_TOSHIBA_PCI is not set # CONFIG_MMC_MTK is not set # CONFIG_MMC_SDHCI_XENON is not set CONFIG_MEMSTICK=m # CONFIG_MEMSTICK_DEBUG is not set # # MemoryStick drivers # # CONFIG_MEMSTICK_UNSAFE_RESUME is not set CONFIG_MSPRO_BLOCK=m # CONFIG_MS_BLOCK is not set # # MemoryStick Host Controller Drivers # CONFIG_MEMSTICK_TIFM_MS=m CONFIG_MEMSTICK_JMICRON_38X=m CONFIG_MEMSTICK_R592=m CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y # CONFIG_LEDS_CLASS_FLASH is not set # CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set # # LED drivers # # CONFIG_LEDS_APU is not set CONFIG_LEDS_LM3530=m # CONFIG_LEDS_LM3532 is not set # CONFIG_LEDS_LM3642 is not set # CONFIG_LEDS_PCA9532 is not set # CONFIG_LEDS_GPIO is not set CONFIG_LEDS_LP3944=m # CONFIG_LEDS_LP3952 is not set CONFIG_LEDS_LP55XX_COMMON=m CONFIG_LEDS_LP5521=m CONFIG_LEDS_LP5523=m CONFIG_LEDS_LP5562=m # CONFIG_LEDS_LP8501 is not set CONFIG_LEDS_CLEVO_MAIL=m # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set # CONFIG_LEDS_DAC124S085 is not set # CONFIG_LEDS_PWM is not set # CONFIG_LEDS_BD2802 is not set CONFIG_LEDS_INTEL_SS4200=m # CONFIG_LEDS_TCA6507 is not set # CONFIG_LEDS_TLC591XX is not set # CONFIG_LEDS_LM355x is not set # # LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) # CONFIG_LEDS_BLINKM=m # CONFIG_LEDS_MLXCPLD is not set # CONFIG_LEDS_MLXREG is not set # CONFIG_LEDS_USER is not set # CONFIG_LEDS_NIC78BX is not set # CONFIG_LEDS_TI_LMU_COMMON is not set # # LED Triggers # CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=m CONFIG_LEDS_TRIGGER_ONESHOT=m # CONFIG_LEDS_TRIGGER_DISK is not set # CONFIG_LEDS_TRIGGER_MTD is not set CONFIG_LEDS_TRIGGER_HEARTBEAT=m CONFIG_LEDS_TRIGGER_BACKLIGHT=m # CONFIG_LEDS_TRIGGER_CPU is not set # CONFIG_LEDS_TRIGGER_ACTIVITY is not set CONFIG_LEDS_TRIGGER_GPIO=m CONFIG_LEDS_TRIGGER_DEFAULT_ON=m # # iptables trigger is under Netfilter config (LED target) # CONFIG_LEDS_TRIGGER_TRANSIENT=m CONFIG_LEDS_TRIGGER_CAMERA=m # CONFIG_LEDS_TRIGGER_PANIC is not set # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set CONFIG_LEDS_TRIGGER_AUDIO=m # CONFIG_ACCESSIBILITY is not set CONFIG_INFINIBAND=m CONFIG_INFINIBAND_USER_MAD=m CONFIG_INFINIBAND_USER_ACCESS=m # CONFIG_INFINIBAND_EXP_LEGACY_VERBS_NEW_UAPI is not set CONFIG_INFINIBAND_USER_MEM=y CONFIG_INFINIBAND_ON_DEMAND_PAGING=y CONFIG_INFINIBAND_ADDR_TRANS=y CONFIG_INFINIBAND_ADDR_TRANS_CONFIGFS=y # CONFIG_INFINIBAND_MTHCA is not set # CONFIG_INFINIBAND_CXGB4 is not set # CONFIG_INFINIBAND_EFA is not set # CONFIG_INFINIBAND_I40IW is not set # CONFIG_MLX4_INFINIBAND is not set # CONFIG_INFINIBAND_OCRDMA is not set # CONFIG_INFINIBAND_VMWARE_PVRDMA is not set # CONFIG_INFINIBAND_USNIC is not set # CONFIG_INFINIBAND_BNXT_RE is not set # CONFIG_INFINIBAND_QEDR is not set # CONFIG_INFINIBAND_RDMAVT is not set CONFIG_RDMA_RXE=m CONFIG_RDMA_SIW=m CONFIG_INFINIBAND_IPOIB=m # CONFIG_INFINIBAND_IPOIB_CM is not set CONFIG_INFINIBAND_IPOIB_DEBUG=y # CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set CONFIG_INFINIBAND_SRP=m CONFIG_INFINIBAND_SRPT=m # CONFIG_INFINIBAND_ISER is not set # CONFIG_INFINIBAND_ISERT is not set # CONFIG_INFINIBAND_OPA_VNIC is not set CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y CONFIG_EDAC=y CONFIG_EDAC_LEGACY_SYSFS=y # CONFIG_EDAC_DEBUG is not set CONFIG_EDAC_DECODE_MCE=m CONFIG_EDAC_GHES=y CONFIG_EDAC_AMD64=m # CONFIG_EDAC_AMD64_ERROR_INJECTION is not set CONFIG_EDAC_E752X=m CONFIG_EDAC_I82975X=m CONFIG_EDAC_I3000=m CONFIG_EDAC_I3200=m CONFIG_EDAC_IE31200=m CONFIG_EDAC_X38=m CONFIG_EDAC_I5400=m CONFIG_EDAC_I7CORE=m CONFIG_EDAC_I5000=m CONFIG_EDAC_I5100=m CONFIG_EDAC_I7300=m CONFIG_EDAC_SBRIDGE=m CONFIG_EDAC_SKX=m # CONFIG_EDAC_I10NM is not set CONFIG_EDAC_PND2=m CONFIG_RTC_LIB=y CONFIG_RTC_MC146818_LIB=y CONFIG_RTC_CLASS=y CONFIG_RTC_HCTOSYS=y CONFIG_RTC_HCTOSYS_DEVICE="rtc0" # CONFIG_RTC_SYSTOHC is not set # CONFIG_RTC_DEBUG is not set CONFIG_RTC_NVMEM=y # # RTC interfaces # CONFIG_RTC_INTF_SYSFS=y CONFIG_RTC_INTF_PROC=y CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set # CONFIG_RTC_DRV_TEST is not set # # I2C RTC drivers # # CONFIG_RTC_DRV_ABB5ZES3 is not set # CONFIG_RTC_DRV_ABEOZ9 is not set # CONFIG_RTC_DRV_ABX80X is not set CONFIG_RTC_DRV_DS1307=m # CONFIG_RTC_DRV_DS1307_CENTURY is not set CONFIG_RTC_DRV_DS1374=m # CONFIG_RTC_DRV_DS1374_WDT is not set CONFIG_RTC_DRV_DS1672=m CONFIG_RTC_DRV_MAX6900=m CONFIG_RTC_DRV_RS5C372=m CONFIG_RTC_DRV_ISL1208=m CONFIG_RTC_DRV_ISL12022=m CONFIG_RTC_DRV_X1205=m CONFIG_RTC_DRV_PCF8523=m # CONFIG_RTC_DRV_PCF85063 is not set # CONFIG_RTC_DRV_PCF85363 is not set CONFIG_RTC_DRV_PCF8563=m CONFIG_RTC_DRV_PCF8583=m CONFIG_RTC_DRV_M41T80=m CONFIG_RTC_DRV_M41T80_WDT=y CONFIG_RTC_DRV_BQ32K=m # CONFIG_RTC_DRV_S35390A is not set CONFIG_RTC_DRV_FM3130=m # CONFIG_RTC_DRV_RX8010 is not set CONFIG_RTC_DRV_RX8581=m CONFIG_RTC_DRV_RX8025=m CONFIG_RTC_DRV_EM3027=m # CONFIG_RTC_DRV_RV3028 is not set # CONFIG_RTC_DRV_RV8803 is not set # CONFIG_RTC_DRV_SD3078 is not set # # SPI RTC drivers # # CONFIG_RTC_DRV_M41T93 is not set # CONFIG_RTC_DRV_M41T94 is not set # CONFIG_RTC_DRV_DS1302 is not set # CONFIG_RTC_DRV_DS1305 is not set # CONFIG_RTC_DRV_DS1343 is not set # CONFIG_RTC_DRV_DS1347 is not set # CONFIG_RTC_DRV_DS1390 is not set # CONFIG_RTC_DRV_MAX6916 is not set # CONFIG_RTC_DRV_R9701 is not set CONFIG_RTC_DRV_RX4581=m # CONFIG_RTC_DRV_RX6110 is not set # CONFIG_RTC_DRV_RS5C348 is not set # CONFIG_RTC_DRV_MAX6902 is not set # CONFIG_RTC_DRV_PCF2123 is not set # CONFIG_RTC_DRV_MCP795 is not set CONFIG_RTC_I2C_AND_SPI=y # # SPI and I2C RTC drivers # CONFIG_RTC_DRV_DS3232=m CONFIG_RTC_DRV_DS3232_HWMON=y # CONFIG_RTC_DRV_PCF2127 is not set CONFIG_RTC_DRV_RV3029C2=m CONFIG_RTC_DRV_RV3029_HWMON=y # # Platform RTC drivers # CONFIG_RTC_DRV_CMOS=y CONFIG_RTC_DRV_DS1286=m CONFIG_RTC_DRV_DS1511=m CONFIG_RTC_DRV_DS1553=m # CONFIG_RTC_DRV_DS1685_FAMILY is not set CONFIG_RTC_DRV_DS1742=m CONFIG_RTC_DRV_DS2404=m CONFIG_RTC_DRV_STK17TA8=m # CONFIG_RTC_DRV_M48T86 is not set CONFIG_RTC_DRV_M48T35=m CONFIG_RTC_DRV_M48T59=m CONFIG_RTC_DRV_MSM6242=m CONFIG_RTC_DRV_BQ4802=m CONFIG_RTC_DRV_RP5C01=m CONFIG_RTC_DRV_V3020=m # # on-CPU RTC drivers # # CONFIG_RTC_DRV_FTRTC010 is not set # # HID Sensor RTC drivers # # CONFIG_RTC_DRV_HID_SENSOR_TIME is not set CONFIG_DMADEVICES=y # CONFIG_DMADEVICES_DEBUG is not set # # DMA Devices # CONFIG_DMA_ENGINE=y CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DMA_ACPI=y # CONFIG_ALTERA_MSGDMA is not set # CONFIG_INTEL_IDMA64 is not set # CONFIG_INTEL_IDXD is not set CONFIG_INTEL_IOATDMA=m # CONFIG_PLX_DMA is not set # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set CONFIG_DW_DMAC_CORE=y CONFIG_DW_DMAC=m CONFIG_DW_DMAC_PCI=y # CONFIG_DW_EDMA is not set # CONFIG_DW_EDMA_PCIE is not set CONFIG_HSU_DMA=y # CONFIG_SF_PDMA is not set # # DMA Clients # CONFIG_ASYNC_TX_DMA=y # CONFIG_DMATEST is not set CONFIG_DMA_ENGINE_RAID=y # # DMABUF options # CONFIG_SYNC_FILE=y # CONFIG_SW_SYNC is not set # CONFIG_UDMABUF is not set # CONFIG_DMABUF_MOVE_NOTIFY is not set # CONFIG_DMABUF_SELFTESTS is not set # CONFIG_DMABUF_HEAPS is not set # end of DMABUF options CONFIG_DCA=m CONFIG_AUXDISPLAY=y # CONFIG_HD44780 is not set CONFIG_KS0108=m CONFIG_KS0108_PORT=0x378 CONFIG_KS0108_DELAY=2 CONFIG_CFAG12864B=m CONFIG_CFAG12864B_RATE=20 # CONFIG_IMG_ASCII_LCD is not set # CONFIG_PARPORT_PANEL is not set # CONFIG_CHARLCD_BL_OFF is not set # CONFIG_CHARLCD_BL_ON is not set CONFIG_CHARLCD_BL_FLASH=y # CONFIG_PANEL is not set CONFIG_UIO=m CONFIG_UIO_CIF=m CONFIG_UIO_PDRV_GENIRQ=m # CONFIG_UIO_DMEM_GENIRQ is not set CONFIG_UIO_AEC=m CONFIG_UIO_SERCOS3=m CONFIG_UIO_PCI_GENERIC=m # CONFIG_UIO_NETX is not set # CONFIG_UIO_PRUSS is not set # CONFIG_UIO_MF624 is not set CONFIG_UIO_HV_GENERIC=m CONFIG_VFIO_IOMMU_TYPE1=m CONFIG_VFIO_VIRQFD=m CONFIG_VFIO=m CONFIG_VFIO_NOIOMMU=y CONFIG_VFIO_PCI=m # CONFIG_VFIO_PCI_VGA is not set CONFIG_VFIO_PCI_MMAP=y CONFIG_VFIO_PCI_INTX=y # CONFIG_VFIO_PCI_IGD is not set CONFIG_VFIO_MDEV=m CONFIG_VFIO_MDEV_DEVICE=m CONFIG_IRQ_BYPASS_MANAGER=m # CONFIG_VIRT_DRIVERS is not set CONFIG_VIRTIO=y CONFIG_VIRTIO_MENU=y CONFIG_VIRTIO_PCI=y CONFIG_VIRTIO_PCI_LEGACY=y # CONFIG_VIRTIO_PMEM is not set CONFIG_VIRTIO_BALLOON=y CONFIG_VIRTIO_INPUT=m # CONFIG_VIRTIO_MMIO is not set # CONFIG_VDPA is not set CONFIG_VHOST_IOTLB=m CONFIG_VHOST_DPN=y CONFIG_VHOST=m CONFIG_VHOST_MENU=y CONFIG_VHOST_NET=m # CONFIG_VHOST_SCSI is not set CONFIG_VHOST_VSOCK=m # CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set # # Microsoft Hyper-V guest support # CONFIG_HYPERV=m CONFIG_HYPERV_TIMER=y CONFIG_HYPERV_UTILS=m CONFIG_HYPERV_BALLOON=m # end of Microsoft Hyper-V guest support # # Xen driver support # CONFIG_XEN_BALLOON=y # CONFIG_XEN_BALLOON_MEMORY_HOTPLUG is not set CONFIG_XEN_SCRUB_PAGES_DEFAULT=y CONFIG_XEN_DEV_EVTCHN=m # CONFIG_XEN_BACKEND is not set CONFIG_XENFS=m CONFIG_XEN_COMPAT_XENFS=y CONFIG_XEN_SYS_HYPERVISOR=y CONFIG_XEN_XENBUS_FRONTEND=y # CONFIG_XEN_GNTDEV is not set # CONFIG_XEN_GRANT_DEV_ALLOC is not set # CONFIG_XEN_GRANT_DMA_ALLOC is not set CONFIG_SWIOTLB_XEN=y # CONFIG_XEN_PVCALLS_FRONTEND is not set CONFIG_XEN_PRIVCMD=m CONFIG_XEN_HAVE_PVMMU=y CONFIG_XEN_EFI=y CONFIG_XEN_AUTO_XLATE=y CONFIG_XEN_ACPI=y CONFIG_XEN_HAVE_VPMU=y # end of Xen driver support # CONFIG_GREYBUS is not set CONFIG_STAGING=y # CONFIG_PRISM2_USB is not set # CONFIG_COMEDI is not set # CONFIG_RTL8192U is not set CONFIG_RTLLIB=m CONFIG_RTLLIB_CRYPTO_CCMP=m CONFIG_RTLLIB_CRYPTO_TKIP=m CONFIG_RTLLIB_CRYPTO_WEP=m CONFIG_RTL8192E=m # CONFIG_RTL8723BS is not set CONFIG_R8712U=m # CONFIG_R8188EU is not set # CONFIG_RTS5208 is not set # CONFIG_VT6655 is not set # CONFIG_VT6656 is not set # # IIO staging drivers # # # Accelerometers # # CONFIG_ADIS16203 is not set # CONFIG_ADIS16240 is not set # end of Accelerometers # # Analog to digital converters # # CONFIG_AD7816 is not set # CONFIG_AD7280 is not set # end of Analog to digital converters # # Analog digital bi-direction converters # # CONFIG_ADT7316 is not set # end of Analog digital bi-direction converters # # Capacitance to digital converters # # CONFIG_AD7150 is not set # CONFIG_AD7746 is not set # end of Capacitance to digital converters # # Direct Digital Synthesis # # CONFIG_AD9832 is not set # CONFIG_AD9834 is not set # end of Direct Digital Synthesis # # Network Analyzer, Impedance Converters # # CONFIG_AD5933 is not set # end of Network Analyzer, Impedance Converters # # Active energy metering IC # # CONFIG_ADE7854 is not set # end of Active energy metering IC # # Resolver to digital converters # # CONFIG_AD2S1210 is not set # end of Resolver to digital converters # end of IIO staging drivers # CONFIG_FB_SM750 is not set # # Speakup console speech # # CONFIG_SPEAKUP is not set # end of Speakup console speech # CONFIG_STAGING_MEDIA is not set # # Android # # end of Android # CONFIG_LTE_GDM724X is not set CONFIG_FIREWIRE_SERIAL=m CONFIG_FWTTY_MAX_TOTAL_PORTS=64 CONFIG_FWTTY_MAX_CARD_PORTS=32 # CONFIG_GS_FPGABOOT is not set # CONFIG_UNISYSSPAR is not set # CONFIG_FB_TFT is not set # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set # CONFIG_KS7010 is not set # CONFIG_PI433 is not set # # Gasket devices # # CONFIG_STAGING_GASKET_FRAMEWORK is not set # end of Gasket devices # CONFIG_FIELDBUS_DEV is not set # CONFIG_KPC2000 is not set CONFIG_QLGE=m # CONFIG_WFX is not set CONFIG_X86_PLATFORM_DEVICES=y CONFIG_ACPI_WMI=m CONFIG_WMI_BMOF=m # CONFIG_ALIENWARE_WMI is not set # CONFIG_HUAWEI_WMI is not set CONFIG_INTEL_WMI_THUNDERBOLT=m CONFIG_MXM_WMI=m # CONFIG_PEAQ_WMI is not set # CONFIG_XIAOMI_WMI is not set CONFIG_ACERHDF=m # CONFIG_ACER_WIRELESS is not set CONFIG_ACER_WMI=m CONFIG_APPLE_GMUX=m CONFIG_ASUS_LAPTOP=m # CONFIG_ASUS_WIRELESS is not set CONFIG_ASUS_WMI=m CONFIG_ASUS_NB_WMI=m CONFIG_EEEPC_LAPTOP=m CONFIG_EEEPC_WMI=m CONFIG_DCDBAS=m CONFIG_DELL_SMBIOS=m CONFIG_DELL_SMBIOS_WMI=y CONFIG_DELL_SMBIOS_SMM=y CONFIG_DELL_LAPTOP=m CONFIG_DELL_RBTN=m CONFIG_DELL_RBU=m CONFIG_DELL_SMO8800=m CONFIG_DELL_WMI=m CONFIG_DELL_WMI_DESCRIPTOR=m CONFIG_DELL_WMI_AIO=m # CONFIG_DELL_WMI_LED is not set CONFIG_AMILO_RFKILL=m CONFIG_FUJITSU_LAPTOP=m CONFIG_FUJITSU_TABLET=m # CONFIG_GPD_POCKET_FAN is not set CONFIG_HP_ACCEL=m CONFIG_HP_WIRELESS=m CONFIG_HP_WMI=m # CONFIG_IBM_RTL is not set CONFIG_IDEAPAD_LAPTOP=m CONFIG_SENSORS_HDAPS=m CONFIG_THINKPAD_ACPI=m CONFIG_THINKPAD_ACPI_ALSA_SUPPORT=y # CONFIG_THINKPAD_ACPI_DEBUGFACILITIES is not set # CONFIG_THINKPAD_ACPI_DEBUG is not set # CONFIG_THINKPAD_ACPI_UNSAFE_LEDS is not set CONFIG_THINKPAD_ACPI_VIDEO=y CONFIG_THINKPAD_ACPI_HOTKEY_POLL=y # CONFIG_INTEL_ATOMISP2_PM is not set CONFIG_INTEL_HID_EVENT=m # CONFIG_INTEL_INT0002_VGPIO is not set # CONFIG_INTEL_MENLOW is not set CONFIG_INTEL_OAKTRAIL=m CONFIG_INTEL_VBTN=m # CONFIG_SURFACE3_WMI is not set # CONFIG_SURFACE_3_POWER_OPREGION is not set # CONFIG_SURFACE_PRO3_BUTTON is not set CONFIG_MSI_LAPTOP=m CONFIG_MSI_WMI=m # CONFIG_PCENGINES_APU2 is not set CONFIG_SAMSUNG_LAPTOP=m CONFIG_SAMSUNG_Q10=m CONFIG_ACPI_TOSHIBA=m CONFIG_TOSHIBA_BT_RFKILL=m # CONFIG_TOSHIBA_HAPS is not set # CONFIG_TOSHIBA_WMI is not set CONFIG_ACPI_CMPC=m CONFIG_COMPAL_LAPTOP=m # CONFIG_LG_LAPTOP is not set CONFIG_PANASONIC_LAPTOP=m CONFIG_SONY_LAPTOP=m CONFIG_SONYPI_COMPAT=y # CONFIG_SYSTEM76_ACPI is not set CONFIG_TOPSTAR_LAPTOP=m # CONFIG_I2C_MULTI_INSTANTIATE is not set # CONFIG_MLX_PLATFORM is not set CONFIG_INTEL_IPS=m # CONFIG_INTEL_RST is not set # CONFIG_INTEL_SMARTCONNECT is not set # # Intel Speed Select Technology interface support # # CONFIG_INTEL_SPEED_SELECT_INTERFACE is not set # end of Intel Speed Select Technology interface support # CONFIG_INTEL_TURBO_MAX_3 is not set # CONFIG_INTEL_UNCORE_FREQ_CONTROL is not set CONFIG_INTEL_PMC_CORE=m # CONFIG_INTEL_PMC_IPC is not set # CONFIG_INTEL_PUNIT_IPC is not set CONFIG_PMC_ATOM=y # CONFIG_MFD_CROS_EC is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y # # Common Clock Framework # # CONFIG_COMMON_CLK_MAX9485 is not set # CONFIG_COMMON_CLK_SI5341 is not set # CONFIG_COMMON_CLK_SI5351 is not set # CONFIG_COMMON_CLK_SI544 is not set # CONFIG_COMMON_CLK_CDCE706 is not set # CONFIG_COMMON_CLK_CS2000_CP is not set # CONFIG_COMMON_CLK_PWM is not set # end of Common Clock Framework # CONFIG_HWSPINLOCK is not set # # Clock Source drivers # CONFIG_CLKEVT_I8253=y CONFIG_I8253_LOCK=y CONFIG_CLKBLD_I8253=y # end of Clock Source drivers CONFIG_MAILBOX=y CONFIG_PCC=y # CONFIG_ALTERA_MBOX is not set CONFIG_IOMMU_IOVA=y CONFIG_IOASID=y CONFIG_IOMMU_API=y CONFIG_IOMMU_SUPPORT=y # # Generic IOMMU Pagetable Support # # end of Generic IOMMU Pagetable Support # CONFIG_IOMMU_DEBUGFS is not set # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set CONFIG_IOMMU_DMA=y CONFIG_AMD_IOMMU=y CONFIG_AMD_IOMMU_V2=m CONFIG_DMAR_TABLE=y CONFIG_INTEL_IOMMU=y # CONFIG_INTEL_IOMMU_SVM is not set # CONFIG_INTEL_IOMMU_DEFAULT_ON is not set CONFIG_INTEL_IOMMU_FLOPPY_WA=y # CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON is not set CONFIG_IRQ_REMAP=y CONFIG_HYPERV_IOMMU=y # # Remoteproc drivers # # CONFIG_REMOTEPROC is not set # end of Remoteproc drivers # # Rpmsg drivers # # CONFIG_RPMSG_QCOM_GLINK_RPM is not set # CONFIG_RPMSG_VIRTIO is not set # end of Rpmsg drivers # CONFIG_SOUNDWIRE is not set # # SOC (System On Chip) specific Drivers # # # Amlogic SoC drivers # # end of Amlogic SoC drivers # # Aspeed SoC drivers # # end of Aspeed SoC drivers # # Broadcom SoC drivers # # end of Broadcom SoC drivers # # NXP/Freescale QorIQ SoC drivers # # end of NXP/Freescale QorIQ SoC drivers # # i.MX SoC drivers # # end of i.MX SoC drivers # # Qualcomm SoC drivers # # end of Qualcomm SoC drivers # CONFIG_SOC_TI is not set # # Xilinx SoC drivers # # CONFIG_XILINX_VCU is not set # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers CONFIG_PM_DEVFREQ=y # # DEVFREQ Governors # CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=m # CONFIG_DEVFREQ_GOV_PERFORMANCE is not set # CONFIG_DEVFREQ_GOV_POWERSAVE is not set # CONFIG_DEVFREQ_GOV_USERSPACE is not set # CONFIG_DEVFREQ_GOV_PASSIVE is not set # # DEVFREQ Drivers # # CONFIG_PM_DEVFREQ_EVENT is not set # CONFIG_EXTCON is not set # CONFIG_MEMORY is not set CONFIG_IIO=y CONFIG_IIO_BUFFER=y CONFIG_IIO_BUFFER_CB=y # CONFIG_IIO_BUFFER_HW_CONSUMER is not set CONFIG_IIO_KFIFO_BUF=y CONFIG_IIO_TRIGGERED_BUFFER=m # CONFIG_IIO_CONFIGFS is not set CONFIG_IIO_TRIGGER=y CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_IIO_SW_DEVICE is not set # CONFIG_IIO_SW_TRIGGER is not set # # Accelerometers # # CONFIG_ADIS16201 is not set # CONFIG_ADIS16209 is not set # CONFIG_ADXL345_I2C is not set # CONFIG_ADXL345_SPI is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set # CONFIG_BMC150_ACCEL is not set # CONFIG_DA280 is not set # CONFIG_DA311 is not set # CONFIG_DMARD09 is not set # CONFIG_DMARD10 is not set CONFIG_HID_SENSOR_ACCEL_3D=m # CONFIG_IIO_ST_ACCEL_3AXIS is not set # CONFIG_KXSD9 is not set # CONFIG_KXCJK1013 is not set # CONFIG_MC3230 is not set # CONFIG_MMA7455_I2C is not set # CONFIG_MMA7455_SPI is not set # CONFIG_MMA7660 is not set # CONFIG_MMA8452 is not set # CONFIG_MMA9551 is not set # CONFIG_MMA9553 is not set # CONFIG_MXC4005 is not set # CONFIG_MXC6255 is not set # CONFIG_SCA3000 is not set # CONFIG_STK8312 is not set # CONFIG_STK8BA50 is not set # end of Accelerometers # # Analog to digital converters # # CONFIG_AD7091R5 is not set # CONFIG_AD7124 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set # CONFIG_AD7766 is not set # CONFIG_AD7768_1 is not set # CONFIG_AD7780 is not set # CONFIG_AD7791 is not set # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set # CONFIG_LTC2497 is not set # CONFIG_MAX1027 is not set # CONFIG_MAX11100 is not set # CONFIG_MAX1118 is not set # CONFIG_MAX1363 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set # CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set # CONFIG_TI_ADC081C is not set # CONFIG_TI_ADC0832 is not set # CONFIG_TI_ADC084S021 is not set # CONFIG_TI_ADC12138 is not set # CONFIG_TI_ADC108S102 is not set # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set # CONFIG_TI_ADS7950 is not set # CONFIG_TI_TLC4541 is not set # CONFIG_VIPERBOARD_ADC is not set # CONFIG_XILINX_XADC is not set # end of Analog to digital converters # # Analog Front Ends # # end of Analog Front Ends # # Amplifiers # # CONFIG_AD8366 is not set # CONFIG_HMC425 is not set # end of Amplifiers # # Chemical Sensors # # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set # CONFIG_IAQCORE is not set # CONFIG_SENSIRION_SGP30 is not set # CONFIG_SPS30 is not set # CONFIG_VZ89X is not set # end of Chemical Sensors # # Hid Sensor IIO Common # CONFIG_HID_SENSOR_IIO_COMMON=m CONFIG_HID_SENSOR_IIO_TRIGGER=m # end of Hid Sensor IIO Common # # SSP Sensor Common # # CONFIG_IIO_SSP_SENSORHUB is not set # end of SSP Sensor Common # # Digital to analog converters # # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set # CONFIG_AD5380 is not set # CONFIG_AD5421 is not set # CONFIG_AD5446 is not set # CONFIG_AD5449 is not set # CONFIG_AD5592R is not set # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set # CONFIG_AD5755 is not set # CONFIG_AD5758 is not set # CONFIG_AD5761 is not set # CONFIG_AD5764 is not set # CONFIG_AD5770R is not set # CONFIG_AD5791 is not set # CONFIG_AD7303 is not set # CONFIG_AD8801 is not set # CONFIG_DS4424 is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set # CONFIG_TI_DAC7311 is not set # CONFIG_TI_DAC7612 is not set # end of Digital to analog converters # # IIO dummy driver # # end of IIO dummy driver # # Frequency Synthesizers DDS/PLL # # # Clock Generator/Distribution # # CONFIG_AD9523 is not set # end of Clock Generator/Distribution # # Phase-Locked Loop (PLL) frequency synthesizers # # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set # end of Phase-Locked Loop (PLL) frequency synthesizers # end of Frequency Synthesizers DDS/PLL # # Digital gyroscope sensors # # CONFIG_ADIS16080 is not set # CONFIG_ADIS16130 is not set # CONFIG_ADIS16136 is not set # CONFIG_ADIS16260 is not set # CONFIG_ADXRS450 is not set # CONFIG_BMG160 is not set # CONFIG_FXAS21002C is not set CONFIG_HID_SENSOR_GYRO_3D=m # CONFIG_MPU3050_I2C is not set # CONFIG_IIO_ST_GYRO_3AXIS is not set # CONFIG_ITG3200 is not set # end of Digital gyroscope sensors # # Health Sensors # # # Heart Rate Monitors # # CONFIG_AFE4403 is not set # CONFIG_AFE4404 is not set # CONFIG_MAX30100 is not set # CONFIG_MAX30102 is not set # end of Heart Rate Monitors # end of Health Sensors # # Humidity sensors # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set # CONFIG_HDC100X is not set # CONFIG_HID_SENSOR_HUMIDITY is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set # CONFIG_SI7020 is not set # end of Humidity sensors # # Inertial measurement units # # CONFIG_ADIS16400 is not set # CONFIG_ADIS16460 is not set # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set # CONFIG_FXOS8700_I2C is not set # CONFIG_FXOS8700_SPI is not set # CONFIG_KMX61 is not set # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set # CONFIG_IIO_ST_LSM6DSX is not set # end of Inertial measurement units # # Light sensors # # CONFIG_ACPI_ALS is not set # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set # CONFIG_APDS9300 is not set # CONFIG_APDS9960 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set # CONFIG_CM3232 is not set # CONFIG_CM3323 is not set # CONFIG_CM36651 is not set # CONFIG_GP2AP002 is not set # CONFIG_GP2AP020A00F is not set # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set CONFIG_HID_SENSOR_ALS=m CONFIG_HID_SENSOR_PROX=m # CONFIG_JSA1212 is not set # CONFIG_RPR0521 is not set # CONFIG_LTR501 is not set # CONFIG_LV0104CS is not set # CONFIG_MAX44000 is not set # CONFIG_MAX44009 is not set # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set # CONFIG_STK3310 is not set # CONFIG_ST_UVIS25 is not set # CONFIG_TCS3414 is not set # CONFIG_TCS3472 is not set # CONFIG_SENSORS_TSL2563 is not set # CONFIG_TSL2583 is not set # CONFIG_TSL2772 is not set # CONFIG_TSL4531 is not set # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set # CONFIG_VEML6030 is not set # CONFIG_VEML6070 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors # # Magnetometer sensors # # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set # CONFIG_BMC150_MAGN_I2C is not set # CONFIG_BMC150_MAGN_SPI is not set # CONFIG_MAG3110 is not set CONFIG_HID_SENSOR_MAGNETOMETER_3D=m # CONFIG_MMC35240 is not set # CONFIG_IIO_ST_MAGN_3AXIS is not set # CONFIG_SENSORS_HMC5843_I2C is not set # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set # end of Magnetometer sensors # # Multiplexers # # end of Multiplexers # # Inclinometer sensors # CONFIG_HID_SENSOR_INCLINOMETER_3D=m CONFIG_HID_SENSOR_DEVICE_ROTATION=m # end of Inclinometer sensors # # Triggers - standalone # # CONFIG_IIO_INTERRUPT_TRIGGER is not set # CONFIG_IIO_SYSFS_TRIGGER is not set # end of Triggers - standalone # # Linear and angular position sensors # # end of Linear and angular position sensors # # Digital potentiometers # # CONFIG_AD5272 is not set # CONFIG_DS1803 is not set # CONFIG_MAX5432 is not set # CONFIG_MAX5481 is not set # CONFIG_MAX5487 is not set # CONFIG_MCP4018 is not set # CONFIG_MCP4131 is not set # CONFIG_MCP4531 is not set # CONFIG_MCP41010 is not set # CONFIG_TPL0102 is not set # end of Digital potentiometers # # Digital potentiostats # # CONFIG_LMP91000 is not set # end of Digital potentiostats # # Pressure sensors # # CONFIG_ABP060MG is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set CONFIG_HID_SENSOR_PRESS=m # CONFIG_HP03 is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set # CONFIG_MPL3115 is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set # CONFIG_ZPA2326 is not set # end of Pressure sensors # # Lightning sensors # # CONFIG_AS3935 is not set # end of Lightning sensors # # Proximity and distance sensors # # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set # CONFIG_MB1232 is not set # CONFIG_PING is not set # CONFIG_RFD77402 is not set # CONFIG_SRF04 is not set # CONFIG_SX9500 is not set # CONFIG_SRF08 is not set # CONFIG_VL53L0X_I2C is not set # end of Proximity and distance sensors # # Resolver to digital converters # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set # end of Resolver to digital converters # # Temperature sensors # # CONFIG_LTC2983 is not set # CONFIG_MAXIM_THERMOCOUPLE is not set # CONFIG_HID_SENSOR_TEMP is not set # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set # CONFIG_TSYS01 is not set # CONFIG_TSYS02D is not set # CONFIG_MAX31856 is not set # end of Temperature sensors CONFIG_NTB=m # CONFIG_NTB_MSI is not set CONFIG_NTB_AMD=m # CONFIG_NTB_IDT is not set # CONFIG_NTB_INTEL is not set # CONFIG_NTB_SWITCHTEC is not set # CONFIG_NTB_PINGPONG is not set # CONFIG_NTB_TOOL is not set CONFIG_NTB_PERF=m CONFIG_NTB_TRANSPORT=m # CONFIG_VME_BUS is not set CONFIG_PWM=y CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set # CONFIG_PWM_LPSS_PCI is not set # CONFIG_PWM_LPSS_PLATFORM is not set # CONFIG_PWM_PCA9685 is not set # # IRQ chip support # # end of IRQ chip support # CONFIG_IPACK_BUS is not set # CONFIG_RESET_CONTROLLER is not set # # PHY Subsystem # CONFIG_GENERIC_PHY=y # CONFIG_BCM_KONA_USB2_PHY is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_INTEL_EMMC is not set # end of PHY Subsystem CONFIG_POWERCAP=y CONFIG_INTEL_RAPL_CORE=m CONFIG_INTEL_RAPL=m # CONFIG_IDLE_INJECT is not set # CONFIG_MCB is not set # # Performance monitor support # # end of Performance monitor support CONFIG_RAS=y # CONFIG_RAS_CEC is not set # CONFIG_USB4 is not set # # Android # # CONFIG_ANDROID is not set # end of Android CONFIG_LIBNVDIMM=m CONFIG_BLK_DEV_PMEM=m CONFIG_ND_BLK=m CONFIG_ND_CLAIM=y CONFIG_ND_BTT=m CONFIG_BTT=y CONFIG_ND_PFN=m CONFIG_NVDIMM_PFN=y CONFIG_NVDIMM_DAX=y CONFIG_NVDIMM_KEYS=y CONFIG_DAX_DRIVER=y CONFIG_DAX=y CONFIG_DEV_DAX=m CONFIG_DEV_DAX_PMEM=m CONFIG_DEV_DAX_KMEM=m CONFIG_DEV_DAX_PMEM_COMPAT=m CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y # # HW tracing support # # CONFIG_STM is not set # CONFIG_INTEL_TH is not set # end of HW tracing support # CONFIG_FPGA is not set # CONFIG_TEE is not set CONFIG_PM_OPP=y # CONFIG_UNISYS_VISORBUS is not set # CONFIG_SIOX is not set # CONFIG_SLIMBUS is not set # CONFIG_INTERCONNECT is not set # CONFIG_COUNTER is not set # CONFIG_MOST is not set # end of Device Drivers # # File systems # CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_VALIDATE_FS_PARSER is not set CONFIG_FS_IOMAP=y # CONFIG_EXT2_FS is not set # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=m CONFIG_EXT4_USE_FOR_EXT2=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y # CONFIG_EXT4_DEBUG is not set CONFIG_EXT4_KUNIT_TESTS=m CONFIG_JBD2=m # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=m # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set CONFIG_XFS_FS=m CONFIG_XFS_QUOTA=y CONFIG_XFS_POSIX_ACL=y CONFIG_XFS_RT=y CONFIG_XFS_ONLINE_SCRUB=y CONFIG_XFS_ONLINE_REPAIR=y CONFIG_XFS_DEBUG=y CONFIG_XFS_ASSERT_FATAL=y CONFIG_GFS2_FS=m CONFIG_GFS2_FS_LOCKING_DLM=y CONFIG_OCFS2_FS=m CONFIG_OCFS2_FS_O2CB=m CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m CONFIG_OCFS2_FS_STATS=y CONFIG_OCFS2_DEBUG_MASKLOG=y # CONFIG_OCFS2_DEBUG_FS is not set CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y # CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set # CONFIG_BTRFS_FS_REF_VERIFY is not set # CONFIG_NILFS2_FS is not set CONFIG_F2FS_FS=m CONFIG_F2FS_STAT_FS=y CONFIG_F2FS_FS_XATTR=y CONFIG_F2FS_FS_POSIX_ACL=y CONFIG_F2FS_FS_SECURITY=y # CONFIG_F2FS_CHECK_FS is not set # CONFIG_F2FS_IO_TRACE is not set # CONFIG_F2FS_FAULT_INJECTION is not set # CONFIG_F2FS_FS_COMPRESSION is not set # CONFIG_ZONEFS_FS is not set CONFIG_FS_DAX=y CONFIG_FS_DAX_PMD=y CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y CONFIG_EXPORTFS_BLOCK_OPS=y CONFIG_FILE_LOCKING=y CONFIG_MANDATORY_FILE_LOCKING=y CONFIG_FS_ENCRYPTION=y CONFIG_FS_ENCRYPTION_ALGS=m # CONFIG_FS_VERITY is not set CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y CONFIG_FANOTIFY=y CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y CONFIG_QUOTA=y CONFIG_QUOTA_NETLINK_INTERFACE=y CONFIG_PRINT_QUOTA_WARNING=y # CONFIG_QUOTA_DEBUG is not set CONFIG_QUOTA_TREE=y # CONFIG_QFMT_V1 is not set CONFIG_QFMT_V2=y CONFIG_QUOTACTL=y CONFIG_QUOTACTL_COMPAT=y CONFIG_AUTOFS4_FS=y CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m # CONFIG_VIRTIO_FS is not set CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set # CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW is not set # CONFIG_OVERLAY_FS_INDEX is not set # CONFIG_OVERLAY_FS_XINO_AUTO is not set # CONFIG_OVERLAY_FS_METACOPY is not set # # Caches # CONFIG_FSCACHE=m CONFIG_FSCACHE_STATS=y # CONFIG_FSCACHE_HISTOGRAM is not set # CONFIG_FSCACHE_DEBUG is not set # CONFIG_FSCACHE_OBJECT_LIST is not set CONFIG_CACHEFILES=m # CONFIG_CACHEFILES_DEBUG is not set # CONFIG_CACHEFILES_HISTOGRAM is not set # end of Caches # # CD-ROM/DVD Filesystems # CONFIG_ISO9660_FS=m CONFIG_JOLIET=y CONFIG_ZISOFS=y CONFIG_UDF_FS=m # end of CD-ROM/DVD Filesystems # # DOS/FAT/EXFAT/NT Filesystems # CONFIG_FAT_FS=m CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=m CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="ascii" # CONFIG_FAT_DEFAULT_UTF8 is not set # CONFIG_EXFAT_FS is not set # CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # # Pseudo filesystems # CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_PROC_VMCORE=y # CONFIG_PROC_VMCORE_DEVICE_DUMP is not set CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y CONFIG_PROC_CHILDREN=y CONFIG_PROC_PID_ARCH_STATUS=y CONFIG_PROC_CPU_RESCTRL=y CONFIG_KERNFS=y CONFIG_SYSFS=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_TMPFS_XATTR=y CONFIG_HUGETLBFS=y CONFIG_HUGETLB_PAGE=y CONFIG_MEMFD_CREATE=y CONFIG_ARCH_HAS_GIGANTIC_PAGE=y CONFIG_CONFIGFS_FS=y CONFIG_EFIVAR_FS=y # end of Pseudo filesystems CONFIG_MISC_FILESYSTEMS=y # CONFIG_ORANGEFS_FS is not set # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_ECRYPT_FS is not set # CONFIG_HFS_FS is not set # CONFIG_HFSPLUS_FS is not set # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set # CONFIG_JFFS2_FS is not set # CONFIG_UBIFS_FS is not set CONFIG_CRAMFS=m CONFIG_CRAMFS_BLOCKDEV=y # CONFIG_CRAMFS_MTD is not set CONFIG_SQUASHFS=m CONFIG_SQUASHFS_FILE_CACHE=y # CONFIG_SQUASHFS_FILE_DIRECT is not set CONFIG_SQUASHFS_DECOMP_SINGLE=y # CONFIG_SQUASHFS_DECOMP_MULTI is not set # CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set CONFIG_SQUASHFS_XATTR=y CONFIG_SQUASHFS_ZLIB=y # CONFIG_SQUASHFS_LZ4 is not set CONFIG_SQUASHFS_LZO=y CONFIG_SQUASHFS_XZ=y # CONFIG_SQUASHFS_ZSTD is not set # CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set # CONFIG_SQUASHFS_EMBEDDED is not set CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_VXFS_FS is not set CONFIG_MINIX_FS=m # CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set # CONFIG_QNX6FS_FS is not set # CONFIG_ROMFS_FS is not set CONFIG_PSTORE=y CONFIG_PSTORE_DEFLATE_COMPRESS=y # CONFIG_PSTORE_LZO_COMPRESS is not set # CONFIG_PSTORE_LZ4_COMPRESS is not set # CONFIG_PSTORE_LZ4HC_COMPRESS is not set # CONFIG_PSTORE_842_COMPRESS is not set # CONFIG_PSTORE_ZSTD_COMPRESS is not set CONFIG_PSTORE_COMPRESS=y CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" # CONFIG_PSTORE_CONSOLE is not set # CONFIG_PSTORE_PMSG is not set # CONFIG_PSTORE_FTRACE is not set CONFIG_PSTORE_RAM=m # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y # CONFIG_NFS_V2 is not set CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=m # CONFIG_NFS_SWAP is not set CONFIG_NFS_V4_1=y CONFIG_NFS_V4_2=y CONFIG_PNFS_FILE_LAYOUT=m CONFIG_PNFS_BLOCK=m CONFIG_PNFS_FLEXFILE_LAYOUT=m CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" # CONFIG_NFS_V4_1_MIGRATION is not set CONFIG_NFS_V4_SECURITY_LABEL=y CONFIG_ROOT_NFS=y # CONFIG_NFS_USE_LEGACY_DNS is not set CONFIG_NFS_USE_KERNEL_DNS=y CONFIG_NFS_DEBUG=y CONFIG_NFS_DISABLE_UDP_SUPPORT=y CONFIG_NFSD=m CONFIG_NFSD_V2_ACL=y CONFIG_NFSD_V3=y CONFIG_NFSD_V3_ACL=y CONFIG_NFSD_V4=y CONFIG_NFSD_PNFS=y # CONFIG_NFSD_BLOCKLAYOUT is not set CONFIG_NFSD_SCSILAYOUT=y # CONFIG_NFSD_FLEXFILELAYOUT is not set # CONFIG_NFSD_V4_2_INTER_SSC is not set CONFIG_NFSD_V4_SECURITY_LABEL=y CONFIG_GRACE_PERIOD=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y CONFIG_NFS_ACL_SUPPORT=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y CONFIG_SUNRPC_GSS=m CONFIG_SUNRPC_BACKCHANNEL=y CONFIG_RPCSEC_GSS_KRB5=m # CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES is not set CONFIG_SUNRPC_DEBUG=y CONFIG_SUNRPC_XPRT_RDMA=m CONFIG_CEPH_FS=m # CONFIG_CEPH_FSCACHE is not set CONFIG_CEPH_FS_POSIX_ACL=y # CONFIG_CEPH_FS_SECURITY_LABEL is not set CONFIG_CIFS=m # CONFIG_CIFS_STATS2 is not set CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y CONFIG_CIFS_WEAK_PW_HASH=y CONFIG_CIFS_UPCALL=y CONFIG_CIFS_XATTR=y CONFIG_CIFS_POSIX=y CONFIG_CIFS_DEBUG=y # CONFIG_CIFS_DEBUG2 is not set # CONFIG_CIFS_DEBUG_DUMP_KEYS is not set CONFIG_CIFS_DFS_UPCALL=y # CONFIG_CIFS_SMB_DIRECT is not set # CONFIG_CIFS_FSCACHE is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set CONFIG_9P_FS=y CONFIG_9P_FS_POSIX_ACL=y # CONFIG_9P_FS_SECURITY is not set CONFIG_NLS=y CONFIG_NLS_DEFAULT="utf8" CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_CODEPAGE_737=m CONFIG_NLS_CODEPAGE_775=m CONFIG_NLS_CODEPAGE_850=m CONFIG_NLS_CODEPAGE_852=m CONFIG_NLS_CODEPAGE_855=m CONFIG_NLS_CODEPAGE_857=m CONFIG_NLS_CODEPAGE_860=m CONFIG_NLS_CODEPAGE_861=m CONFIG_NLS_CODEPAGE_862=m CONFIG_NLS_CODEPAGE_863=m CONFIG_NLS_CODEPAGE_864=m CONFIG_NLS_CODEPAGE_865=m CONFIG_NLS_CODEPAGE_866=m CONFIG_NLS_CODEPAGE_869=m CONFIG_NLS_CODEPAGE_936=m CONFIG_NLS_CODEPAGE_950=m CONFIG_NLS_CODEPAGE_932=m CONFIG_NLS_CODEPAGE_949=m CONFIG_NLS_CODEPAGE_874=m CONFIG_NLS_ISO8859_8=m CONFIG_NLS_CODEPAGE_1250=m CONFIG_NLS_CODEPAGE_1251=m CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=m CONFIG_NLS_ISO8859_2=m CONFIG_NLS_ISO8859_3=m CONFIG_NLS_ISO8859_4=m CONFIG_NLS_ISO8859_5=m CONFIG_NLS_ISO8859_6=m CONFIG_NLS_ISO8859_7=m CONFIG_NLS_ISO8859_9=m CONFIG_NLS_ISO8859_13=m CONFIG_NLS_ISO8859_14=m CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m CONFIG_NLS_MAC_ROMAN=m CONFIG_NLS_MAC_CELTIC=m CONFIG_NLS_MAC_CENTEURO=m CONFIG_NLS_MAC_CROATIAN=m CONFIG_NLS_MAC_CYRILLIC=m CONFIG_NLS_MAC_GAELIC=m CONFIG_NLS_MAC_GREEK=m CONFIG_NLS_MAC_ICELAND=m CONFIG_NLS_MAC_INUIT=m CONFIG_NLS_MAC_ROMANIAN=m CONFIG_NLS_MAC_TURKISH=m CONFIG_NLS_UTF8=m CONFIG_DLM=m CONFIG_DLM_DEBUG=y # CONFIG_UNICODE is not set CONFIG_IO_WQ=y # end of File systems # # Security options # CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set CONFIG_PERSISTENT_KEYRINGS=y CONFIG_BIG_KEYS=y CONFIG_TRUSTED_KEYS=y CONFIG_ENCRYPTED_KEYS=y # CONFIG_KEY_DH_OPERATIONS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set CONFIG_SECURITY=y CONFIG_SECURITYFS=y CONFIG_SECURITY_NETWORK=y CONFIG_PAGE_TABLE_ISOLATION=y # CONFIG_SECURITY_INFINIBAND is not set CONFIG_SECURITY_NETWORK_XFRM=y CONFIG_SECURITY_PATH=y CONFIG_INTEL_TXT=y CONFIG_LSM_MMAP_MIN_ADDR=65535 CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y CONFIG_HARDENED_USERCOPY=y CONFIG_HARDENED_USERCOPY_FALLBACK=y # CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_SECURITY_SELINUX=y CONFIG_SECURITY_SELINUX_BOOTPARAM=y # CONFIG_SECURITY_SELINUX_DISABLE is not set CONFIG_SECURITY_SELINUX_DEVELOP=y CONFIG_SECURITY_SELINUX_AVC_STATS=y CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS=9 CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE=256 # CONFIG_SECURITY_SMACK is not set # CONFIG_SECURITY_TOMOYO is not set CONFIG_SECURITY_APPARMOR=y CONFIG_SECURITY_APPARMOR_HASH=y CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y # CONFIG_SECURITY_APPARMOR_DEBUG is not set # CONFIG_SECURITY_APPARMOR_KUNIT_TEST is not set # CONFIG_SECURITY_LOADPIN is not set CONFIG_SECURITY_YAMA=y # CONFIG_SECURITY_SAFESETID is not set # CONFIG_SECURITY_LOCKDOWN_LSM is not set CONFIG_INTEGRITY=y CONFIG_INTEGRITY_SIGNATURE=y CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y CONFIG_INTEGRITY_TRUSTED_KEYRING=y # CONFIG_INTEGRITY_PLATFORM_KEYRING is not set CONFIG_INTEGRITY_AUDIT=y CONFIG_IMA=y CONFIG_IMA_MEASURE_PCR_IDX=10 CONFIG_IMA_LSM_RULES=y # CONFIG_IMA_TEMPLATE is not set CONFIG_IMA_NG_TEMPLATE=y # CONFIG_IMA_SIG_TEMPLATE is not set CONFIG_IMA_DEFAULT_TEMPLATE="ima-ng" CONFIG_IMA_DEFAULT_HASH_SHA1=y # CONFIG_IMA_DEFAULT_HASH_SHA256 is not set CONFIG_IMA_DEFAULT_HASH="sha1" # CONFIG_IMA_WRITE_POLICY is not set # CONFIG_IMA_READ_POLICY is not set CONFIG_IMA_APPRAISE=y # CONFIG_IMA_ARCH_POLICY is not set # CONFIG_IMA_APPRAISE_BUILD_POLICY is not set CONFIG_IMA_APPRAISE_BOOTPARAM=y # CONFIG_IMA_APPRAISE_MODSIG is not set CONFIG_IMA_TRUSTED_KEYRING=y # CONFIG_IMA_BLACKLIST_KEYRING is not set # CONFIG_IMA_LOAD_X509 is not set CONFIG_IMA_MEASURE_ASYMMETRIC_KEYS=y CONFIG_IMA_QUEUE_EARLY_BOOT_KEYS=y # CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT is not set CONFIG_EVM=y CONFIG_EVM_ATTR_FSUUID=y # CONFIG_EVM_ADD_XATTRS is not set # CONFIG_EVM_LOAD_X509 is not set CONFIG_DEFAULT_SECURITY_SELINUX=y # CONFIG_DEFAULT_SECURITY_APPARMOR is not set # CONFIG_DEFAULT_SECURITY_DAC is not set CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor,bpf" # # Kernel hardening options # # # Memory initialization # CONFIG_INIT_STACK_NONE=y # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set # end of Memory initialization # end of Kernel hardening options # end of Security options CONFIG_XOR_BLOCKS=m CONFIG_ASYNC_CORE=m CONFIG_ASYNC_MEMCPY=m CONFIG_ASYNC_XOR=m CONFIG_ASYNC_PQ=m CONFIG_ASYNC_RAID6_RECOV=m CONFIG_CRYPTO=y # # Crypto core or helper # CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_SKCIPHER=y CONFIG_CRYPTO_SKCIPHER2=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_AKCIPHER2=y CONFIG_CRYPTO_AKCIPHER=y CONFIG_CRYPTO_KPP2=y CONFIG_CRYPTO_KPP=m CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_USER=m CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y CONFIG_CRYPTO_GF128MUL=y CONFIG_CRYPTO_NULL=y CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_PCRYPT=m CONFIG_CRYPTO_CRYPTD=m CONFIG_CRYPTO_AUTHENC=m CONFIG_CRYPTO_TEST=m CONFIG_CRYPTO_SIMD=m CONFIG_CRYPTO_GLUE_HELPER_X86=m CONFIG_CRYPTO_ENGINE=m # # Public-key cryptography # CONFIG_CRYPTO_RSA=y CONFIG_CRYPTO_DH=m CONFIG_CRYPTO_ECC=m CONFIG_CRYPTO_ECDH=m # CONFIG_CRYPTO_ECRDSA is not set # CONFIG_CRYPTO_CURVE25519 is not set # CONFIG_CRYPTO_CURVE25519_X86 is not set # # Authenticated Encryption with Associated Data # CONFIG_CRYPTO_CCM=m CONFIG_CRYPTO_GCM=y # CONFIG_CRYPTO_CHACHA20POLY1305 is not set # CONFIG_CRYPTO_AEGIS128 is not set # CONFIG_CRYPTO_AEGIS128_AESNI_SSE2 is not set CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_ECHAINIV=m # # Block modes # CONFIG_CRYPTO_CBC=y # CONFIG_CRYPTO_CFB is not set CONFIG_CRYPTO_CTR=y CONFIG_CRYPTO_CTS=m CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LRW=m # CONFIG_CRYPTO_OFB is not set CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_XTS=m # CONFIG_CRYPTO_KEYWRAP is not set # CONFIG_CRYPTO_NHPOLY1305_SSE2 is not set # CONFIG_CRYPTO_NHPOLY1305_AVX2 is not set # CONFIG_CRYPTO_ADIANTUM is not set CONFIG_CRYPTO_ESSIV=m # # Hash modes # CONFIG_CRYPTO_CMAC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_VMAC=m # # Digest # CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32C_INTEL=m CONFIG_CRYPTO_CRC32=m CONFIG_CRYPTO_CRC32_PCLMUL=m CONFIG_CRYPTO_XXHASH=m CONFIG_CRYPTO_BLAKE2B=m # CONFIG_CRYPTO_BLAKE2S is not set # CONFIG_CRYPTO_BLAKE2S_X86 is not set CONFIG_CRYPTO_CRCT10DIF=y CONFIG_CRYPTO_CRCT10DIF_PCLMUL=m CONFIG_CRYPTO_GHASH=y # CONFIG_CRYPTO_POLY1305 is not set # CONFIG_CRYPTO_POLY1305_X86_64 is not set CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_RMD128=m CONFIG_CRYPTO_RMD160=m CONFIG_CRYPTO_RMD256=m CONFIG_CRYPTO_RMD320=m CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA1_SSSE3=y CONFIG_CRYPTO_SHA256_SSSE3=y CONFIG_CRYPTO_SHA512_SSSE3=m CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=m # CONFIG_CRYPTO_SHA3 is not set # CONFIG_CRYPTO_SM3 is not set # CONFIG_CRYPTO_STREEBOG is not set CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=m # # Ciphers # CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_AES_TI is not set CONFIG_CRYPTO_AES_NI_INTEL=m CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ARC4=m CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH_COMMON=m CONFIG_CRYPTO_BLOWFISH_X86_64=m CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA_X86_64=m CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64=m CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64=m CONFIG_CRYPTO_CAST_COMMON=m CONFIG_CRYPTO_CAST5=m CONFIG_CRYPTO_CAST5_AVX_X86_64=m CONFIG_CRYPTO_CAST6=m CONFIG_CRYPTO_CAST6_AVX_X86_64=m CONFIG_CRYPTO_DES=m # CONFIG_CRYPTO_DES3_EDE_X86_64 is not set CONFIG_CRYPTO_FCRYPT=m CONFIG_CRYPTO_KHAZAD=m CONFIG_CRYPTO_SALSA20=m # CONFIG_CRYPTO_CHACHA20 is not set # CONFIG_CRYPTO_CHACHA20_X86_64 is not set CONFIG_CRYPTO_SEED=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_SERPENT_SSE2_X86_64=m CONFIG_CRYPTO_SERPENT_AVX_X86_64=m CONFIG_CRYPTO_SERPENT_AVX2_X86_64=m # CONFIG_CRYPTO_SM4 is not set CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_TWOFISH_COMMON=m CONFIG_CRYPTO_TWOFISH_X86_64=m CONFIG_CRYPTO_TWOFISH_X86_64_3WAY=m CONFIG_CRYPTO_TWOFISH_AVX_X86_64=m # # Compression # CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_LZO=y # CONFIG_CRYPTO_842 is not set # CONFIG_CRYPTO_LZ4 is not set # CONFIG_CRYPTO_LZ4HC is not set # CONFIG_CRYPTO_ZSTD is not set # # Random Number Generation # CONFIG_CRYPTO_ANSI_CPRNG=m CONFIG_CRYPTO_DRBG_MENU=y CONFIG_CRYPTO_DRBG_HMAC=y CONFIG_CRYPTO_DRBG_HASH=y CONFIG_CRYPTO_DRBG_CTR=y CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y CONFIG_CRYPTO_USER_API=y CONFIG_CRYPTO_USER_API_HASH=y CONFIG_CRYPTO_USER_API_SKCIPHER=y CONFIG_CRYPTO_USER_API_RNG=m # CONFIG_CRYPTO_USER_API_AEAD is not set # CONFIG_CRYPTO_STATS is not set CONFIG_CRYPTO_HASH_INFO=y # # Crypto library routines # CONFIG_CRYPTO_LIB_AES=y CONFIG_CRYPTO_LIB_ARC4=m # CONFIG_CRYPTO_LIB_BLAKE2S is not set # CONFIG_CRYPTO_LIB_CHACHA is not set # CONFIG_CRYPTO_LIB_CURVE25519 is not set CONFIG_CRYPTO_LIB_DES=m CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 # CONFIG_CRYPTO_LIB_POLY1305 is not set # CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_DEV_PADLOCK=m CONFIG_CRYPTO_DEV_PADLOCK_AES=m CONFIG_CRYPTO_DEV_PADLOCK_SHA=m # CONFIG_CRYPTO_DEV_ATMEL_ECC is not set # CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set CONFIG_CRYPTO_DEV_CCP=y CONFIG_CRYPTO_DEV_CCP_DD=y CONFIG_CRYPTO_DEV_SP_CCP=y CONFIG_CRYPTO_DEV_CCP_CRYPTO=m CONFIG_CRYPTO_DEV_SP_PSP=y # CONFIG_CRYPTO_DEV_CCP_DEBUGFS is not set CONFIG_CRYPTO_DEV_QAT=m CONFIG_CRYPTO_DEV_QAT_DH895xCC=m CONFIG_CRYPTO_DEV_QAT_C3XXX=m CONFIG_CRYPTO_DEV_QAT_C62X=m CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m CONFIG_CRYPTO_DEV_QAT_C3XXXVF=m CONFIG_CRYPTO_DEV_QAT_C62XVF=m # CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set CONFIG_CRYPTO_DEV_CHELSIO=m CONFIG_CRYPTO_DEV_VIRTIO=m # CONFIG_CRYPTO_DEV_SAFEXCEL is not set # CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set CONFIG_ASYMMETRIC_KEY_TYPE=y CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y # CONFIG_ASYMMETRIC_TPM_KEY_SUBTYPE is not set CONFIG_X509_CERTIFICATE_PARSER=y # CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set CONFIG_PKCS7_MESSAGE_PARSER=y # CONFIG_PKCS7_TEST_KEY is not set CONFIG_SIGNED_PE_FILE_VERIFICATION=y # # Certificates for signature checking # CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" CONFIG_SYSTEM_TRUSTED_KEYRING=y CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set # CONFIG_SECONDARY_TRUSTED_KEYRING is not set CONFIG_SYSTEM_BLACKLIST_KEYRING=y CONFIG_SYSTEM_BLACKLIST_HASH_LIST="" # end of Certificates for signature checking CONFIG_BINARY_PRINTF=y # # Library routines # CONFIG_RAID6_PQ=m CONFIG_RAID6_PQ_BENCHMARK=y # CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_CORDIC=m CONFIG_RATIONAL=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y CONFIG_CRC_T10DIF=y CONFIG_CRC_ITU_T=m CONFIG_CRC32=y # CONFIG_CRC32_SELFTEST is not set CONFIG_CRC32_SLICEBY8=y # CONFIG_CRC32_SLICEBY4 is not set # CONFIG_CRC32_SARWATE is not set # CONFIG_CRC32_BIT is not set # CONFIG_CRC64 is not set # CONFIG_CRC4 is not set # CONFIG_CRC7 is not set CONFIG_LIBCRC32C=m CONFIG_CRC8=m CONFIG_XXHASH=y # CONFIG_RANDOM32_SELFTEST is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_LZ4_DECOMPRESS=y CONFIG_ZSTD_COMPRESS=m CONFIG_ZSTD_DECOMPRESS=m CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y CONFIG_XZ_DEC_SPARC=y CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set CONFIG_DECOMPRESS_GZIP=y CONFIG_DECOMPRESS_BZIP2=y CONFIG_DECOMPRESS_LZMA=y CONFIG_DECOMPRESS_XZ=y CONFIG_DECOMPRESS_LZO=y CONFIG_DECOMPRESS_LZ4=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_REED_SOLOMON=m CONFIG_REED_SOLOMON_ENC8=y CONFIG_REED_SOLOMON_DEC8=y CONFIG_TEXTSEARCH=y CONFIG_TEXTSEARCH_KMP=m CONFIG_TEXTSEARCH_BM=m CONFIG_TEXTSEARCH_FSM=m CONFIG_BTREE=y CONFIG_INTERVAL_TREE=y CONFIG_XARRAY_MULTI=y CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED=y CONFIG_DMA_VIRT_OPS=y CONFIG_SWIOTLB=y CONFIG_DMA_CMA=y # # Default contiguous memory area size: # CONFIG_CMA_SIZE_MBYTES=200 CONFIG_CMA_SIZE_SEL_MBYTES=y # CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set # CONFIG_CMA_SIZE_SEL_MIN is not set # CONFIG_CMA_SIZE_SEL_MAX is not set CONFIG_CMA_ALIGNMENT=8 # CONFIG_DMA_API_DEBUG is not set CONFIG_SGL_ALLOC=y CONFIG_IOMMU_HELPER=y CONFIG_CHECK_SIGNATURE=y CONFIG_CPUMASK_OFFSTACK=y CONFIG_CPU_RMAP=y CONFIG_DQL=y CONFIG_GLOB=y # CONFIG_GLOB_SELFTEST is not set CONFIG_NLATTR=y CONFIG_CLZ_TAB=y CONFIG_IRQ_POLL=y CONFIG_MPILIB=y CONFIG_SIGNATURE=y CONFIG_DIMLIB=y CONFIG_OID_REGISTRY=y CONFIG_UCS2_STRING=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y CONFIG_FONT_SUPPORT=y # CONFIG_FONTS is not set CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y CONFIG_SG_POOL=y CONFIG_ARCH_HAS_PMEM_API=y CONFIG_MEMREGION=y CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y CONFIG_ARCH_HAS_UACCESS_MCSAFE=y CONFIG_ARCH_STACKWALK=y CONFIG_SBITMAP=y # CONFIG_STRING_SELFTEST is not set # end of Library routines # # Kernel hacking # # # printk and dmesg options # CONFIG_PRINTK_TIME=y # CONFIG_PRINTK_CALLER is not set CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 CONFIG_BOOT_PRINTK_DELAY=y CONFIG_DYNAMIC_DEBUG=y CONFIG_SYMBOLIC_ERRNAME=y CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options # # Compile-time checks and compiler options # CONFIG_DEBUG_INFO=y CONFIG_DEBUG_INFO_REDUCED=y # CONFIG_DEBUG_INFO_SPLIT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set # CONFIG_GDB_SCRIPTS is not set CONFIG_ENABLE_MUST_CHECK=y CONFIG_FRAME_WARN=2048 CONFIG_STRIP_ASM_SYMS=y # CONFIG_READABLE_ASM is not set # CONFIG_HEADERS_INSTALL is not set CONFIG_DEBUG_SECTION_MISMATCH=y CONFIG_SECTION_MISMATCH_WARN_ONLY=y CONFIG_STACK_VALIDATION=y # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set # end of Compile-time checks and compiler options # # Generic Kernel Debugging Instruments # CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 CONFIG_MAGIC_SYSRQ_SERIAL=y CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" CONFIG_DEBUG_FS=y CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y # CONFIG_UBSAN is not set # end of Generic Kernel Debugging Instruments CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_MISC=y # # Memory Debugging # # CONFIG_PAGE_EXTENSION is not set # CONFIG_DEBUG_PAGEALLOC is not set # CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_PAGE_REF is not set CONFIG_DEBUG_RODATA_TEST=y CONFIG_GENERIC_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set # CONFIG_DEBUG_OBJECTS is not set # CONFIG_SLUB_DEBUG_ON is not set # CONFIG_SLUB_STATS is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set # CONFIG_DEBUG_VM is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y # CONFIG_KASAN is not set CONFIG_KASAN_STACK=1 # end of Memory Debugging CONFIG_DEBUG_SHIRQ=y # # Debug Oops, Lockups and Hangs # CONFIG_PANIC_ON_OOPS=y CONFIG_PANIC_ON_OOPS_VALUE=1 CONFIG_PANIC_TIMEOUT=0 CONFIG_LOCKUP_DETECTOR=y CONFIG_SOFTLOCKUP_DETECTOR=y # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 CONFIG_HARDLOCKUP_DETECTOR_PERF=y CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y CONFIG_HARDLOCKUP_DETECTOR=y CONFIG_BOOTPARAM_HARDLOCKUP_PANIC=y CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=1 # CONFIG_DETECT_HUNG_TASK is not set # CONFIG_WQ_WATCHDOG is not set # CONFIG_TEST_LOCKUP is not set # end of Debug Oops, Lockups and Hangs # # Scheduler Debugging # CONFIG_SCHED_DEBUG=y CONFIG_SCHED_INFO=y CONFIG_SCHEDSTATS=y # end of Scheduler Debugging # CONFIG_DEBUG_TIMEKEEPING is not set # # Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_LOCK_DEBUGGING_SUPPORT=y # CONFIG_PROVE_LOCKING is not set # CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_DEBUG_SPINLOCK is not set # CONFIG_DEBUG_MUTEXES is not set # CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set # CONFIG_DEBUG_RWSEMS is not set # CONFIG_DEBUG_LOCK_ALLOC is not set CONFIG_DEBUG_ATOMIC_SLEEP=y # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set CONFIG_LOCK_TORTURE_TEST=m # CONFIG_WW_MUTEX_SELFTEST is not set # end of Lock Debugging (spinlocks, mutexes, etc...) CONFIG_STACKTRACE=y # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set # CONFIG_DEBUG_KOBJECT is not set # # Debug kernel data structures # CONFIG_DEBUG_LIST=y # CONFIG_DEBUG_PLIST is not set # CONFIG_DEBUG_SG is not set # CONFIG_DEBUG_NOTIFIERS is not set # CONFIG_BUG_ON_DATA_CORRUPTION is not set # end of Debug kernel data structures # CONFIG_DEBUG_CREDENTIALS is not set # # RCU Debugging # CONFIG_TORTURE_TEST=m CONFIG_RCU_PERF_TEST=m CONFIG_RCU_TORTURE_TEST=m CONFIG_RCU_CPU_STALL_TIMEOUT=60 # CONFIG_RCU_TRACE is not set # CONFIG_RCU_EQS_DEBUG is not set # end of RCU Debugging # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set CONFIG_LATENCYTOP=y CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_NOP_TRACER=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_FENTRY=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_TRACER_MAX_TRACE=y CONFIG_TRACE_CLOCK=y CONFIG_RING_BUFFER=y CONFIG_EVENT_TRACING=y CONFIG_CONTEXT_SWITCH_TRACER=y CONFIG_RING_BUFFER_ALLOW_SWAP=y CONFIG_TRACING=y CONFIG_GLOBAL_TRACE_BUF_SIZE=1441792 CONFIG_GENERIC_TRACER=y CONFIG_TRACING_SUPPORT=y CONFIG_FTRACE=y # CONFIG_BOOTTIME_TRACING is not set CONFIG_FUNCTION_TRACER=y CONFIG_FUNCTION_GRAPH_TRACER=y CONFIG_DYNAMIC_FTRACE=y CONFIG_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y CONFIG_FUNCTION_PROFILER=y CONFIG_STACK_TRACER=y # CONFIG_PREEMPTIRQ_EVENTS is not set # CONFIG_IRQSOFF_TRACER is not set CONFIG_SCHED_TRACER=y CONFIG_HWLAT_TRACER=y # CONFIG_MMIOTRACE is not set CONFIG_FTRACE_SYSCALLS=y CONFIG_TRACER_SNAPSHOT=y # CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set CONFIG_BRANCH_PROFILE_NONE=y # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set # CONFIG_PROFILE_ALL_BRANCHES is not set CONFIG_BLK_DEV_IO_TRACE=y CONFIG_KPROBE_EVENTS=y # CONFIG_KPROBE_EVENTS_ON_NOTRACE is not set CONFIG_UPROBE_EVENTS=y CONFIG_BPF_EVENTS=y CONFIG_DYNAMIC_EVENTS=y CONFIG_PROBE_EVENTS=y # CONFIG_BPF_KPROBE_OVERRIDE is not set CONFIG_FTRACE_MCOUNT_RECORD=y CONFIG_TRACING_MAP=y CONFIG_HIST_TRIGGERS=y # CONFIG_TRACE_EVENT_INJECT is not set # CONFIG_TRACEPOINT_BENCHMARK is not set CONFIG_RING_BUFFER_BENCHMARK=m # CONFIG_TRACE_EVAL_MAP_FILE is not set # CONFIG_FTRACE_STARTUP_TEST is not set # CONFIG_RING_BUFFER_STARTUP_TEST is not set # CONFIG_PREEMPTIRQ_DELAY_TEST is not set # CONFIG_SYNTH_EVENT_GEN_TEST is not set # CONFIG_KPROBE_EVENT_GEN_TEST is not set CONFIG_PROVIDE_OHCI1394_DMA_INIT=y # CONFIG_SAMPLES is not set CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y CONFIG_STRICT_DEVMEM=y # CONFIG_IO_STRICT_DEVMEM is not set # # x86 Debugging # CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_EARLY_PRINTK_USB=y CONFIG_X86_VERBOSE_BOOTUP=y CONFIG_EARLY_PRINTK=y CONFIG_EARLY_PRINTK_DBGP=y # CONFIG_EARLY_PRINTK_USB_XDBC is not set # CONFIG_EFI_PGT_DUMP is not set # CONFIG_DEBUG_WX is not set CONFIG_DOUBLEFAULT=y # CONFIG_DEBUG_TLBFLUSH is not set # CONFIG_IOMMU_DEBUG is not set CONFIG_HAVE_MMIOTRACE_SUPPORT=y CONFIG_X86_DECODER_SELFTEST=y CONFIG_IO_DELAY_0X80=y # CONFIG_IO_DELAY_0XED is not set # CONFIG_IO_DELAY_UDELAY is not set # CONFIG_IO_DELAY_NONE is not set CONFIG_DEBUG_BOOT_PARAMS=y # CONFIG_CPA_DEBUG is not set # CONFIG_DEBUG_ENTRY is not set # CONFIG_DEBUG_NMI_SELFTEST is not set CONFIG_X86_DEBUG_FPU=y # CONFIG_PUNIT_ATOM_DEBUG is not set CONFIG_UNWINDER_ORC=y # CONFIG_UNWINDER_FRAME_POINTER is not set # end of x86 Debugging # # Kernel Testing and Coverage # CONFIG_KUNIT=y # CONFIG_KUNIT_DEBUGFS is not set CONFIG_KUNIT_TEST=m CONFIG_KUNIT_EXAMPLE_TEST=m # CONFIG_NOTIFIER_ERROR_INJECTION is not set CONFIG_FUNCTION_ERROR_INJECTION=y CONFIG_FAULT_INJECTION=y # CONFIG_FAILSLAB is not set # CONFIG_FAIL_PAGE_ALLOC is not set CONFIG_FAIL_MAKE_REQUEST=y # CONFIG_FAIL_IO_TIMEOUT is not set # CONFIG_FAIL_FUTEX is not set CONFIG_FAULT_INJECTION_DEBUG_FS=y # CONFIG_FAIL_FUNCTION is not set # CONFIG_FAIL_MMC_REQUEST is not set CONFIG_ARCH_HAS_KCOV=y CONFIG_CC_HAS_SANCOV_TRACE_PC=y # CONFIG_KCOV is not set CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_LKDTM is not set # CONFIG_TEST_LIST_SORT is not set # CONFIG_TEST_MIN_HEAP is not set # CONFIG_TEST_SORT is not set # CONFIG_KPROBES_SANITY_TEST is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_RBTREE_TEST is not set # CONFIG_REED_SOLOMON_TEST is not set # CONFIG_INTERVAL_TREE_TEST is not set # CONFIG_PERCPU_TEST is not set CONFIG_ATOMIC64_SELFTEST=y # CONFIG_ASYNC_RAID6_TEST is not set # CONFIG_TEST_HEXDUMP is not set # CONFIG_TEST_STRING_HELPERS is not set # CONFIG_TEST_STRSCPY is not set # CONFIG_TEST_KSTRTOX is not set # CONFIG_TEST_PRINTF is not set # CONFIG_TEST_BITMAP is not set # CONFIG_TEST_BITFIELD is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set # CONFIG_TEST_OVERFLOW is not set # CONFIG_TEST_RHASHTABLE is not set # CONFIG_TEST_HASH is not set # CONFIG_TEST_IDA is not set # CONFIG_TEST_LKM is not set # CONFIG_TEST_VMALLOC is not set # CONFIG_TEST_USER_COPY is not set CONFIG_TEST_BPF=m # CONFIG_TEST_BLACKHOLE_DEV is not set # CONFIG_FIND_BIT_BENCHMARK is not set # CONFIG_TEST_FIRMWARE is not set # CONFIG_TEST_SYSCTL is not set CONFIG_SYSCTL_KUNIT_TEST=m CONFIG_LIST_KUNIT_TEST=m # CONFIG_TEST_UDELAY is not set # CONFIG_TEST_STATIC_KEYS is not set # CONFIG_TEST_KMOD is not set # CONFIG_TEST_MEMCAT_P is not set # CONFIG_TEST_LIVEPATCH is not set # CONFIG_TEST_STACKINIT is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_MEMTEST is not set # CONFIG_HYPERV_TESTING is not set # end of Kernel Testing and Coverage # end of Kernel hacking [-- Attachment #3: job-script --] [-- Type: text/plain, Size: 7244 bytes --] #!/bin/sh export_top_env() { export suite='phoronix-test-suite' export testcase='phoronix-test-suite' export category='benchmark' export need_x=true export timeout='1h' export job_origin='/lkp/lkp/.src-20200507-152157/allot/cyclic:p2:linux-devel:devel-hourly/lkp-nhm-2ep1/phoronix-test-suite-needx.yaml' export queue_cmdline_keys='branch commit queue_at_least_once' export queue='validate' export testbox='lkp-nhm-2ep1' export tbox_group='lkp-nhm-2ep1' export submit_id='5ed64df39dfe6c1f6875bcee' export job_file='/lkp/jobs/scheduled/lkp-nhm-2ep1/phoronix-test-suite-performance-true-glmark2-1.1.0-ucode=0x1d-debian-x86_64-phoronix-e44e907dd8f937313d35615d799d54162c56d173-20200602-8040-1267qfc-3.yaml' export id='903e5aecac7c45a663b965429534af7822952e5b' export queuer_version='/lkp-src' export model='Nehalem-EP' export nr_node=2 export nr_cpu=16 export memory='48G' export nr_hdd_partitions=3 export hdd_partitions='/dev/disk/by-id/wwn-0x50015170ed62696d-part1 /dev/disk/by-id/wwn-0x50015170ed6268b6-part1 /dev/disk/by-id/wwn-0x50015170ed6269c5-part1' export swap_partitions='LABEL=SWAP' export rootfs_partition='/dev/disk/by-id/wwn-0x55cd2e4123123127-part2' export brand='Intel(R) Xeon(R) CPU X5570 @ 2.93GHz' export kernel_cmdline_hw='console=ttyS1,115200 console=tty0' export rootfs='internal-lkp-server:/osimage/debian/debian-x86_64-phoronix' export run_on_local_disk=true export need_monitors=false export commit='e44e907dd8f937313d35615d799d54162c56d173' export need_kconfig_hw='CONFIG_IGB=y CONFIG_SCSI_MPT3SAS' export ucode='0x1d' export kconfig='x86_64-rhel-7.6' export compiler='gcc-7' export enqueue_time='2020-06-02 21:03:00 +0800' export _id='5ed64e049dfe6c1f6875bcef' export _rt='/result/phoronix-test-suite/performance-true-glmark2-1.1.0-ucode=0x1d/lkp-nhm-2ep1/debian-x86_64-phoronix/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173' export user='lkp' export head_commit='33dab5accc317b5f777f30cf51564fe02c503c03' export base_commit='2ef96a5bb12be62ef75b5828c0aab838ebb29cb8' export branch='linux-devel/devel-hourly-2020051600' export result_root='/result/phoronix-test-suite/performance-true-glmark2-1.1.0-ucode=0x1d/lkp-nhm-2ep1/debian-x86_64-phoronix/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/3' export scheduler_version='/lkp/lkp/.src-20200602-145712' export LKP_SERVER='inn' export arch='x86_64' export max_uptime=3600 export initrd='/osimage/initramfs/initramfs-20191118.cgz' export bootloader_append='root=/dev/disk/by-id/wwn-0x55cd2e4123123127-part2 rootflags=subvol=debian-x86_64-phoronix remote_rootfs=internal-lkp-server:/osimage/debian/debian-x86_64-phoronix user=lkp job=/lkp/jobs/scheduled/lkp-nhm-2ep1/phoronix-test-suite-performance-true-glmark2-1.1.0-ucode=0x1d-debian-x86_64-phoronix-e44e907dd8f937313d35615d799d54162c56d173-20200602-8040-1267qfc-3.yaml ARCH=x86_64 kconfig=x86_64-rhel-7.6 branch=linux-devel/devel-hourly-2020051600 commit=e44e907dd8f937313d35615d799d54162c56d173 BOOT_IMAGE=/pkg/linux/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/vmlinuz-5.7.0-rc5-01428-ge44e907dd8f937 console=ttyS1,115200 console=tty0 max_uptime=3600 RESULT_ROOT=/result/phoronix-test-suite/performance-true-glmark2-1.1.0-ucode=0x1d/lkp-nhm-2ep1/debian-x86_64-phoronix/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/3 LKP_SERVER=inn nokaslr selinux=0 debug apic=debug sysrq_always_enabled rcupdate.rcu_cpu_stall_timeout=100 net.ifnames=0 printk.devkmsg=on panic=-1 softlockup_panic=1 nmi_watchdog=panic oops=panic load_ramdisk=2 prompt_ramdisk=0 drbd.minor_count=8 systemd.log_level=err ignore_loglevel console=tty0 earlyprintk=ttyS0,115200 console=ttyS0,115200 vga=normal rw' export modules_initrd='/pkg/linux/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/modules.cgz' export ucode_initrd='/osimage/ucode/intel-ucode-20191114.cgz' export lkp_initrd='/osimage/user/lkp/lkp-x86_64.cgz' export site='inn' export LKP_CGI_PORT=80 export LKP_CIFS_PORT=139 export last_kernel='5.7.0' export queue_at_least_once=1 export repeat_to=4 export schedule_notify_address= export kernel='/pkg/linux/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/vmlinuz-5.7.0-rc5-01428-ge44e907dd8f937' export dequeue_time='2020-06-02 21:16:51 +0800' export job_initrd='/lkp/jobs/scheduled/lkp-nhm-2ep1/phoronix-test-suite-performance-true-glmark2-1.1.0-ucode=0x1d-debian-x86_64-phoronix-e44e907dd8f937313d35615d799d54162c56d173-20200602-8040-1267qfc-3.cgz' [ -n "$LKP_SRC" ] || export LKP_SRC=/lkp/${user:-lkp}/src } run_job() { echo $$ > $TMP/run-job.pid . $LKP_SRC/lib/http.sh . $LKP_SRC/lib/job.sh . $LKP_SRC/lib/env.sh export_top_env run_setup $LKP_SRC/setup/cpufreq_governor 'performance' run_monitor $LKP_SRC/monitors/wrapper kmsg run_monitor $LKP_SRC/monitors/no-stdout/wrapper boot-time run_monitor $LKP_SRC/monitors/wrapper iostat run_monitor $LKP_SRC/monitors/wrapper heartbeat run_monitor $LKP_SRC/monitors/wrapper vmstat run_monitor $LKP_SRC/monitors/wrapper numa-numastat run_monitor $LKP_SRC/monitors/wrapper numa-vmstat run_monitor $LKP_SRC/monitors/wrapper numa-meminfo run_monitor $LKP_SRC/monitors/wrapper proc-vmstat run_monitor $LKP_SRC/monitors/wrapper proc-stat run_monitor $LKP_SRC/monitors/wrapper meminfo run_monitor $LKP_SRC/monitors/wrapper slabinfo run_monitor $LKP_SRC/monitors/wrapper interrupts run_monitor $LKP_SRC/monitors/wrapper lock_stat run_monitor $LKP_SRC/monitors/wrapper latency_stats run_monitor $LKP_SRC/monitors/wrapper softirqs run_monitor $LKP_SRC/monitors/one-shot/wrapper bdi_dev_mapping run_monitor $LKP_SRC/monitors/wrapper diskstats run_monitor $LKP_SRC/monitors/wrapper nfsstat run_monitor $LKP_SRC/monitors/wrapper cpuidle run_monitor $LKP_SRC/monitors/wrapper cpufreq-stats run_monitor $LKP_SRC/monitors/wrapper sched_debug run_monitor $LKP_SRC/monitors/wrapper perf-stat run_monitor $LKP_SRC/monitors/wrapper mpstat run_monitor $LKP_SRC/monitors/no-stdout/wrapper perf-profile run_monitor $LKP_SRC/monitors/wrapper oom-killer run_monitor $LKP_SRC/monitors/plain/watchdog run_test test='glmark2-1.1.0' $LKP_SRC/tests/wrapper phoronix-test-suite } extract_stats() { export stats_part_begin= export stats_part_end= $LKP_SRC/stats/wrapper phoronix-test-suite $LKP_SRC/stats/wrapper kmsg $LKP_SRC/stats/wrapper boot-time $LKP_SRC/stats/wrapper iostat $LKP_SRC/stats/wrapper vmstat $LKP_SRC/stats/wrapper numa-numastat $LKP_SRC/stats/wrapper numa-vmstat $LKP_SRC/stats/wrapper numa-meminfo $LKP_SRC/stats/wrapper proc-vmstat $LKP_SRC/stats/wrapper meminfo $LKP_SRC/stats/wrapper slabinfo $LKP_SRC/stats/wrapper interrupts $LKP_SRC/stats/wrapper lock_stat $LKP_SRC/stats/wrapper latency_stats $LKP_SRC/stats/wrapper softirqs $LKP_SRC/stats/wrapper diskstats $LKP_SRC/stats/wrapper nfsstat $LKP_SRC/stats/wrapper cpuidle $LKP_SRC/stats/wrapper sched_debug $LKP_SRC/stats/wrapper perf-stat $LKP_SRC/stats/wrapper mpstat $LKP_SRC/stats/wrapper perf-profile $LKP_SRC/stats/wrapper time phoronix-test-suite.time $LKP_SRC/stats/wrapper dmesg $LKP_SRC/stats/wrapper kmsg $LKP_SRC/stats/wrapper last_state $LKP_SRC/stats/wrapper stderr $LKP_SRC/stats/wrapper time } "$@" [-- Attachment #4: job.yaml --] [-- Type: text/plain, Size: 4890 bytes --] --- #! jobs/phoronix-test-suite-needx.yaml suite: phoronix-test-suite testcase: phoronix-test-suite category: benchmark need_x: true timeout: 1h phoronix-test-suite: test: glmark2-1.1.0 job_origin: "/lkp/lkp/.src-20200507-152157/allot/cyclic:p2:linux-devel:devel-hourly/lkp-nhm-2ep1/phoronix-test-suite-needx.yaml" #! queue options queue_cmdline_keys: - branch - commit - queue_at_least_once queue: bisect testbox: lkp-nhm-2ep1 tbox_group: lkp-nhm-2ep1 submit_id: 5ed63c619dfe6c1e8d7f06fd job_file: "/lkp/jobs/scheduled/lkp-nhm-2ep1/phoronix-test-suite-performance-true-glmark2-1.1.0-ucode=0x1d-debian-x86_64-phoronix-e44e907dd8f937313d35615d799d54162c56d173-20200602-7821-12pu4k7-0.yaml" id: a0c088e991e872e5fa087f78d58ac66b2af81e7a queuer_version: "/lkp-src" #! hosts/lkp-nhm-2ep1 model: Nehalem-EP nr_node: 2 nr_cpu: 16 memory: 48G nr_hdd_partitions: 3 hdd_partitions: "/dev/disk/by-id/wwn-0x50015170ed62696d-part1 /dev/disk/by-id/wwn-0x50015170ed6268b6-part1 /dev/disk/by-id/wwn-0x50015170ed6269c5-part1" swap_partitions: LABEL=SWAP rootfs_partition: "/dev/disk/by-id/wwn-0x55cd2e4123123127-part2" brand: Intel(R) Xeon(R) CPU X5570 @ 2.93GHz kernel_cmdline_hw: console=ttyS1,115200 console=tty0 #! include/category/benchmark kmsg: boot-time: iostat: heartbeat: vmstat: numa-numastat: numa-vmstat: numa-meminfo: proc-vmstat: proc-stat: meminfo: slabinfo: interrupts: lock_stat: latency_stats: softirqs: bdi_dev_mapping: diskstats: nfsstat: cpuidle: cpufreq-stats: sched_debug: perf-stat: mpstat: perf-profile: #! include/category/ALL cpufreq_governor: performance #! include/phoronix-test-suite rootfs: internal-lkp-server:/osimage/debian/debian-x86_64-phoronix run_on_local_disk: true need_monitors: false #! include/queue/cyclic commit: e44e907dd8f937313d35615d799d54162c56d173 #! include/testbox/lkp-nhm-2ep1 need_kconfig_hw: - CONFIG_IGB=y - CONFIG_SCSI_MPT3SAS ucode: '0x1d' #! default params kconfig: x86_64-rhel-7.6 compiler: gcc-7 enqueue_time: 2020-06-02 19:48:33.061634181 +08:00 _id: 5ed63c619dfe6c1e8d7f06fd _rt: "/result/phoronix-test-suite/performance-true-glmark2-1.1.0-ucode=0x1d/lkp-nhm-2ep1/debian-x86_64-phoronix/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173" #! schedule options user: lkp head_commit: 33dab5accc317b5f777f30cf51564fe02c503c03 base_commit: 2ef96a5bb12be62ef75b5828c0aab838ebb29cb8 branch: linux-devel/devel-hourly-2020051600 result_root: "/result/phoronix-test-suite/performance-true-glmark2-1.1.0-ucode=0x1d/lkp-nhm-2ep1/debian-x86_64-phoronix/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/0" scheduler_version: "/lkp/lkp/.src-20200602-145712" LKP_SERVER: inn arch: x86_64 max_uptime: 3600 initrd: "/osimage/initramfs/initramfs-20191118.cgz" bootloader_append: - root=/dev/disk/by-id/wwn-0x55cd2e4123123127-part2 - rootflags=subvol=debian-x86_64-phoronix - remote_rootfs=internal-lkp-server:/osimage/debian/debian-x86_64-phoronix - user=lkp - job=/lkp/jobs/scheduled/lkp-nhm-2ep1/phoronix-test-suite-performance-true-glmark2-1.1.0-ucode=0x1d-debian-x86_64-phoronix-e44e907dd8f937313d35615d799d54162c56d173-20200602-7821-12pu4k7-0.yaml - ARCH=x86_64 - kconfig=x86_64-rhel-7.6 - branch=linux-devel/devel-hourly-2020051600 - commit=e44e907dd8f937313d35615d799d54162c56d173 - BOOT_IMAGE=/pkg/linux/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/vmlinuz-5.7.0-rc5-01428-ge44e907dd8f937 - console=ttyS1,115200 console=tty0 - max_uptime=3600 - RESULT_ROOT=/result/phoronix-test-suite/performance-true-glmark2-1.1.0-ucode=0x1d/lkp-nhm-2ep1/debian-x86_64-phoronix/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/0 - LKP_SERVER=inn - nokaslr - selinux=0 - debug - apic=debug - sysrq_always_enabled - rcupdate.rcu_cpu_stall_timeout=100 - net.ifnames=0 - printk.devkmsg=on - panic=-1 - softlockup_panic=1 - nmi_watchdog=panic - oops=panic - load_ramdisk=2 - prompt_ramdisk=0 - drbd.minor_count=8 - systemd.log_level=err - ignore_loglevel - console=tty0 - earlyprintk=ttyS0,115200 - console=ttyS0,115200 - vga=normal - rw modules_initrd: "/pkg/linux/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/modules.cgz" ucode_initrd: "/osimage/ucode/intel-ucode-20191114.cgz" lkp_initrd: "/osimage/user/lkp/lkp-x86_64.cgz" site: inn #! /lkp/lkp/.src-20200514-102226/include/site/inn LKP_CGI_PORT: 80 LKP_CIFS_PORT: 139 oom-killer: watchdog: #! runtime status last_kernel: 4.20.0 queue_at_least_once: 0 #! /lkp/lkp/.src-20200602-145712/include/site/inn repeat_to: 2 schedule_notify_address: #! user overrides kernel: "/pkg/linux/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/vmlinuz-5.7.0-rc5-01428-ge44e907dd8f937" dequeue_time: 2020-06-02 20:28:27.707298169 +08:00 job_state: finished loadavg: 1.69 1.58 0.99 1/349 1694 start_time: '1591101084' end_time: '1591101819' version: "/lkp/lkp/.src-20200602-145745:52914b3b:6fcdf660a" [-- Attachment #5: reproduce --] [-- Type: text/plain, Size: 253 bytes --] for cpu_dir in /sys/devices/system/cpu/cpu[0-9]* do online_file="$cpu_dir"/online [ -f "$online_file" ] && [ "$(cat "$online_file")" -eq 0 ] && continue file="$cpu_dir"/cpufreq/scaling_governor [ -f "$file" ] && echo "performance" > "$file" done [-- Attachment #6: Type: text/plain, Size: 160 bytes --] _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [drm/mgag200] e44e907dd8: phoronix-test-suite.glmark2.800x600.score -64.9% regression 2020-06-03 9:09 ` [drm/mgag200] e44e907dd8: phoronix-test-suite.glmark2.800x600.score -64.9% regression kernel test robot @ 2020-06-15 20:58 ` Emil Velikov 2020-06-16 3:10 ` Rong Chen 2020-06-16 14:24 ` Thomas Zimmermann 0 siblings, 2 replies; 25+ messages in thread From: Emil Velikov @ 2020-06-15 20:58 UTC (permalink / raw) To: kernel test robot Cc: john.p.donnelly, ML dri-devel, lkp, OTC LSE PnP, Gerd Hoffmann, Thomas Zimmermann, Dave Airlie, Sam Ravnborg, Emil Velikov Hi all, On Thu, 4 Jun 2020 at 08:11, kernel test robot <rong.a.chen@intel.com> wrote: > > Greeting, > > FYI, we noticed a -64.9% regression of phoronix-test-suite.glmark2.800x600.score due to commit: > On one hand, I'm really happy to see performance testing happening although this report is missing various crucial pieces of information. > commit: e44e907dd8f937313d35615d799d54162c56d173 ("[PATCH v3 05/15] drm/mgag200: Split MISC register update into PLL selection, SYNC and I/O") > url: https://github.com/0day-ci/linux/commits/Thomas-Zimmermann/drm-mgag200-Convert-to-atomic-modesetting/20200515-163744 > base: git://anongit.freedesktop.org/drm/drm-tip drm-tip > > in testcase: phoronix-test-suite > on test machine: 16 threads Intel(R) Xeon(R) CPU X5570 @ 2.93GHz with 48G memory > with following parameters: > > need_x: true Replace "need_x" with the Xorg version as seen in `Xorg -version'. > test: glmark2-1.1.0 > cpufreq_governor: performance > ucode: 0x1d > > test-description: The Phoronix Test Suite is the most comprehensive testing and benchmarking platform available that provides an extensible framework for which new tests can be easily added. > test-url: http://www.phoronix-test-suite.com/ > Please remove the test description and url. They don't add any value. Mention which Mesa version is used as well as on what GPU. The output of lspci and glxinfo will help here. For this particular test - there is no Mesa/upstream driver for this GPU, so I imagine one of the swrast drivers was used. Which one - swrast (classic, softpipe, llvmpipe, swr) or kms_swrast. The output of `LD_DEBUG=libs glxinfo |& grep _dri.so` will help here. > commit: > bef2303526 ("drm/mgag200: Move mode-setting code into separate helper function") > e44e907dd8 ("drm/mgag200: Split MISC register update into PLL selection, SYNC and I/O") > Actually the offending commit has a subtle change of behaviour - it adds an extra MGAREG_MISC_RAMMAPEN. That is not documented and I've failed to spot it during review. Thomas - shall we revert that line in itself or at least add an inline comment why it is needed? > > 100 +---------------------------------------------------------------------+ > 90 |-+ + + +.+ + + + + + : | > | : : : : : : : : : : : | > 80 |-: : : : : : : : : : : | > 70 |-:: : :: : : : :: :: : :: : | > |: : : : : : : : : : : : : : : : : : : | > 60 |:+: : : : : : : : : : : : : : : : : : | > 50 |:+: : : : : : : : : : : : : : : : : : | > 40 |:+ : : : : : : : : : : : : : : : : : : | > |: : : : : : : : : : : : : : : : : : :O O O O O | > 30 |:+ : : : : : : : : : : : : : : : : : : | > 20 |-+ :: : : : : : :: : : :: : : O : | > | : : : : : : : : : : : : : | > 10 |-+ : : : : : : : : : : : : : | > 0 +---------------------------------------------------------------------+ > > > phoronix-test-suite.glmark2.1024x768.score > > 70 +----------------------------------------------------------------------+ > | + + + +..+ + + + + + +.+ | > 60 |-: : : : : : : : : : : | > | : : : : : : : : : : : | > 50 |-:: : :: : : :: : : :: :: : | > |: : : : : : : : : : : : : : : : : : : | > 40 |:+: : : : : : : : : : : : : : : : : : | > |: : : : : : : : : : : : : : : : : : : O | > 30 |:+ : : : : : : : : : : : : : : : : : :O O O O | > |: : : : : : : : : : : : : : : : : : : | > 20 |:+ : : : : : : : : : : : : : : : : : : | > | :: : : : : : :: : : :: : : O :: | > 10 |-+ : : : : : : : : : : : : : | > | : : : O : O : : O : : : O : : : : | > 0 +----------------------------------------------------------------------+ > > > [*] bisect-good sample > [O] bisect-bad sample > Hmm I must be going blind - there isn't even a single * in either of the graphs. Or perhaps my eyesight is fine and the legend or the graphs need fixing. HTH -Emil _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [drm/mgag200] e44e907dd8: phoronix-test-suite.glmark2.800x600.score -64.9% regression 2020-06-15 20:58 ` Emil Velikov @ 2020-06-16 3:10 ` Rong Chen 2020-06-16 3:29 ` [LKP] " Rong Chen ` (2 more replies) 2020-06-16 14:24 ` Thomas Zimmermann 1 sibling, 3 replies; 25+ messages in thread From: Rong Chen @ 2020-06-16 3:10 UTC (permalink / raw) To: Emil Velikov Cc: john.p.donnelly, ML dri-devel, lkp, OTC LSE PnP, Gerd Hoffmann, Thomas Zimmermann, Dave Airlie, Sam Ravnborg, Emil Velikov [-- Attachment #1: Type: text/plain, Size: 7182 bytes --] On 6/16/20 4:58 AM, Emil Velikov wrote: > Hi all, > > On Thu, 4 Jun 2020 at 08:11, kernel test robot <rong.a.chen@intel.com> wrote: >> Greeting, >> >> FYI, we noticed a -64.9% regression of phoronix-test-suite.glmark2.800x600.score due to commit: >> > On one hand, I'm really happy to see performance testing happening > although this report is missing various crucial pieces of information. > >> commit: e44e907dd8f937313d35615d799d54162c56d173 ("[PATCH v3 05/15] drm/mgag200: Split MISC register update into PLL selection, SYNC and I/O") >> url: https://github.com/0day-ci/linux/commits/Thomas-Zimmermann/drm-mgag200-Convert-to-atomic-modesetting/20200515-163744 >> base: git://anongit.freedesktop.org/drm/drm-tip drm-tip >> >> in testcase: phoronix-test-suite >> on test machine: 16 threads Intel(R) Xeon(R) CPU X5570 @ 2.93GHz with 48G memory >> with following parameters: >> >> need_x: true > Replace "need_x" with the Xorg version as seen in `Xorg -version'. # Xorg -version /bin/sh: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8) X.Org X Server 1.20.4 X Protocol Version 11, Revision 0 Build Operating System: Linux 4.9.0-8-amd64 x86_64 Debian Current Operating System: Linux lkp-nhm-2ep1 5.7.0-rc5-01428-ge44e907dd8f937 #1 SMP Tue Jun 2 19:51:38 CST 2020 x86_64 Kernel command line: ip=::::lkp-nhm-2ep1::dhcp root=/dev/disk/by-id/wwn-0x55cd2e4123123127-part2 rootflags=subvol=debian-x86_64-phoronix remote_rootfs=internal-lkp-server:/osimage/debian/debian-x86_64-phoronix user=lkp job=/lkp/jobs/scheduled/lkp-nhm-2ep1/phoronix-test-suite-performance-true-glmark2-1.1.0-ucode=0x1d-debian-x86_64-phoronix-e44e907dd8f937313d35615d799d54162c56d173-20200616-56456-1kgmjzm-0.yaml ARCH=x86_64 kconfig=x86_64-rhel-7.6 branch=linux-devel/devel-hourly-2020051600 commit=e44e907dd8f937313d35615d799d54162c56d173 BOOT_IMAGE=/pkg/linux/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/vmlinuz-5.7.0-rc5-01428-ge44e907dd8f937 console=ttyS1,115200 console=tty0 max_uptime=3600 RESULT_ROOT=/result/phoronix-test-suite/performance-true-glmark2-1.1.0-ucode=0x1d/lkp-nhm-2ep1/debian-x86_64-phoronix/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/4 LKP_SERVER=inn nokaslr selinux=0 debug apic=debug sysrq_always_enabled rcupdate.rcu_cpu_stall_timeout=100 net.ifnames=0 printk.devkmsg=on panic=-1 softlockup_panic=1 nmi_watchdog=panic oops=panic load_ramdisk=2 prompt_ramdisk=0 drbd.minor_count=8 systemd.log_level=err ignore_loglevel console=tty0 earlyprintk=ttyS0,115200 console=ttyS0,115200 vga=normal rw Build Date: 05 March 2019 08:11:12PM xorg-server 2:1.20.4-1 (https://www.debian.org/support) Current version of pixman: 0.36.0 Before reporting problems, check http://wiki.x.org to make sure that you have the latest version. > >> test: glmark2-1.1.0 >> cpufreq_governor: performance >> ucode: 0x1d >> >> test-description: The Phoronix Test Suite is the most comprehensive testing and benchmarking platform available that provides an extensible framework for which new tests can be easily added. >> test-url: http://www.phoronix-test-suite.com/ >> > Please remove the test description and url. They don't add any value. > > Mention which Mesa version is used as well as on what GPU. The output > of lspci and glxinfo will help here. Attached please find the outputs of lspci and glxinfo > > For this particular test - there is no Mesa/upstream driver for this > GPU, so I imagine one of the swrast drivers was used. Which one - > swrast (classic, softpipe, llvmpipe, swr) or kms_swrast. > The output of `LD_DEBUG=libs glxinfo |& grep _dri.so` will help here. # LD_DEBUG=libs glxinfo |& grep _dri.so 2132: calling init: /usr/lib/i386-linux-gnu/dri/swrast_dri.so 2132: calling fini: /usr/lib/i386-linux-gnu/dri/swrast_dri.so [0] Best Regards, Rong Chen > >> commit: >> bef2303526 ("drm/mgag200: Move mode-setting code into separate helper function") >> e44e907dd8 ("drm/mgag200: Split MISC register update into PLL selection, SYNC and I/O") >> > Actually the offending commit has a subtle change of behaviour - it > adds an extra MGAREG_MISC_RAMMAPEN. > That is not documented and I've failed to spot it during review. > > Thomas - shall we revert that line in itself or at least add an inline > comment why it is needed? > >> 100 +---------------------------------------------------------------------+ >> 90 |-+ + + +.+ + + + + + : | >> | : : : : : : : : : : : | >> 80 |-: : : : : : : : : : : | >> 70 |-:: : :: : : : :: :: : :: : | >> |: : : : : : : : : : : : : : : : : : : | >> 60 |:+: : : : : : : : : : : : : : : : : : | >> 50 |:+: : : : : : : : : : : : : : : : : : | >> 40 |:+ : : : : : : : : : : : : : : : : : : | >> |: : : : : : : : : : : : : : : : : : :O O O O O | >> 30 |:+ : : : : : : : : : : : : : : : : : : | >> 20 |-+ :: : : : : : :: : : :: : : O : | >> | : : : : : : : : : : : : : | >> 10 |-+ : : : : : : : : : : : : : | >> 0 +---------------------------------------------------------------------+ >> >> >> phoronix-test-suite.glmark2.1024x768.score >> >> 70 +----------------------------------------------------------------------+ >> | + + + +..+ + + + + + +.+ | >> 60 |-: : : : : : : : : : : | >> | : : : : : : : : : : : | >> 50 |-:: : :: : : :: : : :: :: : | >> |: : : : : : : : : : : : : : : : : : : | >> 40 |:+: : : : : : : : : : : : : : : : : : | >> |: : : : : : : : : : : : : : : : : : : O | >> 30 |:+ : : : : : : : : : : : : : : : : : :O O O O | >> |: : : : : : : : : : : : : : : : : : : | >> 20 |:+ : : : : : : : : : : : : : : : : : : | >> | :: : : : : : :: : : :: : : O :: | >> 10 |-+ : : : : : : : : : : : : : | >> | : : : O : O : : O : : : O : : : : | >> 0 +----------------------------------------------------------------------+ >> >> >> [*] bisect-good sample >> [O] bisect-bad sample >> > Hmm I must be going blind - there isn't even a single * in either of the graphs. > Or perhaps my eyesight is fine and the legend or the graphs need fixing. > > HTH > -Emil [-- Attachment #2: glxinfo --] [-- Type: text/plain, Size: 85166 bytes --] name of display: :0 display: :0 screen: 0 direct rendering: Yes server glx vendor string: SGI server glx version string: 1.4 server glx extensions: GLX_ARB_context_flush_control, GLX_ARB_create_context, GLX_ARB_create_context_no_error, GLX_ARB_create_context_profile, GLX_ARB_fbconfig_float, GLX_ARB_framebuffer_sRGB, GLX_ARB_multisample, GLX_EXT_create_context_es2_profile, GLX_EXT_create_context_es_profile, GLX_EXT_fbconfig_packed_float, GLX_EXT_framebuffer_sRGB, GLX_EXT_import_context, GLX_EXT_libglvnd, GLX_EXT_no_config_context, GLX_EXT_texture_from_pixmap, GLX_EXT_visual_info, GLX_EXT_visual_rating, GLX_MESA_copy_sub_buffer, GLX_OML_swap_method, GLX_SGIS_multisample, GLX_SGIX_fbconfig, GLX_SGIX_pbuffer, GLX_SGIX_visual_select_group, GLX_SGI_make_current_read client glx vendor string: Mesa Project and SGI client glx version string: 1.4 client glx extensions: GLX_ARB_context_flush_control, GLX_ARB_create_context, GLX_ARB_create_context_no_error, GLX_ARB_create_context_profile, GLX_ARB_create_context_robustness, GLX_ARB_fbconfig_float, GLX_ARB_framebuffer_sRGB, GLX_ARB_get_proc_address, GLX_ARB_multisample, GLX_EXT_buffer_age, GLX_EXT_create_context_es2_profile, GLX_EXT_create_context_es_profile, GLX_EXT_fbconfig_packed_float, GLX_EXT_framebuffer_sRGB, GLX_EXT_import_context, GLX_EXT_texture_from_pixmap, GLX_EXT_visual_info, GLX_EXT_visual_rating, GLX_INTEL_swap_event, GLX_MESA_copy_sub_buffer, GLX_MESA_multithread_makecurrent, GLX_MESA_query_renderer, GLX_MESA_swap_control, GLX_OML_swap_method, GLX_OML_sync_control, GLX_SGIS_multisample, GLX_SGIX_fbconfig, GLX_SGIX_pbuffer, GLX_SGIX_visual_select_group, GLX_SGI_make_current_read, GLX_SGI_swap_control, GLX_SGI_video_sync GLX version: 1.4 GLX extensions: GLX_ARB_context_flush_control, GLX_ARB_create_context, GLX_ARB_create_context_profile, GLX_ARB_fbconfig_float, GLX_ARB_framebuffer_sRGB, GLX_ARB_get_proc_address, GLX_ARB_multisample, GLX_EXT_create_context_es2_profile, GLX_EXT_create_context_es_profile, GLX_EXT_fbconfig_packed_float, GLX_EXT_framebuffer_sRGB, GLX_EXT_import_context, GLX_EXT_texture_from_pixmap, GLX_EXT_visual_info, GLX_EXT_visual_rating, GLX_MESA_copy_sub_buffer, GLX_MESA_query_renderer, GLX_OML_swap_method, GLX_SGIS_multisample, GLX_SGIX_fbconfig, GLX_SGIX_pbuffer, GLX_SGIX_visual_select_group, GLX_SGI_make_current_read Extended renderer info (GLX_MESA_query_renderer): Vendor: VMware, Inc. (0xffffffff) Device: llvmpipe (LLVM 10.0.0, 128 bits) (0xffffffff) Version: 20.0.7 Accelerated: no Video memory: 48228MB Unified memory: no Preferred profile: core (0x1) Max core profile version: 3.3 Max compat profile version: 3.1 Max GLES1 profile version: 1.1 Max GLES[23] profile version: 3.1 OpenGL vendor string: VMware, Inc. OpenGL renderer string: llvmpipe (LLVM 10.0.0, 128 bits) OpenGL core profile version string: 3.3 (Core Profile) Mesa 20.0.7 OpenGL core profile shading language version string: 3.30 OpenGL core profile context flags: (none) OpenGL core profile profile mask: core profile OpenGL core profile extensions: GL_AMD_conservative_depth, GL_AMD_draw_buffers_blend, GL_AMD_gpu_shader_int64, GL_AMD_multi_draw_indirect, GL_AMD_query_buffer_object, GL_AMD_seamless_cubemap_per_texture, GL_AMD_shader_stencil_export, GL_AMD_shader_trinary_minmax, GL_AMD_texture_texture4, GL_AMD_vertex_shader_layer, GL_AMD_vertex_shader_viewport_index, GL_ANGLE_texture_compression_dxt3, GL_ANGLE_texture_compression_dxt5, GL_ARB_ES2_compatibility, GL_ARB_ES3_compatibility, GL_ARB_arrays_of_arrays, GL_ARB_base_instance, GL_ARB_blend_func_extended, GL_ARB_buffer_storage, GL_ARB_clear_buffer_object, GL_ARB_clear_texture, GL_ARB_clip_control, GL_ARB_compressed_texture_pixel_storage, GL_ARB_compute_shader, GL_ARB_conditional_render_inverted, GL_ARB_conservative_depth, GL_ARB_copy_buffer, GL_ARB_copy_image, GL_ARB_cull_distance, GL_ARB_debug_output, GL_ARB_depth_buffer_float, GL_ARB_depth_clamp, GL_ARB_derivative_control, GL_ARB_direct_state_access, GL_ARB_draw_buffers, GL_ARB_draw_buffers_blend, GL_ARB_draw_elements_base_vertex, GL_ARB_draw_indirect, GL_ARB_draw_instanced, GL_ARB_enhanced_layouts, GL_ARB_explicit_attrib_location, GL_ARB_explicit_uniform_location, GL_ARB_fragment_coord_conventions, GL_ARB_fragment_layer_viewport, GL_ARB_fragment_shader, GL_ARB_framebuffer_no_attachments, GL_ARB_framebuffer_object, GL_ARB_framebuffer_sRGB, GL_ARB_get_program_binary, GL_ARB_get_texture_sub_image, GL_ARB_gpu_shader_fp64, GL_ARB_gpu_shader_int64, GL_ARB_half_float_pixel, GL_ARB_half_float_vertex, GL_ARB_indirect_parameters, GL_ARB_instanced_arrays, GL_ARB_internalformat_query, GL_ARB_internalformat_query2, GL_ARB_invalidate_subdata, GL_ARB_map_buffer_alignment, GL_ARB_map_buffer_range, GL_ARB_multi_bind, GL_ARB_multi_draw_indirect, GL_ARB_occlusion_query2, GL_ARB_parallel_shader_compile, GL_ARB_pipeline_statistics_query, GL_ARB_pixel_buffer_object, GL_ARB_point_sprite, GL_ARB_polygon_offset_clamp, GL_ARB_program_interface_query, GL_ARB_provoking_vertex, GL_ARB_query_buffer_object, GL_ARB_robustness, GL_ARB_sampler_objects, GL_ARB_seamless_cube_map, GL_ARB_seamless_cubemap_per_texture, GL_ARB_separate_shader_objects, GL_ARB_shader_atomic_counter_ops, GL_ARB_shader_atomic_counters, GL_ARB_shader_bit_encoding, GL_ARB_shader_draw_parameters, GL_ARB_shader_group_vote, GL_ARB_shader_image_load_store, GL_ARB_shader_image_size, GL_ARB_shader_objects, GL_ARB_shader_stencil_export, GL_ARB_shader_storage_buffer_object, GL_ARB_shader_subroutine, GL_ARB_shader_texture_lod, GL_ARB_shading_language_420pack, GL_ARB_shading_language_include, GL_ARB_shading_language_packing, GL_ARB_stencil_texturing, GL_ARB_sync, GL_ARB_texture_buffer_object, GL_ARB_texture_buffer_object_rgb32, GL_ARB_texture_buffer_range, GL_ARB_texture_compression_bptc, GL_ARB_texture_compression_rgtc, GL_ARB_texture_cube_map_array, GL_ARB_texture_float, GL_ARB_texture_gather, GL_ARB_texture_mirror_clamp_to_edge, GL_ARB_texture_multisample, GL_ARB_texture_non_power_of_two, GL_ARB_texture_query_levels, GL_ARB_texture_query_lod, GL_ARB_texture_rectangle, GL_ARB_texture_rg, GL_ARB_texture_rgb10_a2ui, GL_ARB_texture_stencil8, GL_ARB_texture_storage, GL_ARB_texture_storage_multisample, GL_ARB_texture_swizzle, GL_ARB_texture_view, GL_ARB_timer_query, GL_ARB_transform_feedback2, GL_ARB_transform_feedback3, GL_ARB_transform_feedback_instanced, GL_ARB_transform_feedback_overflow_query, GL_ARB_uniform_buffer_object, GL_ARB_vertex_array_bgra, GL_ARB_vertex_array_object, GL_ARB_vertex_attrib_64bit, GL_ARB_vertex_attrib_binding, GL_ARB_vertex_buffer_object, GL_ARB_vertex_shader, GL_ARB_vertex_type_10f_11f_11f_rev, GL_ARB_vertex_type_2_10_10_10_rev, GL_ARB_viewport_array, GL_ATI_blend_equation_separate, GL_ATI_texture_float, GL_ATI_texture_mirror_once, GL_EXT_EGL_image_storage, GL_EXT_EGL_sync, GL_EXT_abgr, GL_EXT_blend_equation_separate, GL_EXT_draw_buffers2, GL_EXT_draw_instanced, GL_EXT_framebuffer_blit, GL_EXT_framebuffer_multisample, GL_EXT_framebuffer_multisample_blit_scaled, GL_EXT_framebuffer_object, GL_EXT_framebuffer_sRGB, GL_EXT_packed_depth_stencil, GL_EXT_packed_float, GL_EXT_pixel_buffer_object, GL_EXT_polygon_offset_clamp, GL_EXT_provoking_vertex, GL_EXT_shader_integer_mix, GL_EXT_texture_array, GL_EXT_texture_compression_dxt1, GL_EXT_texture_compression_rgtc, GL_EXT_texture_compression_s3tc, GL_EXT_texture_integer, GL_EXT_texture_mirror_clamp, GL_EXT_texture_sRGB, GL_EXT_texture_sRGB_R8, GL_EXT_texture_sRGB_decode, GL_EXT_texture_shared_exponent, GL_EXT_texture_snorm, GL_EXT_texture_swizzle, GL_EXT_timer_query, GL_EXT_transform_feedback, GL_EXT_vertex_array_bgra, GL_EXT_vertex_attrib_64bit, GL_IBM_multimode_draw_arrays, GL_KHR_context_flush_control, GL_KHR_debug, GL_KHR_no_error, GL_KHR_parallel_shader_compile, GL_KHR_texture_compression_astc_ldr, GL_KHR_texture_compression_astc_sliced_3d, GL_MESA_pack_invert, GL_MESA_shader_integer_functions, GL_MESA_texture_signed_rgba, GL_MESA_ycbcr_texture, GL_NV_conditional_render, GL_NV_depth_clamp, GL_NV_packed_depth_stencil, GL_OES_EGL_image, GL_S3_s3tc OpenGL version string: 3.1 Mesa 20.0.7 OpenGL shading language version string: 1.40 OpenGL context flags: (none) OpenGL extensions: GL_AMD_conservative_depth, GL_AMD_draw_buffers_blend, GL_AMD_multi_draw_indirect, GL_AMD_query_buffer_object, GL_AMD_seamless_cubemap_per_texture, GL_AMD_shader_stencil_export, GL_AMD_shader_trinary_minmax, GL_AMD_texture_texture4, GL_ANGLE_texture_compression_dxt3, GL_ANGLE_texture_compression_dxt5, GL_APPLE_packed_pixels, GL_ARB_ES2_compatibility, GL_ARB_ES3_compatibility, GL_ARB_arrays_of_arrays, GL_ARB_base_instance, GL_ARB_blend_func_extended, GL_ARB_buffer_storage, GL_ARB_clear_buffer_object, GL_ARB_clear_texture, GL_ARB_clip_control, GL_ARB_color_buffer_float, GL_ARB_compatibility, GL_ARB_compressed_texture_pixel_storage, GL_ARB_compute_shader, GL_ARB_conditional_render_inverted, GL_ARB_conservative_depth, GL_ARB_copy_buffer, GL_ARB_copy_image, GL_ARB_cull_distance, GL_ARB_debug_output, GL_ARB_depth_buffer_float, GL_ARB_depth_clamp, GL_ARB_depth_texture, GL_ARB_derivative_control, GL_ARB_direct_state_access, GL_ARB_draw_buffers, GL_ARB_draw_buffers_blend, GL_ARB_draw_elements_base_vertex, GL_ARB_draw_indirect, GL_ARB_draw_instanced, GL_ARB_enhanced_layouts, GL_ARB_explicit_attrib_location, GL_ARB_explicit_uniform_location, GL_ARB_fragment_coord_conventions, GL_ARB_fragment_layer_viewport, GL_ARB_fragment_program, GL_ARB_fragment_program_shadow, GL_ARB_fragment_shader, GL_ARB_framebuffer_no_attachments, GL_ARB_framebuffer_object, GL_ARB_framebuffer_sRGB, GL_ARB_get_program_binary, GL_ARB_get_texture_sub_image, GL_ARB_half_float_pixel, GL_ARB_half_float_vertex, GL_ARB_indirect_parameters, GL_ARB_instanced_arrays, GL_ARB_internalformat_query, GL_ARB_internalformat_query2, GL_ARB_invalidate_subdata, GL_ARB_map_buffer_alignment, GL_ARB_map_buffer_range, GL_ARB_multi_bind, GL_ARB_multi_draw_indirect, GL_ARB_multisample, GL_ARB_multitexture, GL_ARB_occlusion_query, GL_ARB_occlusion_query2, GL_ARB_parallel_shader_compile, GL_ARB_pipeline_statistics_query, GL_ARB_pixel_buffer_object, GL_ARB_point_parameters, GL_ARB_point_sprite, GL_ARB_polygon_offset_clamp, GL_ARB_program_interface_query, GL_ARB_provoking_vertex, GL_ARB_query_buffer_object, GL_ARB_robustness, GL_ARB_sampler_objects, GL_ARB_seamless_cube_map, GL_ARB_seamless_cubemap_per_texture, GL_ARB_separate_shader_objects, GL_ARB_shader_atomic_counter_ops, GL_ARB_shader_atomic_counters, GL_ARB_shader_bit_encoding, GL_ARB_shader_draw_parameters, GL_ARB_shader_group_vote, GL_ARB_shader_image_load_store, GL_ARB_shader_image_size, GL_ARB_shader_objects, GL_ARB_shader_stencil_export, GL_ARB_shader_storage_buffer_object, GL_ARB_shader_subroutine, GL_ARB_shader_texture_lod, GL_ARB_shading_language_100, GL_ARB_shading_language_420pack, GL_ARB_shading_language_include, GL_ARB_shading_language_packing, GL_ARB_shadow, GL_ARB_stencil_texturing, GL_ARB_sync, GL_ARB_texture_border_clamp, GL_ARB_texture_buffer_object, GL_ARB_texture_buffer_object_rgb32, GL_ARB_texture_buffer_range, GL_ARB_texture_compression, GL_ARB_texture_compression_bptc, GL_ARB_texture_compression_rgtc, GL_ARB_texture_cube_map, GL_ARB_texture_cube_map_array, GL_ARB_texture_env_add, GL_ARB_texture_env_combine, GL_ARB_texture_env_crossbar, GL_ARB_texture_env_dot3, GL_ARB_texture_float, GL_ARB_texture_gather, GL_ARB_texture_mirror_clamp_to_edge, GL_ARB_texture_mirrored_repeat, GL_ARB_texture_multisample, GL_ARB_texture_non_power_of_two, GL_ARB_texture_query_levels, GL_ARB_texture_query_lod, GL_ARB_texture_rectangle, GL_ARB_texture_rg, GL_ARB_texture_rgb10_a2ui, GL_ARB_texture_stencil8, GL_ARB_texture_storage, GL_ARB_texture_storage_multisample, GL_ARB_texture_swizzle, GL_ARB_texture_view, GL_ARB_timer_query, GL_ARB_transform_feedback2, GL_ARB_transform_feedback3, GL_ARB_transform_feedback_instanced, GL_ARB_transform_feedback_overflow_query, GL_ARB_transpose_matrix, GL_ARB_uniform_buffer_object, GL_ARB_vertex_array_bgra, GL_ARB_vertex_array_object, GL_ARB_vertex_attrib_binding, GL_ARB_vertex_buffer_object, GL_ARB_vertex_program, GL_ARB_vertex_shader, GL_ARB_vertex_type_10f_11f_11f_rev, GL_ARB_vertex_type_2_10_10_10_rev, GL_ARB_viewport_array, GL_ARB_window_pos, GL_ATI_blend_equation_separate, GL_ATI_draw_buffers, GL_ATI_fragment_shader, GL_ATI_separate_stencil, GL_ATI_texture_compression_3dc, GL_ATI_texture_env_combine3, GL_ATI_texture_float, GL_ATI_texture_mirror_once, GL_EXT_EGL_image_storage, GL_EXT_EGL_sync, GL_EXT_abgr, GL_EXT_bgra, GL_EXT_blend_color, GL_EXT_blend_equation_separate, GL_EXT_blend_func_separate, GL_EXT_blend_minmax, GL_EXT_blend_subtract, GL_EXT_compiled_vertex_array, GL_EXT_copy_texture, GL_EXT_direct_state_access, GL_EXT_draw_buffers2, GL_EXT_draw_instanced, GL_EXT_draw_range_elements, GL_EXT_fog_coord, GL_EXT_framebuffer_blit, GL_EXT_framebuffer_multisample, GL_EXT_framebuffer_multisample_blit_scaled, GL_EXT_framebuffer_object, GL_EXT_framebuffer_sRGB, GL_EXT_gpu_program_parameters, GL_EXT_gpu_shader4, GL_EXT_multi_draw_arrays, GL_EXT_packed_depth_stencil, GL_EXT_packed_float, GL_EXT_packed_pixels, GL_EXT_pixel_buffer_object, GL_EXT_point_parameters, GL_EXT_polygon_offset_clamp, GL_EXT_provoking_vertex, GL_EXT_rescale_normal, GL_EXT_secondary_color, GL_EXT_separate_specular_color, GL_EXT_shader_integer_mix, GL_EXT_shadow_funcs, GL_EXT_stencil_two_side, GL_EXT_stencil_wrap, GL_EXT_subtexture, GL_EXT_texture, GL_EXT_texture3D, GL_EXT_texture_array, GL_EXT_texture_buffer_object, GL_EXT_texture_compression_dxt1, GL_EXT_texture_compression_latc, GL_EXT_texture_compression_rgtc, GL_EXT_texture_compression_s3tc, GL_EXT_texture_cube_map, GL_EXT_texture_edge_clamp, GL_EXT_texture_env_add, GL_EXT_texture_env_combine, GL_EXT_texture_env_dot3, GL_EXT_texture_integer, GL_EXT_texture_lod_bias, GL_EXT_texture_mirror_clamp, GL_EXT_texture_object, GL_EXT_texture_rectangle, GL_EXT_texture_sRGB, GL_EXT_texture_sRGB_R8, GL_EXT_texture_sRGB_decode, GL_EXT_texture_shared_exponent, GL_EXT_texture_snorm, GL_EXT_texture_swizzle, GL_EXT_timer_query, GL_EXT_transform_feedback, GL_EXT_vertex_array, GL_EXT_vertex_array_bgra, GL_IBM_multimode_draw_arrays, GL_IBM_rasterpos_clip, GL_IBM_texture_mirrored_repeat, GL_INGR_blend_func_separate, GL_KHR_context_flush_control, GL_KHR_debug, GL_KHR_no_error, GL_KHR_parallel_shader_compile, GL_KHR_texture_compression_astc_ldr, GL_KHR_texture_compression_astc_sliced_3d, GL_MESA_pack_invert, GL_MESA_shader_integer_functions, GL_MESA_texture_signed_rgba, GL_MESA_window_pos, GL_MESA_ycbcr_texture, GL_NV_blend_square, GL_NV_conditional_render, GL_NV_depth_clamp, GL_NV_fog_distance, GL_NV_light_max_exponent, GL_NV_packed_depth_stencil, GL_NV_primitive_restart, GL_NV_texgen_reflection, GL_NV_texture_env_combine4, GL_NV_texture_rectangle, GL_OES_EGL_image, GL_OES_read_format, GL_S3_s3tc, GL_SGIS_generate_mipmap, GL_SGIS_texture_border_clamp, GL_SGIS_texture_edge_clamp, GL_SGIS_texture_lod, GL_SUN_multi_draw_arrays OpenGL ES profile version string: OpenGL ES 3.1 Mesa 20.0.7 OpenGL ES profile shading language version string: OpenGL ES GLSL ES 3.10 OpenGL ES profile extensions: GL_ANGLE_texture_compression_dxt3, GL_ANGLE_texture_compression_dxt5, GL_APPLE_texture_max_level, GL_EXT_EGL_image_storage, GL_EXT_base_instance, GL_EXT_blend_func_extended, GL_EXT_blend_minmax, GL_EXT_buffer_storage, GL_EXT_clip_control, GL_EXT_clip_cull_distance, GL_EXT_color_buffer_float, GL_EXT_compressed_ETC1_RGB8_sub_texture, GL_EXT_copy_image, GL_EXT_depth_clamp, GL_EXT_discard_framebuffer, GL_EXT_disjoint_timer_query, GL_EXT_draw_buffers, GL_EXT_draw_buffers_indexed, GL_EXT_draw_elements_base_vertex, GL_EXT_float_blend, GL_EXT_frag_depth, GL_EXT_map_buffer_range, GL_EXT_multi_draw_arrays, GL_EXT_occlusion_query_boolean, GL_EXT_polygon_offset_clamp, GL_EXT_read_format_bgra, GL_EXT_render_snorm, GL_EXT_sRGB_write_control, GL_EXT_separate_shader_objects, GL_EXT_shader_implicit_conversions, GL_EXT_shader_integer_mix, GL_EXT_shader_io_blocks, GL_EXT_texture_border_clamp, GL_EXT_texture_buffer, GL_EXT_texture_compression_bptc, GL_EXT_texture_compression_dxt1, GL_EXT_texture_compression_rgtc, GL_EXT_texture_compression_s3tc, GL_EXT_texture_compression_s3tc_srgb, GL_EXT_texture_format_BGRA8888, GL_EXT_texture_norm16, GL_EXT_texture_query_lod, GL_EXT_texture_rg, GL_EXT_texture_sRGB_R8, GL_EXT_texture_sRGB_decode, GL_EXT_texture_type_2_10_10_10_REV, GL_EXT_texture_view, GL_EXT_unpack_subimage, GL_KHR_context_flush_control, GL_KHR_debug, GL_KHR_no_error, GL_KHR_parallel_shader_compile, GL_KHR_texture_compression_astc_ldr, GL_KHR_texture_compression_astc_sliced_3d, GL_MESA_framebuffer_flip_y, GL_MESA_shader_integer_functions, GL_NV_conditional_render, GL_NV_draw_buffers, GL_NV_fbo_color_attachments, GL_NV_image_formats, GL_NV_read_buffer, GL_NV_read_depth, GL_NV_read_depth_stencil, GL_NV_read_stencil, GL_OES_EGL_image, GL_OES_EGL_image_external, GL_OES_EGL_image_external_essl3, GL_OES_EGL_sync, GL_OES_compressed_ETC1_RGB8_texture, GL_OES_copy_image, GL_OES_depth24, GL_OES_depth_texture, GL_OES_depth_texture_cube_map, GL_OES_draw_buffers_indexed, GL_OES_draw_elements_base_vertex, GL_OES_element_index_uint, GL_OES_fbo_render_mipmap, GL_OES_get_program_binary, GL_OES_mapbuffer, GL_OES_packed_depth_stencil, GL_OES_required_internalformat, GL_OES_rgb8_rgba8, GL_OES_shader_image_atomic, GL_OES_shader_io_blocks, GL_OES_standard_derivatives, GL_OES_stencil8, GL_OES_surfaceless_context, GL_OES_texture_3D, GL_OES_texture_border_clamp, GL_OES_texture_buffer, GL_OES_texture_float, GL_OES_texture_float_linear, GL_OES_texture_half_float, GL_OES_texture_half_float_linear, GL_OES_texture_npot, GL_OES_texture_stencil8, GL_OES_texture_storage_multisample_2d_array, GL_OES_texture_view, GL_OES_vertex_array_object, GL_OES_vertex_half_float 270 GLX Visuals visual x bf lv rg d st colorbuffer sr ax dp st accumbuffer ms cav id dep cl sp sz l ci b ro r g b a F gb bf th cl r g b a ns b eat ---------------------------------------------------------------------------- 0x021 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x022 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x285 24 tc 0 32 0 r . . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x286 24 tc 0 32 0 r . . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x287 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x288 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x289 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x28a 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x28b 24 tc 0 32 0 r . . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x28c 24 tc 0 32 0 r . . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x28d 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x28e 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x28f 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x290 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x291 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x292 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x293 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x294 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x295 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x296 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x297 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x298 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x299 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x29a 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x29b 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x29c 24 tc 0 32 0 r . . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x29d 24 tc 0 32 0 r . . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x29e 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x29f 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x2a0 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x2a1 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x2a2 24 tc 0 24 0 r . . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x2a3 24 tc 0 24 0 r . . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x2a4 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x2a5 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x2a6 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x2a7 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x2a8 24 tc 0 24 0 r . . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x2a9 24 tc 0 24 0 r . . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x2aa 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x2ab 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x2ac 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x2ad 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x2ae 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x2af 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x2b0 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x2b1 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x2b2 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x2b3 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x2b4 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x2b5 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x2b6 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x2b7 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x2b8 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x2b9 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x2ba 24 tc 0 24 0 r . . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x2bb 24 tc 0 24 0 r . . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x2bc 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x2bd 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x2be 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x2bf 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x2c0 24 tc 0 32 0 r . . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x2c1 24 tc 0 32 0 r . . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x2c2 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x2c3 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x2c4 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x2c5 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x2c6 24 tc 0 32 0 r . . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x2c7 24 tc 0 32 0 r . . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x2c8 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x2c9 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x2ca 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x2cb 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x2cc 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x2cd 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x2ce 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x2cf 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x2d0 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x2d1 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x2d2 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x2d3 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x2d4 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x2d5 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x2d6 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x2d7 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x2d8 24 tc 0 32 0 r . . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x2d9 24 tc 0 32 0 r . . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x2da 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x2db 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x2dc 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x2dd 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x2de 24 tc 0 24 0 r . . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x2df 24 tc 0 24 0 r . . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x2e0 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x2e1 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x2e2 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x2e3 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x2e4 24 tc 0 24 0 r . . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x2e5 24 tc 0 24 0 r . . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x2e6 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x2e7 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x2e8 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x2e9 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x2ea 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x2eb 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x2ec 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x2ed 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x2ee 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x2ef 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x2f0 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x2f1 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x2f2 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x2f3 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x2f4 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x2f5 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x2f6 24 tc 0 24 0 r . . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x2f7 24 tc 0 24 0 r . . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x2f8 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x2f9 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x2fa 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x2fb 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x2fc 24 dc 0 32 0 r . . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x2fd 24 dc 0 32 0 r . . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x2fe 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x2ff 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x300 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x301 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x302 24 dc 0 32 0 r . . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x303 24 dc 0 32 0 r . . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x304 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x305 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x306 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x307 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x308 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x309 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x30a 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x30b 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x30c 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x30d 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x30e 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x30f 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x310 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x311 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x312 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x313 24 dc 0 32 0 r . . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x314 24 dc 0 32 0 r . . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x315 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x316 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x317 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x318 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x319 24 dc 0 24 0 r . . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x31a 24 dc 0 24 0 r . . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x31b 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x31c 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x31d 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x31e 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x31f 24 dc 0 24 0 r . . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x320 24 dc 0 24 0 r . . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x321 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x322 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x323 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x324 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x325 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x326 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x327 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x328 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x329 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x32a 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x32b 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x32c 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x32d 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x32e 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x32f 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x330 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x331 24 dc 0 24 0 r . . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x332 24 dc 0 24 0 r . . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x333 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x334 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x335 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x336 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x337 24 dc 0 32 0 r . . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x338 24 dc 0 32 0 r . . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x339 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x33a 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x33b 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x33c 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x33d 24 dc 0 32 0 r . . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x33e 24 dc 0 32 0 r . . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x33f 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x340 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x341 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x342 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x343 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x344 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x345 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x346 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x347 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x348 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x349 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x34a 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x34b 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x34c 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x34d 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x34e 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x34f 24 dc 0 32 0 r . . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x350 24 dc 0 32 0 r . . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x351 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x352 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x353 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x354 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x355 24 dc 0 24 0 r . . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x356 24 dc 0 24 0 r . . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x357 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x358 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x359 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x35a 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x35b 24 dc 0 24 0 r . . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x35c 24 dc 0 24 0 r . . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x35d 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x35e 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x35f 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x360 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x361 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x362 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x363 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x364 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x365 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x366 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x367 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x368 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x369 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x36a 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x36b 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x36c 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x36d 24 dc 0 24 0 r . . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x36e 24 dc 0 24 0 r . . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x36f 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x370 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x371 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x372 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x04a 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x373 32 tc 0 32 0 r . . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x374 32 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x375 32 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x376 32 tc 0 32 0 r . . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x377 32 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x378 32 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x379 32 tc 0 32 0 r . . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x37a 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x37b 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x37c 32 tc 0 32 0 r . . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x37d 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x37e 32 tc 0 32 0 r . . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x37f 32 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x380 32 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x381 32 tc 0 32 0 r . . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x382 32 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x383 32 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x384 32 tc 0 32 0 r . . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x385 32 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x386 32 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x387 32 tc 0 32 0 r . . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x388 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x389 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x38a 32 tc 0 32 0 r . . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x38b 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x38c 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x38d 32 tc 0 32 0 r . . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x38e 32 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x38f 32 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 570 GLXFBConfigs: visual x bf lv rg d st colorbuffer sr ax dp st accumbuffer ms cav id dep cl sp sz l ci b ro r g b a F gb bf th cl r g b a ns b eat ---------------------------------------------------------------------------- 0x04b 0 tc 0 32 0 r . . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x04c 0 tc 0 32 0 r . . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x04d 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x04e 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x04f 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x050 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x051 0 tc 0 32 0 r . . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x052 0 tc 0 32 0 r . . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x053 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x054 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x055 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x056 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x057 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x058 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x059 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x05a 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x05b 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x05c 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x05d 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x05e 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x05f 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x060 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x061 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x062 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x063 0 tc 0 32 0 r . . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x064 0 tc 0 32 0 r . . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x065 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x066 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x067 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x068 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x069 0 tc 0 30 0 r . . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x06a 0 tc 0 30 0 r . . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x06b 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x06c 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x06d 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x06e 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x06f 0 tc 0 30 0 r . . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x070 0 tc 0 30 0 r . . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x071 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x072 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x073 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x074 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x075 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x076 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x077 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x078 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x079 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x07a 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x07b 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x07c 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x07d 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x07e 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x07f 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x080 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x081 0 tc 0 30 0 r . . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x082 0 tc 0 30 0 r . . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x083 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x084 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x085 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x086 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x087 0 tc 0 32 0 r . . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x088 0 tc 0 32 0 r . . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x089 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x08a 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x08b 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x08c 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x08d 0 tc 0 32 0 r . . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x08e 0 tc 0 32 0 r . . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x08f 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x090 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x091 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x092 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x093 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x094 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x095 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x096 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x097 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x098 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x099 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x09a 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x09b 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x09c 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x09d 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x09e 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x09f 0 tc 0 32 0 r . . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x0a0 0 tc 0 32 0 r . . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x0a1 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x0a2 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x0a3 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x0a4 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x0a5 0 tc 0 30 0 r . . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x0a6 0 tc 0 30 0 r . . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x0a7 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x0a8 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x0a9 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x0aa 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x0ab 0 tc 0 30 0 r . . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x0ac 0 tc 0 30 0 r . . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x0ad 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x0ae 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x0af 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x0b0 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x0b1 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x0b2 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x0b3 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x0b4 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x0b5 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x0b6 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x0b7 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x0b8 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x0b9 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x0ba 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x0bb 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x0bc 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x0bd 0 tc 0 30 0 r . . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x0be 0 tc 0 30 0 r . . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x0bf 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x0c0 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x0c1 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x0c2 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x0c3 24 tc 0 32 0 r . . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x0c4 24 tc 0 32 0 r . . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x0c5 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x0c6 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x0c7 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x0c8 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x0c9 24 tc 0 32 0 r . . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x0ca 24 tc 0 32 0 r . . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x0cb 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x0cc 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x0cd 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x0ce 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x0cf 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x0d0 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x0d1 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x0d2 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x0d3 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x0d4 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x0d5 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x0d6 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x0d7 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x0d8 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x0d9 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x0da 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x0db 24 tc 0 32 0 r . . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x0dc 24 tc 0 32 0 r . . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x0dd 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x0de 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x0df 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x0e0 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x0e1 24 tc 0 24 0 r . . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x0e2 24 tc 0 24 0 r . . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x0e3 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x0e4 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x0e5 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x0e6 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x0e7 24 tc 0 24 0 r . . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x0e8 24 tc 0 24 0 r . . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x0e9 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x0ea 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x0eb 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x0ec 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x0ed 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x0ee 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x0ef 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x0f0 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x0f1 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x0f2 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x0f3 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x0f4 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x0f5 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x0f6 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x0f7 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x0f8 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x0f9 24 tc 0 24 0 r . . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x0fa 24 tc 0 24 0 r . . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x0fb 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x0fc 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x0fd 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x0fe 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x0ff 24 tc 0 32 0 r . . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x100 24 tc 0 32 0 r . . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x101 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x102 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x103 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x104 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x105 24 tc 0 32 0 r . . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x106 24 tc 0 32 0 r . . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x107 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x108 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x109 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x10a 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x10b 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x10c 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x10d 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x10e 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x10f 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x110 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x111 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x112 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x113 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x114 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x115 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x116 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x117 24 tc 0 32 0 r . . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x118 24 tc 0 32 0 r . . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x119 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x11a 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x11b 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x11c 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x11d 24 tc 0 24 0 r . . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x11e 24 tc 0 24 0 r . . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x11f 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x120 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x121 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x122 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x123 24 tc 0 24 0 r . . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x124 24 tc 0 24 0 r . . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x125 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x126 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x127 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x128 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x129 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x12a 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x12b 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x12c 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x12d 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x12e 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x12f 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x130 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x131 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x132 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x133 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x134 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x135 24 tc 0 24 0 r . . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x136 24 tc 0 24 0 r . . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x137 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x138 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x139 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x13a 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x13b 0 tc 0 16 0 r . . 5 6 5 0 . . 0 0 0 0 0 0 0 0 0 None 0x13c 0 tc 0 16 0 r . . 5 6 5 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x13d 0 tc 0 16 0 r y . 5 6 5 0 . . 0 0 0 0 0 0 0 0 0 None 0x13e 0 tc 0 16 0 r y . 5 6 5 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x13f 0 tc 0 16 0 r y . 5 6 5 0 . . 0 0 0 0 0 0 0 0 0 None 0x140 0 tc 0 16 0 r y . 5 6 5 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x141 0 tc 0 16 0 r . . 5 6 5 0 . . 0 16 0 0 0 0 0 0 0 None 0x142 0 tc 0 16 0 r . . 5 6 5 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x143 0 tc 0 16 0 r y . 5 6 5 0 . . 0 16 0 0 0 0 0 0 0 None 0x144 0 tc 0 16 0 r y . 5 6 5 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x145 0 tc 0 16 0 r y . 5 6 5 0 . . 0 16 0 0 0 0 0 0 0 None 0x146 0 tc 0 16 0 r y . 5 6 5 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x147 0 tc 0 16 0 r . . 5 6 5 0 . . 0 24 0 0 0 0 0 0 0 None 0x148 0 tc 0 16 0 r . . 5 6 5 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x149 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 0 0 0 0 0 0 0 None 0x14a 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x14b 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 0 0 0 0 0 0 0 None 0x14c 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x14d 0 tc 0 16 0 r . . 5 6 5 0 . . 0 24 8 0 0 0 0 0 0 None 0x14e 0 tc 0 16 0 r . . 5 6 5 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x14f 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 8 0 0 0 0 0 0 None 0x150 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x151 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 8 0 0 0 0 0 0 None 0x152 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x153 0 tc 0 16 0 r . . 5 6 5 0 . . 0 32 0 0 0 0 0 0 0 None 0x154 0 tc 0 16 0 r . . 5 6 5 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x155 0 tc 0 16 0 r y . 5 6 5 0 . . 0 32 0 0 0 0 0 0 0 None 0x156 0 tc 0 16 0 r y . 5 6 5 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x157 0 tc 0 16 0 r y . 5 6 5 0 . . 0 32 0 0 0 0 0 0 0 None 0x158 0 tc 0 16 0 r y . 5 6 5 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x159 0 dc 0 32 0 r . . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x15a 0 dc 0 32 0 r . . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x15b 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x15c 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x15d 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x15e 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x15f 0 dc 0 32 0 r . . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x160 0 dc 0 32 0 r . . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x161 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x162 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x163 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x164 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x165 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x166 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x167 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x168 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x169 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x16a 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x16b 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x16c 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x16d 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x16e 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x16f 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x170 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x171 0 dc 0 32 0 r . . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x172 0 dc 0 32 0 r . . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x173 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x174 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x175 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x176 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x177 0 dc 0 30 0 r . . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x178 0 dc 0 30 0 r . . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x179 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x17a 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x17b 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x17c 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x17d 0 dc 0 30 0 r . . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x17e 0 dc 0 30 0 r . . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x17f 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x180 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x181 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x182 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x183 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x184 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x185 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x186 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x187 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x188 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x189 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x18a 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x18b 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x18c 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x18d 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x18e 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x18f 0 dc 0 30 0 r . . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x190 0 dc 0 30 0 r . . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x191 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x192 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x193 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x194 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x195 0 dc 0 32 0 r . . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x196 0 dc 0 32 0 r . . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x197 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x198 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x199 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x19a 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x19b 0 dc 0 32 0 r . . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x19c 0 dc 0 32 0 r . . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x19d 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x19e 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x19f 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x1a0 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x1a1 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x1a2 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x1a3 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x1a4 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x1a5 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x1a6 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x1a7 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x1a8 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x1a9 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x1aa 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x1ab 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x1ac 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x1ad 0 dc 0 32 0 r . . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x1ae 0 dc 0 32 0 r . . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x1af 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x1b0 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x1b1 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x1b2 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x1b3 0 dc 0 30 0 r . . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x1b4 0 dc 0 30 0 r . . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x1b5 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x1b6 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x1b7 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x1b8 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x1b9 0 dc 0 30 0 r . . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x1ba 0 dc 0 30 0 r . . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x1bb 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x1bc 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x1bd 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x1be 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x1bf 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x1c0 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x1c1 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x1c2 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x1c3 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x1c4 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x1c5 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x1c6 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x1c7 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x1c8 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x1c9 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x1ca 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x1cb 0 dc 0 30 0 r . . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x1cc 0 dc 0 30 0 r . . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x1cd 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x1ce 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x1cf 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x1d0 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x1d1 24 dc 0 32 0 r . . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x1d2 24 dc 0 32 0 r . . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x1d3 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x1d4 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x1d5 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x1d6 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x1d7 24 dc 0 32 0 r . . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x1d8 24 dc 0 32 0 r . . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x1d9 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x1da 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x1db 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x1dc 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x1dd 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x1de 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x1df 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x1e0 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x1e1 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x1e2 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x1e3 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x1e4 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x1e5 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x1e6 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x1e7 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x1e8 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x1e9 24 dc 0 32 0 r . . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x1ea 24 dc 0 32 0 r . . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x1eb 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x1ec 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x1ed 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x1ee 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x1ef 24 dc 0 24 0 r . . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x1f0 24 dc 0 24 0 r . . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x1f1 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x1f2 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x1f3 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x1f4 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x1f5 24 dc 0 24 0 r . . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x1f6 24 dc 0 24 0 r . . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x1f7 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x1f8 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x1f9 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x1fa 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x1fb 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x1fc 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x1fd 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x1fe 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x1ff 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x200 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x201 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x202 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x203 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x204 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x205 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x206 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x207 24 dc 0 24 0 r . . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x208 24 dc 0 24 0 r . . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x209 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x20a 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x20b 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x20c 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x20d 24 dc 0 32 0 r . . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x20e 24 dc 0 32 0 r . . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x20f 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x210 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x211 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x212 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x213 24 dc 0 32 0 r . . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x214 24 dc 0 32 0 r . . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x215 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x216 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x217 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x218 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x219 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x21a 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x21b 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x21c 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x21d 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x21e 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x21f 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x220 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x221 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x222 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x223 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x224 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x225 24 dc 0 32 0 r . . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x226 24 dc 0 32 0 r . . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x227 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x228 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x229 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x22a 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x22b 24 dc 0 24 0 r . . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x22c 24 dc 0 24 0 r . . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x22d 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x22e 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x22f 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x230 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x231 24 dc 0 24 0 r . . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x232 24 dc 0 24 0 r . . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x233 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x234 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x235 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x236 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x237 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x238 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x239 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x23a 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x23b 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x23c 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x23d 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x23e 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x23f 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x240 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x241 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x242 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x243 24 dc 0 24 0 r . . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x244 24 dc 0 24 0 r . . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x245 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x246 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x247 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x248 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x249 0 dc 0 16 0 r . . 5 6 5 0 . . 0 0 0 0 0 0 0 0 0 None 0x24a 0 dc 0 16 0 r . . 5 6 5 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x24b 0 dc 0 16 0 r y . 5 6 5 0 . . 0 0 0 0 0 0 0 0 0 None 0x24c 0 dc 0 16 0 r y . 5 6 5 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x24d 0 dc 0 16 0 r y . 5 6 5 0 . . 0 0 0 0 0 0 0 0 0 None 0x24e 0 dc 0 16 0 r y . 5 6 5 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x24f 0 dc 0 16 0 r . . 5 6 5 0 . . 0 16 0 0 0 0 0 0 0 None 0x250 0 dc 0 16 0 r . . 5 6 5 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x251 0 dc 0 16 0 r y . 5 6 5 0 . . 0 16 0 0 0 0 0 0 0 None 0x252 0 dc 0 16 0 r y . 5 6 5 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x253 0 dc 0 16 0 r y . 5 6 5 0 . . 0 16 0 0 0 0 0 0 0 None 0x254 0 dc 0 16 0 r y . 5 6 5 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x255 0 dc 0 16 0 r . . 5 6 5 0 . . 0 24 0 0 0 0 0 0 0 None 0x256 0 dc 0 16 0 r . . 5 6 5 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x257 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 0 0 0 0 0 0 0 None 0x258 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x259 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 0 0 0 0 0 0 0 None 0x25a 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x25b 0 dc 0 16 0 r . . 5 6 5 0 . . 0 24 8 0 0 0 0 0 0 None 0x25c 0 dc 0 16 0 r . . 5 6 5 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x25d 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 8 0 0 0 0 0 0 None 0x25e 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x25f 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 8 0 0 0 0 0 0 None 0x260 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x261 0 dc 0 16 0 r . . 5 6 5 0 . . 0 32 0 0 0 0 0 0 0 None 0x262 0 dc 0 16 0 r . . 5 6 5 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x263 0 dc 0 16 0 r y . 5 6 5 0 . . 0 32 0 0 0 0 0 0 0 None 0x264 0 dc 0 16 0 r y . 5 6 5 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x265 0 dc 0 16 0 r y . 5 6 5 0 . . 0 32 0 0 0 0 0 0 0 None 0x266 0 dc 0 16 0 r y . 5 6 5 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x267 32 tc 0 32 0 r . . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x268 32 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x269 32 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x26a 32 tc 0 32 0 r . . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x26b 32 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x26c 32 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x26d 32 tc 0 32 0 r . . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x26e 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x26f 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x270 32 tc 0 32 0 r . . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x271 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x272 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x273 32 tc 0 32 0 r . . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x274 32 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x275 32 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x276 32 tc 0 32 0 r . . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x277 32 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x278 32 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x279 32 tc 0 32 0 r . . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x27a 32 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x27b 32 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x27c 32 tc 0 32 0 r . . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x27d 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x27e 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x27f 32 tc 0 32 0 r . . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x280 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x281 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x282 32 tc 0 32 0 r . . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x283 32 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x284 32 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None [-- Attachment #3: lspci --] [-- Type: text/plain, Size: 85166 bytes --] name of display: :0 display: :0 screen: 0 direct rendering: Yes server glx vendor string: SGI server glx version string: 1.4 server glx extensions: GLX_ARB_context_flush_control, GLX_ARB_create_context, GLX_ARB_create_context_no_error, GLX_ARB_create_context_profile, GLX_ARB_fbconfig_float, GLX_ARB_framebuffer_sRGB, GLX_ARB_multisample, GLX_EXT_create_context_es2_profile, GLX_EXT_create_context_es_profile, GLX_EXT_fbconfig_packed_float, GLX_EXT_framebuffer_sRGB, GLX_EXT_import_context, GLX_EXT_libglvnd, GLX_EXT_no_config_context, GLX_EXT_texture_from_pixmap, GLX_EXT_visual_info, GLX_EXT_visual_rating, GLX_MESA_copy_sub_buffer, GLX_OML_swap_method, GLX_SGIS_multisample, GLX_SGIX_fbconfig, GLX_SGIX_pbuffer, GLX_SGIX_visual_select_group, GLX_SGI_make_current_read client glx vendor string: Mesa Project and SGI client glx version string: 1.4 client glx extensions: GLX_ARB_context_flush_control, GLX_ARB_create_context, GLX_ARB_create_context_no_error, GLX_ARB_create_context_profile, GLX_ARB_create_context_robustness, GLX_ARB_fbconfig_float, GLX_ARB_framebuffer_sRGB, GLX_ARB_get_proc_address, GLX_ARB_multisample, GLX_EXT_buffer_age, GLX_EXT_create_context_es2_profile, GLX_EXT_create_context_es_profile, GLX_EXT_fbconfig_packed_float, GLX_EXT_framebuffer_sRGB, GLX_EXT_import_context, GLX_EXT_texture_from_pixmap, GLX_EXT_visual_info, GLX_EXT_visual_rating, GLX_INTEL_swap_event, GLX_MESA_copy_sub_buffer, GLX_MESA_multithread_makecurrent, GLX_MESA_query_renderer, GLX_MESA_swap_control, GLX_OML_swap_method, GLX_OML_sync_control, GLX_SGIS_multisample, GLX_SGIX_fbconfig, GLX_SGIX_pbuffer, GLX_SGIX_visual_select_group, GLX_SGI_make_current_read, GLX_SGI_swap_control, GLX_SGI_video_sync GLX version: 1.4 GLX extensions: GLX_ARB_context_flush_control, GLX_ARB_create_context, GLX_ARB_create_context_profile, GLX_ARB_fbconfig_float, GLX_ARB_framebuffer_sRGB, GLX_ARB_get_proc_address, GLX_ARB_multisample, GLX_EXT_create_context_es2_profile, GLX_EXT_create_context_es_profile, GLX_EXT_fbconfig_packed_float, GLX_EXT_framebuffer_sRGB, GLX_EXT_import_context, GLX_EXT_texture_from_pixmap, GLX_EXT_visual_info, GLX_EXT_visual_rating, GLX_MESA_copy_sub_buffer, GLX_MESA_query_renderer, GLX_OML_swap_method, GLX_SGIS_multisample, GLX_SGIX_fbconfig, GLX_SGIX_pbuffer, GLX_SGIX_visual_select_group, GLX_SGI_make_current_read Extended renderer info (GLX_MESA_query_renderer): Vendor: VMware, Inc. (0xffffffff) Device: llvmpipe (LLVM 10.0.0, 128 bits) (0xffffffff) Version: 20.0.7 Accelerated: no Video memory: 48228MB Unified memory: no Preferred profile: core (0x1) Max core profile version: 3.3 Max compat profile version: 3.1 Max GLES1 profile version: 1.1 Max GLES[23] profile version: 3.1 OpenGL vendor string: VMware, Inc. OpenGL renderer string: llvmpipe (LLVM 10.0.0, 128 bits) OpenGL core profile version string: 3.3 (Core Profile) Mesa 20.0.7 OpenGL core profile shading language version string: 3.30 OpenGL core profile context flags: (none) OpenGL core profile profile mask: core profile OpenGL core profile extensions: GL_AMD_conservative_depth, GL_AMD_draw_buffers_blend, GL_AMD_gpu_shader_int64, GL_AMD_multi_draw_indirect, GL_AMD_query_buffer_object, GL_AMD_seamless_cubemap_per_texture, GL_AMD_shader_stencil_export, GL_AMD_shader_trinary_minmax, GL_AMD_texture_texture4, GL_AMD_vertex_shader_layer, GL_AMD_vertex_shader_viewport_index, GL_ANGLE_texture_compression_dxt3, GL_ANGLE_texture_compression_dxt5, GL_ARB_ES2_compatibility, GL_ARB_ES3_compatibility, GL_ARB_arrays_of_arrays, GL_ARB_base_instance, GL_ARB_blend_func_extended, GL_ARB_buffer_storage, GL_ARB_clear_buffer_object, GL_ARB_clear_texture, GL_ARB_clip_control, GL_ARB_compressed_texture_pixel_storage, GL_ARB_compute_shader, GL_ARB_conditional_render_inverted, GL_ARB_conservative_depth, GL_ARB_copy_buffer, GL_ARB_copy_image, GL_ARB_cull_distance, GL_ARB_debug_output, GL_ARB_depth_buffer_float, GL_ARB_depth_clamp, GL_ARB_derivative_control, GL_ARB_direct_state_access, GL_ARB_draw_buffers, GL_ARB_draw_buffers_blend, GL_ARB_draw_elements_base_vertex, GL_ARB_draw_indirect, GL_ARB_draw_instanced, GL_ARB_enhanced_layouts, GL_ARB_explicit_attrib_location, GL_ARB_explicit_uniform_location, GL_ARB_fragment_coord_conventions, GL_ARB_fragment_layer_viewport, GL_ARB_fragment_shader, GL_ARB_framebuffer_no_attachments, GL_ARB_framebuffer_object, GL_ARB_framebuffer_sRGB, GL_ARB_get_program_binary, GL_ARB_get_texture_sub_image, GL_ARB_gpu_shader_fp64, GL_ARB_gpu_shader_int64, GL_ARB_half_float_pixel, GL_ARB_half_float_vertex, GL_ARB_indirect_parameters, GL_ARB_instanced_arrays, GL_ARB_internalformat_query, GL_ARB_internalformat_query2, GL_ARB_invalidate_subdata, GL_ARB_map_buffer_alignment, GL_ARB_map_buffer_range, GL_ARB_multi_bind, GL_ARB_multi_draw_indirect, GL_ARB_occlusion_query2, GL_ARB_parallel_shader_compile, GL_ARB_pipeline_statistics_query, GL_ARB_pixel_buffer_object, GL_ARB_point_sprite, GL_ARB_polygon_offset_clamp, GL_ARB_program_interface_query, GL_ARB_provoking_vertex, GL_ARB_query_buffer_object, GL_ARB_robustness, GL_ARB_sampler_objects, GL_ARB_seamless_cube_map, GL_ARB_seamless_cubemap_per_texture, GL_ARB_separate_shader_objects, GL_ARB_shader_atomic_counter_ops, GL_ARB_shader_atomic_counters, GL_ARB_shader_bit_encoding, GL_ARB_shader_draw_parameters, GL_ARB_shader_group_vote, GL_ARB_shader_image_load_store, GL_ARB_shader_image_size, GL_ARB_shader_objects, GL_ARB_shader_stencil_export, GL_ARB_shader_storage_buffer_object, GL_ARB_shader_subroutine, GL_ARB_shader_texture_lod, GL_ARB_shading_language_420pack, GL_ARB_shading_language_include, GL_ARB_shading_language_packing, GL_ARB_stencil_texturing, GL_ARB_sync, GL_ARB_texture_buffer_object, GL_ARB_texture_buffer_object_rgb32, GL_ARB_texture_buffer_range, GL_ARB_texture_compression_bptc, GL_ARB_texture_compression_rgtc, GL_ARB_texture_cube_map_array, GL_ARB_texture_float, GL_ARB_texture_gather, GL_ARB_texture_mirror_clamp_to_edge, GL_ARB_texture_multisample, GL_ARB_texture_non_power_of_two, GL_ARB_texture_query_levels, GL_ARB_texture_query_lod, GL_ARB_texture_rectangle, GL_ARB_texture_rg, GL_ARB_texture_rgb10_a2ui, GL_ARB_texture_stencil8, GL_ARB_texture_storage, GL_ARB_texture_storage_multisample, GL_ARB_texture_swizzle, GL_ARB_texture_view, GL_ARB_timer_query, GL_ARB_transform_feedback2, GL_ARB_transform_feedback3, GL_ARB_transform_feedback_instanced, GL_ARB_transform_feedback_overflow_query, GL_ARB_uniform_buffer_object, GL_ARB_vertex_array_bgra, GL_ARB_vertex_array_object, GL_ARB_vertex_attrib_64bit, GL_ARB_vertex_attrib_binding, GL_ARB_vertex_buffer_object, GL_ARB_vertex_shader, GL_ARB_vertex_type_10f_11f_11f_rev, GL_ARB_vertex_type_2_10_10_10_rev, GL_ARB_viewport_array, GL_ATI_blend_equation_separate, GL_ATI_texture_float, GL_ATI_texture_mirror_once, GL_EXT_EGL_image_storage, GL_EXT_EGL_sync, GL_EXT_abgr, GL_EXT_blend_equation_separate, GL_EXT_draw_buffers2, GL_EXT_draw_instanced, GL_EXT_framebuffer_blit, GL_EXT_framebuffer_multisample, GL_EXT_framebuffer_multisample_blit_scaled, GL_EXT_framebuffer_object, GL_EXT_framebuffer_sRGB, GL_EXT_packed_depth_stencil, GL_EXT_packed_float, GL_EXT_pixel_buffer_object, GL_EXT_polygon_offset_clamp, GL_EXT_provoking_vertex, GL_EXT_shader_integer_mix, GL_EXT_texture_array, GL_EXT_texture_compression_dxt1, GL_EXT_texture_compression_rgtc, GL_EXT_texture_compression_s3tc, GL_EXT_texture_integer, GL_EXT_texture_mirror_clamp, GL_EXT_texture_sRGB, GL_EXT_texture_sRGB_R8, GL_EXT_texture_sRGB_decode, GL_EXT_texture_shared_exponent, GL_EXT_texture_snorm, GL_EXT_texture_swizzle, GL_EXT_timer_query, GL_EXT_transform_feedback, GL_EXT_vertex_array_bgra, GL_EXT_vertex_attrib_64bit, GL_IBM_multimode_draw_arrays, GL_KHR_context_flush_control, GL_KHR_debug, GL_KHR_no_error, GL_KHR_parallel_shader_compile, GL_KHR_texture_compression_astc_ldr, GL_KHR_texture_compression_astc_sliced_3d, GL_MESA_pack_invert, GL_MESA_shader_integer_functions, GL_MESA_texture_signed_rgba, GL_MESA_ycbcr_texture, GL_NV_conditional_render, GL_NV_depth_clamp, GL_NV_packed_depth_stencil, GL_OES_EGL_image, GL_S3_s3tc OpenGL version string: 3.1 Mesa 20.0.7 OpenGL shading language version string: 1.40 OpenGL context flags: (none) OpenGL extensions: GL_AMD_conservative_depth, GL_AMD_draw_buffers_blend, GL_AMD_multi_draw_indirect, GL_AMD_query_buffer_object, GL_AMD_seamless_cubemap_per_texture, GL_AMD_shader_stencil_export, GL_AMD_shader_trinary_minmax, GL_AMD_texture_texture4, GL_ANGLE_texture_compression_dxt3, GL_ANGLE_texture_compression_dxt5, GL_APPLE_packed_pixels, GL_ARB_ES2_compatibility, GL_ARB_ES3_compatibility, GL_ARB_arrays_of_arrays, GL_ARB_base_instance, GL_ARB_blend_func_extended, GL_ARB_buffer_storage, GL_ARB_clear_buffer_object, GL_ARB_clear_texture, GL_ARB_clip_control, GL_ARB_color_buffer_float, GL_ARB_compatibility, GL_ARB_compressed_texture_pixel_storage, GL_ARB_compute_shader, GL_ARB_conditional_render_inverted, GL_ARB_conservative_depth, GL_ARB_copy_buffer, GL_ARB_copy_image, GL_ARB_cull_distance, GL_ARB_debug_output, GL_ARB_depth_buffer_float, GL_ARB_depth_clamp, GL_ARB_depth_texture, GL_ARB_derivative_control, GL_ARB_direct_state_access, GL_ARB_draw_buffers, GL_ARB_draw_buffers_blend, GL_ARB_draw_elements_base_vertex, GL_ARB_draw_indirect, GL_ARB_draw_instanced, GL_ARB_enhanced_layouts, GL_ARB_explicit_attrib_location, GL_ARB_explicit_uniform_location, GL_ARB_fragment_coord_conventions, GL_ARB_fragment_layer_viewport, GL_ARB_fragment_program, GL_ARB_fragment_program_shadow, GL_ARB_fragment_shader, GL_ARB_framebuffer_no_attachments, GL_ARB_framebuffer_object, GL_ARB_framebuffer_sRGB, GL_ARB_get_program_binary, GL_ARB_get_texture_sub_image, GL_ARB_half_float_pixel, GL_ARB_half_float_vertex, GL_ARB_indirect_parameters, GL_ARB_instanced_arrays, GL_ARB_internalformat_query, GL_ARB_internalformat_query2, GL_ARB_invalidate_subdata, GL_ARB_map_buffer_alignment, GL_ARB_map_buffer_range, GL_ARB_multi_bind, GL_ARB_multi_draw_indirect, GL_ARB_multisample, GL_ARB_multitexture, GL_ARB_occlusion_query, GL_ARB_occlusion_query2, GL_ARB_parallel_shader_compile, GL_ARB_pipeline_statistics_query, GL_ARB_pixel_buffer_object, GL_ARB_point_parameters, GL_ARB_point_sprite, GL_ARB_polygon_offset_clamp, GL_ARB_program_interface_query, GL_ARB_provoking_vertex, GL_ARB_query_buffer_object, GL_ARB_robustness, GL_ARB_sampler_objects, GL_ARB_seamless_cube_map, GL_ARB_seamless_cubemap_per_texture, GL_ARB_separate_shader_objects, GL_ARB_shader_atomic_counter_ops, GL_ARB_shader_atomic_counters, GL_ARB_shader_bit_encoding, GL_ARB_shader_draw_parameters, GL_ARB_shader_group_vote, GL_ARB_shader_image_load_store, GL_ARB_shader_image_size, GL_ARB_shader_objects, GL_ARB_shader_stencil_export, GL_ARB_shader_storage_buffer_object, GL_ARB_shader_subroutine, GL_ARB_shader_texture_lod, GL_ARB_shading_language_100, GL_ARB_shading_language_420pack, GL_ARB_shading_language_include, GL_ARB_shading_language_packing, GL_ARB_shadow, GL_ARB_stencil_texturing, GL_ARB_sync, GL_ARB_texture_border_clamp, GL_ARB_texture_buffer_object, GL_ARB_texture_buffer_object_rgb32, GL_ARB_texture_buffer_range, GL_ARB_texture_compression, GL_ARB_texture_compression_bptc, GL_ARB_texture_compression_rgtc, GL_ARB_texture_cube_map, GL_ARB_texture_cube_map_array, GL_ARB_texture_env_add, GL_ARB_texture_env_combine, GL_ARB_texture_env_crossbar, GL_ARB_texture_env_dot3, GL_ARB_texture_float, GL_ARB_texture_gather, GL_ARB_texture_mirror_clamp_to_edge, GL_ARB_texture_mirrored_repeat, GL_ARB_texture_multisample, GL_ARB_texture_non_power_of_two, GL_ARB_texture_query_levels, GL_ARB_texture_query_lod, GL_ARB_texture_rectangle, GL_ARB_texture_rg, GL_ARB_texture_rgb10_a2ui, GL_ARB_texture_stencil8, GL_ARB_texture_storage, GL_ARB_texture_storage_multisample, GL_ARB_texture_swizzle, GL_ARB_texture_view, GL_ARB_timer_query, GL_ARB_transform_feedback2, GL_ARB_transform_feedback3, GL_ARB_transform_feedback_instanced, GL_ARB_transform_feedback_overflow_query, GL_ARB_transpose_matrix, GL_ARB_uniform_buffer_object, GL_ARB_vertex_array_bgra, GL_ARB_vertex_array_object, GL_ARB_vertex_attrib_binding, GL_ARB_vertex_buffer_object, GL_ARB_vertex_program, GL_ARB_vertex_shader, GL_ARB_vertex_type_10f_11f_11f_rev, GL_ARB_vertex_type_2_10_10_10_rev, GL_ARB_viewport_array, GL_ARB_window_pos, GL_ATI_blend_equation_separate, GL_ATI_draw_buffers, GL_ATI_fragment_shader, GL_ATI_separate_stencil, GL_ATI_texture_compression_3dc, GL_ATI_texture_env_combine3, GL_ATI_texture_float, GL_ATI_texture_mirror_once, GL_EXT_EGL_image_storage, GL_EXT_EGL_sync, GL_EXT_abgr, GL_EXT_bgra, GL_EXT_blend_color, GL_EXT_blend_equation_separate, GL_EXT_blend_func_separate, GL_EXT_blend_minmax, GL_EXT_blend_subtract, GL_EXT_compiled_vertex_array, GL_EXT_copy_texture, GL_EXT_direct_state_access, GL_EXT_draw_buffers2, GL_EXT_draw_instanced, GL_EXT_draw_range_elements, GL_EXT_fog_coord, GL_EXT_framebuffer_blit, GL_EXT_framebuffer_multisample, GL_EXT_framebuffer_multisample_blit_scaled, GL_EXT_framebuffer_object, GL_EXT_framebuffer_sRGB, GL_EXT_gpu_program_parameters, GL_EXT_gpu_shader4, GL_EXT_multi_draw_arrays, GL_EXT_packed_depth_stencil, GL_EXT_packed_float, GL_EXT_packed_pixels, GL_EXT_pixel_buffer_object, GL_EXT_point_parameters, GL_EXT_polygon_offset_clamp, GL_EXT_provoking_vertex, GL_EXT_rescale_normal, GL_EXT_secondary_color, GL_EXT_separate_specular_color, GL_EXT_shader_integer_mix, GL_EXT_shadow_funcs, GL_EXT_stencil_two_side, GL_EXT_stencil_wrap, GL_EXT_subtexture, GL_EXT_texture, GL_EXT_texture3D, GL_EXT_texture_array, GL_EXT_texture_buffer_object, GL_EXT_texture_compression_dxt1, GL_EXT_texture_compression_latc, GL_EXT_texture_compression_rgtc, GL_EXT_texture_compression_s3tc, GL_EXT_texture_cube_map, GL_EXT_texture_edge_clamp, GL_EXT_texture_env_add, GL_EXT_texture_env_combine, GL_EXT_texture_env_dot3, GL_EXT_texture_integer, GL_EXT_texture_lod_bias, GL_EXT_texture_mirror_clamp, GL_EXT_texture_object, GL_EXT_texture_rectangle, GL_EXT_texture_sRGB, GL_EXT_texture_sRGB_R8, GL_EXT_texture_sRGB_decode, GL_EXT_texture_shared_exponent, GL_EXT_texture_snorm, GL_EXT_texture_swizzle, GL_EXT_timer_query, GL_EXT_transform_feedback, GL_EXT_vertex_array, GL_EXT_vertex_array_bgra, GL_IBM_multimode_draw_arrays, GL_IBM_rasterpos_clip, GL_IBM_texture_mirrored_repeat, GL_INGR_blend_func_separate, GL_KHR_context_flush_control, GL_KHR_debug, GL_KHR_no_error, GL_KHR_parallel_shader_compile, GL_KHR_texture_compression_astc_ldr, GL_KHR_texture_compression_astc_sliced_3d, GL_MESA_pack_invert, GL_MESA_shader_integer_functions, GL_MESA_texture_signed_rgba, GL_MESA_window_pos, GL_MESA_ycbcr_texture, GL_NV_blend_square, GL_NV_conditional_render, GL_NV_depth_clamp, GL_NV_fog_distance, GL_NV_light_max_exponent, GL_NV_packed_depth_stencil, GL_NV_primitive_restart, GL_NV_texgen_reflection, GL_NV_texture_env_combine4, GL_NV_texture_rectangle, GL_OES_EGL_image, GL_OES_read_format, GL_S3_s3tc, GL_SGIS_generate_mipmap, GL_SGIS_texture_border_clamp, GL_SGIS_texture_edge_clamp, GL_SGIS_texture_lod, GL_SUN_multi_draw_arrays OpenGL ES profile version string: OpenGL ES 3.1 Mesa 20.0.7 OpenGL ES profile shading language version string: OpenGL ES GLSL ES 3.10 OpenGL ES profile extensions: GL_ANGLE_texture_compression_dxt3, GL_ANGLE_texture_compression_dxt5, GL_APPLE_texture_max_level, GL_EXT_EGL_image_storage, GL_EXT_base_instance, GL_EXT_blend_func_extended, GL_EXT_blend_minmax, GL_EXT_buffer_storage, GL_EXT_clip_control, GL_EXT_clip_cull_distance, GL_EXT_color_buffer_float, GL_EXT_compressed_ETC1_RGB8_sub_texture, GL_EXT_copy_image, GL_EXT_depth_clamp, GL_EXT_discard_framebuffer, GL_EXT_disjoint_timer_query, GL_EXT_draw_buffers, GL_EXT_draw_buffers_indexed, GL_EXT_draw_elements_base_vertex, GL_EXT_float_blend, GL_EXT_frag_depth, GL_EXT_map_buffer_range, GL_EXT_multi_draw_arrays, GL_EXT_occlusion_query_boolean, GL_EXT_polygon_offset_clamp, GL_EXT_read_format_bgra, GL_EXT_render_snorm, GL_EXT_sRGB_write_control, GL_EXT_separate_shader_objects, GL_EXT_shader_implicit_conversions, GL_EXT_shader_integer_mix, GL_EXT_shader_io_blocks, GL_EXT_texture_border_clamp, GL_EXT_texture_buffer, GL_EXT_texture_compression_bptc, GL_EXT_texture_compression_dxt1, GL_EXT_texture_compression_rgtc, GL_EXT_texture_compression_s3tc, GL_EXT_texture_compression_s3tc_srgb, GL_EXT_texture_format_BGRA8888, GL_EXT_texture_norm16, GL_EXT_texture_query_lod, GL_EXT_texture_rg, GL_EXT_texture_sRGB_R8, GL_EXT_texture_sRGB_decode, GL_EXT_texture_type_2_10_10_10_REV, GL_EXT_texture_view, GL_EXT_unpack_subimage, GL_KHR_context_flush_control, GL_KHR_debug, GL_KHR_no_error, GL_KHR_parallel_shader_compile, GL_KHR_texture_compression_astc_ldr, GL_KHR_texture_compression_astc_sliced_3d, GL_MESA_framebuffer_flip_y, GL_MESA_shader_integer_functions, GL_NV_conditional_render, GL_NV_draw_buffers, GL_NV_fbo_color_attachments, GL_NV_image_formats, GL_NV_read_buffer, GL_NV_read_depth, GL_NV_read_depth_stencil, GL_NV_read_stencil, GL_OES_EGL_image, GL_OES_EGL_image_external, GL_OES_EGL_image_external_essl3, GL_OES_EGL_sync, GL_OES_compressed_ETC1_RGB8_texture, GL_OES_copy_image, GL_OES_depth24, GL_OES_depth_texture, GL_OES_depth_texture_cube_map, GL_OES_draw_buffers_indexed, GL_OES_draw_elements_base_vertex, GL_OES_element_index_uint, GL_OES_fbo_render_mipmap, GL_OES_get_program_binary, GL_OES_mapbuffer, GL_OES_packed_depth_stencil, GL_OES_required_internalformat, GL_OES_rgb8_rgba8, GL_OES_shader_image_atomic, GL_OES_shader_io_blocks, GL_OES_standard_derivatives, GL_OES_stencil8, GL_OES_surfaceless_context, GL_OES_texture_3D, GL_OES_texture_border_clamp, GL_OES_texture_buffer, GL_OES_texture_float, GL_OES_texture_float_linear, GL_OES_texture_half_float, GL_OES_texture_half_float_linear, GL_OES_texture_npot, GL_OES_texture_stencil8, GL_OES_texture_storage_multisample_2d_array, GL_OES_texture_view, GL_OES_vertex_array_object, GL_OES_vertex_half_float 270 GLX Visuals visual x bf lv rg d st colorbuffer sr ax dp st accumbuffer ms cav id dep cl sp sz l ci b ro r g b a F gb bf th cl r g b a ns b eat ---------------------------------------------------------------------------- 0x021 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x022 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x285 24 tc 0 32 0 r . . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x286 24 tc 0 32 0 r . . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x287 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x288 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x289 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x28a 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x28b 24 tc 0 32 0 r . . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x28c 24 tc 0 32 0 r . . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x28d 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x28e 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x28f 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x290 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x291 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x292 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x293 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x294 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x295 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x296 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x297 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x298 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x299 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x29a 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x29b 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x29c 24 tc 0 32 0 r . . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x29d 24 tc 0 32 0 r . . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x29e 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x29f 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x2a0 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x2a1 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x2a2 24 tc 0 24 0 r . . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x2a3 24 tc 0 24 0 r . . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x2a4 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x2a5 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x2a6 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x2a7 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x2a8 24 tc 0 24 0 r . . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x2a9 24 tc 0 24 0 r . . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x2aa 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x2ab 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x2ac 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x2ad 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x2ae 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x2af 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x2b0 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x2b1 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x2b2 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x2b3 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x2b4 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x2b5 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x2b6 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x2b7 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x2b8 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x2b9 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x2ba 24 tc 0 24 0 r . . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x2bb 24 tc 0 24 0 r . . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x2bc 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x2bd 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x2be 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x2bf 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x2c0 24 tc 0 32 0 r . . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x2c1 24 tc 0 32 0 r . . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x2c2 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x2c3 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x2c4 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x2c5 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x2c6 24 tc 0 32 0 r . . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x2c7 24 tc 0 32 0 r . . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x2c8 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x2c9 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x2ca 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x2cb 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x2cc 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x2cd 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x2ce 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x2cf 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x2d0 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x2d1 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x2d2 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x2d3 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x2d4 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x2d5 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x2d6 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x2d7 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x2d8 24 tc 0 32 0 r . . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x2d9 24 tc 0 32 0 r . . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x2da 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x2db 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x2dc 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x2dd 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x2de 24 tc 0 24 0 r . . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x2df 24 tc 0 24 0 r . . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x2e0 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x2e1 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x2e2 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x2e3 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x2e4 24 tc 0 24 0 r . . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x2e5 24 tc 0 24 0 r . . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x2e6 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x2e7 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x2e8 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x2e9 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x2ea 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x2eb 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x2ec 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x2ed 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x2ee 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x2ef 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x2f0 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x2f1 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x2f2 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x2f3 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x2f4 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x2f5 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x2f6 24 tc 0 24 0 r . . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x2f7 24 tc 0 24 0 r . . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x2f8 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x2f9 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x2fa 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x2fb 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x2fc 24 dc 0 32 0 r . . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x2fd 24 dc 0 32 0 r . . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x2fe 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x2ff 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x300 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x301 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x302 24 dc 0 32 0 r . . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x303 24 dc 0 32 0 r . . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x304 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x305 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x306 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x307 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x308 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x309 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x30a 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x30b 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x30c 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x30d 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x30e 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x30f 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x310 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x311 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x312 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x313 24 dc 0 32 0 r . . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x314 24 dc 0 32 0 r . . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x315 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x316 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x317 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x318 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x319 24 dc 0 24 0 r . . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x31a 24 dc 0 24 0 r . . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x31b 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x31c 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x31d 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x31e 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x31f 24 dc 0 24 0 r . . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x320 24 dc 0 24 0 r . . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x321 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x322 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x323 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x324 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x325 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x326 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x327 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x328 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x329 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x32a 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x32b 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x32c 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x32d 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x32e 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x32f 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x330 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x331 24 dc 0 24 0 r . . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x332 24 dc 0 24 0 r . . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x333 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x334 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x335 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x336 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x337 24 dc 0 32 0 r . . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x338 24 dc 0 32 0 r . . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x339 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x33a 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x33b 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x33c 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x33d 24 dc 0 32 0 r . . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x33e 24 dc 0 32 0 r . . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x33f 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x340 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x341 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x342 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x343 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x344 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x345 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x346 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x347 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x348 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x349 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x34a 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x34b 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x34c 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x34d 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x34e 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x34f 24 dc 0 32 0 r . . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x350 24 dc 0 32 0 r . . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x351 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x352 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x353 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x354 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x355 24 dc 0 24 0 r . . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x356 24 dc 0 24 0 r . . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x357 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x358 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x359 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x35a 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x35b 24 dc 0 24 0 r . . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x35c 24 dc 0 24 0 r . . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x35d 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x35e 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x35f 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x360 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x361 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x362 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x363 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x364 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x365 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x366 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x367 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x368 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x369 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x36a 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x36b 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x36c 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x36d 24 dc 0 24 0 r . . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x36e 24 dc 0 24 0 r . . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x36f 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x370 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x371 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x372 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x04a 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x373 32 tc 0 32 0 r . . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x374 32 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x375 32 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x376 32 tc 0 32 0 r . . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x377 32 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x378 32 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x379 32 tc 0 32 0 r . . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x37a 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x37b 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x37c 32 tc 0 32 0 r . . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x37d 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x37e 32 tc 0 32 0 r . . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x37f 32 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x380 32 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x381 32 tc 0 32 0 r . . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x382 32 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x383 32 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x384 32 tc 0 32 0 r . . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x385 32 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x386 32 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x387 32 tc 0 32 0 r . . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x388 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x389 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x38a 32 tc 0 32 0 r . . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x38b 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x38c 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x38d 32 tc 0 32 0 r . . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x38e 32 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x38f 32 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 570 GLXFBConfigs: visual x bf lv rg d st colorbuffer sr ax dp st accumbuffer ms cav id dep cl sp sz l ci b ro r g b a F gb bf th cl r g b a ns b eat ---------------------------------------------------------------------------- 0x04b 0 tc 0 32 0 r . . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x04c 0 tc 0 32 0 r . . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x04d 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x04e 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x04f 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x050 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x051 0 tc 0 32 0 r . . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x052 0 tc 0 32 0 r . . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x053 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x054 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x055 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x056 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x057 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x058 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x059 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x05a 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x05b 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x05c 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x05d 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x05e 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x05f 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x060 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x061 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x062 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x063 0 tc 0 32 0 r . . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x064 0 tc 0 32 0 r . . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x065 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x066 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x067 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x068 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x069 0 tc 0 30 0 r . . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x06a 0 tc 0 30 0 r . . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x06b 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x06c 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x06d 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x06e 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x06f 0 tc 0 30 0 r . . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x070 0 tc 0 30 0 r . . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x071 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x072 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x073 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x074 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x075 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x076 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x077 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x078 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x079 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x07a 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x07b 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x07c 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x07d 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x07e 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x07f 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x080 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x081 0 tc 0 30 0 r . . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x082 0 tc 0 30 0 r . . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x083 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x084 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x085 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x086 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x087 0 tc 0 32 0 r . . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x088 0 tc 0 32 0 r . . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x089 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x08a 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x08b 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x08c 0 tc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x08d 0 tc 0 32 0 r . . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x08e 0 tc 0 32 0 r . . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x08f 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x090 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x091 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x092 0 tc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x093 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x094 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x095 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x096 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x097 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x098 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x099 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x09a 0 tc 0 32 0 r . . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x09b 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x09c 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x09d 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x09e 0 tc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x09f 0 tc 0 32 0 r . . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x0a0 0 tc 0 32 0 r . . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x0a1 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x0a2 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x0a3 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x0a4 0 tc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x0a5 0 tc 0 30 0 r . . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x0a6 0 tc 0 30 0 r . . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x0a7 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x0a8 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x0a9 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x0aa 0 tc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x0ab 0 tc 0 30 0 r . . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x0ac 0 tc 0 30 0 r . . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x0ad 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x0ae 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x0af 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x0b0 0 tc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x0b1 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x0b2 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x0b3 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x0b4 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x0b5 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x0b6 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x0b7 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x0b8 0 tc 0 30 0 r . . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x0b9 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x0ba 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x0bb 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x0bc 0 tc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x0bd 0 tc 0 30 0 r . . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x0be 0 tc 0 30 0 r . . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x0bf 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x0c0 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x0c1 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x0c2 0 tc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x0c3 24 tc 0 32 0 r . . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x0c4 24 tc 0 32 0 r . . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x0c5 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x0c6 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x0c7 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x0c8 24 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x0c9 24 tc 0 32 0 r . . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x0ca 24 tc 0 32 0 r . . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x0cb 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x0cc 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x0cd 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x0ce 24 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x0cf 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x0d0 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x0d1 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x0d2 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x0d3 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x0d4 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x0d5 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x0d6 24 tc 0 32 0 r . . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x0d7 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x0d8 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x0d9 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x0da 24 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x0db 24 tc 0 32 0 r . . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x0dc 24 tc 0 32 0 r . . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x0dd 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x0de 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x0df 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x0e0 24 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x0e1 24 tc 0 24 0 r . . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x0e2 24 tc 0 24 0 r . . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x0e3 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x0e4 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x0e5 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x0e6 24 tc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x0e7 24 tc 0 24 0 r . . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x0e8 24 tc 0 24 0 r . . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x0e9 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x0ea 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x0eb 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x0ec 24 tc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x0ed 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x0ee 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x0ef 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x0f0 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x0f1 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x0f2 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x0f3 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x0f4 24 tc 0 24 0 r . . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x0f5 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x0f6 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x0f7 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x0f8 24 tc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x0f9 24 tc 0 24 0 r . . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x0fa 24 tc 0 24 0 r . . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x0fb 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x0fc 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x0fd 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x0fe 24 tc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x0ff 24 tc 0 32 0 r . . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x100 24 tc 0 32 0 r . . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x101 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x102 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x103 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x104 24 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x105 24 tc 0 32 0 r . . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x106 24 tc 0 32 0 r . . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x107 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x108 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x109 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x10a 24 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x10b 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x10c 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x10d 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x10e 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x10f 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x110 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x111 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x112 24 tc 0 32 0 r . . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x113 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x114 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x115 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x116 24 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x117 24 tc 0 32 0 r . . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x118 24 tc 0 32 0 r . . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x119 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x11a 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x11b 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x11c 24 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x11d 24 tc 0 24 0 r . . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x11e 24 tc 0 24 0 r . . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x11f 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x120 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x121 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x122 24 tc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x123 24 tc 0 24 0 r . . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x124 24 tc 0 24 0 r . . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x125 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x126 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x127 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x128 24 tc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x129 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x12a 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x12b 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x12c 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x12d 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x12e 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x12f 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x130 24 tc 0 24 0 r . . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x131 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x132 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x133 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x134 24 tc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x135 24 tc 0 24 0 r . . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x136 24 tc 0 24 0 r . . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x137 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x138 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x139 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x13a 24 tc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x13b 0 tc 0 16 0 r . . 5 6 5 0 . . 0 0 0 0 0 0 0 0 0 None 0x13c 0 tc 0 16 0 r . . 5 6 5 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x13d 0 tc 0 16 0 r y . 5 6 5 0 . . 0 0 0 0 0 0 0 0 0 None 0x13e 0 tc 0 16 0 r y . 5 6 5 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x13f 0 tc 0 16 0 r y . 5 6 5 0 . . 0 0 0 0 0 0 0 0 0 None 0x140 0 tc 0 16 0 r y . 5 6 5 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x141 0 tc 0 16 0 r . . 5 6 5 0 . . 0 16 0 0 0 0 0 0 0 None 0x142 0 tc 0 16 0 r . . 5 6 5 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x143 0 tc 0 16 0 r y . 5 6 5 0 . . 0 16 0 0 0 0 0 0 0 None 0x144 0 tc 0 16 0 r y . 5 6 5 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x145 0 tc 0 16 0 r y . 5 6 5 0 . . 0 16 0 0 0 0 0 0 0 None 0x146 0 tc 0 16 0 r y . 5 6 5 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x147 0 tc 0 16 0 r . . 5 6 5 0 . . 0 24 0 0 0 0 0 0 0 None 0x148 0 tc 0 16 0 r . . 5 6 5 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x149 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 0 0 0 0 0 0 0 None 0x14a 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x14b 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 0 0 0 0 0 0 0 None 0x14c 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x14d 0 tc 0 16 0 r . . 5 6 5 0 . . 0 24 8 0 0 0 0 0 0 None 0x14e 0 tc 0 16 0 r . . 5 6 5 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x14f 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 8 0 0 0 0 0 0 None 0x150 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x151 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 8 0 0 0 0 0 0 None 0x152 0 tc 0 16 0 r y . 5 6 5 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x153 0 tc 0 16 0 r . . 5 6 5 0 . . 0 32 0 0 0 0 0 0 0 None 0x154 0 tc 0 16 0 r . . 5 6 5 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x155 0 tc 0 16 0 r y . 5 6 5 0 . . 0 32 0 0 0 0 0 0 0 None 0x156 0 tc 0 16 0 r y . 5 6 5 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x157 0 tc 0 16 0 r y . 5 6 5 0 . . 0 32 0 0 0 0 0 0 0 None 0x158 0 tc 0 16 0 r y . 5 6 5 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x159 0 dc 0 32 0 r . . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x15a 0 dc 0 32 0 r . . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x15b 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x15c 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x15d 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x15e 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x15f 0 dc 0 32 0 r . . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x160 0 dc 0 32 0 r . . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x161 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x162 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x163 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x164 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x165 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x166 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x167 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x168 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x169 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x16a 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x16b 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x16c 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x16d 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x16e 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x16f 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x170 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x171 0 dc 0 32 0 r . . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x172 0 dc 0 32 0 r . . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x173 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x174 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x175 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x176 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x177 0 dc 0 30 0 r . . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x178 0 dc 0 30 0 r . . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x179 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x17a 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x17b 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x17c 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x17d 0 dc 0 30 0 r . . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x17e 0 dc 0 30 0 r . . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x17f 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x180 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x181 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x182 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x183 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x184 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x185 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x186 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x187 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x188 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x189 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x18a 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x18b 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x18c 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x18d 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x18e 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x18f 0 dc 0 30 0 r . . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x190 0 dc 0 30 0 r . . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x191 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x192 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x193 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x194 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x195 0 dc 0 32 0 r . . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x196 0 dc 0 32 0 r . . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x197 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x198 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x199 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 0 0 0 0 0 0 None 0x19a 0 dc 0 32 0 r y . 10 10 10 2 . . 0 0 0 16 16 16 16 0 0 Slow 0x19b 0 dc 0 32 0 r . . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x19c 0 dc 0 32 0 r . . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x19d 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x19e 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x19f 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 0 0 0 0 0 0 None 0x1a0 0 dc 0 32 0 r y . 10 10 10 2 . . 0 16 0 16 16 16 16 0 0 Slow 0x1a1 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x1a2 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x1a3 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x1a4 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x1a5 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 0 0 0 0 0 0 None 0x1a6 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 0 16 16 16 16 0 0 Slow 0x1a7 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x1a8 0 dc 0 32 0 r . . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x1a9 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x1aa 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x1ab 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 0 0 0 0 0 0 None 0x1ac 0 dc 0 32 0 r y . 10 10 10 2 . . 0 24 8 16 16 16 16 0 0 Slow 0x1ad 0 dc 0 32 0 r . . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x1ae 0 dc 0 32 0 r . . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x1af 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x1b0 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x1b1 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 0 0 0 0 0 0 None 0x1b2 0 dc 0 32 0 r y . 10 10 10 2 . . 0 32 0 16 16 16 16 0 0 Slow 0x1b3 0 dc 0 30 0 r . . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x1b4 0 dc 0 30 0 r . . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x1b5 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x1b6 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x1b7 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 0 0 0 0 0 0 None 0x1b8 0 dc 0 30 0 r y . 10 10 10 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x1b9 0 dc 0 30 0 r . . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x1ba 0 dc 0 30 0 r . . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x1bb 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x1bc 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x1bd 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 0 0 0 0 0 0 None 0x1be 0 dc 0 30 0 r y . 10 10 10 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x1bf 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x1c0 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x1c1 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x1c2 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x1c3 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 0 0 0 0 0 0 None 0x1c4 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x1c5 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x1c6 0 dc 0 30 0 r . . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x1c7 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x1c8 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x1c9 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 0 0 0 0 0 0 None 0x1ca 0 dc 0 30 0 r y . 10 10 10 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x1cb 0 dc 0 30 0 r . . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x1cc 0 dc 0 30 0 r . . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x1cd 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x1ce 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x1cf 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 0 0 0 0 0 0 None 0x1d0 0 dc 0 30 0 r y . 10 10 10 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x1d1 24 dc 0 32 0 r . . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x1d2 24 dc 0 32 0 r . . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x1d3 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x1d4 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x1d5 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x1d6 24 dc 0 32 0 r y . 8 8 8 8 . . 0 0 0 16 16 16 16 0 0 Slow 0x1d7 24 dc 0 32 0 r . . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x1d8 24 dc 0 32 0 r . . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x1d9 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x1da 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x1db 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x1dc 24 dc 0 32 0 r y . 8 8 8 8 . . 0 16 0 16 16 16 16 0 0 Slow 0x1dd 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x1de 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x1df 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x1e0 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x1e1 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x1e2 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 0 16 16 16 16 0 0 Slow 0x1e3 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x1e4 24 dc 0 32 0 r . . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x1e5 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x1e6 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x1e7 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x1e8 24 dc 0 32 0 r y . 8 8 8 8 . . 0 24 8 16 16 16 16 0 0 Slow 0x1e9 24 dc 0 32 0 r . . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x1ea 24 dc 0 32 0 r . . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x1eb 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x1ec 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x1ed 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x1ee 24 dc 0 32 0 r y . 8 8 8 8 . . 0 32 0 16 16 16 16 0 0 Slow 0x1ef 24 dc 0 24 0 r . . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x1f0 24 dc 0 24 0 r . . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x1f1 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x1f2 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x1f3 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 0 0 0 0 0 0 None 0x1f4 24 dc 0 24 0 r y . 8 8 8 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x1f5 24 dc 0 24 0 r . . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x1f6 24 dc 0 24 0 r . . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x1f7 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x1f8 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x1f9 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 0 0 0 0 0 0 None 0x1fa 24 dc 0 24 0 r y . 8 8 8 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x1fb 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x1fc 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x1fd 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x1fe 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x1ff 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 0 0 0 0 0 0 None 0x200 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x201 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x202 24 dc 0 24 0 r . . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x203 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x204 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x205 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 0 0 0 0 0 0 None 0x206 24 dc 0 24 0 r y . 8 8 8 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x207 24 dc 0 24 0 r . . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x208 24 dc 0 24 0 r . . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x209 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x20a 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x20b 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 0 0 0 0 0 0 None 0x20c 24 dc 0 24 0 r y . 8 8 8 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x20d 24 dc 0 32 0 r . . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x20e 24 dc 0 32 0 r . . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x20f 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x210 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x211 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x212 24 dc 0 32 0 r y . 8 8 8 8 . s 0 0 0 16 16 16 16 0 0 Slow 0x213 24 dc 0 32 0 r . . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x214 24 dc 0 32 0 r . . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x215 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x216 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x217 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x218 24 dc 0 32 0 r y . 8 8 8 8 . s 0 16 0 16 16 16 16 0 0 Slow 0x219 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x21a 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x21b 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x21c 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x21d 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x21e 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 0 16 16 16 16 0 0 Slow 0x21f 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x220 24 dc 0 32 0 r . . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x221 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x222 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x223 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x224 24 dc 0 32 0 r y . 8 8 8 8 . s 0 24 8 16 16 16 16 0 0 Slow 0x225 24 dc 0 32 0 r . . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x226 24 dc 0 32 0 r . . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x227 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x228 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x229 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x22a 24 dc 0 32 0 r y . 8 8 8 8 . s 0 32 0 16 16 16 16 0 0 Slow 0x22b 24 dc 0 24 0 r . . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x22c 24 dc 0 24 0 r . . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x22d 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x22e 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x22f 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 0 0 0 0 0 0 None 0x230 24 dc 0 24 0 r y . 8 8 8 0 . s 0 0 0 16 16 16 0 0 0 Slow 0x231 24 dc 0 24 0 r . . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x232 24 dc 0 24 0 r . . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x233 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x234 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x235 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 0 0 0 0 0 0 None 0x236 24 dc 0 24 0 r y . 8 8 8 0 . s 0 16 0 16 16 16 0 0 0 Slow 0x237 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x238 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x239 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x23a 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x23b 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 0 0 0 0 0 0 None 0x23c 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 0 16 16 16 0 0 0 Slow 0x23d 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x23e 24 dc 0 24 0 r . . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x23f 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x240 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x241 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 0 0 0 0 0 0 None 0x242 24 dc 0 24 0 r y . 8 8 8 0 . s 0 24 8 16 16 16 0 0 0 Slow 0x243 24 dc 0 24 0 r . . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x244 24 dc 0 24 0 r . . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x245 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x246 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x247 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 0 0 0 0 0 0 None 0x248 24 dc 0 24 0 r y . 8 8 8 0 . s 0 32 0 16 16 16 0 0 0 Slow 0x249 0 dc 0 16 0 r . . 5 6 5 0 . . 0 0 0 0 0 0 0 0 0 None 0x24a 0 dc 0 16 0 r . . 5 6 5 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x24b 0 dc 0 16 0 r y . 5 6 5 0 . . 0 0 0 0 0 0 0 0 0 None 0x24c 0 dc 0 16 0 r y . 5 6 5 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x24d 0 dc 0 16 0 r y . 5 6 5 0 . . 0 0 0 0 0 0 0 0 0 None 0x24e 0 dc 0 16 0 r y . 5 6 5 0 . . 0 0 0 16 16 16 0 0 0 Slow 0x24f 0 dc 0 16 0 r . . 5 6 5 0 . . 0 16 0 0 0 0 0 0 0 None 0x250 0 dc 0 16 0 r . . 5 6 5 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x251 0 dc 0 16 0 r y . 5 6 5 0 . . 0 16 0 0 0 0 0 0 0 None 0x252 0 dc 0 16 0 r y . 5 6 5 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x253 0 dc 0 16 0 r y . 5 6 5 0 . . 0 16 0 0 0 0 0 0 0 None 0x254 0 dc 0 16 0 r y . 5 6 5 0 . . 0 16 0 16 16 16 0 0 0 Slow 0x255 0 dc 0 16 0 r . . 5 6 5 0 . . 0 24 0 0 0 0 0 0 0 None 0x256 0 dc 0 16 0 r . . 5 6 5 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x257 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 0 0 0 0 0 0 0 None 0x258 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x259 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 0 0 0 0 0 0 0 None 0x25a 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 0 16 16 16 0 0 0 Slow 0x25b 0 dc 0 16 0 r . . 5 6 5 0 . . 0 24 8 0 0 0 0 0 0 None 0x25c 0 dc 0 16 0 r . . 5 6 5 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x25d 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 8 0 0 0 0 0 0 None 0x25e 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x25f 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 8 0 0 0 0 0 0 None 0x260 0 dc 0 16 0 r y . 5 6 5 0 . . 0 24 8 16 16 16 0 0 0 Slow 0x261 0 dc 0 16 0 r . . 5 6 5 0 . . 0 32 0 0 0 0 0 0 0 None 0x262 0 dc 0 16 0 r . . 5 6 5 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x263 0 dc 0 16 0 r y . 5 6 5 0 . . 0 32 0 0 0 0 0 0 0 None 0x264 0 dc 0 16 0 r y . 5 6 5 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x265 0 dc 0 16 0 r y . 5 6 5 0 . . 0 32 0 0 0 0 0 0 0 None 0x266 0 dc 0 16 0 r y . 5 6 5 0 . . 0 32 0 16 16 16 0 0 0 Slow 0x267 32 tc 0 32 0 r . . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x268 32 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x269 32 tc 0 32 0 r y . 8 8 8 8 . . 0 0 0 0 0 0 0 0 0 None 0x26a 32 tc 0 32 0 r . . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x26b 32 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x26c 32 tc 0 32 0 r y . 8 8 8 8 . . 0 16 0 0 0 0 0 0 0 None 0x26d 32 tc 0 32 0 r . . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x26e 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x26f 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 0 0 0 0 0 0 0 None 0x270 32 tc 0 32 0 r . . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x271 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x272 32 tc 0 32 0 r y . 8 8 8 8 . . 0 24 8 0 0 0 0 0 0 None 0x273 32 tc 0 32 0 r . . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x274 32 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x275 32 tc 0 32 0 r y . 8 8 8 8 . . 0 32 0 0 0 0 0 0 0 None 0x276 32 tc 0 32 0 r . . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x277 32 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x278 32 tc 0 32 0 r y . 8 8 8 8 . s 0 0 0 0 0 0 0 0 0 None 0x279 32 tc 0 32 0 r . . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x27a 32 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x27b 32 tc 0 32 0 r y . 8 8 8 8 . s 0 16 0 0 0 0 0 0 0 None 0x27c 32 tc 0 32 0 r . . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x27d 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x27e 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 0 0 0 0 0 0 0 None 0x27f 32 tc 0 32 0 r . . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x280 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x281 32 tc 0 32 0 r y . 8 8 8 8 . s 0 24 8 0 0 0 0 0 0 None 0x282 32 tc 0 32 0 r . . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x283 32 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None 0x284 32 tc 0 32 0 r y . 8 8 8 8 . s 0 32 0 0 0 0 0 0 0 None [-- Attachment #4: Type: text/plain, Size: 160 bytes --] _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [LKP] Re: [drm/mgag200] e44e907dd8: phoronix-test-suite.glmark2.800x600.score -64.9% regression 2020-06-16 3:10 ` Rong Chen @ 2020-06-16 3:29 ` Rong Chen 2020-06-16 13:49 ` Emil Velikov 2020-06-16 13:49 ` Thomas Zimmermann 2 siblings, 0 replies; 25+ messages in thread From: Rong Chen @ 2020-06-16 3:29 UTC (permalink / raw) To: Emil Velikov Cc: john.p.donnelly, ML dri-devel, lkp, OTC LSE PnP, Gerd Hoffmann, Thomas Zimmermann, Dave Airlie, Sam Ravnborg, Emil Velikov [-- Attachment #1: Type: text/plain, Size: 8910 bytes --] On 6/16/20 11:10 AM, Rong Chen wrote: > > > On 6/16/20 4:58 AM, Emil Velikov wrote: >> Hi all, >> >> On Thu, 4 Jun 2020 at 08:11, kernel test robot >> <rong.a.chen@intel.com> wrote: >>> Greeting, >>> >>> FYI, we noticed a -64.9% regression of >>> phoronix-test-suite.glmark2.800x600.score due to commit: >>> >> On one hand, I'm really happy to see performance testing happening >> although this report is missing various crucial pieces of information. >> >>> commit: e44e907dd8f937313d35615d799d54162c56d173 ("[PATCH v3 05/15] >>> drm/mgag200: Split MISC register update into PLL selection, SYNC and >>> I/O") >>> url: >>> https://github.com/0day-ci/linux/commits/Thomas-Zimmermann/drm-mgag200-Convert-to-atomic-modesetting/20200515-163744 >>> base: git://anongit.freedesktop.org/drm/drm-tip drm-tip >>> >>> in testcase: phoronix-test-suite >>> on test machine: 16 threads Intel(R) Xeon(R) CPU X5570 @ 2.93GHz >>> with 48G memory >>> with following parameters: >>> >>> need_x: true >> Replace "need_x" with the Xorg version as seen in `Xorg -version'. > > # Xorg -version > /bin/sh: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8) > > X.Org X Server 1.20.4 > X Protocol Version 11, Revision 0 > Build Operating System: Linux 4.9.0-8-amd64 x86_64 Debian > Current Operating System: Linux lkp-nhm-2ep1 > 5.7.0-rc5-01428-ge44e907dd8f937 #1 SMP Tue Jun 2 19:51:38 CST 2020 x86_64 > Kernel command line: ip=::::lkp-nhm-2ep1::dhcp > root=/dev/disk/by-id/wwn-0x55cd2e4123123127-part2 > rootflags=subvol=debian-x86_64-phoronix > remote_rootfs=internal-lkp-server:/osimage/debian/debian-x86_64-phoronix > user=lkp > job=/lkp/jobs/scheduled/lkp-nhm-2ep1/phoronix-test-suite-performance-true-glmark2-1.1.0-ucode=0x1d-debian-x86_64-phoronix-e44e907dd8f937313d35615d799d54162c56d173-20200616-56456-1kgmjzm-0.yaml > ARCH=x86_64 kconfig=x86_64-rhel-7.6 > branch=linux-devel/devel-hourly-2020051600 > commit=e44e907dd8f937313d35615d799d54162c56d173 > BOOT_IMAGE=/pkg/linux/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/vmlinuz-5.7.0-rc5-01428-ge44e907dd8f937 > console=ttyS1,115200 console=tty0 max_uptime=3600 > RESULT_ROOT=/result/phoronix-test-suite/performance-true-glmark2-1.1.0-ucode=0x1d/lkp-nhm-2ep1/debian-x86_64-phoronix/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/4 > LKP_SERVER=inn nokaslr selinux=0 debug apic=debug sysrq_always_enabled > rcupdate.rcu_cpu_stall_timeout=100 net.ifnames=0 printk.devkmsg=on > panic=-1 softlockup_panic=1 nmi_watchdog=panic oops=panic > load_ramdisk=2 prompt_ramdisk=0 drbd.minor_count=8 > systemd.log_level=err ignore_loglevel console=tty0 > earlyprintk=ttyS0,115200 console=ttyS0,115200 vga=normal rw > Build Date: 05 March 2019 08:11:12PM > xorg-server 2:1.20.4-1 (https://www.debian.org/support) > Current version of pixman: 0.36.0 > Before reporting problems, check http://wiki.x.org > to make sure that you have the latest version. > >> >>> test: glmark2-1.1.0 >>> cpufreq_governor: performance >>> ucode: 0x1d >>> >>> test-description: The Phoronix Test Suite is the most comprehensive >>> testing and benchmarking platform available that provides an >>> extensible framework for which new tests can be easily added. >>> test-url: http://www.phoronix-test-suite.com/ >>> >> Please remove the test description and url. They don't add any value. >> >> Mention which Mesa version is used as well as on what GPU. The output >> of lspci and glxinfo will help here. > > Attached please find the outputs of lspci and glxinfo Sorry, the previous lspci is not correct, please find it in this attachment. Best Regards, Rong Chen > >> >> For this particular test - there is no Mesa/upstream driver for this >> GPU, so I imagine one of the swrast drivers was used. Which one - >> swrast (classic, softpipe, llvmpipe, swr) or kms_swrast. >> The output of `LD_DEBUG=libs glxinfo |& grep _dri.so` will help here. > > # LD_DEBUG=libs glxinfo |& grep _dri.so > 2132: calling init: /usr/lib/i386-linux-gnu/dri/swrast_dri.so > 2132: calling fini: > /usr/lib/i386-linux-gnu/dri/swrast_dri.so [0] > > Best Regards, > Rong Chen > >> >>> commit: >>> bef2303526 ("drm/mgag200: Move mode-setting code into separate >>> helper function") >>> e44e907dd8 ("drm/mgag200: Split MISC register update into PLL >>> selection, SYNC and I/O") >>> >> Actually the offending commit has a subtle change of behaviour - it >> adds an extra MGAREG_MISC_RAMMAPEN. >> That is not documented and I've failed to spot it during review. >> >> Thomas - shall we revert that line in itself or at least add an inline >> comment why it is needed? >> >>> 100 >>> +---------------------------------------------------------------------+ >>> 90 |-+ + + +.+ + + + + + >>> : | >>> | : : : : : : : : : : >>> : | >>> 80 |-: : : : : : : : : : >>> : | >>> 70 |-:: : :: : : : :: :: : :: >>> : | >>> |: : : : : : : : : : : : : : : : : : >>> : | >>> 60 |:+: : : : : : : : : : : : : : : : : >>> : | >>> 50 |:+: : : : : : : : : : : : : : : : : >>> : | >>> 40 |:+ : : : : : : : : : : : : : : : : : >>> : | >>> |: : : : : : : : : : : : : : : : : : :O >>> O O O O | >>> 30 |:+ : : : : : : : : : : : : : : : : : >>> : | >>> 20 |-+ :: : : : : : :: : : :: : : O >>> : | >>> | : : : : : : : : : : : : >>> : | >>> 10 |-+ : : : : : : : : : : : : >>> : | >>> 0 >>> +---------------------------------------------------------------------+ >>> >>> >>> phoronix-test-suite.glmark2.1024x768.score >>> >>> 70 >>> +----------------------------------------------------------------------+ >>> >>> | + + + +..+ + + + + + >>> +.+ | >>> 60 |-: : : : : : : : : : >>> : | >>> | : : : : : : : : : : >>> : | >>> 50 |-:: : :: : : :: : : :: :: >>> : | >>> |: : : : : : : : : : : : : : : : : : >>> : | >>> 40 |:+: : : : : : : : : : : : : : : : : >>> : | >>> |: : : : : : : : : : : : : : : : : : : >>> O | >>> 30 |:+ : : : : : : : : : : : : : : : : : :O >>> O O O | >>> |: : : : : : : : : : : : : : : : : : >>> : | >>> 20 |:+ : : : : : : : : : : : : : : : : : >>> : | >>> | :: : : : : : :: : : :: : : O >>> :: | >>> 10 |-+ : : : : : : : : : : : : >>> : | >>> | : : : O : O : : O : : : O : : : >>> : | >>> 0 >>> +----------------------------------------------------------------------+ >>> >>> >>> >>> [*] bisect-good sample >>> [O] bisect-bad sample >>> >> Hmm I must be going blind - there isn't even a single * in either of >> the graphs. >> Or perhaps my eyesight is fine and the legend or the graphs need fixing. >> >> HTH >> -Emil > > > _______________________________________________ > LKP mailing list -- lkp@lists.01.org > To unsubscribe send an email to lkp-leave@lists.01.org [-- Attachment #2: lspci --] [-- Type: text/plain, Size: 8865 bytes --] 00:00.0 Host bridge: Intel Corporation 5520 I/O Hub to ESI Port (rev 13) 00:01.0 PCI bridge: Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port 1 (rev 13) 00:09.0 PCI bridge: Intel Corporation 7500/5520/5500/X58 I/O Hub PCI Express Root Port 9 (rev 13) 00:0a.0 PCI bridge: Intel Corporation 7500/5520/5500/X58 I/O Hub PCI Express Root Port 10 (rev 13) 00:10.0 PIC: Intel Corporation 7500/5520/5500/X58 Physical and Link Layer Registers Port 0 (rev 13) 00:10.1 PIC: Intel Corporation 7500/5520/5500/X58 Routing and Protocol Layer Registers Port 0 (rev 13) 00:11.0 PIC: Intel Corporation 7500/5520/5500 Physical and Link Layer Registers Port 1 (rev 13) 00:11.1 PIC: Intel Corporation 7500/5520/5500 Routing & Protocol Layer Register Port 1 (rev 13) 00:13.0 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub I/OxAPIC Interrupt Controller (rev 13) 00:14.0 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub System Management Registers (rev 13) 00:14.1 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub GPIO and Scratch Pad Registers (rev 13) 00:14.2 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub Control Status and RAS Registers (rev 13) 00:14.3 PIC: Intel Corporation 7500/5520/5500/X58 I/O Hub Throttle Registers (rev 13) 00:15.0 PIC: Intel Corporation 7500/5520/5500/X58 Trusted Execution Technology Registers (rev 13) 00:16.0 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) 00:16.1 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) 00:16.2 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) 00:16.3 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) 00:16.4 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) 00:16.5 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) 00:16.6 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) 00:16.7 System peripheral: Intel Corporation 5520/5500/X58 Chipset QuickData Technology Device (rev 13) 00:1a.0 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #4 00:1a.1 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #5 00:1a.2 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #6 00:1a.7 USB controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #2 00:1c.0 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 1 00:1c.4 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 5 00:1c.5 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 6 00:1d.0 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #1 00:1d.1 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #2 00:1d.2 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #3 00:1d.7 USB controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #1 00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev 90) 00:1f.0 ISA bridge: Intel Corporation 82801JIR (ICH10R) LPC Interface Controller 00:1f.2 IDE interface: Intel Corporation 82801JI (ICH10 Family) 4 port SATA IDE Controller #1 00:1f.3 SMBus: Intel Corporation 82801JI (ICH10 Family) SMBus Controller 00:1f.5 IDE interface: Intel Corporation 82801JI (ICH10 Family) 2 port SATA IDE Controller #2 01:00.0 Ethernet controller: Intel Corporation 82575EB Gigabit Network Connection (rev 02) 01:00.1 Ethernet controller: Intel Corporation 82575EB Gigabit Network Connection (rev 02) 04:00.0 SCSI storage controller: LSI Logic / Symbios Logic SAS1078 PCI-Express Fusion-MPT SAS (rev 04) 05:00.0 VGA compatible controller: Matrox Electronics Systems Ltd. MGA G200e [Pilot] ServerEngines (SEP1) (rev 02) fe:00.0 Host bridge: Intel Corporation Xeon 5500/Core i7 QuickPath Architecture Generic Non-Core Registers (rev 05) fe:00.1 Host bridge: Intel Corporation Xeon 5500/Core i7 QuickPath Architecture System Address Decoder (rev 05) fe:02.0 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Link 0 (rev 05) fe:02.1 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Physical 0 (rev 05) fe:02.4 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Link 1 (rev 05) fe:02.5 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Physical 1 (rev 05) fe:03.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller (rev 05) fe:03.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Target Address Decoder (rev 05) fe:03.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller RAS Registers (rev 05) fe:03.4 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Test Registers (rev 05) fe:04.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Control Registers (rev 05) fe:04.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Address Registers (rev 05) fe:04.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Rank Registers (rev 05) fe:04.3 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Thermal Control Registers (rev 05) fe:05.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Control Registers (rev 05) fe:05.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Address Registers (rev 05) fe:05.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Rank Registers (rev 05) fe:05.3 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Thermal Control Registers (rev 05) fe:06.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Control Registers (rev 05) fe:06.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Address Registers (rev 05) fe:06.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Rank Registers (rev 05) fe:06.3 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Thermal Control Registers (rev 05) ff:00.0 Host bridge: Intel Corporation Xeon 5500/Core i7 QuickPath Architecture Generic Non-Core Registers (rev 05) ff:00.1 Host bridge: Intel Corporation Xeon 5500/Core i7 QuickPath Architecture System Address Decoder (rev 05) ff:02.0 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Link 0 (rev 05) ff:02.1 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Physical 0 (rev 05) ff:02.4 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Link 1 (rev 05) ff:02.5 Host bridge: Intel Corporation Xeon 5500/Core i7 QPI Physical 1 (rev 05) ff:03.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller (rev 05) ff:03.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Target Address Decoder (rev 05) ff:03.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller RAS Registers (rev 05) ff:03.4 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Test Registers (rev 05) ff:04.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Control Registers (rev 05) ff:04.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Address Registers (rev 05) ff:04.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Rank Registers (rev 05) ff:04.3 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 0 Thermal Control Registers (rev 05) ff:05.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Control Registers (rev 05) ff:05.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Address Registers (rev 05) ff:05.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Rank Registers (rev 05) ff:05.3 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 1 Thermal Control Registers (rev 05) ff:06.0 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Control Registers (rev 05) ff:06.1 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Address Registers (rev 05) ff:06.2 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Rank Registers (rev 05) ff:06.3 Host bridge: Intel Corporation Xeon 5500/Core i7 Integrated Memory Controller Channel 2 Thermal Control Registers (rev 05) [-- Attachment #3: Type: text/plain, Size: 160 bytes --] _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [drm/mgag200] e44e907dd8: phoronix-test-suite.glmark2.800x600.score -64.9% regression 2020-06-16 3:10 ` Rong Chen 2020-06-16 3:29 ` [LKP] " Rong Chen @ 2020-06-16 13:49 ` Emil Velikov 2020-06-17 1:35 ` Rong Chen 2020-06-16 13:49 ` Thomas Zimmermann 2 siblings, 1 reply; 25+ messages in thread From: Emil Velikov @ 2020-06-16 13:49 UTC (permalink / raw) To: Rong Chen Cc: john.p.donnelly, ML dri-devel, lkp, OTC LSE PnP, Gerd Hoffmann, Thomas Zimmermann, Dave Airlie, Sam Ravnborg, Emil Velikov Hi Rong, Thanks for the prompt reply and information. Can I suggest including the suggested information in future reports. I've included a command for each one, to aid automating things. Namely: Xorg: 1.20.4 (or None) $ which Xorg 2>/dev/null || echo None && Xorg -version |& grep -o "X Server.*" | sed "s/X Server//" Mesa: 20.0.7 $ grep -E -o "Mesa [1-9]+.*" | head -n1 | sed "s/Mesa//" Mesa module: swrast_dri.so $ basename `LD_DEBUG=libs glxinfo |& grep _dri.so | head -n1 | cut -f3 -d:` Mesa device: llvmpipe (LLVM 10.0.0, 128 bits) (0xffffffff) $ glxinfo | grep -i device | cut -f2 -d: GPU: Matrox Electronics ... $ lspci -nn | grep -E "VGA|Display|3D" | cut -f2- -d: Thanks -Emil _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [drm/mgag200] e44e907dd8: phoronix-test-suite.glmark2.800x600.score -64.9% regression 2020-06-16 13:49 ` Emil Velikov @ 2020-06-17 1:35 ` Rong Chen 0 siblings, 0 replies; 25+ messages in thread From: Rong Chen @ 2020-06-17 1:35 UTC (permalink / raw) To: Emil Velikov Cc: john.p.donnelly, ML dri-devel, lkp, OTC LSE PnP, Gerd Hoffmann, Thomas Zimmermann, Dave Airlie, Sam Ravnborg, Emil Velikov Hi Emil, Thanks for the guidance, we'll add these information in future reports. Best Regards, Rong Chen On 6/16/20 9:49 PM, Emil Velikov wrote: > Hi Rong, > > Thanks for the prompt reply and information. Can I suggest including > the suggested information in future reports. > I've included a command for each one, to aid automating things. > > Namely: > Xorg: 1.20.4 (or None) > $ which Xorg 2>/dev/null || echo None && Xorg -version |& grep -o "X > Server.*" | sed "s/X Server//" > > Mesa: 20.0.7 > $ grep -E -o "Mesa [1-9]+.*" | head -n1 | sed "s/Mesa//" > > Mesa module: swrast_dri.so > $ basename `LD_DEBUG=libs glxinfo |& grep _dri.so | head -n1 | cut -f3 -d:` > > Mesa device: llvmpipe (LLVM 10.0.0, 128 bits) (0xffffffff) > $ glxinfo | grep -i device | cut -f2 -d: > > GPU: Matrox Electronics ... > $ lspci -nn | grep -E "VGA|Display|3D" | cut -f2- -d: > > Thanks > -Emil _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [drm/mgag200] e44e907dd8: phoronix-test-suite.glmark2.800x600.score -64.9% regression 2020-06-16 3:10 ` Rong Chen 2020-06-16 3:29 ` [LKP] " Rong Chen 2020-06-16 13:49 ` Emil Velikov @ 2020-06-16 13:49 ` Thomas Zimmermann 2020-06-17 1:42 ` Rong Chen 2 siblings, 1 reply; 25+ messages in thread From: Thomas Zimmermann @ 2020-06-16 13:49 UTC (permalink / raw) To: Rong Chen, Emil Velikov Cc: john.p.donnelly, ML dri-devel, lkp, OTC LSE PnP, Gerd Hoffmann, Dave Airlie, Sam Ravnborg, Emil Velikov [-- Attachment #1.1.1: Type: text/plain, Size: 9146 bytes --] Hi Am 16.06.20 um 05:10 schrieb Rong Chen: > > > On 6/16/20 4:58 AM, Emil Velikov wrote: >> Hi all, >> >> On Thu, 4 Jun 2020 at 08:11, kernel test robot <rong.a.chen@intel.com> >> wrote: >>> Greeting, >>> >>> FYI, we noticed a -64.9% regression of >>> phoronix-test-suite.glmark2.800x600.score due to commit: >>> >> On one hand, I'm really happy to see performance testing happening >> although this report is missing various crucial pieces of information. >> >>> commit: e44e907dd8f937313d35615d799d54162c56d173 ("[PATCH v3 05/15] >>> drm/mgag200: Split MISC register update into PLL selection, SYNC and >>> I/O") >>> url: >>> https://github.com/0day-ci/linux/commits/Thomas-Zimmermann/drm-mgag200-Convert-to-atomic-modesetting/20200515-163744 >>> >>> base: git://anongit.freedesktop.org/drm/drm-tip drm-tip >>> >>> in testcase: phoronix-test-suite >>> on test machine: 16 threads Intel(R) Xeon(R) CPU X5570 @ 2.93GHz with >>> 48G memory >>> with following parameters: >>> >>> need_x: true >> Replace "need_x" with the Xorg version as seen in `Xorg -version'. > > # Xorg -version > /bin/sh: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8) > > X.Org X Server 1.20.4 > X Protocol Version 11, Revision 0 > Build Operating System: Linux 4.9.0-8-amd64 x86_64 Debian > Current Operating System: Linux lkp-nhm-2ep1 > 5.7.0-rc5-01428-ge44e907dd8f937 #1 SMP Tue Jun 2 19:51:38 CST 2020 x86_64 > Kernel command line: ip=::::lkp-nhm-2ep1::dhcp > root=/dev/disk/by-id/wwn-0x55cd2e4123123127-part2 > rootflags=subvol=debian-x86_64-phoronix > remote_rootfs=internal-lkp-server:/osimage/debian/debian-x86_64-phoronix > user=lkp > job=/lkp/jobs/scheduled/lkp-nhm-2ep1/phoronix-test-suite-performance-true-glmark2-1.1.0-ucode=0x1d-debian-x86_64-phoronix-e44e907dd8f937313d35615d799d54162c56d173-20200616-56456-1kgmjzm-0.yaml > ARCH=x86_64 kconfig=x86_64-rhel-7.6 > branch=linux-devel/devel-hourly-2020051600 > commit=e44e907dd8f937313d35615d799d54162c56d173 > BOOT_IMAGE=/pkg/linux/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/vmlinuz-5.7.0-rc5-01428-ge44e907dd8f937 > console=ttyS1,115200 console=tty0 max_uptime=3600 > RESULT_ROOT=/result/phoronix-test-suite/performance-true-glmark2-1.1.0-ucode=0x1d/lkp-nhm-2ep1/debian-x86_64-phoronix/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/4 > LKP_SERVER=inn nokaslr selinux=0 debug apic=debug sysrq_always_enabled > rcupdate.rcu_cpu_stall_timeout=100 net.ifnames=0 printk.devkmsg=on > panic=-1 softlockup_panic=1 nmi_watchdog=panic oops=panic load_ramdisk=2 > prompt_ramdisk=0 drbd.minor_count=8 systemd.log_level=err > ignore_loglevel console=tty0 earlyprintk=ttyS0,115200 > console=ttyS0,115200 vga=normal rw > Build Date: 05 March 2019 08:11:12PM > xorg-server 2:1.20.4-1 (https://www.debian.org/support) > Current version of pixman: 0.36.0 > Before reporting problems, check http://wiki.x.org > to make sure that you have the latest version. > >> >>> test: glmark2-1.1.0 >>> cpufreq_governor: performance >>> ucode: 0x1d >>> >>> test-description: The Phoronix Test Suite is the most comprehensive >>> testing and benchmarking platform available that provides an >>> extensible framework for which new tests can be easily added. >>> test-url: http://www.phoronix-test-suite.com/ >>> >> Please remove the test description and url. They don't add any value. >> >> Mention which Mesa version is used as well as on what GPU. The output >> of lspci and glxinfo will help here. > > Attached please find the outputs of lspci and glxinfo > >> >> For this particular test - there is no Mesa/upstream driver for this >> GPU, so I imagine one of the swrast drivers was used. Which one - >> swrast (classic, softpipe, llvmpipe, swr) or kms_swrast. >> The output of `LD_DEBUG=libs glxinfo |& grep _dri.so` will help here. > > # LD_DEBUG=libs glxinfo |& grep _dri.so > 2132: calling init: /usr/lib/i386-linux-gnu/dri/swrast_dri.so > 2132: calling fini: /usr/lib/i386-linux-gnu/dri/swrast_dri.so [0] > > Best Regards, > Rong Chen Thanks for testing. If I send out a patch, could you try it? Best regards Thomas > >> >>> commit: >>> bef2303526 ("drm/mgag200: Move mode-setting code into separate >>> helper function") >>> e44e907dd8 ("drm/mgag200: Split MISC register update into PLL >>> selection, SYNC and I/O") >>> >> Actually the offending commit has a subtle change of behaviour - it >> adds an extra MGAREG_MISC_RAMMAPEN. >> That is not documented and I've failed to spot it during review. >> >> Thomas - shall we revert that line in itself or at least add an inline >> comment why it is needed? >> >>> 100 >>> +---------------------------------------------------------------------+ >>> 90 |-+ + + +.+ + + + + + >>> : | >>> | : : : : : : : : : : >>> : | >>> 80 |-: : : : : : : : : : >>> : | >>> 70 |-:: : :: : : : :: :: : :: >>> : | >>> |: : : : : : : : : : : : : : : : : : >>> : | >>> 60 |:+: : : : : : : : : : : : : : : : : >>> : | >>> 50 |:+: : : : : : : : : : : : : : : : : >>> : | >>> 40 |:+ : : : : : : : : : : : : : : : : : >>> : | >>> |: : : : : : : : : : : : : : : : : : :O O >>> O O O | >>> 30 |:+ : : : : : : : : : : : : : : : : : >>> : | >>> 20 |-+ :: : : : : : :: : : :: : : O >>> : | >>> | : : : : : : : : : : : : >>> : | >>> 10 |-+ : : : : : : : : : : : : >>> : | >>> 0 >>> +---------------------------------------------------------------------+ >>> >>> >>> phoronix-test-suite.glmark2.1024x768.score >>> >>> 70 >>> +----------------------------------------------------------------------+ >>> | + + + +..+ + + + + + >>> +.+ | >>> 60 |-: : : : : : : : : : >>> : | >>> | : : : : : : : : : : >>> : | >>> 50 |-:: : :: : : :: : : :: :: >>> : | >>> |: : : : : : : : : : : : : : : : : : >>> : | >>> 40 |:+: : : : : : : : : : : : : : : : : >>> : | >>> |: : : : : : : : : : : : : : : : : : : >>> O | >>> 30 |:+ : : : : : : : : : : : : : : : : : :O >>> O O O | >>> |: : : : : : : : : : : : : : : : : : >>> : | >>> 20 |:+ : : : : : : : : : : : : : : : : : >>> : | >>> | :: : : : : : :: : : :: : : O >>> :: | >>> 10 |-+ : : : : : : : : : : : : >>> : | >>> | : : : O : O : : O : : : O : : : >>> : | >>> 0 >>> +----------------------------------------------------------------------+ >>> >>> >>> [*] bisect-good sample >>> [O] bisect-bad sample >>> >> Hmm I must be going blind - there isn't even a single * in either of >> the graphs. >> Or perhaps my eyesight is fine and the legend or the graphs need fixing. >> >> HTH >> -Emil > -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer [-- Attachment #1.2: OpenPGP digital signature --] [-- Type: application/pgp-signature, Size: 488 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [drm/mgag200] e44e907dd8: phoronix-test-suite.glmark2.800x600.score -64.9% regression 2020-06-16 13:49 ` Thomas Zimmermann @ 2020-06-17 1:42 ` Rong Chen 0 siblings, 0 replies; 25+ messages in thread From: Rong Chen @ 2020-06-17 1:42 UTC (permalink / raw) To: Thomas Zimmermann, Emil Velikov Cc: john.p.donnelly, ML dri-devel, lkp, OTC LSE PnP, Gerd Hoffmann, Dave Airlie, Sam Ravnborg, Emil Velikov On 6/16/20 9:49 PM, Thomas Zimmermann wrote: > Hi > > Am 16.06.20 um 05:10 schrieb Rong Chen: >> >> On 6/16/20 4:58 AM, Emil Velikov wrote: >>> Hi all, >>> >>> On Thu, 4 Jun 2020 at 08:11, kernel test robot <rong.a.chen@intel.com> >>> wrote: >>>> Greeting, >>>> >>>> FYI, we noticed a -64.9% regression of >>>> phoronix-test-suite.glmark2.800x600.score due to commit: >>>> >>> On one hand, I'm really happy to see performance testing happening >>> although this report is missing various crucial pieces of information. >>> >>>> commit: e44e907dd8f937313d35615d799d54162c56d173 ("[PATCH v3 05/15] >>>> drm/mgag200: Split MISC register update into PLL selection, SYNC and >>>> I/O") >>>> url: >>>> https://github.com/0day-ci/linux/commits/Thomas-Zimmermann/drm-mgag200-Convert-to-atomic-modesetting/20200515-163744 >>>> >>>> base: git://anongit.freedesktop.org/drm/drm-tip drm-tip >>>> >>>> in testcase: phoronix-test-suite >>>> on test machine: 16 threads Intel(R) Xeon(R) CPU X5570 @ 2.93GHz with >>>> 48G memory >>>> with following parameters: >>>> >>>> need_x: true >>> Replace "need_x" with the Xorg version as seen in `Xorg -version'. >> # Xorg -version >> /bin/sh: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8) >> >> X.Org X Server 1.20.4 >> X Protocol Version 11, Revision 0 >> Build Operating System: Linux 4.9.0-8-amd64 x86_64 Debian >> Current Operating System: Linux lkp-nhm-2ep1 >> 5.7.0-rc5-01428-ge44e907dd8f937 #1 SMP Tue Jun 2 19:51:38 CST 2020 x86_64 >> Kernel command line: ip=::::lkp-nhm-2ep1::dhcp >> root=/dev/disk/by-id/wwn-0x55cd2e4123123127-part2 >> rootflags=subvol=debian-x86_64-phoronix >> remote_rootfs=internal-lkp-server:/osimage/debian/debian-x86_64-phoronix >> user=lkp >> job=/lkp/jobs/scheduled/lkp-nhm-2ep1/phoronix-test-suite-performance-true-glmark2-1.1.0-ucode=0x1d-debian-x86_64-phoronix-e44e907dd8f937313d35615d799d54162c56d173-20200616-56456-1kgmjzm-0.yaml >> ARCH=x86_64 kconfig=x86_64-rhel-7.6 >> branch=linux-devel/devel-hourly-2020051600 >> commit=e44e907dd8f937313d35615d799d54162c56d173 >> BOOT_IMAGE=/pkg/linux/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/vmlinuz-5.7.0-rc5-01428-ge44e907dd8f937 >> console=ttyS1,115200 console=tty0 max_uptime=3600 >> RESULT_ROOT=/result/phoronix-test-suite/performance-true-glmark2-1.1.0-ucode=0x1d/lkp-nhm-2ep1/debian-x86_64-phoronix/x86_64-rhel-7.6/gcc-7/e44e907dd8f937313d35615d799d54162c56d173/4 >> LKP_SERVER=inn nokaslr selinux=0 debug apic=debug sysrq_always_enabled >> rcupdate.rcu_cpu_stall_timeout=100 net.ifnames=0 printk.devkmsg=on >> panic=-1 softlockup_panic=1 nmi_watchdog=panic oops=panic load_ramdisk=2 >> prompt_ramdisk=0 drbd.minor_count=8 systemd.log_level=err >> ignore_loglevel console=tty0 earlyprintk=ttyS0,115200 >> console=ttyS0,115200 vga=normal rw >> Build Date: 05 March 2019 08:11:12PM >> xorg-server 2:1.20.4-1 (https://www.debian.org/support) >> Current version of pixman: 0.36.0 >> Before reporting problems, check http://wiki.x.org >> to make sure that you have the latest version. >> >>>> test: glmark2-1.1.0 >>>> cpufreq_governor: performance >>>> ucode: 0x1d >>>> >>>> test-description: The Phoronix Test Suite is the most comprehensive >>>> testing and benchmarking platform available that provides an >>>> extensible framework for which new tests can be easily added. >>>> test-url: http://www.phoronix-test-suite.com/ >>>> >>> Please remove the test description and url. They don't add any value. >>> >>> Mention which Mesa version is used as well as on what GPU. The output >>> of lspci and glxinfo will help here. >> Attached please find the outputs of lspci and glxinfo >> >>> For this particular test - there is no Mesa/upstream driver for this >>> GPU, so I imagine one of the swrast drivers was used. Which one - >>> swrast (classic, softpipe, llvmpipe, swr) or kms_swrast. >>> The output of `LD_DEBUG=libs glxinfo |& grep _dri.so` will help here. >> # LD_DEBUG=libs glxinfo |& grep _dri.so >> 2132: calling init: /usr/lib/i386-linux-gnu/dri/swrast_dri.so >> 2132: calling fini: /usr/lib/i386-linux-gnu/dri/swrast_dri.so [0] >> >> Best Regards, >> Rong Chen > Thanks for testing. If I send out a patch, could you try it? Yes, we can test the new patch if still needed. Best Regards, Rong Chen > > Best regards > Thomas > >>>> commit: >>>> bef2303526 ("drm/mgag200: Move mode-setting code into separate >>>> helper function") >>>> e44e907dd8 ("drm/mgag200: Split MISC register update into PLL >>>> selection, SYNC and I/O") >>>> >>> Actually the offending commit has a subtle change of behaviour - it >>> adds an extra MGAREG_MISC_RAMMAPEN. >>> That is not documented and I've failed to spot it during review. >>> >>> Thomas - shall we revert that line in itself or at least add an inline >>> comment why it is needed? >>> >>>> 100 >>>> +---------------------------------------------------------------------+ >>>> 90 |-+ + + +.+ + + + + + >>>> : | >>>> | : : : : : : : : : : >>>> : | >>>> 80 |-: : : : : : : : : : >>>> : | >>>> 70 |-:: : :: : : : :: :: : :: >>>> : | >>>> |: : : : : : : : : : : : : : : : : : >>>> : | >>>> 60 |:+: : : : : : : : : : : : : : : : : >>>> : | >>>> 50 |:+: : : : : : : : : : : : : : : : : >>>> : | >>>> 40 |:+ : : : : : : : : : : : : : : : : : >>>> : | >>>> |: : : : : : : : : : : : : : : : : : :O O >>>> O O O | >>>> 30 |:+ : : : : : : : : : : : : : : : : : >>>> : | >>>> 20 |-+ :: : : : : : :: : : :: : : O >>>> : | >>>> | : : : : : : : : : : : : >>>> : | >>>> 10 |-+ : : : : : : : : : : : : >>>> : | >>>> 0 >>>> +---------------------------------------------------------------------+ >>>> >>>> >>>> phoronix-test-suite.glmark2.1024x768.score >>>> >>>> 70 >>>> +----------------------------------------------------------------------+ >>>> | + + + +..+ + + + + + >>>> +.+ | >>>> 60 |-: : : : : : : : : : >>>> : | >>>> | : : : : : : : : : : >>>> : | >>>> 50 |-:: : :: : : :: : : :: :: >>>> : | >>>> |: : : : : : : : : : : : : : : : : : >>>> : | >>>> 40 |:+: : : : : : : : : : : : : : : : : >>>> : | >>>> |: : : : : : : : : : : : : : : : : : : >>>> O | >>>> 30 |:+ : : : : : : : : : : : : : : : : : :O >>>> O O O | >>>> |: : : : : : : : : : : : : : : : : : >>>> : | >>>> 20 |:+ : : : : : : : : : : : : : : : : : >>>> : | >>>> | :: : : : : : :: : : :: : : O >>>> :: | >>>> 10 |-+ : : : : : : : : : : : : >>>> : | >>>> | : : : O : O : : O : : : O : : : >>>> : | >>>> 0 >>>> +----------------------------------------------------------------------+ >>>> >>>> >>>> [*] bisect-good sample >>>> [O] bisect-bad sample >>>> >>> Hmm I must be going blind - there isn't even a single * in either of >>> the graphs. >>> Or perhaps my eyesight is fine and the legend or the graphs need fixing. >>> >>> HTH >>> -Emil _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [drm/mgag200] e44e907dd8: phoronix-test-suite.glmark2.800x600.score -64.9% regression 2020-06-15 20:58 ` Emil Velikov 2020-06-16 3:10 ` Rong Chen @ 2020-06-16 14:24 ` Thomas Zimmermann 1 sibling, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-06-16 14:24 UTC (permalink / raw) To: Emil Velikov, kernel test robot Cc: john.p.donnelly, ML dri-devel, lkp, OTC LSE PnP, Gerd Hoffmann, Dave Airlie, Sam Ravnborg, Emil Velikov [-- Attachment #1.1.1: Type: text/plain, Size: 5535 bytes --] Hi Am 15.06.20 um 22:58 schrieb Emil Velikov: > Hi all, > > On Thu, 4 Jun 2020 at 08:11, kernel test robot <rong.a.chen@intel.com> wrote: >> >> Greeting, >> >> FYI, we noticed a -64.9% regression of phoronix-test-suite.glmark2.800x600.score due to commit: >> > On one hand, I'm really happy to see performance testing happening > although this report is missing various crucial pieces of information. > >> commit: e44e907dd8f937313d35615d799d54162c56d173 ("[PATCH v3 05/15] drm/mgag200: Split MISC register update into PLL selection, SYNC and I/O") >> url: https://github.com/0day-ci/linux/commits/Thomas-Zimmermann/drm-mgag200-Convert-to-atomic-modesetting/20200515-163744 >> base: git://anongit.freedesktop.org/drm/drm-tip drm-tip >> >> in testcase: phoronix-test-suite >> on test machine: 16 threads Intel(R) Xeon(R) CPU X5570 @ 2.93GHz with 48G memory >> with following parameters: >> >> need_x: true > Replace "need_x" with the Xorg version as seen in `Xorg -version'. > >> test: glmark2-1.1.0 >> cpufreq_governor: performance >> ucode: 0x1d >> >> test-description: The Phoronix Test Suite is the most comprehensive testing and benchmarking platform available that provides an extensible framework for which new tests can be easily added. >> test-url: http://www.phoronix-test-suite.com/ >> > Please remove the test description and url. They don't add any value. > > Mention which Mesa version is used as well as on what GPU. The output > of lspci and glxinfo will help here. > > For this particular test - there is no Mesa/upstream driver for this > GPU, so I imagine one of the swrast drivers was used. Which one - > swrast (classic, softpipe, llvmpipe, swr) or kms_swrast. > The output of `LD_DEBUG=libs glxinfo |& grep _dri.so` will help here. > >> commit: >> bef2303526 ("drm/mgag200: Move mode-setting code into separate helper function") >> e44e907dd8 ("drm/mgag200: Split MISC register update into PLL selection, SYNC and I/O") >> > > Actually the offending commit has a subtle change of behaviour - it > adds an extra MGAREG_MISC_RAMMAPEN. > That is not documented and I've failed to spot it during review. > > Thomas - shall we revert that line in itself or at least add an inline > comment why it is needed? Oh, well spotted. I'll send out a patch to not set the bit. Hopefully this will resolve the problem. > >> >> 100 +---------------------------------------------------------------------+ >> 90 |-+ + + +.+ + + + + + : | >> | : : : : : : : : : : : | >> 80 |-: : : : : : : : : : : | >> 70 |-:: : :: : : : :: :: : :: : | >> |: : : : : : : : : : : : : : : : : : : | >> 60 |:+: : : : : : : : : : : : : : : : : : | >> 50 |:+: : : : : : : : : : : : : : : : : : | >> 40 |:+ : : : : : : : : : : : : : : : : : : | >> |: : : : : : : : : : : : : : : : : : :O O O O O | >> 30 |:+ : : : : : : : : : : : : : : : : : : | >> 20 |-+ :: : : : : : :: : : :: : : O : | >> | : : : : : : : : : : : : : | >> 10 |-+ : : : : : : : : : : : : : | >> 0 +---------------------------------------------------------------------+ >> >> >> phoronix-test-suite.glmark2.1024x768.score >> >> 70 +----------------------------------------------------------------------+ >> | + + + +..+ + + + + + +.+ | >> 60 |-: : : : : : : : : : : | >> | : : : : : : : : : : : | >> 50 |-:: : :: : : :: : : :: :: : | >> |: : : : : : : : : : : : : : : : : : : | >> 40 |:+: : : : : : : : : : : : : : : : : : | >> |: : : : : : : : : : : : : : : : : : : O | >> 30 |:+ : : : : : : : : : : : : : : : : : :O O O O | >> |: : : : : : : : : : : : : : : : : : : | >> 20 |:+ : : : : : : : : : : : : : : : : : : | >> | :: : : : : : :: : : :: : : O :: | >> 10 |-+ : : : : : : : : : : : : : | >> | : : : O : O : : O : : : O : : : : | >> 0 +----------------------------------------------------------------------+ >> >> >> [*] bisect-good sample >> [O] bisect-bad sample >> > Hmm I must be going blind - there isn't even a single * in either of the graphs. > Or perhaps my eyesight is fine and the legend or the graphs need fixing. I cannot make sense of these graphs. The axis' should have descriptive labels. Best regards Thomas > > HTH > -Emil > -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer [-- Attachment #1.2: OpenPGP digital signature --] [-- Type: application/pgp-signature, Size: 488 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 06/15] drm/mgag200: Update mode registers after plane registers 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann ` (4 preceding siblings ...) 2020-05-15 8:32 ` [PATCH v3 05/15] drm/mgag200: Split MISC register update into PLL selection, SYNC and I/O Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 07/15] drm/mgag200: Set pitch in a separate helper function Thomas Zimmermann ` (8 subsequent siblings) 14 siblings, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel Setting the plane registers first and the mode registers afterwards reproduces the sequence used by atomic helpers. Done in preparation of switching to simple KMS helpers. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/mgag200_mode.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 2007d7a4754ac..4dba0a379c263 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -1145,8 +1145,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, WREG_CRT(15, 0); WREG_CRT(19, pitch & 0xFF); - mgag200_set_mode_regs(mdev, mode); - ext_vga[0] = 0; /* TODO interlace */ @@ -1182,6 +1180,8 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, mga_crtc_do_set_base(mdev, fb, old_fb); + mgag200_set_mode_regs(mdev, mode); + /* reset tagfifo */ if (mdev->type == G200_ER) { u32 mem_ctl = RREG32(MGAREG_MEMCTL); -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 07/15] drm/mgag200: Set pitch in a separate helper function 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann ` (5 preceding siblings ...) 2020-05-15 8:32 ` [PATCH v3 06/15] drm/mgag200: Update mode registers after plane registers Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 08/15] drm/mgag200: Set primary plane's format in " Thomas Zimmermann ` (7 subsequent siblings) 14 siblings, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel The framebuffer's pitch is now set in mgag200_set_offset(). v2: * move offset and bpp-shift calculation into helper functions * use u8 instead of uint8_t * add MGAREG_CRTCEXT0_OFFSET_MASK Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/mgag200_mode.c | 57 +++++++++++++++++++------- drivers/gpu/drm/mgag200/mgag200_reg.h | 2 + 2 files changed, 45 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 4dba0a379c263..dee7838d7d368 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -1002,6 +1002,48 @@ static void mgag200_set_mode_regs(struct mga_device *mdev, mga_crtc_set_plls(mdev, mode->clock); } +static u8 mgag200_get_bpp_shift(struct mga_device *mdev, + const struct drm_format_info *format) +{ + return mdev->bpp_shifts[format->cpp[0] - 1]; +} + +/* + * Calculates the HW offset value from the framebuffer's pitch. The + * offset is a multiple of the pixel size and depends on the display + * format. + */ +static u32 mgag200_calculate_offset(struct mga_device *mdev, + const struct drm_framebuffer *fb) +{ + u32 offset = fb->pitches[0] / fb->format->cpp[0]; + u8 bppshift = mgag200_get_bpp_shift(mdev, fb->format); + + if (fb->format->cpp[0] * 8 == 24) + offset = (offset * 3) >> (4 - bppshift); + else + offset = offset >> (4 - bppshift); + + return offset; +} + +static void mgag200_set_offset(struct mga_device *mdev, + const struct drm_framebuffer *fb) +{ + u8 crtc13, crtcext0; + u32 offset = mgag200_calculate_offset(mdev, fb); + + RREG_ECRT(0, crtcext0); + + crtc13 = offset & 0xff; + + crtcext0 &= ~MGAREG_CRTCEXT0_OFFSET_MASK; + crtcext0 |= (offset >> 4) & MGAREG_CRTCEXT0_OFFSET_MASK; + + WREG_CRT(0x13, crtc13); + WREG_ECRT(0x00, crtcext0); +} + static int mga_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, @@ -1010,7 +1052,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, struct drm_device *dev = crtc->dev; struct mga_device *mdev = to_mga_device(dev); const struct drm_framebuffer *fb = crtc->primary->fb; - int pitch; int option = 0, option2 = 0; int i; unsigned char misc = 0; @@ -1121,12 +1162,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, WREG_SEQ(3, 0); WREG_SEQ(4, 0xe); - pitch = fb->pitches[0] / fb->format->cpp[0]; - if (fb->format->cpp[0] * 8 == 24) - pitch = (pitch * 3) >> (4 - bppshift); - else - pitch = pitch >> (4 - bppshift); - WREG_GFX(0, 0); WREG_GFX(1, 0); WREG_GFX(2, 0); @@ -1143,20 +1178,15 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, WREG_CRT(13, 0); WREG_CRT(14, 0); WREG_CRT(15, 0); - WREG_CRT(19, pitch & 0xFF); - - ext_vga[0] = 0; /* TODO interlace */ - ext_vga[0] |= (pitch & 0x300) >> 4; if (fb->format->cpp[0] * 8 == 24) ext_vga[3] = (((1 << bppshift) * 3) - 1) | 0x80; else ext_vga[3] = ((1 << bppshift) - 1) | 0x80; ext_vga[4] = 0; - WREG_ECRT(0, ext_vga[0]); WREG_ECRT(3, ext_vga[3]); WREG_ECRT(4, ext_vga[4]); @@ -1170,8 +1200,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, WREG_ECRT(6, 0); } - WREG_ECRT(0, ext_vga[0]); - misc = RREG8(MGA_MISC_IN); misc |= MGAREG_MISC_IOADSEL | MGAREG_MISC_RAMMAPEN | @@ -1179,6 +1207,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, WREG8(MGA_MISC_OUT, misc); mga_crtc_do_set_base(mdev, fb, old_fb); + mgag200_set_offset(mdev, fb); mgag200_set_mode_regs(mdev, mode); diff --git a/drivers/gpu/drm/mgag200/mgag200_reg.h b/drivers/gpu/drm/mgag200/mgag200_reg.h index 0ba6e15e97106..cd08dee29b06f 100644 --- a/drivers/gpu/drm/mgag200/mgag200_reg.h +++ b/drivers/gpu/drm/mgag200/mgag200_reg.h @@ -240,6 +240,8 @@ #define MGAREG_CRTCEXT_INDEX 0x1fde #define MGAREG_CRTCEXT_DATA 0x1fdf +#define MGAREG_CRTCEXT0_OFFSET_MASK GENMASK(5, 4) + /* Cursor X and Y position */ #define MGA_CURPOSXL 0x3c0c #define MGA_CURPOSXH 0x3c0d -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 08/15] drm/mgag200: Set primary plane's format in separate helper function 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann ` (6 preceding siblings ...) 2020-05-15 8:32 ` [PATCH v3 07/15] drm/mgag200: Set pitch in a separate helper function Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 09/15] drm/mgag200: Move TAGFIFO reset into separate function Thomas Zimmermann ` (6 subsequent siblings) 14 siblings, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel The primary plane's format registers are now updated in a mgag200_set_format_regs(). v2: * get bpp shift from helper function * replace uint8_t with u8 Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/mgag200_mode.c | 109 ++++++++++++++++--------- 1 file changed, 69 insertions(+), 40 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index dee7838d7d368..38556f57ad218 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -1044,6 +1044,68 @@ static void mgag200_set_offset(struct mga_device *mdev, WREG_ECRT(0x00, crtcext0); } +static void mgag200_set_format_regs(struct mga_device *mdev, + const struct drm_framebuffer *fb) +{ + struct drm_device *dev = mdev->dev; + const struct drm_format_info *format = fb->format; + unsigned int bpp, bppshift, scale; + u8 crtcext3, xmulctrl; + + bpp = format->cpp[0] * 8; + + bppshift = mgag200_get_bpp_shift(mdev, format); + switch (bpp) { + case 24: + scale = ((1 << bppshift) * 3) - 1; + break; + default: + scale = (1 << bppshift) - 1; + break; + } + + RREG_ECRT(3, crtcext3); + + switch (bpp) { + case 8: + xmulctrl = MGA1064_MUL_CTL_8bits; + break; + case 16: + if (format->depth == 15) + xmulctrl = MGA1064_MUL_CTL_15bits; + else + xmulctrl = MGA1064_MUL_CTL_16bits; + break; + case 24: + xmulctrl = MGA1064_MUL_CTL_24bits; + break; + case 32: + xmulctrl = MGA1064_MUL_CTL_32_24bits; + break; + default: + /* BUG: We should have caught this problem already. */ + drm_WARN_ON(dev, "invalid format depth\n"); + return; + } + + crtcext3 &= ~GENMASK(2, 0); + crtcext3 |= scale; + + WREG_DAC(MGA1064_MUL_CTL, xmulctrl); + + WREG_GFX(0, 0x00); + WREG_GFX(1, 0x00); + WREG_GFX(2, 0x00); + WREG_GFX(3, 0x00); + WREG_GFX(4, 0x00); + WREG_GFX(5, 0x40); + WREG_GFX(6, 0x05); + WREG_GFX(7, 0x0f); + WREG_GFX(8, 0x0f); + + WREG_ECRT(3, crtcext3); +} + static int mga_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, @@ -1055,8 +1117,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, int option = 0, option2 = 0; int i; unsigned char misc = 0; - unsigned char ext_vga[6]; - u8 bppshift; + u8 crtcext3, crtcext4; static unsigned char dacvalue[] = { /* 0x00: */ 0, 0, 0, 0, 0, 0, 0x00, 0, @@ -1071,8 +1132,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, /* 0x48: */ 0, 0, 0, 0, 0, 0, 0, 0 }; - bppshift = mdev->bpp_shifts[fb->format->cpp[0] - 1]; - switch (mdev->type) { case G200_SE_A: case G200_SE_B: @@ -1111,24 +1170,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, break; } - switch (fb->format->cpp[0] * 8) { - case 8: - dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_8bits; - break; - case 16: - if (fb->format->depth == 15) - dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_15bits; - else - dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_16bits; - break; - case 24: - dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_24bits; - break; - case 32: - dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_32_24bits; - break; - } - for (i = 0; i < sizeof(dacvalue); i++) { if ((i <= 0x17) || (i == 0x1b) || @@ -1162,16 +1203,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, WREG_SEQ(3, 0); WREG_SEQ(4, 0xe); - WREG_GFX(0, 0); - WREG_GFX(1, 0); - WREG_GFX(2, 0); - WREG_GFX(3, 0); - WREG_GFX(4, 0); - WREG_GFX(5, 0x40); - WREG_GFX(6, 0x5); - WREG_GFX(7, 0xf); - WREG_GFX(8, 0xf); - WREG_CRT(10, 0); WREG_CRT(11, 0); WREG_CRT(12, 0); @@ -1179,16 +1210,13 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, WREG_CRT(14, 0); WREG_CRT(15, 0); - /* TODO interlace */ + RREG_ECRT(0x03, crtcext3); - if (fb->format->cpp[0] * 8 == 24) - ext_vga[3] = (((1 << bppshift) * 3) - 1) | 0x80; - else - ext_vga[3] = ((1 << bppshift) - 1) | 0x80; - ext_vga[4] = 0; + crtcext3 |= BIT(7); /* enable MGA mode */ + crtcext4 = 0x00; - WREG_ECRT(3, ext_vga[3]); - WREG_ECRT(4, ext_vga[4]); + WREG_ECRT(0x03, crtcext3); + WREG_ECRT(0x04, crtcext4); if (mdev->type == G200_ER) WREG_ECRT(0x24, 0x5); @@ -1206,6 +1234,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, MGAREG_MISC_HIGH_PG_SEL; WREG8(MGA_MISC_OUT, misc); + mgag200_set_format_regs(mdev, fb); mga_crtc_do_set_base(mdev, fb, old_fb); mgag200_set_offset(mdev, fb); -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 09/15] drm/mgag200: Move TAGFIFO reset into separate function 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann ` (7 preceding siblings ...) 2020-05-15 8:32 ` [PATCH v3 08/15] drm/mgag200: Set primary plane's format in " Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 10/15] drm/mgag200: Move hiprilvl setting into separate functions Thomas Zimmermann ` (5 subsequent siblings) 14 siblings, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel The TAGFIFO state is now reset in mgag200_g200er_reset_tagfifo(). v2: * define MGAREG_SEQ1_SCROFF Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/mgag200_drv.h | 6 ++++ drivers/gpu/drm/mgag200/mgag200_mode.c | 45 +++++++++++++++++--------- drivers/gpu/drm/mgag200/mgag200_reg.h | 3 ++ 3 files changed, 38 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h b/drivers/gpu/drm/mgag200/mgag200_drv.h index 1963876ef3b8c..cf71a4ec84158 100644 --- a/drivers/gpu/drm/mgag200/mgag200_drv.h +++ b/drivers/gpu/drm/mgag200/mgag200_drv.h @@ -49,6 +49,12 @@ WREG8(ATTR_DATA, v); \ } while (0) \ +#define RREG_SEQ(reg, v) \ + do { \ + WREG8(MGAREG_SEQ_INDEX, reg); \ + v = RREG8(MGAREG_SEQ_DATA); \ + } while (0) \ + #define WREG_SEQ(reg, v) \ do { \ WREG8(MGAREG_SEQ_INDEX, reg); \ diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 38556f57ad218..68ae604926757 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -1106,6 +1106,33 @@ static void mgag200_set_format_regs(struct mga_device *mdev, WREG_ECRT(3, crtcext3); } +static void mgag200_g200er_reset_tagfifo(struct mga_device *mdev) +{ + static uint32_t RESET_FLAG = 0x00200000; /* undocumented magic value */ + u8 seq1; + u32 memctl; + + /* screen off */ + RREG_SEQ(0x01, seq1); + seq1 |= MGAREG_SEQ1_SCROFF; + WREG_SEQ(0x01, seq1); + + memctl = RREG32(MGAREG_MEMCTL); + + memctl |= RESET_FLAG; + WREG32(MGAREG_MEMCTL, memctl); + + udelay(1000); + + memctl &= ~RESET_FLAG; + WREG32(MGAREG_MEMCTL, memctl); + + /* screen on */ + RREG_SEQ(0x01, seq1); + seq1 &= ~MGAREG_SEQ1_SCROFF; + WREG_SEQ(0x01, seq1); +} + static int mga_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, @@ -1240,22 +1267,8 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, mgag200_set_mode_regs(mdev, mode); - /* reset tagfifo */ - if (mdev->type == G200_ER) { - u32 mem_ctl = RREG32(MGAREG_MEMCTL); - u8 seq1; - - /* screen off */ - WREG8(MGAREG_SEQ_INDEX, 0x01); - seq1 = RREG8(MGAREG_SEQ_DATA) | 0x20; - WREG8(MGAREG_SEQ_DATA, seq1); - - WREG32(MGAREG_MEMCTL, mem_ctl | 0x00200000); - udelay(1000); - WREG32(MGAREG_MEMCTL, mem_ctl & ~0x00200000); - - WREG8(MGAREG_SEQ_DATA, seq1 & ~0x20); - } + if (mdev->type == G200_ER) + mgag200_g200er_reset_tagfifo(mdev); if (IS_G200_SE(mdev)) { diff --git a/drivers/gpu/drm/mgag200/mgag200_reg.h b/drivers/gpu/drm/mgag200/mgag200_reg.h index cd08dee29b06f..29f7194faadc0 100644 --- a/drivers/gpu/drm/mgag200/mgag200_reg.h +++ b/drivers/gpu/drm/mgag200/mgag200_reg.h @@ -235,6 +235,9 @@ /* MMIO VGA registers */ #define MGAREG_SEQ_INDEX 0x1fc4 #define MGAREG_SEQ_DATA 0x1fc5 + +#define MGAREG_SEQ1_SCROFF BIT(5) + #define MGAREG_CRTC_INDEX 0x1fd4 #define MGAREG_CRTC_DATA 0x1fd5 #define MGAREG_CRTCEXT_INDEX 0x1fde -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 10/15] drm/mgag200: Move hiprilvl setting into separate functions 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann ` (8 preceding siblings ...) 2020-05-15 8:32 ` [PATCH v3 09/15] drm/mgag200: Move TAGFIFO reset into separate function Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 11/15] drm/mgag200: Move register initialization into separate function Thomas Zimmermann ` (4 subsequent siblings) 14 siblings, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel The hiprivlvl settings are now updated in mgag200_g200se_set_hiprilvl() and mgag200_g200ev_set_hiprilvl(). v2: * replace uint8_t with u8 Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/mgag200_mode.c | 98 ++++++++++++++------------ 1 file changed, 54 insertions(+), 44 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 68ae604926757..46122fa319889 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -1133,6 +1133,56 @@ static void mgag200_g200er_reset_tagfifo(struct mga_device *mdev) WREG_SEQ(0x01, seq1); } +static void mgag200_g200se_set_hiprilvl(struct mga_device *mdev, + const struct drm_display_mode *mode, + const struct drm_framebuffer *fb) +{ + unsigned int hiprilvl; + u8 crtcext6; + + if (mdev->unique_rev_id >= 0x04) { + hiprilvl = 0; + } else if (mdev->unique_rev_id >= 0x02) { + unsigned int bpp; + unsigned long mb; + + if (fb->format->cpp[0] * 8 > 16) + bpp = 32; + else if (fb->format->cpp[0] * 8 > 8) + bpp = 16; + else + bpp = 8; + + mb = (mode->clock * bpp) / 1000; + if (mb > 3100) + hiprilvl = 0; + else if (mb > 2600) + hiprilvl = 1; + else if (mb > 1900) + hiprilvl = 2; + else if (mb > 1160) + hiprilvl = 3; + else if (mb > 440) + hiprilvl = 4; + else + hiprilvl = 5; + + } else if (mdev->unique_rev_id >= 0x01) { + hiprilvl = 3; + } else { + hiprilvl = 4; + } + + crtcext6 = hiprilvl; /* implicitly sets maxhipri to 0 */ + + WREG_ECRT(0x06, crtcext6); +} + +static void mgag200_g200ev_set_hiprilvl(struct mga_device *mdev) +{ + WREG_ECRT(0x06, 0x00); +} + static int mga_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, @@ -1251,10 +1301,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, if (mdev->type == G200_EW3) WREG_ECRT(0x34, 0x5); - if (mdev->type == G200_EV) { - WREG_ECRT(6, 0); - } - misc = RREG8(MGA_MISC_IN); misc |= MGAREG_MISC_IOADSEL | MGAREG_MISC_RAMMAPEN | @@ -1270,47 +1316,11 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, if (mdev->type == G200_ER) mgag200_g200er_reset_tagfifo(mdev); + if (IS_G200_SE(mdev)) + mgag200_g200se_set_hiprilvl(mdev, mode, fb); + else if (mdev->type == G200_EV) + mgag200_g200ev_set_hiprilvl(mdev); - if (IS_G200_SE(mdev)) { - if (mdev->unique_rev_id >= 0x04) { - WREG8(MGAREG_CRTCEXT_INDEX, 0x06); - WREG8(MGAREG_CRTCEXT_DATA, 0); - } else if (mdev->unique_rev_id >= 0x02) { - u8 hi_pri_lvl; - u32 bpp; - u32 mb; - - if (fb->format->cpp[0] * 8 > 16) - bpp = 32; - else if (fb->format->cpp[0] * 8 > 8) - bpp = 16; - else - bpp = 8; - - mb = (mode->clock * bpp) / 1000; - if (mb > 3100) - hi_pri_lvl = 0; - else if (mb > 2600) - hi_pri_lvl = 1; - else if (mb > 1900) - hi_pri_lvl = 2; - else if (mb > 1160) - hi_pri_lvl = 3; - else if (mb > 440) - hi_pri_lvl = 4; - else - hi_pri_lvl = 5; - - WREG8(MGAREG_CRTCEXT_INDEX, 0x06); - WREG8(MGAREG_CRTCEXT_DATA, hi_pri_lvl); - } else { - WREG8(MGAREG_CRTCEXT_INDEX, 0x06); - if (mdev->unique_rev_id >= 0x01) - WREG8(MGAREG_CRTCEXT_DATA, 0x03); - else - WREG8(MGAREG_CRTCEXT_DATA, 0x04); - } - } return 0; } -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 11/15] drm/mgag200: Move register initialization into separate function 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann ` (9 preceding siblings ...) 2020-05-15 8:32 ` [PATCH v3 10/15] drm/mgag200: Move hiprilvl setting into separate functions Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 12/15] drm/mgag200: Remove out-commented suspend/resume helpers Thomas Zimmermann ` (3 subsequent siblings) 14 siblings, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel Registers are initialized with constants. This is now done in mgag200_init_regs(), mgag200_set_dac_regs() and mgag200_set_pci_regs(). Later patches should move these calls from mode setting to device initialization. v2: * replace uint8_t with u8 Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/mgag200_mode.c | 261 ++++++++++++++----------- 1 file changed, 147 insertions(+), 114 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 46122fa319889..199ae08976e16 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -919,6 +919,152 @@ static int mga_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, return mga_crtc_do_set_base(mdev, fb, old_fb); } +static void mgag200_set_pci_regs(struct mga_device *mdev) +{ + uint32_t option = 0, option2 = 0; + struct drm_device *dev = mdev->dev; + + switch (mdev->type) { + case G200_SE_A: + case G200_SE_B: + if (mdev->has_sdram) + option = 0x40049120; + else + option = 0x4004d120; + option2 = 0x00008000; + break; + case G200_WB: + case G200_EW3: + option = 0x41049120; + option2 = 0x0000b000; + break; + case G200_EV: + option = 0x00000120; + option2 = 0x0000b000; + break; + case G200_EH: + case G200_EH3: + option = 0x00000120; + option2 = 0x0000b000; + break; + case G200_ER: + break; + } + + if (option) + pci_write_config_dword(dev->pdev, PCI_MGA_OPTION, option); + + if (option2) + pci_write_config_dword(dev->pdev, PCI_MGA_OPTION2, option2); +} + +static void mgag200_set_dac_regs(struct mga_device *mdev) +{ + size_t i; + u8 dacvalue[] = { + /* 0x00: */ 0, 0, 0, 0, 0, 0, 0x00, 0, + /* 0x08: */ 0, 0, 0, 0, 0, 0, 0, 0, + /* 0x10: */ 0, 0, 0, 0, 0, 0, 0, 0, + /* 0x18: */ 0x00, 0, 0xC9, 0xFF, 0xBF, 0x20, 0x1F, 0x20, + /* 0x20: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0x28: */ 0x00, 0x00, 0x00, 0x00, 0, 0, 0, 0x40, + /* 0x30: */ 0x00, 0xB0, 0x00, 0xC2, 0x34, 0x14, 0x02, 0x83, + /* 0x38: */ 0x00, 0x93, 0x00, 0x77, 0x00, 0x00, 0x00, 0x3A, + /* 0x40: */ 0, 0, 0, 0, 0, 0, 0, 0, + /* 0x48: */ 0, 0, 0, 0, 0, 0, 0, 0 + }; + + switch (mdev->type) { + case G200_SE_A: + case G200_SE_B: + dacvalue[MGA1064_VREF_CTL] = 0x03; + dacvalue[MGA1064_PIX_CLK_CTL] = MGA1064_PIX_CLK_CTL_SEL_PLL; + dacvalue[MGA1064_MISC_CTL] = MGA1064_MISC_CTL_DAC_EN | + MGA1064_MISC_CTL_VGA8 | + MGA1064_MISC_CTL_DAC_RAM_CS; + break; + case G200_WB: + case G200_EW3: + dacvalue[MGA1064_VREF_CTL] = 0x07; + break; + case G200_EV: + dacvalue[MGA1064_PIX_CLK_CTL] = MGA1064_PIX_CLK_CTL_SEL_PLL; + dacvalue[MGA1064_MISC_CTL] = MGA1064_MISC_CTL_VGA8 | + MGA1064_MISC_CTL_DAC_RAM_CS; + break; + case G200_EH: + case G200_EH3: + dacvalue[MGA1064_MISC_CTL] = MGA1064_MISC_CTL_VGA8 | + MGA1064_MISC_CTL_DAC_RAM_CS; + break; + case G200_ER: + break; + } + + for (i = 0; i < ARRAY_SIZE(dacvalue); i++) { + if ((i <= 0x17) || + (i == 0x1b) || + (i == 0x1c) || + ((i >= 0x1f) && (i <= 0x29)) || + ((i >= 0x30) && (i <= 0x37))) + continue; + if (IS_G200_SE(mdev) && + ((i == 0x2c) || (i == 0x2d) || (i == 0x2e))) + continue; + if ((mdev->type == G200_EV || + mdev->type == G200_WB || + mdev->type == G200_EH || + mdev->type == G200_EW3 || + mdev->type == G200_EH3) && + (i >= 0x44) && (i <= 0x4e)) + continue; + + WREG_DAC(i, dacvalue[i]); + } + + if (mdev->type == G200_ER) + WREG_DAC(0x90, 0); +} + +static void mgag200_init_regs(struct mga_device *mdev) +{ + u8 crtcext3, crtcext4, misc; + + mgag200_set_pci_regs(mdev); + mgag200_set_dac_regs(mdev); + + WREG_SEQ(2, 0x0f); + WREG_SEQ(3, 0x00); + WREG_SEQ(4, 0x0e); + + WREG_CRT(10, 0); + WREG_CRT(11, 0); + WREG_CRT(12, 0); + WREG_CRT(13, 0); + WREG_CRT(14, 0); + WREG_CRT(15, 0); + + RREG_ECRT(0x03, crtcext3); + + crtcext3 |= BIT(7); /* enable MGA mode */ + crtcext4 = 0x00; + + WREG_ECRT(0x03, crtcext3); + WREG_ECRT(0x04, crtcext4); + + if (mdev->type == G200_ER) + WREG_ECRT(0x24, 0x5); + + if (mdev->type == G200_EW3) + WREG_ECRT(0x34, 0x5); + + misc = RREG8(MGA_MISC_IN); + misc |= MGAREG_MISC_IOADSEL | + MGAREG_MISC_RAMMAPEN | + MGAREG_MISC_HIGH_PG_SEL; + WREG8(MGA_MISC_OUT, misc); +} + static void mgag200_set_mode_regs(struct mga_device *mdev, const struct drm_display_mode *mode) { @@ -1191,121 +1337,8 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, struct drm_device *dev = crtc->dev; struct mga_device *mdev = to_mga_device(dev); const struct drm_framebuffer *fb = crtc->primary->fb; - int option = 0, option2 = 0; - int i; - unsigned char misc = 0; - u8 crtcext3, crtcext4; - - static unsigned char dacvalue[] = { - /* 0x00: */ 0, 0, 0, 0, 0, 0, 0x00, 0, - /* 0x08: */ 0, 0, 0, 0, 0, 0, 0, 0, - /* 0x10: */ 0, 0, 0, 0, 0, 0, 0, 0, - /* 0x18: */ 0x00, 0, 0xC9, 0xFF, 0xBF, 0x20, 0x1F, 0x20, - /* 0x20: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - /* 0x28: */ 0x00, 0x00, 0x00, 0x00, 0, 0, 0, 0x40, - /* 0x30: */ 0x00, 0xB0, 0x00, 0xC2, 0x34, 0x14, 0x02, 0x83, - /* 0x38: */ 0x00, 0x93, 0x00, 0x77, 0x00, 0x00, 0x00, 0x3A, - /* 0x40: */ 0, 0, 0, 0, 0, 0, 0, 0, - /* 0x48: */ 0, 0, 0, 0, 0, 0, 0, 0 - }; - switch (mdev->type) { - case G200_SE_A: - case G200_SE_B: - dacvalue[MGA1064_VREF_CTL] = 0x03; - dacvalue[MGA1064_PIX_CLK_CTL] = MGA1064_PIX_CLK_CTL_SEL_PLL; - dacvalue[MGA1064_MISC_CTL] = MGA1064_MISC_CTL_DAC_EN | - MGA1064_MISC_CTL_VGA8 | - MGA1064_MISC_CTL_DAC_RAM_CS; - if (mdev->has_sdram) - option = 0x40049120; - else - option = 0x4004d120; - option2 = 0x00008000; - break; - case G200_WB: - case G200_EW3: - dacvalue[MGA1064_VREF_CTL] = 0x07; - option = 0x41049120; - option2 = 0x0000b000; - break; - case G200_EV: - dacvalue[MGA1064_PIX_CLK_CTL] = MGA1064_PIX_CLK_CTL_SEL_PLL; - dacvalue[MGA1064_MISC_CTL] = MGA1064_MISC_CTL_VGA8 | - MGA1064_MISC_CTL_DAC_RAM_CS; - option = 0x00000120; - option2 = 0x0000b000; - break; - case G200_EH: - case G200_EH3: - dacvalue[MGA1064_MISC_CTL] = MGA1064_MISC_CTL_VGA8 | - MGA1064_MISC_CTL_DAC_RAM_CS; - option = 0x00000120; - option2 = 0x0000b000; - break; - case G200_ER: - break; - } - - for (i = 0; i < sizeof(dacvalue); i++) { - if ((i <= 0x17) || - (i == 0x1b) || - (i == 0x1c) || - ((i >= 0x1f) && (i <= 0x29)) || - ((i >= 0x30) && (i <= 0x37))) - continue; - if (IS_G200_SE(mdev) && - ((i == 0x2c) || (i == 0x2d) || (i == 0x2e))) - continue; - if ((mdev->type == G200_EV || - mdev->type == G200_WB || - mdev->type == G200_EH || - mdev->type == G200_EW3 || - mdev->type == G200_EH3) && - (i >= 0x44) && (i <= 0x4e)) - continue; - - WREG_DAC(i, dacvalue[i]); - } - - if (mdev->type == G200_ER) - WREG_DAC(0x90, 0); - - if (option) - pci_write_config_dword(dev->pdev, PCI_MGA_OPTION, option); - if (option2) - pci_write_config_dword(dev->pdev, PCI_MGA_OPTION2, option2); - - WREG_SEQ(2, 0xf); - WREG_SEQ(3, 0); - WREG_SEQ(4, 0xe); - - WREG_CRT(10, 0); - WREG_CRT(11, 0); - WREG_CRT(12, 0); - WREG_CRT(13, 0); - WREG_CRT(14, 0); - WREG_CRT(15, 0); - - RREG_ECRT(0x03, crtcext3); - - crtcext3 |= BIT(7); /* enable MGA mode */ - crtcext4 = 0x00; - - WREG_ECRT(0x03, crtcext3); - WREG_ECRT(0x04, crtcext4); - - if (mdev->type == G200_ER) - WREG_ECRT(0x24, 0x5); - - if (mdev->type == G200_EW3) - WREG_ECRT(0x34, 0x5); - - misc = RREG8(MGA_MISC_IN); - misc |= MGAREG_MISC_IOADSEL | - MGAREG_MISC_RAMMAPEN | - MGAREG_MISC_HIGH_PG_SEL; - WREG8(MGA_MISC_OUT, misc); + mgag200_init_regs(mdev); mgag200_set_format_regs(mdev, fb); mga_crtc_do_set_base(mdev, fb, old_fb); -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 12/15] drm/mgag200: Remove out-commented suspend/resume helpers 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann ` (10 preceding siblings ...) 2020-05-15 8:32 ` [PATCH v3 11/15] drm/mgag200: Move register initialization into separate function Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 13/15] drm/mgag200: Use simple-display data structures Thomas Zimmermann ` (2 subsequent siblings) 14 siblings, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel The suspend/resume helpers are unused. Also remove associated state from struct mga_device. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/mgag200_drv.h | 1 - drivers/gpu/drm/mgag200/mgag200_mode.c | 71 -------------------------- 2 files changed, 72 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h b/drivers/gpu/drm/mgag200/mgag200_drv.h index cf71a4ec84158..0cf498d1e900c 100644 --- a/drivers/gpu/drm/mgag200/mgag200_drv.h +++ b/drivers/gpu/drm/mgag200/mgag200_drv.h @@ -164,7 +164,6 @@ struct mga_device { size_t vram_fb_available; - bool suspended; enum mga_type type; int has_sdram; diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 199ae08976e16..d6f9763a4a450 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -1357,65 +1357,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, return 0; } -#if 0 /* code from mjg to attempt D3 on crtc dpms off - revisit later */ -static int mga_suspend(struct drm_crtc *crtc) -{ - struct mga_crtc *mga_crtc = to_mga_crtc(crtc); - struct drm_device *dev = crtc->dev; - struct mga_device *mdev = dev->dev_private; - struct pci_dev *pdev = dev->pdev; - int option; - - if (mdev->suspended) - return 0; - - WREG_SEQ(1, 0x20); - WREG_ECRT(1, 0x30); - /* Disable the pixel clock */ - WREG_DAC(0x1a, 0x05); - /* Power down the DAC */ - WREG_DAC(0x1e, 0x18); - /* Power down the pixel PLL */ - WREG_DAC(0x1a, 0x0d); - - /* Disable PLLs and clocks */ - pci_read_config_dword(pdev, PCI_MGA_OPTION, &option); - option &= ~(0x1F8024); - pci_write_config_dword(pdev, PCI_MGA_OPTION, option); - pci_set_power_state(pdev, PCI_D3hot); - pci_disable_device(pdev); - - mdev->suspended = true; - - return 0; -} - -static int mga_resume(struct drm_crtc *crtc) -{ - struct mga_crtc *mga_crtc = to_mga_crtc(crtc); - struct drm_device *dev = crtc->dev; - struct mga_device *mdev = dev->dev_private; - struct pci_dev *pdev = dev->pdev; - int option; - - if (!mdev->suspended) - return 0; - - pci_set_power_state(pdev, PCI_D0); - pci_enable_device(pdev); - - /* Disable sysclk */ - pci_read_config_dword(pdev, PCI_MGA_OPTION, &option); - option &= ~(0x4); - pci_write_config_dword(pdev, PCI_MGA_OPTION, option); - - mdev->suspended = false; - - return 0; -} - -#endif - static void mga_crtc_dpms(struct drm_crtc *crtc, int mode) { struct drm_device *dev = crtc->dev; @@ -1442,11 +1383,6 @@ static void mga_crtc_dpms(struct drm_crtc *crtc, int mode) break; } -#if 0 - if (mode == DRM_MODE_DPMS_OFF) { - mga_suspend(crtc); - } -#endif WREG8(MGAREG_SEQ_INDEX, 0x01); seq1 |= RREG8(MGAREG_SEQ_DATA) & ~0x20; mga_wait_vsync(mdev); @@ -1456,13 +1392,6 @@ static void mga_crtc_dpms(struct drm_crtc *crtc, int mode) WREG8(MGAREG_CRTCEXT_INDEX, 0x01); crtcext1 |= RREG8(MGAREG_CRTCEXT_DATA) & ~0x30; WREG8(MGAREG_CRTCEXT_DATA, crtcext1); - -#if 0 - if (mode == DRM_MODE_DPMS_ON && mdev->suspended == true) { - mga_resume(crtc); - drm_helper_resume_force_mode(dev); - } -#endif } /* -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 13/15] drm/mgag200: Use simple-display data structures 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann ` (11 preceding siblings ...) 2020-05-15 8:32 ` [PATCH v3 12/15] drm/mgag200: Remove out-commented suspend/resume helpers Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 14/15] drm/mgag200: Convert to simple KMS helper Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 15/15] drm/mgag200: Replace VRAM helpers with SHMEM helpers Thomas Zimmermann 14 siblings, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel The MGA CRTC data structure struct mga_crtc contains unused additional fields; so it can removed. The standard DRM CRTC and encoder structures are embedded now in struct drm_simple_display_pipe. Done in preparation of converting mgag200 to simple KMS helpers. v3: * remove now-unused define MGAG200FB_CONN_LIMIT * remove unused define MATROX_DPMS_CLEARED Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/mgag200_drv.h | 15 ++------------ drivers/gpu/drm/mgag200/mgag200_mode.c | 28 ++++++-------------------- 2 files changed, 8 insertions(+), 35 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h b/drivers/gpu/drm/mgag200/mgag200_drv.h index 0cf498d1e900c..d929ca3a767a3 100644 --- a/drivers/gpu/drm/mgag200/mgag200_drv.h +++ b/drivers/gpu/drm/mgag200/mgag200_drv.h @@ -19,6 +19,7 @@ #include <drm/drm_fb_helper.h> #include <drm/drm_gem.h> #include <drm/drm_gem_vram_helper.h> +#include <drm/drm_simple_kms_helper.h> #include "mgag200_reg.h" @@ -32,8 +33,6 @@ #define DRIVER_MINOR 0 #define DRIVER_PATCHLEVEL 0 -#define MGAG200FB_CONN_LIMIT 1 - #define RREG8(reg) ioread8(((void __iomem *)mdev->rmmio) + (reg)) #define WREG8(reg, v) iowrite8(v, ((void __iomem *)mdev->rmmio) + (reg)) #define RREG32(reg) ioread32(((void __iomem *)mdev->rmmio) + (reg)) @@ -103,18 +102,8 @@ #define MGAG200_MAX_FB_HEIGHT 4096 #define MGAG200_MAX_FB_WIDTH 4096 -#define MATROX_DPMS_CLEARED (-1) - -#define to_mga_crtc(x) container_of(x, struct mga_crtc, base) #define to_mga_connector(x) container_of(x, struct mga_connector, base) -struct mga_crtc { - struct drm_crtc base; - u8 lut_r[256], lut_g[256], lut_b[256]; - int last_dpms; - bool enabled; -}; - struct mga_i2c_chan { struct i2c_adapter adapter; struct drm_device *dev; @@ -175,7 +164,7 @@ struct mga_device { u32 unique_rev_id; struct mga_connector connector; - struct drm_encoder encoder; + struct drm_simple_display_pipe display_pipe; }; static inline struct mga_device *to_mga_device(struct drm_device *dev) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index d6f9763a4a450..00bbc1f9b7db3 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -1475,15 +1475,6 @@ static int mga_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, return 0; } -/* Simple cleanup function */ -static void mga_crtc_destroy(struct drm_crtc *crtc) -{ - struct mga_crtc *mga_crtc = to_mga_crtc(crtc); - - drm_crtc_cleanup(crtc); - kfree(mga_crtc); -} - static void mga_crtc_disable(struct drm_crtc *crtc) { DRM_DEBUG_KMS("\n"); @@ -1501,7 +1492,7 @@ static void mga_crtc_disable(struct drm_crtc *crtc) static const struct drm_crtc_funcs mga_crtc_funcs = { .gamma_set = mga_crtc_gamma_set, .set_config = drm_crtc_helper_set_config, - .destroy = mga_crtc_destroy, + .destroy = drm_crtc_cleanup, }; static const struct drm_crtc_helper_funcs mga_helper_funcs = { @@ -1517,20 +1508,13 @@ static const struct drm_crtc_helper_funcs mga_helper_funcs = { static void mga_crtc_init(struct mga_device *mdev) { struct drm_device *dev = mdev->dev; - struct mga_crtc *mga_crtc; - - mga_crtc = kzalloc(sizeof(struct mga_crtc) + - (MGAG200FB_CONN_LIMIT * sizeof(struct drm_connector *)), - GFP_KERNEL); - - if (mga_crtc == NULL) - return; + struct drm_crtc *crtc = &mdev->display_pipe.crtc; - drm_crtc_init(dev, &mga_crtc->base, &mga_crtc_funcs); + drm_crtc_init(dev, crtc, &mga_crtc_funcs); - drm_mode_crtc_set_gamma_size(&mga_crtc->base, MGAG200_LUT_SIZE); + drm_mode_crtc_set_gamma_size(crtc, MGAG200_LUT_SIZE); - drm_crtc_helper_add(&mga_crtc->base, &mga_helper_funcs); + drm_crtc_helper_add(crtc, &mga_helper_funcs); } /* @@ -1718,7 +1702,7 @@ static unsigned int mgag200_preferred_depth(struct mga_device *mdev) int mgag200_modeset_init(struct mga_device *mdev) { struct drm_device *dev = mdev->dev; - struct drm_encoder *encoder = &mdev->encoder; + struct drm_encoder *encoder = &mdev->display_pipe.encoder; struct drm_connector *connector = &mdev->connector.base; int ret; -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 14/15] drm/mgag200: Convert to simple KMS helper 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann ` (12 preceding siblings ...) 2020-05-15 8:32 ` [PATCH v3 13/15] drm/mgag200: Use simple-display data structures Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 15/15] drm/mgag200: Replace VRAM helpers with SHMEM helpers Thomas Zimmermann 14 siblings, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel The mgag200 supports a single pipeline with only a primary plane. It can be converted to simple KMS helpers. This also adds support for atomic modesetting. Wayland compositors, which use pageflip ioctls, can now be used with mgag200. v2: * prepare encoder and CRTC in a separate patch * remove suspend/resume code in a separate patch * don't call set_format_regs() in pipe_update() Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/mgag200_drv.c | 2 +- drivers/gpu/drm/mgag200/mgag200_mode.c | 314 +++++++++++++------------ 2 files changed, 164 insertions(+), 152 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c b/drivers/gpu/drm/mgag200/mgag200_drv.c index c2f0e4b40b052..a06ce4198adea 100644 --- a/drivers/gpu/drm/mgag200/mgag200_drv.c +++ b/drivers/gpu/drm/mgag200/mgag200_drv.c @@ -140,7 +140,7 @@ int mgag200_driver_dumb_create(struct drm_file *file, } static struct drm_driver driver = { - .driver_features = DRIVER_GEM | DRIVER_MODESET, + .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET, .fops = &mgag200_driver_fops, .name = DRIVER_NAME, .desc = DRIVER_DESC, diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 00bbc1f9b7db3..b50c1beb7b7b9 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -11,10 +11,13 @@ #include <linux/delay.h> #include <linux/pci.h> +#include <drm/drm_atomic_helper.h> +#include <drm/drm_atomic_state_helper.h> #include <drm/drm_crtc_helper.h> #include <drm/drm_fourcc.h> #include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_plane_helper.h> +#include <drm/drm_print.h> #include <drm/drm_probe_helper.h> #include <drm/drm_simple_kms_helper.h> @@ -30,13 +33,18 @@ static void mga_crtc_load_lut(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; struct mga_device *mdev = to_mga_device(dev); - struct drm_framebuffer *fb = crtc->primary->fb; + struct drm_framebuffer *fb; u16 *r_ptr, *g_ptr, *b_ptr; int i; if (!crtc->enabled) return; + if (!mdev->display_pipe.plane.state) + return; + + fb = mdev->display_pipe.plane.state->fb; + r_ptr = crtc->gamma_store; g_ptr = r_ptr + crtc->gamma_size; b_ptr = g_ptr + crtc->gamma_size; @@ -869,56 +877,6 @@ static void mgag200_set_startadd(struct mga_device *mdev, WREG_ECRT(0x00, crtcext0); } -static int mga_crtc_do_set_base(struct mga_device *mdev, - const struct drm_framebuffer *fb, - const struct drm_framebuffer *old_fb) -{ - struct drm_gem_vram_object *gbo; - int ret; - s64 gpu_addr; - - if (old_fb) { - gbo = drm_gem_vram_of_gem(old_fb->obj[0]); - drm_gem_vram_unpin(gbo); - } - - gbo = drm_gem_vram_of_gem(fb->obj[0]); - - ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM); - if (ret) - return ret; - gpu_addr = drm_gem_vram_offset(gbo); - if (gpu_addr < 0) { - ret = (int)gpu_addr; - goto err_drm_gem_vram_unpin; - } - - mgag200_set_startadd(mdev, (unsigned long)gpu_addr); - - return 0; - -err_drm_gem_vram_unpin: - drm_gem_vram_unpin(gbo); - return ret; -} - -static int mga_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, - struct drm_framebuffer *old_fb) -{ - struct drm_device *dev = crtc->dev; - struct mga_device *mdev = dev->dev_private; - struct drm_framebuffer *fb = crtc->primary->fb; - unsigned int count; - - do { } while (RREG8(0x1fda) & 0x08); - do { } while (!(RREG8(0x1fda) & 0x08)); - - count = RREG8(MGAREG_VCOUNT) + 2; - do { } while (RREG8(MGAREG_VCOUNT) < count); - - return mga_crtc_do_set_base(mdev, fb, old_fb); -} - static void mgag200_set_pci_regs(struct mga_device *mdev) { uint32_t option = 0, option2 = 0; @@ -1329,34 +1287,6 @@ static void mgag200_g200ev_set_hiprilvl(struct mga_device *mdev) WREG_ECRT(0x06, 0x00); } -static int mga_crtc_mode_set(struct drm_crtc *crtc, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode, - int x, int y, struct drm_framebuffer *old_fb) -{ - struct drm_device *dev = crtc->dev; - struct mga_device *mdev = to_mga_device(dev); - const struct drm_framebuffer *fb = crtc->primary->fb; - - mgag200_init_regs(mdev); - - mgag200_set_format_regs(mdev, fb); - mga_crtc_do_set_base(mdev, fb, old_fb); - mgag200_set_offset(mdev, fb); - - mgag200_set_mode_regs(mdev, mode); - - if (mdev->type == G200_ER) - mgag200_g200er_reset_tagfifo(mdev); - - if (IS_G200_SE(mdev)) - mgag200_g200se_set_hiprilvl(mdev, mode, fb); - else if (mdev->type == G200_EV) - mgag200_g200ev_set_hiprilvl(mdev); - - return 0; -} - static void mga_crtc_dpms(struct drm_crtc *crtc, int mode) { struct drm_device *dev = crtc->dev; @@ -1439,7 +1369,6 @@ static void mga_crtc_commit(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; struct mga_device *mdev = to_mga_device(dev); - const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; u8 tmp; if (mdev->type == G200_WB || mdev->type == G200_EW3) @@ -1458,63 +1387,7 @@ static void mga_crtc_commit(struct drm_crtc *crtc) WREG_SEQ(0x1, tmp); WREG_SEQ(0, 3); } - crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON); -} - -/* - * The core can pass us a set of gamma values to program. We actually only - * use this for 8-bit mode so can't perform smooth fades on deeper modes, - * but it's a requirement that we provide the function - */ -static int mga_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, - u16 *blue, uint32_t size, - struct drm_modeset_acquire_ctx *ctx) -{ - mga_crtc_load_lut(crtc); - - return 0; -} - -static void mga_crtc_disable(struct drm_crtc *crtc) -{ - DRM_DEBUG_KMS("\n"); - mga_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); - if (crtc->primary->fb) { - struct drm_framebuffer *fb = crtc->primary->fb; - struct drm_gem_vram_object *gbo = - drm_gem_vram_of_gem(fb->obj[0]); - drm_gem_vram_unpin(gbo); - } - crtc->primary->fb = NULL; -} - -/* These provide the minimum set of functions required to handle a CRTC */ -static const struct drm_crtc_funcs mga_crtc_funcs = { - .gamma_set = mga_crtc_gamma_set, - .set_config = drm_crtc_helper_set_config, - .destroy = drm_crtc_cleanup, -}; - -static const struct drm_crtc_helper_funcs mga_helper_funcs = { - .disable = mga_crtc_disable, - .dpms = mga_crtc_dpms, - .mode_set = mga_crtc_mode_set, - .mode_set_base = mga_crtc_mode_set_base, - .prepare = mga_crtc_prepare, - .commit = mga_crtc_commit, -}; - -/* CRTC setup */ -static void mga_crtc_init(struct mga_device *mdev) -{ - struct drm_device *dev = mdev->dev; - struct drm_crtc *crtc = &mdev->display_pipe.crtc; - - drm_crtc_init(dev, crtc, &mga_crtc_funcs); - - drm_mode_crtc_set_gamma_size(crtc, MGAG200_LUT_SIZE); - - drm_crtc_helper_add(crtc, &mga_helper_funcs); + mga_crtc_dpms(crtc, DRM_MODE_DPMS_ON); } /* @@ -1648,14 +1521,16 @@ static void mga_connector_destroy(struct drm_connector *connector) } static const struct drm_connector_helper_funcs mga_vga_connector_helper_funcs = { - .get_modes = mga_vga_get_modes, + .get_modes = mga_vga_get_modes, .mode_valid = mga_vga_mode_valid, }; static const struct drm_connector_funcs mga_vga_connector_funcs = { - .dpms = drm_helper_connector_dpms, - .fill_modes = drm_helper_probe_single_connector_modes, - .destroy = mga_connector_destroy, + .reset = drm_atomic_helper_connector_reset, + .fill_modes = drm_helper_probe_single_connector_modes, + .destroy = mga_connector_destroy, + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, }; static int mgag200_vga_connector_init(struct mga_device *mdev) @@ -1687,8 +1562,137 @@ static int mgag200_vga_connector_init(struct mga_device *mdev) return ret; } +/* + * Simple Display Pipe + */ + +static enum drm_mode_status +mgag200_simple_display_pipe_mode_valid(struct drm_simple_display_pipe *pipe, + const struct drm_display_mode *mode) +{ + return MODE_OK; +} + +static void +mgag200_simple_display_pipe_enable(struct drm_simple_display_pipe *pipe, + struct drm_crtc_state *crtc_state, + struct drm_plane_state *plane_state) +{ + struct drm_crtc *crtc = &pipe->crtc; + struct drm_device *dev = crtc->dev; + struct mga_device *mdev = to_mga_device(dev); + struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; + struct drm_framebuffer *fb = plane_state->fb; + struct drm_gem_vram_object *gbo; + s64 gpu_addr; + + gbo = drm_gem_vram_of_gem(fb->obj[0]); + + gpu_addr = drm_gem_vram_offset(gbo); + if (drm_WARN_ON_ONCE(dev, gpu_addr < 0)) + return; /* BUG: BO should have been pinned to VRAM. */ + + mga_crtc_prepare(crtc); + + mgag200_set_format_regs(mdev, fb); + mgag200_set_mode_regs(mdev, adjusted_mode); + + if (mdev->type == G200_ER) + mgag200_g200er_reset_tagfifo(mdev); + + if (IS_G200_SE(mdev)) + mgag200_g200se_set_hiprilvl(mdev, adjusted_mode, fb); + else if (mdev->type == G200_EV) + mgag200_g200ev_set_hiprilvl(mdev); + + mga_crtc_commit(crtc); +} + +static void +mgag200_simple_display_pipe_disable(struct drm_simple_display_pipe *pipe) +{ + struct drm_crtc *crtc = &pipe->crtc; + + mga_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); +} + +static int +mgag200_simple_display_pipe_check(struct drm_simple_display_pipe *pipe, + struct drm_plane_state *plane_state, + struct drm_crtc_state *crtc_state) +{ + struct drm_plane *plane = plane_state->plane; + struct drm_framebuffer *new_fb = plane_state->fb; + struct drm_framebuffer *fb = NULL; + + if (!new_fb) + return 0; + + if (plane->state) + fb = plane->state->fb; + + if (!fb || (fb->format != new_fb->format)) + crtc_state->mode_changed = true; /* update PLL settings */ + + return 0; +} + +static void +mgag200_simple_display_pipe_update(struct drm_simple_display_pipe *pipe, + struct drm_plane_state *old_state) +{ + struct drm_plane *plane = &pipe->plane; + struct drm_device *dev = plane->dev; + struct mga_device *mdev = to_mga_device(dev); + struct drm_plane_state *state = plane->state; + struct drm_framebuffer *fb = state->fb; + struct drm_gem_vram_object *gbo; + s64 gpu_addr; + + if (!fb) + return; + + gbo = drm_gem_vram_of_gem(fb->obj[0]); + + gpu_addr = drm_gem_vram_offset(gbo); + if (drm_WARN_ON_ONCE(dev, gpu_addr < 0)) + return; /* BUG: BO should have been pinned to VRAM. */ + + mgag200_set_startadd(mdev, (unsigned long)gpu_addr); + mgag200_set_offset(mdev, fb); +} + +static const struct drm_simple_display_pipe_funcs +mgag200_simple_display_pipe_funcs = { + .mode_valid = mgag200_simple_display_pipe_mode_valid, + .enable = mgag200_simple_display_pipe_enable, + .disable = mgag200_simple_display_pipe_disable, + .check = mgag200_simple_display_pipe_check, + .update = mgag200_simple_display_pipe_update, + .prepare_fb = drm_gem_vram_simple_display_pipe_prepare_fb, + .cleanup_fb = drm_gem_vram_simple_display_pipe_cleanup_fb, +}; + +static const uint32_t mgag200_simple_display_pipe_formats[] = { + DRM_FORMAT_XRGB8888, + DRM_FORMAT_RGB565, + DRM_FORMAT_RGB888, +}; + +static const uint64_t mgag200_simple_display_pipe_fmtmods[] = { + DRM_FORMAT_MOD_LINEAR, + DRM_FORMAT_MOD_INVALID +}; + +/* + * Mode config + */ + static const struct drm_mode_config_funcs mgag200_mode_config_funcs = { - .fb_create = drm_gem_fb_create + .fb_create = drm_gem_fb_create, + .mode_valid = drm_vram_helper_mode_valid, + .atomic_check = drm_atomic_helper_check, + .atomic_commit = drm_atomic_helper_commit, }; static unsigned int mgag200_preferred_depth(struct mga_device *mdev) @@ -1702,8 +1706,9 @@ static unsigned int mgag200_preferred_depth(struct mga_device *mdev) int mgag200_modeset_init(struct mga_device *mdev) { struct drm_device *dev = mdev->dev; - struct drm_encoder *encoder = &mdev->display_pipe.encoder; struct drm_connector *connector = &mdev->connector.base; + struct drm_simple_display_pipe *pipe = &mdev->display_pipe; + size_t format_count = ARRAY_SIZE(mgag200_simple_display_pipe_formats); int ret; mdev->bpp_shifts[0] = 0; @@ -1711,6 +1716,8 @@ int mgag200_modeset_init(struct mga_device *mdev) mdev->bpp_shifts[2] = 0; mdev->bpp_shifts[3] = 2; + mgag200_init_regs(mdev); + ret = drmm_mode_config_init(dev); if (ret) { drm_err(dev, "drmm_mode_config_init() failed, error %d\n", @@ -1728,26 +1735,31 @@ int mgag200_modeset_init(struct mga_device *mdev) dev->mode_config.funcs = &mgag200_mode_config_funcs; - mga_crtc_init(mdev); - - ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_DAC); + ret = mgag200_vga_connector_init(mdev); if (ret) { drm_err(dev, - "drm_simple_encoder_init() failed, error %d\n", + "mgag200_vga_connector_init() failed, error %d\n", ret); return ret; } - encoder->possible_crtcs = 0x1; - ret = mgag200_vga_connector_init(mdev); + ret = drm_simple_display_pipe_init(dev, pipe, + &mgag200_simple_display_pipe_funcs, + mgag200_simple_display_pipe_formats, + format_count, + mgag200_simple_display_pipe_fmtmods, + connector); if (ret) { drm_err(dev, - "mgag200_vga_connector_init() failed, error %d\n", + "drm_simple_display_pipe_init() failed, error %d\n", ret); return ret; } - drm_connector_attach_encoder(connector, encoder); + /* FIXME: legacy gamma tables; convert to CRTC state */ + drm_mode_crtc_set_gamma_size(&pipe->crtc, MGAG200_LUT_SIZE); + + drm_mode_config_reset(dev); return 0; } -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 15/15] drm/mgag200: Replace VRAM helpers with SHMEM helpers 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann ` (13 preceding siblings ...) 2020-05-15 8:32 ` [PATCH v3 14/15] drm/mgag200: Convert to simple KMS helper Thomas Zimmermann @ 2020-05-15 8:32 ` Thomas Zimmermann 14 siblings, 0 replies; 25+ messages in thread From: Thomas Zimmermann @ 2020-05-15 8:32 UTC (permalink / raw) To: airlied, daniel, kraxel, noralf, sam, emil.velikov, john.p.donnelly Cc: John Donnelly, Thomas Zimmermann, dri-devel The VRAM helpers managed the framebuffer memory for mgag200. This came with several problems, as some MGA device require the scanout address to be located at VRAM offset 0. It's incompatible with the page-flip semantics of DRM's atomic modesettting. With atomic modesetting, old and new framebuffers have to be located in VRAM at the same time. So at least one of them has to reside at a non-0 offset. This patch replaces VRAM helpers with SHMEM helpers. GEM SHMEM buffers reside in system memory, and are shadow-copied into VRAM during page flips. The shadow copy always starts at VRAM offset 0. v2: * revert dev->pdev changes Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: John Donnelly <John.p.donnelly@oracle.com> Acked-by: Emil Velikov <emil.velikov@collabora.com> --- drivers/gpu/drm/mgag200/Kconfig | 4 +- drivers/gpu/drm/mgag200/mgag200_drv.c | 49 +--------------------- drivers/gpu/drm/mgag200/mgag200_drv.h | 5 ++- drivers/gpu/drm/mgag200/mgag200_mode.c | 58 ++++++++++++++++---------- drivers/gpu/drm/mgag200/mgag200_ttm.c | 28 +++++++------ 5 files changed, 56 insertions(+), 88 deletions(-) diff --git a/drivers/gpu/drm/mgag200/Kconfig b/drivers/gpu/drm/mgag200/Kconfig index d60aa4b9ccd47..93be766715c9b 100644 --- a/drivers/gpu/drm/mgag200/Kconfig +++ b/drivers/gpu/drm/mgag200/Kconfig @@ -2,10 +2,8 @@ config DRM_MGAG200 tristate "Kernel modesetting driver for MGA G200 server engines" depends on DRM && PCI && MMU + select DRM_GEM_SHMEM_HELPER select DRM_KMS_HELPER - select DRM_VRAM_HELPER - select DRM_TTM - select DRM_TTM_HELPER help This is a KMS driver for the MGA G200 server chips, it does not support the original MGA G200 or any of the desktop diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c b/drivers/gpu/drm/mgag200/mgag200_drv.c index a06ce4198adea..00ddea7d7d270 100644 --- a/drivers/gpu/drm/mgag200/mgag200_drv.c +++ b/drivers/gpu/drm/mgag200/mgag200_drv.c @@ -22,15 +22,11 @@ * which then performs further device association and calls our graphics init * functions */ -int mgag200_modeset = -1; +int mgag200_modeset = -1; MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); module_param_named(modeset, mgag200_modeset, int, 0400); -int mgag200_hw_bug_no_startadd = -1; -MODULE_PARM_DESC(modeset, "HW does not interpret scanout-buffer start address correctly"); -module_param_named(hw_bug_no_startadd, mgag200_hw_bug_no_startadd, int, 0400); - static struct drm_driver driver; static const struct pci_device_id pciidlist[] = { @@ -101,44 +97,6 @@ static void mga_pci_remove(struct pci_dev *pdev) DEFINE_DRM_GEM_FOPS(mgag200_driver_fops); -static bool mgag200_pin_bo_at_0(const struct mga_device *mdev) -{ - if (mgag200_hw_bug_no_startadd > 0) { - DRM_WARN_ONCE("Option hw_bug_no_startradd is enabled. Please " - "report the output of 'lspci -vvnn' to " - "<dri-devel@lists.freedesktop.org> if this " - "option is required to make mgag200 work " - "correctly on your system.\n"); - return true; - } else if (!mgag200_hw_bug_no_startadd) { - return false; - } - return mdev->flags & MGAG200_FLAG_HW_BUG_NO_STARTADD; -} - -int mgag200_driver_dumb_create(struct drm_file *file, - struct drm_device *dev, - struct drm_mode_create_dumb *args) -{ - struct mga_device *mdev = to_mga_device(dev); - unsigned long pg_align; - - if (WARN_ONCE(!dev->vram_mm, "VRAM MM not initialized")) - return -EINVAL; - - pg_align = 0ul; - - /* - * Aligning scanout buffers to the size of the video ram forces - * placement at offset 0. Works around a bug where HW does not - * respect 'startadd' field. - */ - if (mgag200_pin_bo_at_0(mdev)) - pg_align = PFN_UP(mdev->mc.vram_size); - - return drm_gem_vram_fill_create_dumb(file, dev, pg_align, 0, args); -} - static struct drm_driver driver = { .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET, .fops = &mgag200_driver_fops, @@ -148,10 +106,7 @@ static struct drm_driver driver = { .major = DRIVER_MAJOR, .minor = DRIVER_MINOR, .patchlevel = DRIVER_PATCHLEVEL, - .debugfs_init = drm_vram_mm_debugfs_init, - .dumb_create = mgag200_driver_dumb_create, - .dumb_map_offset = drm_gem_vram_driver_dumb_mmap_offset, - .gem_prime_mmap = drm_gem_prime_mmap, + DRM_GEM_SHMEM_DRIVER_OPS, }; static struct pci_driver mgag200_pci_driver = { diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h b/drivers/gpu/drm/mgag200/mgag200_drv.h index d929ca3a767a3..47df62b1ad290 100644 --- a/drivers/gpu/drm/mgag200/mgag200_drv.h +++ b/drivers/gpu/drm/mgag200/mgag200_drv.h @@ -18,7 +18,7 @@ #include <drm/drm_encoder.h> #include <drm/drm_fb_helper.h> #include <drm/drm_gem.h> -#include <drm/drm_gem_vram_helper.h> +#include <drm/drm_gem_shmem_helper.h> #include <drm/drm_simple_kms_helper.h> #include "mgag200_reg.h" @@ -151,7 +151,8 @@ struct mga_device { struct mga_mc mc; - size_t vram_fb_available; + void __iomem *vram; + size_t vram_fb_available; enum mga_type type; int has_sdram; diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index b50c1beb7b7b9..0155d4eb5fa6b 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -14,6 +14,8 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_atomic_state_helper.h> #include <drm/drm_crtc_helper.h> +#include <drm/drm_damage_helper.h> +#include <drm/drm_format_helper.h> #include <drm/drm_fourcc.h> #include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_plane_helper.h> @@ -1573,6 +1575,26 @@ mgag200_simple_display_pipe_mode_valid(struct drm_simple_display_pipe *pipe, return MODE_OK; } +static void +mgag200_handle_damage(struct mga_device *mdev, struct drm_framebuffer *fb, + struct drm_rect *clip) +{ + struct drm_device *dev = mdev->dev; + void *vmap; + + vmap = drm_gem_shmem_vmap(fb->obj[0]); + if (drm_WARN_ON(dev, !vmap)) + return; /* BUG: SHMEM BO should always be vmapped */ + + drm_fb_memcpy_dstclip(mdev->vram, vmap, fb, clip); + + drm_gem_shmem_vunmap(fb->obj[0], vmap); + + /* Always scanout image at VRAM offset 0 */ + mgag200_set_startadd(mdev, (u32)0); + mgag200_set_offset(mdev, fb); +} + static void mgag200_simple_display_pipe_enable(struct drm_simple_display_pipe *pipe, struct drm_crtc_state *crtc_state, @@ -1583,14 +1605,12 @@ mgag200_simple_display_pipe_enable(struct drm_simple_display_pipe *pipe, struct mga_device *mdev = to_mga_device(dev); struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; struct drm_framebuffer *fb = plane_state->fb; - struct drm_gem_vram_object *gbo; - s64 gpu_addr; - - gbo = drm_gem_vram_of_gem(fb->obj[0]); - - gpu_addr = drm_gem_vram_offset(gbo); - if (drm_WARN_ON_ONCE(dev, gpu_addr < 0)) - return; /* BUG: BO should have been pinned to VRAM. */ + struct drm_rect fullscreen = { + .x1 = 0, + .x2 = fb->width, + .y1 = 0, + .y2 = fb->height, + }; mga_crtc_prepare(crtc); @@ -1606,6 +1626,8 @@ mgag200_simple_display_pipe_enable(struct drm_simple_display_pipe *pipe, mgag200_g200ev_set_hiprilvl(mdev); mga_crtc_commit(crtc); + + mgag200_handle_damage(mdev, fb, &fullscreen); } static void @@ -1646,20 +1668,13 @@ mgag200_simple_display_pipe_update(struct drm_simple_display_pipe *pipe, struct mga_device *mdev = to_mga_device(dev); struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; - struct drm_gem_vram_object *gbo; - s64 gpu_addr; + struct drm_rect damage; if (!fb) return; - gbo = drm_gem_vram_of_gem(fb->obj[0]); - - gpu_addr = drm_gem_vram_offset(gbo); - if (drm_WARN_ON_ONCE(dev, gpu_addr < 0)) - return; /* BUG: BO should have been pinned to VRAM. */ - - mgag200_set_startadd(mdev, (unsigned long)gpu_addr); - mgag200_set_offset(mdev, fb); + if (drm_atomic_helper_damage_merged(old_state, state, &damage)) + mgag200_handle_damage(mdev, fb, &damage); } static const struct drm_simple_display_pipe_funcs @@ -1669,8 +1684,7 @@ mgag200_simple_display_pipe_funcs = { .disable = mgag200_simple_display_pipe_disable, .check = mgag200_simple_display_pipe_check, .update = mgag200_simple_display_pipe_update, - .prepare_fb = drm_gem_vram_simple_display_pipe_prepare_fb, - .cleanup_fb = drm_gem_vram_simple_display_pipe_cleanup_fb, + .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb, }; static const uint32_t mgag200_simple_display_pipe_formats[] = { @@ -1689,8 +1703,7 @@ static const uint64_t mgag200_simple_display_pipe_fmtmods[] = { */ static const struct drm_mode_config_funcs mgag200_mode_config_funcs = { - .fb_create = drm_gem_fb_create, - .mode_valid = drm_vram_helper_mode_valid, + .fb_create = drm_gem_fb_create_with_dirty, .atomic_check = drm_atomic_helper_check, .atomic_commit = drm_atomic_helper_commit, }; @@ -1729,7 +1742,6 @@ int mgag200_modeset_init(struct mga_device *mdev) dev->mode_config.max_height = MGAG200_MAX_FB_HEIGHT; dev->mode_config.preferred_depth = mgag200_preferred_depth(mdev); - dev->mode_config.prefer_shadow = 1; dev->mode_config.fb_base = mdev->mc.vram_base; diff --git a/drivers/gpu/drm/mgag200/mgag200_ttm.c b/drivers/gpu/drm/mgag200/mgag200_ttm.c index e89657630ea71..a683642fe4682 100644 --- a/drivers/gpu/drm/mgag200/mgag200_ttm.c +++ b/drivers/gpu/drm/mgag200/mgag200_ttm.c @@ -32,17 +32,8 @@ int mgag200_mm_init(struct mga_device *mdev) { - struct drm_vram_mm *vmm; - int ret; struct drm_device *dev = mdev->dev; - - vmm = drm_vram_helper_alloc_mm(dev, pci_resource_start(dev->pdev, 0), - mdev->mc.vram_size); - if (IS_ERR(vmm)) { - ret = PTR_ERR(vmm); - DRM_ERROR("Error initializing VRAM MM; %d\n", ret); - return ret; - } + int ret; arch_io_reserve_memtype_wc(pci_resource_start(dev->pdev, 0), pci_resource_len(dev->pdev, 0)); @@ -50,9 +41,22 @@ int mgag200_mm_init(struct mga_device *mdev) mdev->fb_mtrr = arch_phys_wc_add(pci_resource_start(dev->pdev, 0), pci_resource_len(dev->pdev, 0)); + mdev->vram = ioremap(pci_resource_start(dev->pdev, 0), + pci_resource_len(dev->pdev, 0)); + if (!mdev->vram) { + ret = -ENOMEM; + goto err_arch_phys_wc_del; + } + mdev->vram_fb_available = mdev->mc.vram_size; return 0; + +err_arch_phys_wc_del: + arch_phys_wc_del(mdev->fb_mtrr); + arch_io_free_memtype_wc(pci_resource_start(dev->pdev, 0), + pci_resource_len(dev->pdev, 0)); + return ret; } void mgag200_mm_fini(struct mga_device *mdev) @@ -60,9 +64,7 @@ void mgag200_mm_fini(struct mga_device *mdev) struct drm_device *dev = mdev->dev; mdev->vram_fb_available = 0; - - drm_vram_helper_release_mm(dev); - + iounmap(mdev->vram); arch_io_free_memtype_wc(pci_resource_start(dev->pdev, 0), pci_resource_len(dev->pdev, 0)); arch_phys_wc_del(mdev->fb_mtrr); -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 25+ messages in thread
end of thread, other threads:[~2020-06-17 1:43 UTC | newest] Thread overview: 25+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-05-15 8:32 [PATCH v3 00/15] drm/mgag200: Convert to atomic modesetting Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 01/15] drm/mgag200: Remove HW cursor Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 02/15] drm/mgag200: Clean up mga_set_start_address() Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 03/15] drm/mgag200: Clean up mga_crtc_do_set_base() Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 04/15] drm/mgag200: Move mode-setting code into separate helper function Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 05/15] drm/mgag200: Split MISC register update into PLL selection, SYNC and I/O Thomas Zimmermann 2020-06-03 9:09 ` [drm/mgag200] e44e907dd8: phoronix-test-suite.glmark2.800x600.score -64.9% regression kernel test robot 2020-06-15 20:58 ` Emil Velikov 2020-06-16 3:10 ` Rong Chen 2020-06-16 3:29 ` [LKP] " Rong Chen 2020-06-16 13:49 ` Emil Velikov 2020-06-17 1:35 ` Rong Chen 2020-06-16 13:49 ` Thomas Zimmermann 2020-06-17 1:42 ` Rong Chen 2020-06-16 14:24 ` Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 06/15] drm/mgag200: Update mode registers after plane registers Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 07/15] drm/mgag200: Set pitch in a separate helper function Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 08/15] drm/mgag200: Set primary plane's format in " Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 09/15] drm/mgag200: Move TAGFIFO reset into separate function Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 10/15] drm/mgag200: Move hiprilvl setting into separate functions Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 11/15] drm/mgag200: Move register initialization into separate function Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 12/15] drm/mgag200: Remove out-commented suspend/resume helpers Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 13/15] drm/mgag200: Use simple-display data structures Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 14/15] drm/mgag200: Convert to simple KMS helper Thomas Zimmermann 2020-05-15 8:32 ` [PATCH v3 15/15] drm/mgag200: Replace VRAM helpers with SHMEM helpers Thomas Zimmermann
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