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From: Matthew Brost <matthew.brost@intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: tvrtko.ursulin@intel.com, intel-gfx@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org, jason.ekstrand@intel.com,
	daniele.ceraolospurio@intel.com, jon.bloomfield@intel.com,
	daniel.vetter@intel.com, john.c.harrison@intel.com
Subject: Re: [RFC PATCH 20/97] drm/i915/guc: Introduce unified HXG messages
Date: Tue, 11 May 2021 10:59:24 -0700	[thread overview]
Message-ID: <20210511175923.GA6986@sdutt-i7> (raw)
In-Reply-To: <YJqf1uKIyeHvSf+f@phenom.ffwll.local>

On Tue, May 11, 2021 at 05:16:38PM +0200, Daniel Vetter wrote:
> On Thu, May 06, 2021 at 12:13:34PM -0700, Matthew Brost wrote:
> > From: Michal Wajdeczko <michal.wajdeczko@intel.com>
> > 
> > New GuC firmware will unify format of MMIO and CTB H2G messages.
> > Introduce their definitions now to allow gradual transition of
> > our code to match new changes.
> > 
> > Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > Cc: Michał Winiarski <michal.winiarski@intel.com>
> > ---
> >  .../gpu/drm/i915/gt/uc/abi/guc_messages_abi.h | 226 ++++++++++++++++++
> >  1 file changed, 226 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h
> > index 775e21f3058c..1c264819aa03 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h
> > +++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h
> > @@ -6,6 +6,232 @@
> >  #ifndef _ABI_GUC_MESSAGES_ABI_H
> >  #define _ABI_GUC_MESSAGES_ABI_H
> >  
> > +/**
> > + * DOC: HXG Message
> 
> These aren't useful if we don't pull them in somewhere in the
> Documentation/gpu hierarchy. General comment, and also please check that
> it all renders correctly still.
>

Sure. Let me figure this out before my next rev.
 
> btw if you respin a patch not originally by you we generally add a (v1) to
> the original s-o-b line (or whever the version split was) and explain in
> the usual changelog in the commit message what was changed.
> 

Still new to this process. Will do.

Matt

> This holds for the entire series ofc.
> -Daniel
> 
> > + *
> > + * All messages exchanged with GuC are defined using 32 bit dwords.
> > + * First dword is treated as a message header. Remaining dwords are optional.
> > + *
> > + * .. _HXG Message:
> > + *
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  |   | Bits  | Description                                                  |
> > + *  +===+=======+==============================================================+
> > + *  |   |       |                                                              |
> > + *  | 0 |    31 | **ORIGIN** - originator of the message                       |
> > + *  |   |       |   - _`GUC_HXG_ORIGIN_HOST` = 0                               |
> > + *  |   |       |   - _`GUC_HXG_ORIGIN_GUC` = 1                                |
> > + *  |   |       |                                                              |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   | 30:28 | **TYPE** - message type                                      |
> > + *  |   |       |   - _`GUC_HXG_TYPE_REQUEST` = 0                              |
> > + *  |   |       |   - _`GUC_HXG_TYPE_EVENT` = 1                                |
> > + *  |   |       |   - _`GUC_HXG_TYPE_NO_RESPONSE_BUSY` = 3                     |
> > + *  |   |       |   - _`GUC_HXG_TYPE_NO_RESPONSE_RETRY` = 5                    |
> > + *  |   |       |   - _`GUC_HXG_TYPE_RESPONSE_FAILURE` = 6                     |
> > + *  |   |       |   - _`GUC_HXG_TYPE_RESPONSE_SUCCESS` = 7                     |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   |  27:0 | **AUX** - auxiliary data (depends TYPE)                      |
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  | 1 |  31:0 | optional payload (depends on TYPE)                           |
> > + *  +---+-------+                                                              |
> > + *  |...|       |                                                              |
> > + *  +---+-------+                                                              |
> > + *  | n |  31:0 |                                                              |
> > + *  +---+-------+--------------------------------------------------------------+
> > + */
> > +
> > +#define GUC_HXG_MSG_MIN_LEN			1u
> > +#define GUC_HXG_MSG_0_ORIGIN			(0x1 << 31)
> > +#define   GUC_HXG_ORIGIN_HOST			0u
> > +#define   GUC_HXG_ORIGIN_GUC			1u
> > +#define GUC_HXG_MSG_0_TYPE			(0x7 << 28)
> > +#define   GUC_HXG_TYPE_REQUEST			0u
> > +#define   GUC_HXG_TYPE_EVENT			1u
> > +#define   GUC_HXG_TYPE_NO_RESPONSE_BUSY		3u
> > +#define   GUC_HXG_TYPE_NO_RESPONSE_RETRY	5u
> > +#define   GUC_HXG_TYPE_RESPONSE_FAILURE		6u
> > +#define   GUC_HXG_TYPE_RESPONSE_SUCCESS		7u
> > +#define GUC_HXG_MSG_0_AUX			(0xfffffff << 0)
> > +
> > +/**
> > + * DOC: HXG Request
> > + *
> > + * The `HXG Request`_ message should be used to initiate synchronous activity
> > + * for which confirmation or return data is expected.
> > + *
> > + * The recipient of this message shall use `HXG Response`_, `HXG Failure`_
> > + * or `HXG Retry`_ message as a definite reply, and may use `HXG Busy`_
> > + * message as a intermediate reply.
> > + *
> > + * Format of @DATA0 and all @DATAn fields depends on the @ACTION code.
> > + *
> > + * _HXG Request:
> > + *
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  |   | Bits  | Description                                                  |
> > + *  +===+=======+==============================================================+
> > + *  | 0 |    31 | ORIGIN                                                       |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   | 30:28 | TYPE = GUC_HXG_TYPE_REQUEST_                                 |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   | 27:16 | **DATA0** - request data (depends on ACTION)                 |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   |  15:0 | **ACTION** - requested action code                           |
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  | 1 |  31:0 | **DATA1** - optional data (depends on ACTION)                |
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  |...|       |                                                              |
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  | n |  31:0 | **DATAn** - optional data (depends on ACTION)                |
> > + *  +---+-------+--------------------------------------------------------------+
> > + */
> > +
> > +#define GUC_HXG_REQUEST_MSG_MIN_LEN		GUC_HXG_MSG_MIN_LEN
> > +#define GUC_HXG_REQUEST_MSG_0_DATA0		(0xfff << 16)
> > +#define GUC_HXG_REQUEST_MSG_0_ACTION		(0xffff << 0)
> > +#define GUC_HXG_REQUEST_MSG_n_DATAn		(0xffffffff << 0)
> > +
> > +/**
> > + * DOC: HXG Event
> > + *
> > + * The `HXG Event`_ message should be used to initiate asynchronous activity
> > + * that does not involves immediate confirmation nor data.
> > + *
> > + * Format of @DATA0 and all @DATAn fields depends on the @ACTION code.
> > + *
> > + * .. _HXG Event:
> > + *
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  |   | Bits  | Description                                                  |
> > + *  +===+=======+==============================================================+
> > + *  | 0 |    31 | ORIGIN                                                       |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   | 30:28 | TYPE = GUC_HXG_TYPE_EVENT_                                   |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   | 27:16 | **DATA0** - event data (depends on ACTION)                   |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   |  15:0 | **ACTION** - event action code                               |
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  | 1 |  31:0 | **DATA1** - optional event data (depends on ACTION)          |
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  |...|       |                                                              |
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  | n |  31:0 | **DATAn** - optional event  data (depends on ACTION)         |
> > + *  +---+-------+--------------------------------------------------------------+
> > + */
> > +
> > +#define GUC_HXG_EVENT_MSG_MIN_LEN		GUC_HXG_MSG_MIN_LEN
> > +#define GUC_HXG_EVENT_MSG_0_DATA0		(0xfff << 16)
> > +#define GUC_HXG_EVENT_MSG_0_ACTION		(0xffff << 0)
> > +#define GUC_HXG_EVENT_MSG_n_DATAn		(0xffffffff << 0)
> > +
> > +/**
> > + * DOC: HXG Busy
> > + *
> > + * The `HXG Busy`_ message may be used to acknowledge reception of the `HXG Request`_
> > + * message if the recipient expects that it processing will be longer than default
> > + * timeout.
> > + *
> > + * The @COUNTER field may be used as a progress indicator.
> > + *
> > + * .. _HXG Busy:
> > + *
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  |   | Bits  | Description                                                  |
> > + *  +===+=======+==============================================================+
> > + *  | 0 |    31 | ORIGIN                                                       |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   | 30:28 | TYPE = GUC_HXG_TYPE_NO_RESPONSE_BUSY_                        |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   |  27:0 | **COUNTER** - progress indicator                             |
> > + *  +---+-------+--------------------------------------------------------------+
> > + */
> > +
> > +#define GUC_HXG_BUSY_MSG_LEN			GUC_HXG_MSG_MIN_LEN
> > +#define GUC_HXG_BUSY_MSG_0_COUNTER		GUC_HXG_MSG_0_AUX
> > +
> > +/**
> > + * DOC: HXG Retry
> > + *
> > + * The `HXG Retry`_ message should be used by recipient to indicate that the
> > + * `HXG Request`_ message was dropped and it should be resent again.
> > + *
> > + * The @REASON field may be used to provide additional information.
> > + *
> > + * .. _HXG Retry:
> > + *
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  |   | Bits  | Description                                                  |
> > + *  +===+=======+==============================================================+
> > + *  | 0 |    31 | ORIGIN                                                       |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   | 30:28 | TYPE = GUC_HXG_TYPE_NO_RESPONSE_RETRY_                       |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   |  27:0 | **REASON** - reason for retry                                |
> > + *  |   |       |  - _`GUC_HXG_RETRY_REASON_UNSPECIFIED` = 0                   |
> > + *  +---+-------+--------------------------------------------------------------+
> > + */
> > +
> > +#define GUC_HXG_RETRY_MSG_LEN			GUC_HXG_MSG_MIN_LEN
> > +#define GUC_HXG_RETRY_MSG_0_REASON		GUC_HXG_MSG_0_AUX
> > +#define   GUC_HXG_RETRY_REASON_UNSPECIFIED	0u
> > +
> > +/**
> > + * DOC: HXG Failure
> > + *
> > + * The `HXG Failure`_ message shall be used as a reply to the `HXG Request`_
> > + * message that could not be processed due to an error.
> > + *
> > + * .. _HXG Failure:
> > + *
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  |   | Bits  | Description                                                  |
> > + *  +===+=======+==============================================================+
> > + *  | 0 |    31 | ORIGIN                                                       |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   | 30:28 | TYPE = GUC_HXG_TYPE_RESPONSE_FAILURE_                        |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   | 27:16 | **HINT** - additional error hint                             |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   |  15:0 | **ERROR** - error/result code                                |
> > + *  +---+-------+--------------------------------------------------------------+
> > + */
> > +
> > +#define GUC_HXG_FAILURE_MSG_LEN			GUC_HXG_MSG_MIN_LEN
> > +#define GUC_HXG_FAILURE_MSG_0_HINT		(0xfff << 16)
> > +#define GUC_HXG_FAILURE_MSG_0_ERROR		(0xffff << 0)
> > +
> > +/**
> > + * DOC: HXG Response
> > + *
> > + * The `HXG Response`_ message SHALL be used as a reply to the `HXG Request`_
> > + * message that was successfully processed without an error.
> > + *
> > + * .. _HXG Response:
> > + *
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  |   | Bits  | Description                                                  |
> > + *  +===+=======+==============================================================+
> > + *  | 0 |    31 | ORIGIN                                                       |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   | 30:28 | TYPE = GUC_HXG_TYPE_RESPONSE_SUCCESS_                        |
> > + *  |   +-------+--------------------------------------------------------------+
> > + *  |   |  27:0 | **DATA0** - data (depends on ACTION from `HXG Request`_)     |
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  | 1 |  31:0 | **DATA1** - data (depends on ACTION from `HXG Request`_)     |
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  |...|       |                                                              |
> > + *  +---+-------+--------------------------------------------------------------+
> > + *  | n |  31:0 | **DATAn** - data (depends on ACTION from `HXG Request`_)     |
> > + *  +---+-------+--------------------------------------------------------------+
> > + */
> > +
> > +#define GUC_HXG_RESPONSE_MSG_MIN_LEN		GUC_HXG_MSG_MIN_LEN
> > +#define GUC_HXG_RESPONSE_MSG_0_DATA0		GUC_HXG_MSG_0_AUX
> > +#define GUC_HXG_RESPONSE_MSG_n_DATAn		(0xffffffff << 0)
> > +
> > +/* deprecated */
> >  #define INTEL_GUC_MSG_TYPE_SHIFT	28
> >  #define INTEL_GUC_MSG_TYPE_MASK		(0xF << INTEL_GUC_MSG_TYPE_SHIFT)
> >  #define INTEL_GUC_MSG_DATA_SHIFT	16
> > -- 
> > 2.28.0
> > 
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch

  reply	other threads:[~2021-05-11 18:06 UTC|newest]

Thread overview: 249+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-06 19:13 [RFC PATCH 00/97] Basic GuC submission support in the i915 Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 01/97] drm/i915/gt: Move engine setup out of set_default_submission Matthew Brost
2021-05-19  0:25   ` Matthew Brost
2021-05-25  8:44   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:13 ` [RFC PATCH 02/97] drm/i915/gt: Move submission_method into intel_gt Matthew Brost
2021-05-19  3:10   ` Matthew Brost
2021-05-25  8:44   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:13 ` [RFC PATCH 03/97] drm/i915/gt: Move CS interrupt handler to the backend Matthew Brost
2021-05-19  3:31   ` Matthew Brost
2021-05-25  8:45   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:13 ` [RFC PATCH 04/97] drm/i915/guc: skip disabling CTBs before sanitizing the GuC Matthew Brost
2021-05-20 16:47   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 05/97] drm/i915/guc: use probe_error log for CT enablement failure Matthew Brost
2021-05-24 10:30   ` Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 06/97] drm/i915/guc: enable only the user interrupt when using GuC submission Matthew Brost
2021-05-25  0:31   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 07/97] drm/i915/guc: Remove sample_forcewake h2g action Matthew Brost
2021-05-24 10:48   ` Michal Wajdeczko
2021-05-25  0:36   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 08/97] drm/i915/guc: Keep strict GuC ABI definitions Matthew Brost
2021-05-24 23:52   ` Michał Winiarski
2021-05-06 19:13 ` [RFC PATCH 09/97] drm/i915/guc: Stop using fence/status from CTB descriptor Matthew Brost
2021-05-25  2:38   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 10/97] drm/i915: Promote ptrdiff() to i915_utils.h Matthew Brost
2021-05-25  0:42   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 11/97] drm/i915/guc: Only rely on own CTB size Matthew Brost
2021-05-25  2:47   ` Matthew Brost
2021-05-25 12:48     ` [Intel-gfx] " Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 12/97] drm/i915/guc: Don't repeat CTB layout calculations Matthew Brost
2021-05-25  2:53   ` Matthew Brost
2021-05-25 13:07     ` Michal Wajdeczko
2021-05-25 16:56       ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 13/97] drm/i915/guc: Replace CTB array with explicit members Matthew Brost
2021-05-25  3:15   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 14/97] drm/i915/guc: Update sizes of CTB buffers Matthew Brost
2021-05-25  2:56   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 15/97] drm/i915/guc: Relax CTB response timeout Matthew Brost
2021-05-25 18:08   ` Matthew Brost
2021-05-25 19:37     ` [Intel-gfx] " Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 16/97] drm/i915/guc: Start protecting access to CTB descriptors Matthew Brost
2021-05-25  3:21   ` Matthew Brost
2021-05-25  3:21   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 17/97] drm/i915/guc: Stop using mutex while sending CTB messages Matthew Brost
2021-05-25 16:14   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 18/97] drm/i915/guc: Don't receive all G2H messages in irq handler Matthew Brost
2021-05-25 18:15   ` Matthew Brost
2021-05-25 19:43     ` [Intel-gfx] " Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 19/97] drm/i915/guc: Always copy CT message to new allocation Matthew Brost
2021-05-25 18:25   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 20/97] drm/i915/guc: Introduce unified HXG messages Matthew Brost
2021-05-11 15:16   ` Daniel Vetter
2021-05-11 17:59     ` Matthew Brost [this message]
2021-05-11 22:11     ` Michal Wajdeczko
2021-05-12  8:40       ` Daniel Vetter
2021-05-06 19:13 ` [RFC PATCH 21/97] drm/i915/guc: Update MMIO based communication Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 22/97] drm/i915/guc: Update CTB response status Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 23/97] drm/i915/guc: Support per context scheduling policies Matthew Brost
2021-05-25  1:15   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 24/97] drm/i915/guc: Add flag for mark broken CTB Matthew Brost
2021-05-27 19:44   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 25/97] drm/i915/guc: New definition of the CTB descriptor Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 26/97] drm/i915/guc: New definition of the CTB registration action Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 27/97] drm/i915/guc: New CTB based communication Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 28/97] drm/i915/guc: Kill guc_clients.ct_pool Matthew Brost
2021-05-25  1:01   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 29/97] drm/i915/guc: Update firmware to v60.1.2 Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 30/97] drm/i915/uc: turn on GuC/HuC auto mode by default Matthew Brost
2021-05-24 11:00   ` Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 31/97] drm/i915/guc: Early initialization of GuC send registers Matthew Brost
2021-05-26 20:28   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 32/97] drm/i915: Introduce i915_sched_engine object Matthew Brost
2021-05-11 15:18   ` Daniel Vetter
2021-05-11 17:56     ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 33/97] drm/i915: Engine relative MMIO Matthew Brost
2021-05-25  9:05   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:13 ` [RFC PATCH 34/97] drm/i915/guc: Use guc_class instead of engine_class in fw interface Matthew Brost
2021-05-26 20:41   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 35/97] drm/i915/guc: Improve error message for unsolicited CT response Matthew Brost
2021-05-24 11:59   ` Michal Wajdeczko
2021-05-25 17:32     ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 36/97] drm/i915/guc: Add non blocking CTB send function Matthew Brost
2021-05-24 12:21   ` Michal Wajdeczko
2021-05-25 17:30     ` Matthew Brost
2021-05-25  9:21   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-25 17:21     ` Matthew Brost
2021-05-26  8:57       ` Tvrtko Ursulin
2021-05-26 18:10         ` Matthew Brost
2021-05-27 10:02           ` Tvrtko Ursulin
2021-05-27 14:35             ` Matthew Brost
2021-05-27 15:11               ` Tvrtko Ursulin
2021-06-07 17:31                 ` Matthew Brost
2021-06-08  8:39                   ` Tvrtko Ursulin
2021-06-08  8:46                     ` Daniel Vetter
2021-06-09 23:10                       ` Matthew Brost
2021-06-10 15:27                         ` Daniel Vetter
2021-06-24 16:38                           ` Matthew Brost
2021-06-24 17:25                             ` Daniel Vetter
2021-06-09 13:58                     ` Michal Wajdeczko
2021-06-09 23:05                       ` Matthew Brost
2021-06-09 14:14                   ` Michal Wajdeczko
2021-06-09 23:13                     ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 37/97] drm/i915/guc: Add stall timer to " Matthew Brost
2021-05-24 12:58   ` Michal Wajdeczko
2021-05-24 18:35     ` Matthew Brost
2021-05-25 14:15       ` Michal Wajdeczko
2021-05-25 16:54         ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 38/97] drm/i915/guc: Optimize CTB writes and reads Matthew Brost
2021-05-24 13:31   ` Michal Wajdeczko
2021-05-25 17:39     ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 39/97] drm/i915/guc: Increase size of CTB buffers Matthew Brost
2021-05-24 13:43   ` [Intel-gfx] " Michal Wajdeczko
2021-05-24 18:40     ` Matthew Brost
2021-05-25  9:24   ` Tvrtko Ursulin
2021-05-25 17:15     ` Matthew Brost
2021-05-26  9:30       ` Tvrtko Ursulin
2021-05-26 18:20         ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 40/97] drm/i915/guc: Module load failure test for CT buffer creation Matthew Brost
2021-05-24 13:45   ` Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 41/97] drm/i915/guc: Add new GuC interface defines and structures Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 42/97] drm/i915/guc: Remove GuC stage descriptor, add lrc descriptor Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 43/97] drm/i915/guc: Add lrc descriptor context lookup array Matthew Brost
2021-05-11 15:26   ` Daniel Vetter
2021-05-11 17:01     ` Matthew Brost
2021-05-11 17:43       ` Daniel Vetter
2021-05-11 19:34         ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 44/97] drm/i915/guc: Implement GuC submission tasklet Matthew Brost
2021-05-25  9:43   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-25 17:10     ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 45/97] drm/i915/guc: Add bypass tasklet submission path to GuC Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 46/97] drm/i915/guc: Implement GuC context operations for new inteface Matthew Brost
2021-05-29 20:32   ` Michal Wajdeczko
2021-05-06 19:14 ` [RFC PATCH 47/97] drm/i915/guc: Insert fence on context when deregistering Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 48/97] drm/i915/guc: Defer context unpin until scheduling is disabled Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 49/97] drm/i915/guc: Disable engine barriers with GuC during unpin Matthew Brost
2021-05-11 15:37   ` Daniel Vetter
2021-05-11 16:31     ` Matthew Brost
2021-05-26 10:26   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:14 ` [RFC PATCH 50/97] drm/i915/guc: Extend deregistration fence to schedule disable Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 51/97] drm/i915: Disable preempt busywait when using GuC scheduling Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 52/97] drm/i915/guc: Ensure request ordering via completion fences Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 53/97] drm/i915/guc: Disable semaphores when using GuC scheduling Matthew Brost
2021-05-25  9:52   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-25 17:01     ` Matthew Brost
2021-05-26  9:25       ` Tvrtko Ursulin
2021-05-26 18:15         ` Matthew Brost
2021-05-27  8:41           ` Tvrtko Ursulin
2021-05-27 14:38             ` Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 54/97] drm/i915/guc: Ensure G2H response has space in buffer Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 55/97] drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC Matthew Brost
2021-05-25 10:06   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-25 17:07     ` Matthew Brost
2021-05-26  9:21       ` Tvrtko Ursulin
2021-05-26 18:18         ` Matthew Brost
2021-05-27  9:02           ` Tvrtko Ursulin
2021-05-27 14:37             ` Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 56/97] drm/i915/guc: Update GuC debugfs to support new GuC Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 57/97] drm/i915/guc: Add several request trace points Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 58/97] drm/i915: Add intel_context tracing Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 59/97] drm/i915/guc: GuC virtual engines Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 60/97] drm/i915: Track 'serial' counts for " Matthew Brost
2021-05-25 10:16   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-25 17:52     ` Matthew Brost
2021-05-26  8:40       ` Tvrtko Ursulin
2021-05-26 18:45         ` John Harrison
2021-05-27  8:53           ` Tvrtko Ursulin
2021-05-27 17:01             ` John Harrison
2021-06-01  9:31               ` Tvrtko Ursulin
2021-06-02  1:20                 ` John Harrison
2021-06-02 12:04                   ` Tvrtko Ursulin
2021-06-02 12:09   ` Tvrtko Ursulin
2021-05-06 19:14 ` [RFC PATCH 61/97] drm/i915: Hold reference to intel_context over life of i915_request Matthew Brost
2021-06-02 12:18   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:14 ` [RFC PATCH 62/97] drm/i915/guc: Disable bonding extension with GuC submission Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 63/97] drm/i915/guc: Direct all breadcrumbs for a class to single breadcrumbs Matthew Brost
2021-06-02 13:31   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:14 ` [RFC PATCH 64/97] drm/i915/guc: Reset implementation for new GuC interface Matthew Brost
2021-06-02 14:33   ` [Intel-gfx] " Tvrtko Ursulin
2021-06-04  3:17     ` Matthew Brost
2021-06-04  8:16       ` Daniel Vetter
2021-06-04 18:02         ` Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 65/97] drm/i915: Reset GPU immediately if submission is disabled Matthew Brost
2021-06-02 14:36   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:14 ` [RFC PATCH 66/97] drm/i915/guc: Add disable interrupts to guc sanitize Matthew Brost
2021-05-11  8:16   ` [drm/i915/guc] 07336fb545: WARNING:at_drivers/gpu/drm/i915/gt/uc/intel_uc.c:#__uc_sanitize[i915] kernel test robot
2021-05-06 19:14 ` [RFC PATCH 67/97] drm/i915/guc: Suspend/resume implementation for new interface Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 68/97] drm/i915/guc: Handle context reset notification Matthew Brost
2021-05-11 16:25   ` [Intel-gfx] " Daniel Vetter
2021-05-06 19:14 ` [RFC PATCH 69/97] drm/i915/guc: Handle engine reset failure notification Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 70/97] drm/i915/guc: Enable the timer expired interrupt for GuC Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 71/97] drm/i915/guc: Provide mmio list to be saved/restored on engine reset Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 72/97] drm/i915/guc: Don't complain about reset races Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 73/97] drm/i915/guc: Enable GuC engine reset Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 74/97] drm/i915/guc: Capture error state on context reset Matthew Brost
2021-05-11 16:28   ` [Intel-gfx] " Daniel Vetter
2021-05-11 17:12     ` Matthew Brost
2021-05-11 17:45       ` Daniel Vetter
2021-05-06 19:14 ` [RFC PATCH 75/97] drm/i915/guc: Fix for error capture after full GPU reset with GuC Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 76/97] drm/i915/guc: Hook GuC scheduling policies up Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 77/97] drm/i915/guc: Connect reset modparam updates to GuC policy flags Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 78/97] drm/i915/guc: Include scheduling policies in the debugfs state dump Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 79/97] drm/i915/guc: Don't call ring_is_idle in GuC submission Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 80/97] drm/i915/guc: Implement banned contexts for " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 81/97] drm/i915/guc: Allow flexible number of context ids Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 82/97] drm/i915/guc: Connect the number of guc_ids to debugfs Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 83/97] drm/i915/guc: Don't return -EAGAIN to user when guc_ids exhausted Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 84/97] drm/i915/guc: Don't allow requests not ready to consume all guc_ids Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 85/97] drm/i915/guc: Introduce guc_submit_engine object Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 86/97] drm/i915/guc: Add golden context to GuC ADS Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 87/97] drm/i915/guc: Implement GuC priority management Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 88/97] drm/i915/guc: Support request cancellation Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 89/97] drm/i915/guc: Check return of __xa_store when registering a context Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 90/97] drm/i915/guc: Non-static lrc descriptor registration buffer Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 91/97] drm/i915/guc: Take GT PM ref when deregistering context Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 92/97] drm/i915: Add GT PM delayed worker Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 93/97] drm/i915/guc: Take engine PM when a context is pinned with GuC submission Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 94/97] drm/i915/guc: Don't call switch_to_kernel_context " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 95/97] drm/i915/guc: Selftest for GuC flow control Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 96/97] drm/i915/guc: Update GuC documentation Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 97/97] drm/i915/guc: Unblock GuC submission on Gen11+ Matthew Brost
2021-05-09 17:12 ` [RFC PATCH 00/97] Basic GuC submission support in the i915 Martin Peres
2021-05-09 23:11   ` Jason Ekstrand
2021-05-10 13:55     ` Martin Peres
2021-05-10 16:25       ` Jason Ekstrand
2021-05-11  8:01         ` Martin Peres
2021-05-10 16:33       ` Daniel Vetter
2021-05-10 18:30         ` [Intel-gfx] " Francisco Jerez
2021-05-11  8:06         ` Martin Peres
2021-05-11 15:26           ` Bloomfield, Jon
2021-05-11 16:39             ` Matthew Brost
2021-05-12  6:26               ` Martin Peres
2021-05-14 16:31                 ` Jason Ekstrand
2021-05-25 15:37                   ` Alex Deucher
2021-05-11  2:58     ` Dixit, Ashutosh
2021-05-11  7:47       ` Martin Peres
2021-05-14 11:11 ` [Intel-gfx] " Tvrtko Ursulin
2021-05-14 16:36   ` Jason Ekstrand
2021-05-14 16:46     ` Matthew Brost
2021-05-14 16:41   ` Matthew Brost
2021-05-25 10:32 ` Tvrtko Ursulin
2021-05-25 16:45   ` Matthew Brost
2021-06-02 15:27     ` Tvrtko Ursulin
2021-06-02 18:57       ` Daniel Vetter
2021-06-03  3:41         ` Matthew Brost
2021-06-03  4:47           ` Daniel Vetter
2021-06-03  9:49             ` Tvrtko Ursulin
2021-06-03 10:52           ` Tvrtko Ursulin
2021-06-03  4:10       ` Matthew Brost
2021-06-03  8:51         ` Tvrtko Ursulin
2021-06-03 16:34           ` Matthew Brost

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