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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Matthew Brost <matthew.brost@intel.com>,
	intel-gfx@lists.freedesktop.org,
	 dri-devel@lists.freedesktop.org
Cc: jason.ekstrand@intel.com, daniel.vetter@intel.com
Subject: Re: [Intel-gfx] [RFC PATCH 65/97] drm/i915: Reset GPU immediately if submission is disabled
Date: Wed, 2 Jun 2021 15:36:01 +0100	[thread overview]
Message-ID: <5d1e1af4-c09f-e1f9-6b13-ee8730840c3e@linux.intel.com> (raw)
In-Reply-To: <20210506191451.77768-66-matthew.brost@intel.com>


On 06/05/2021 20:14, Matthew Brost wrote:
> If submission is disabled by the backend for any reason, reset the GPU
> immediately in the heartbeat code.

Okay that's what, but why is also often good to have in commit messages.

Regards,

Tvrtko

> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
>   .../gpu/drm/i915/gt/intel_engine_heartbeat.c  | 63 +++++++++++++++----
>   .../gpu/drm/i915/gt/intel_engine_heartbeat.h  |  4 ++
>   .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  9 +++
>   drivers/gpu/drm/i915/i915_scheduler.c         |  6 ++
>   drivers/gpu/drm/i915/i915_scheduler.h         |  6 ++
>   drivers/gpu/drm/i915/i915_scheduler_types.h   |  3 +
>   6 files changed, 78 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
> index b6a305e6a974..a8495364d906 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
> @@ -70,12 +70,30 @@ static void show_heartbeat(const struct i915_request *rq,
>   {
>   	struct drm_printer p = drm_debug_printer("heartbeat");
>   
> -	intel_engine_dump(engine, &p,
> -			  "%s heartbeat {seqno:%llx:%lld, prio:%d} not ticking\n",
> -			  engine->name,
> -			  rq->fence.context,
> -			  rq->fence.seqno,
> -			  rq->sched.attr.priority);
> +	if (!rq) {
> +		intel_engine_dump(engine, &p,
> +				  "%s heartbeat not ticking\n",
> +				  engine->name);
> +	} else {
> +		intel_engine_dump(engine, &p,
> +				  "%s heartbeat {seqno:%llx:%lld, prio:%d} not ticking\n",
> +				  engine->name,
> +				  rq->fence.context,
> +				  rq->fence.seqno,
> +				  rq->sched.attr.priority);
> +	}
> +}
> +
> +static void
> +reset_engine(struct intel_engine_cs *engine, struct i915_request *rq)
> +{
> +	if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
> +		show_heartbeat(rq, engine);
> +
> +	intel_gt_handle_error(engine->gt, engine->mask,
> +			      I915_ERROR_CAPTURE,
> +			      "stopped heartbeat on %s",
> +			      engine->name);
>   }
>   
>   static void heartbeat(struct work_struct *wrk)
> @@ -102,6 +120,11 @@ static void heartbeat(struct work_struct *wrk)
>   	if (intel_gt_is_wedged(engine->gt))
>   		goto out;
>   
> +	if (i915_sched_engine_disabled(engine->sched_engine)) {
> +		reset_engine(engine, engine->heartbeat.systole);
> +		goto out;
> +	}
> +
>   	if (engine->heartbeat.systole) {
>   		long delay = READ_ONCE(engine->props.heartbeat_interval_ms);
>   
> @@ -139,13 +162,7 @@ static void heartbeat(struct work_struct *wrk)
>   			engine->sched_engine->schedule(rq, &attr);
>   			local_bh_enable();
>   		} else {
> -			if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
> -				show_heartbeat(rq, engine);
> -
> -			intel_gt_handle_error(engine->gt, engine->mask,
> -					      I915_ERROR_CAPTURE,
> -					      "stopped heartbeat on %s",
> -					      engine->name);
> +			reset_engine(engine, rq);
>   		}
>   
>   		rq->emitted_jiffies = jiffies;
> @@ -194,6 +211,26 @@ void intel_engine_park_heartbeat(struct intel_engine_cs *engine)
>   		i915_request_put(fetch_and_zero(&engine->heartbeat.systole));
>   }
>   
> +void intel_gt_unpark_heartbeats(struct intel_gt *gt)
> +{
> +	struct intel_engine_cs *engine;
> +	enum intel_engine_id id;
> +
> +	for_each_engine(engine, gt, id)
> +		if (intel_engine_pm_is_awake(engine))
> +			intel_engine_unpark_heartbeat(engine);
> +
> +}
> +
> +void intel_gt_park_heartbeats(struct intel_gt *gt)
> +{
> +	struct intel_engine_cs *engine;
> +	enum intel_engine_id id;
> +
> +	for_each_engine(engine, gt, id)
> +		intel_engine_park_heartbeat(engine);
> +}
> +
>   void intel_engine_init_heartbeat(struct intel_engine_cs *engine)
>   {
>   	INIT_DELAYED_WORK(&engine->heartbeat.work, heartbeat);
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.h b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.h
> index a488ea3e84a3..5da6d809a87a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.h
> @@ -7,6 +7,7 @@
>   #define INTEL_ENGINE_HEARTBEAT_H
>   
>   struct intel_engine_cs;
> +struct intel_gt;
>   
>   void intel_engine_init_heartbeat(struct intel_engine_cs *engine);
>   
> @@ -16,6 +17,9 @@ int intel_engine_set_heartbeat(struct intel_engine_cs *engine,
>   void intel_engine_park_heartbeat(struct intel_engine_cs *engine);
>   void intel_engine_unpark_heartbeat(struct intel_engine_cs *engine);
>   
> +void intel_gt_park_heartbeats(struct intel_gt *gt);
> +void intel_gt_unpark_heartbeats(struct intel_gt *gt);
> +
>   int intel_engine_pulse(struct intel_engine_cs *engine);
>   int intel_engine_flush_barriers(struct intel_engine_cs *engine);
>   
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index 8c093bc2d3a4..a5997d6b4aa4 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -10,6 +10,7 @@
>   #include "gt/intel_breadcrumbs.h"
>   #include "gt/intel_context.h"
>   #include "gt/intel_engine_pm.h"
> +#include "gt/intel_engine_heartbeat.h"
>   #include "gt/intel_gt.h"
>   #include "gt/intel_gt_irq.h"
>   #include "gt/intel_gt_pm.h"
> @@ -604,6 +605,7 @@ void intel_guc_submission_reset_prepare(struct intel_guc *guc)
>   		/* Reset called during driver load? GuC not yet initialised! */
>   		return;
>   
> +	intel_gt_park_heartbeats(guc_to_gt(guc));
>   	disable_submission(guc);
>   	guc->interrupts.disable(guc);
>   
> @@ -889,6 +891,7 @@ void intel_guc_submission_reset_finish(struct intel_guc *guc)
>   	atomic_set(&guc->outstanding_submission_g2h, 0);
>   
>   	enable_submission(guc);
> +	intel_gt_unpark_heartbeats(guc_to_gt(guc));
>   }
>   
>   /*
> @@ -1856,6 +1859,11 @@ static int guc_resume(struct intel_engine_cs *engine)
>   	return 0;
>   }
>   
> +static bool guc_sched_engine_disabled(struct i915_sched_engine *sched_engine)
> +{
> +	return !sched_engine->tasklet.callback;
> +}
> +
>   static void guc_set_default_submission(struct intel_engine_cs *engine)
>   {
>   	engine->submit_request = guc_submit_request;
> @@ -2006,6 +2014,7 @@ int intel_guc_submission_setup(struct intel_engine_cs *engine)
>   			return -ENOMEM;
>   
>   		guc->sched_engine->schedule = i915_schedule;
> +		guc->sched_engine->disabled = guc_sched_engine_disabled;
>   		guc->sched_engine->engine = engine;
>   		tasklet_setup(&guc->sched_engine->tasklet,
>   			      guc_submission_tasklet);
> diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c
> index 28d403a8d7d2..72a9bee3026f 100644
> --- a/drivers/gpu/drm/i915/i915_scheduler.c
> +++ b/drivers/gpu/drm/i915/i915_scheduler.c
> @@ -440,6 +440,11 @@ void i915_sched_engine_free(struct kref *kref)
>   	kfree(sched_engine);
>   }
>   
> +static bool default_disabled(struct i915_sched_engine *sched_engine)
> +{
> +	return false;
> +}
> +
>   struct i915_sched_engine *
>   i915_sched_engine_create(unsigned int subclass)
>   {
> @@ -453,6 +458,7 @@ i915_sched_engine_create(unsigned int subclass)
>   
>   	sched_engine->queue = RB_ROOT_CACHED;
>   	sched_engine->queue_priority_hint = INT_MIN;
> +	sched_engine->disabled = default_disabled;
>   
>   	INIT_LIST_HEAD(&sched_engine->requests);
>   	INIT_LIST_HEAD(&sched_engine->hold);
> diff --git a/drivers/gpu/drm/i915/i915_scheduler.h b/drivers/gpu/drm/i915/i915_scheduler.h
> index a78b1f50ecb4..ec8dfa87cbb6 100644
> --- a/drivers/gpu/drm/i915/i915_scheduler.h
> +++ b/drivers/gpu/drm/i915/i915_scheduler.h
> @@ -116,4 +116,10 @@ sched_engine_active_unlock_bh(struct i915_sched_engine *sched_engine)
>   	local_bh_enable(); /* restore softirq, and kick ksoftirqd! */
>   }
>   
> +static inline bool
> +i915_sched_engine_disabled(struct i915_sched_engine *sched_engine)
> +{
> +	return sched_engine->disabled(sched_engine);
> +}
> +
>   #endif /* _I915_SCHEDULER_H_ */
> diff --git a/drivers/gpu/drm/i915/i915_scheduler_types.h b/drivers/gpu/drm/i915/i915_scheduler_types.h
> index 90b389ba661b..a7183792d110 100644
> --- a/drivers/gpu/drm/i915/i915_scheduler_types.h
> +++ b/drivers/gpu/drm/i915/i915_scheduler_types.h
> @@ -141,6 +141,9 @@ struct i915_sched_engine {
>   	/* Back pointer to engine */
>   	struct intel_engine_cs *engine;
>   
> +	/* Schedule engine is disabled by backend */
> +	bool	(*disabled)(struct i915_sched_engine *sched_engine);
> +
>   	/* Kick backend */
>   	void	(*kick_backend)(const struct i915_request *rq,
>   				int prio);
> 

  reply	other threads:[~2021-06-02 14:36 UTC|newest]

Thread overview: 249+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-06 19:13 [RFC PATCH 00/97] Basic GuC submission support in the i915 Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 01/97] drm/i915/gt: Move engine setup out of set_default_submission Matthew Brost
2021-05-19  0:25   ` Matthew Brost
2021-05-25  8:44   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:13 ` [RFC PATCH 02/97] drm/i915/gt: Move submission_method into intel_gt Matthew Brost
2021-05-19  3:10   ` Matthew Brost
2021-05-25  8:44   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:13 ` [RFC PATCH 03/97] drm/i915/gt: Move CS interrupt handler to the backend Matthew Brost
2021-05-19  3:31   ` Matthew Brost
2021-05-25  8:45   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:13 ` [RFC PATCH 04/97] drm/i915/guc: skip disabling CTBs before sanitizing the GuC Matthew Brost
2021-05-20 16:47   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 05/97] drm/i915/guc: use probe_error log for CT enablement failure Matthew Brost
2021-05-24 10:30   ` Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 06/97] drm/i915/guc: enable only the user interrupt when using GuC submission Matthew Brost
2021-05-25  0:31   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 07/97] drm/i915/guc: Remove sample_forcewake h2g action Matthew Brost
2021-05-24 10:48   ` Michal Wajdeczko
2021-05-25  0:36   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 08/97] drm/i915/guc: Keep strict GuC ABI definitions Matthew Brost
2021-05-24 23:52   ` Michał Winiarski
2021-05-06 19:13 ` [RFC PATCH 09/97] drm/i915/guc: Stop using fence/status from CTB descriptor Matthew Brost
2021-05-25  2:38   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 10/97] drm/i915: Promote ptrdiff() to i915_utils.h Matthew Brost
2021-05-25  0:42   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 11/97] drm/i915/guc: Only rely on own CTB size Matthew Brost
2021-05-25  2:47   ` Matthew Brost
2021-05-25 12:48     ` [Intel-gfx] " Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 12/97] drm/i915/guc: Don't repeat CTB layout calculations Matthew Brost
2021-05-25  2:53   ` Matthew Brost
2021-05-25 13:07     ` Michal Wajdeczko
2021-05-25 16:56       ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 13/97] drm/i915/guc: Replace CTB array with explicit members Matthew Brost
2021-05-25  3:15   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 14/97] drm/i915/guc: Update sizes of CTB buffers Matthew Brost
2021-05-25  2:56   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 15/97] drm/i915/guc: Relax CTB response timeout Matthew Brost
2021-05-25 18:08   ` Matthew Brost
2021-05-25 19:37     ` [Intel-gfx] " Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 16/97] drm/i915/guc: Start protecting access to CTB descriptors Matthew Brost
2021-05-25  3:21   ` Matthew Brost
2021-05-25  3:21   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 17/97] drm/i915/guc: Stop using mutex while sending CTB messages Matthew Brost
2021-05-25 16:14   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 18/97] drm/i915/guc: Don't receive all G2H messages in irq handler Matthew Brost
2021-05-25 18:15   ` Matthew Brost
2021-05-25 19:43     ` [Intel-gfx] " Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 19/97] drm/i915/guc: Always copy CT message to new allocation Matthew Brost
2021-05-25 18:25   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 20/97] drm/i915/guc: Introduce unified HXG messages Matthew Brost
2021-05-11 15:16   ` Daniel Vetter
2021-05-11 17:59     ` Matthew Brost
2021-05-11 22:11     ` Michal Wajdeczko
2021-05-12  8:40       ` Daniel Vetter
2021-05-06 19:13 ` [RFC PATCH 21/97] drm/i915/guc: Update MMIO based communication Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 22/97] drm/i915/guc: Update CTB response status Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 23/97] drm/i915/guc: Support per context scheduling policies Matthew Brost
2021-05-25  1:15   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 24/97] drm/i915/guc: Add flag for mark broken CTB Matthew Brost
2021-05-27 19:44   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 25/97] drm/i915/guc: New definition of the CTB descriptor Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 26/97] drm/i915/guc: New definition of the CTB registration action Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 27/97] drm/i915/guc: New CTB based communication Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 28/97] drm/i915/guc: Kill guc_clients.ct_pool Matthew Brost
2021-05-25  1:01   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 29/97] drm/i915/guc: Update firmware to v60.1.2 Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 30/97] drm/i915/uc: turn on GuC/HuC auto mode by default Matthew Brost
2021-05-24 11:00   ` Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 31/97] drm/i915/guc: Early initialization of GuC send registers Matthew Brost
2021-05-26 20:28   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 32/97] drm/i915: Introduce i915_sched_engine object Matthew Brost
2021-05-11 15:18   ` Daniel Vetter
2021-05-11 17:56     ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 33/97] drm/i915: Engine relative MMIO Matthew Brost
2021-05-25  9:05   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:13 ` [RFC PATCH 34/97] drm/i915/guc: Use guc_class instead of engine_class in fw interface Matthew Brost
2021-05-26 20:41   ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 35/97] drm/i915/guc: Improve error message for unsolicited CT response Matthew Brost
2021-05-24 11:59   ` Michal Wajdeczko
2021-05-25 17:32     ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 36/97] drm/i915/guc: Add non blocking CTB send function Matthew Brost
2021-05-24 12:21   ` Michal Wajdeczko
2021-05-25 17:30     ` Matthew Brost
2021-05-25  9:21   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-25 17:21     ` Matthew Brost
2021-05-26  8:57       ` Tvrtko Ursulin
2021-05-26 18:10         ` Matthew Brost
2021-05-27 10:02           ` Tvrtko Ursulin
2021-05-27 14:35             ` Matthew Brost
2021-05-27 15:11               ` Tvrtko Ursulin
2021-06-07 17:31                 ` Matthew Brost
2021-06-08  8:39                   ` Tvrtko Ursulin
2021-06-08  8:46                     ` Daniel Vetter
2021-06-09 23:10                       ` Matthew Brost
2021-06-10 15:27                         ` Daniel Vetter
2021-06-24 16:38                           ` Matthew Brost
2021-06-24 17:25                             ` Daniel Vetter
2021-06-09 13:58                     ` Michal Wajdeczko
2021-06-09 23:05                       ` Matthew Brost
2021-06-09 14:14                   ` Michal Wajdeczko
2021-06-09 23:13                     ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 37/97] drm/i915/guc: Add stall timer to " Matthew Brost
2021-05-24 12:58   ` Michal Wajdeczko
2021-05-24 18:35     ` Matthew Brost
2021-05-25 14:15       ` Michal Wajdeczko
2021-05-25 16:54         ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 38/97] drm/i915/guc: Optimize CTB writes and reads Matthew Brost
2021-05-24 13:31   ` Michal Wajdeczko
2021-05-25 17:39     ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 39/97] drm/i915/guc: Increase size of CTB buffers Matthew Brost
2021-05-24 13:43   ` [Intel-gfx] " Michal Wajdeczko
2021-05-24 18:40     ` Matthew Brost
2021-05-25  9:24   ` Tvrtko Ursulin
2021-05-25 17:15     ` Matthew Brost
2021-05-26  9:30       ` Tvrtko Ursulin
2021-05-26 18:20         ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 40/97] drm/i915/guc: Module load failure test for CT buffer creation Matthew Brost
2021-05-24 13:45   ` Michal Wajdeczko
2021-05-06 19:13 ` [RFC PATCH 41/97] drm/i915/guc: Add new GuC interface defines and structures Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 42/97] drm/i915/guc: Remove GuC stage descriptor, add lrc descriptor Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 43/97] drm/i915/guc: Add lrc descriptor context lookup array Matthew Brost
2021-05-11 15:26   ` Daniel Vetter
2021-05-11 17:01     ` Matthew Brost
2021-05-11 17:43       ` Daniel Vetter
2021-05-11 19:34         ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 44/97] drm/i915/guc: Implement GuC submission tasklet Matthew Brost
2021-05-25  9:43   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-25 17:10     ` Matthew Brost
2021-05-06 19:13 ` [RFC PATCH 45/97] drm/i915/guc: Add bypass tasklet submission path to GuC Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 46/97] drm/i915/guc: Implement GuC context operations for new inteface Matthew Brost
2021-05-29 20:32   ` Michal Wajdeczko
2021-05-06 19:14 ` [RFC PATCH 47/97] drm/i915/guc: Insert fence on context when deregistering Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 48/97] drm/i915/guc: Defer context unpin until scheduling is disabled Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 49/97] drm/i915/guc: Disable engine barriers with GuC during unpin Matthew Brost
2021-05-11 15:37   ` Daniel Vetter
2021-05-11 16:31     ` Matthew Brost
2021-05-26 10:26   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:14 ` [RFC PATCH 50/97] drm/i915/guc: Extend deregistration fence to schedule disable Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 51/97] drm/i915: Disable preempt busywait when using GuC scheduling Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 52/97] drm/i915/guc: Ensure request ordering via completion fences Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 53/97] drm/i915/guc: Disable semaphores when using GuC scheduling Matthew Brost
2021-05-25  9:52   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-25 17:01     ` Matthew Brost
2021-05-26  9:25       ` Tvrtko Ursulin
2021-05-26 18:15         ` Matthew Brost
2021-05-27  8:41           ` Tvrtko Ursulin
2021-05-27 14:38             ` Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 54/97] drm/i915/guc: Ensure G2H response has space in buffer Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 55/97] drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC Matthew Brost
2021-05-25 10:06   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-25 17:07     ` Matthew Brost
2021-05-26  9:21       ` Tvrtko Ursulin
2021-05-26 18:18         ` Matthew Brost
2021-05-27  9:02           ` Tvrtko Ursulin
2021-05-27 14:37             ` Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 56/97] drm/i915/guc: Update GuC debugfs to support new GuC Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 57/97] drm/i915/guc: Add several request trace points Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 58/97] drm/i915: Add intel_context tracing Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 59/97] drm/i915/guc: GuC virtual engines Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 60/97] drm/i915: Track 'serial' counts for " Matthew Brost
2021-05-25 10:16   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-25 17:52     ` Matthew Brost
2021-05-26  8:40       ` Tvrtko Ursulin
2021-05-26 18:45         ` John Harrison
2021-05-27  8:53           ` Tvrtko Ursulin
2021-05-27 17:01             ` John Harrison
2021-06-01  9:31               ` Tvrtko Ursulin
2021-06-02  1:20                 ` John Harrison
2021-06-02 12:04                   ` Tvrtko Ursulin
2021-06-02 12:09   ` Tvrtko Ursulin
2021-05-06 19:14 ` [RFC PATCH 61/97] drm/i915: Hold reference to intel_context over life of i915_request Matthew Brost
2021-06-02 12:18   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:14 ` [RFC PATCH 62/97] drm/i915/guc: Disable bonding extension with GuC submission Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 63/97] drm/i915/guc: Direct all breadcrumbs for a class to single breadcrumbs Matthew Brost
2021-06-02 13:31   ` [Intel-gfx] " Tvrtko Ursulin
2021-05-06 19:14 ` [RFC PATCH 64/97] drm/i915/guc: Reset implementation for new GuC interface Matthew Brost
2021-06-02 14:33   ` [Intel-gfx] " Tvrtko Ursulin
2021-06-04  3:17     ` Matthew Brost
2021-06-04  8:16       ` Daniel Vetter
2021-06-04 18:02         ` Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 65/97] drm/i915: Reset GPU immediately if submission is disabled Matthew Brost
2021-06-02 14:36   ` Tvrtko Ursulin [this message]
2021-05-06 19:14 ` [RFC PATCH 66/97] drm/i915/guc: Add disable interrupts to guc sanitize Matthew Brost
2021-05-11  8:16   ` [drm/i915/guc] 07336fb545: WARNING:at_drivers/gpu/drm/i915/gt/uc/intel_uc.c:#__uc_sanitize[i915] kernel test robot
2021-05-06 19:14 ` [RFC PATCH 67/97] drm/i915/guc: Suspend/resume implementation for new interface Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 68/97] drm/i915/guc: Handle context reset notification Matthew Brost
2021-05-11 16:25   ` [Intel-gfx] " Daniel Vetter
2021-05-06 19:14 ` [RFC PATCH 69/97] drm/i915/guc: Handle engine reset failure notification Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 70/97] drm/i915/guc: Enable the timer expired interrupt for GuC Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 71/97] drm/i915/guc: Provide mmio list to be saved/restored on engine reset Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 72/97] drm/i915/guc: Don't complain about reset races Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 73/97] drm/i915/guc: Enable GuC engine reset Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 74/97] drm/i915/guc: Capture error state on context reset Matthew Brost
2021-05-11 16:28   ` [Intel-gfx] " Daniel Vetter
2021-05-11 17:12     ` Matthew Brost
2021-05-11 17:45       ` Daniel Vetter
2021-05-06 19:14 ` [RFC PATCH 75/97] drm/i915/guc: Fix for error capture after full GPU reset with GuC Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 76/97] drm/i915/guc: Hook GuC scheduling policies up Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 77/97] drm/i915/guc: Connect reset modparam updates to GuC policy flags Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 78/97] drm/i915/guc: Include scheduling policies in the debugfs state dump Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 79/97] drm/i915/guc: Don't call ring_is_idle in GuC submission Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 80/97] drm/i915/guc: Implement banned contexts for " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 81/97] drm/i915/guc: Allow flexible number of context ids Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 82/97] drm/i915/guc: Connect the number of guc_ids to debugfs Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 83/97] drm/i915/guc: Don't return -EAGAIN to user when guc_ids exhausted Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 84/97] drm/i915/guc: Don't allow requests not ready to consume all guc_ids Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 85/97] drm/i915/guc: Introduce guc_submit_engine object Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 86/97] drm/i915/guc: Add golden context to GuC ADS Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 87/97] drm/i915/guc: Implement GuC priority management Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 88/97] drm/i915/guc: Support request cancellation Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 89/97] drm/i915/guc: Check return of __xa_store when registering a context Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 90/97] drm/i915/guc: Non-static lrc descriptor registration buffer Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 91/97] drm/i915/guc: Take GT PM ref when deregistering context Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 92/97] drm/i915: Add GT PM delayed worker Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 93/97] drm/i915/guc: Take engine PM when a context is pinned with GuC submission Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 94/97] drm/i915/guc: Don't call switch_to_kernel_context " Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 95/97] drm/i915/guc: Selftest for GuC flow control Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 96/97] drm/i915/guc: Update GuC documentation Matthew Brost
2021-05-06 19:14 ` [RFC PATCH 97/97] drm/i915/guc: Unblock GuC submission on Gen11+ Matthew Brost
2021-05-09 17:12 ` [RFC PATCH 00/97] Basic GuC submission support in the i915 Martin Peres
2021-05-09 23:11   ` Jason Ekstrand
2021-05-10 13:55     ` Martin Peres
2021-05-10 16:25       ` Jason Ekstrand
2021-05-11  8:01         ` Martin Peres
2021-05-10 16:33       ` Daniel Vetter
2021-05-10 18:30         ` [Intel-gfx] " Francisco Jerez
2021-05-11  8:06         ` Martin Peres
2021-05-11 15:26           ` Bloomfield, Jon
2021-05-11 16:39             ` Matthew Brost
2021-05-12  6:26               ` Martin Peres
2021-05-14 16:31                 ` Jason Ekstrand
2021-05-25 15:37                   ` Alex Deucher
2021-05-11  2:58     ` Dixit, Ashutosh
2021-05-11  7:47       ` Martin Peres
2021-05-14 11:11 ` [Intel-gfx] " Tvrtko Ursulin
2021-05-14 16:36   ` Jason Ekstrand
2021-05-14 16:46     ` Matthew Brost
2021-05-14 16:41   ` Matthew Brost
2021-05-25 10:32 ` Tvrtko Ursulin
2021-05-25 16:45   ` Matthew Brost
2021-06-02 15:27     ` Tvrtko Ursulin
2021-06-02 18:57       ` Daniel Vetter
2021-06-03  3:41         ` Matthew Brost
2021-06-03  4:47           ` Daniel Vetter
2021-06-03  9:49             ` Tvrtko Ursulin
2021-06-03 10:52           ` Tvrtko Ursulin
2021-06-03  4:10       ` Matthew Brost
2021-06-03  8:51         ` Tvrtko Ursulin
2021-06-03 16:34           ` Matthew Brost

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