From: "Rafael J. Wysocki" <rafael-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> To: Mika Westerberg <mika.westerberg-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> Cc: "Rafael J. Wysocki" <rafael-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, Linux PCI <linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, Linux PM <linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, "Rafael J . Wysocki" <rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org>, LKML <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, dri-devel <dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>, Mario Limonciello <Mario.Limonciello-8PEkshWhKlo@public.gmane.org>, Bjorn Helgaas <helgaas-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, nouveau <nouveau-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> Subject: Re: [PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges Date: Thu, 21 Nov 2019 12:34:22 +0100 [thread overview] Message-ID: <CAJZ5v0hQhj5Wf+piU11abC4pF26yM=XHGHAcDv8Jsgdx04aN-w@mail.gmail.com> (raw) In-Reply-To: <20191121112821.GU11621-3PARRvDOhMZrdx17CPfAsdBPR1lH4CV8@public.gmane.org> On Thu, Nov 21, 2019 at 12:28 PM Mika Westerberg <mika.westerberg@intel.com> wrote: > > On Wed, Nov 20, 2019 at 11:29:33PM +0100, Rafael J. Wysocki wrote: > > > last week or so I found systems where the GPU was under the "PCI > > > Express Root Port" (name from lspci) and on those systems all of that > > > seems to work. So I am wondering if it's indeed just the 0x1901 one, > > > which also explains Mikas case that Thunderbolt stuff works as devices > > > never get populated under this particular bridge controller, but under > > > those "Root Port"s > > > > It always is a PCIe port, but its location within the SoC may matter. > > Exactly. Intel hardware has PCIe ports on CPU side (these are called > PEG, PCI Express Graphics, ports), and the PCH side. I think the IP is > still the same. > > > Also some custom AML-based power management is involved and that may > > be making specific assumptions on the configuration of the SoC and the > > GPU at the time of its invocation which unfortunately are not known to > > us. > > > > However, it looks like the AML invoked to power down the GPU from > > acpi_pci_set_power_state() gets confused if it is not in PCI D0 at > > that point, so it looks like that AML tries to access device memory on > > the GPU (beyond the PCI config space) or similar which is not > > accessible in PCI power states below D0. > > Or the PCI config space of the GPU when the parent root port is in D3hot > (as it is the case here). Also then the GPU config space is not > accessible. Why would the parent port be in D3hot at that point? Wouldn't that be a suspend ordering violation? > I took a look at the HP Omen ACPI tables which has similar problem and > there is also check for Windows 7 (but not Linux) so I think one > alternative workaround would be to add these devices into > acpi_osi_dmi_table[] where .callback is set to dmi_disable_osi_win8 (or > pass 'acpi_osi="!Windows 2012"' in the kernel command line). I'd like to understand the facts that have been established so far before deciding what to do about them. :-) _______________________________________________ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
WARNING: multiple messages have this Message-ID (diff)
From: "Rafael J. Wysocki" <rafael@kernel.org> To: Mika Westerberg <mika.westerberg@intel.com> Cc: Karol Herbst <kherbst@redhat.com>, "Rafael J. Wysocki" <rafael@kernel.org>, Linux PCI <linux-pci@vger.kernel.org>, Linux PM <linux-pm@vger.kernel.org>, "Rafael J . Wysocki" <rjw@rjwysocki.net>, LKML <linux-kernel@vger.kernel.org>, dri-devel <dri-devel@lists.freedesktop.org>, Mario Limonciello <Mario.Limonciello@dell.com>, Bjorn Helgaas <helgaas@kernel.org>, nouveau <nouveau@lists.freedesktop.org> Subject: Re: [PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges Date: Thu, 21 Nov 2019 12:34:22 +0100 [thread overview] Message-ID: <CAJZ5v0hQhj5Wf+piU11abC4pF26yM=XHGHAcDv8Jsgdx04aN-w@mail.gmail.com> (raw) Message-ID: <20191121113422.WIdjX6p832EUa5JiM30fsmDWwK8nhPfqqWyIM4c6Mg4@z> (raw) In-Reply-To: <20191121112821.GU11621@lahna.fi.intel.com> On Thu, Nov 21, 2019 at 12:28 PM Mika Westerberg <mika.westerberg@intel.com> wrote: > > On Wed, Nov 20, 2019 at 11:29:33PM +0100, Rafael J. Wysocki wrote: > > > last week or so I found systems where the GPU was under the "PCI > > > Express Root Port" (name from lspci) and on those systems all of that > > > seems to work. So I am wondering if it's indeed just the 0x1901 one, > > > which also explains Mikas case that Thunderbolt stuff works as devices > > > never get populated under this particular bridge controller, but under > > > those "Root Port"s > > > > It always is a PCIe port, but its location within the SoC may matter. > > Exactly. Intel hardware has PCIe ports on CPU side (these are called > PEG, PCI Express Graphics, ports), and the PCH side. I think the IP is > still the same. > > > Also some custom AML-based power management is involved and that may > > be making specific assumptions on the configuration of the SoC and the > > GPU at the time of its invocation which unfortunately are not known to > > us. > > > > However, it looks like the AML invoked to power down the GPU from > > acpi_pci_set_power_state() gets confused if it is not in PCI D0 at > > that point, so it looks like that AML tries to access device memory on > > the GPU (beyond the PCI config space) or similar which is not > > accessible in PCI power states below D0. > > Or the PCI config space of the GPU when the parent root port is in D3hot > (as it is the case here). Also then the GPU config space is not > accessible. Why would the parent port be in D3hot at that point? Wouldn't that be a suspend ordering violation? > I took a look at the HP Omen ACPI tables which has similar problem and > there is also check for Windows 7 (but not Linux) so I think one > alternative workaround would be to add these devices into > acpi_osi_dmi_table[] where .callback is set to dmi_disable_osi_win8 (or > pass 'acpi_osi="!Windows 2012"' in the kernel command line). I'd like to understand the facts that have been established so far before deciding what to do about them. :-) _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2019-11-21 11:34 UTC|newest] Thread overview: 117+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-10-17 12:19 [PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges Karol Herbst 2019-11-14 19:17 ` Karol Herbst 2019-11-14 19:17 ` Karol Herbst [not found] ` <20191017121901.13699-1-kherbst-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> 2019-11-19 20:06 ` Dave Airlie 2019-11-19 20:06 ` Dave Airlie 2019-11-19 21:49 ` Bjorn Helgaas 2019-11-19 21:49 ` Bjorn Helgaas [not found] ` <20191119214955.GA223696-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org> 2019-11-19 22:26 ` Karol Herbst 2019-11-19 22:26 ` Karol Herbst 2019-11-19 22:57 ` Bjorn Helgaas 2019-11-19 22:57 ` Bjorn Helgaas 2019-11-20 10:18 ` Mika Westerberg 2019-11-20 10:18 ` Mika Westerberg [not found] ` <20191120101816.GX11621-3PARRvDOhMZrdx17CPfAsdBPR1lH4CV8@public.gmane.org> 2019-11-20 10:52 ` Rafael J. Wysocki 2019-11-20 10:52 ` Rafael J. Wysocki 2019-11-20 11:22 ` Mika Westerberg 2019-11-20 11:22 ` Mika Westerberg 2019-11-20 11:48 ` Rafael J. Wysocki 2019-11-20 11:51 ` Karol Herbst 2019-11-20 11:51 ` Karol Herbst [not found] ` <CACO55tsjj+xkDjubz1J=fsPecW4H_J8AaBTeaMm+NYjp8Kiq8g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2019-11-20 12:06 ` Rafael J. Wysocki 2019-11-20 12:06 ` Rafael J. Wysocki [not found] ` <CAJZ5v0ithxMPK2YxfTUx_Ygpze2FMDJ6LwKwJb2vx89dfgHX_A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2019-11-20 12:09 ` Karol Herbst 2019-11-20 12:09 ` Karol Herbst 2019-11-20 12:14 ` Rafael J. Wysocki 2019-11-20 12:14 ` Rafael J. Wysocki 2019-11-20 12:19 ` Karol Herbst 2019-11-20 12:19 ` Karol Herbst 2019-11-20 12:11 ` Rafael J. Wysocki 2019-11-20 12:11 ` Rafael J. Wysocki 2019-11-20 11:51 ` Mika Westerberg 2019-11-20 11:51 ` Mika Westerberg [not found] ` <20191120115127.GD11621-3PARRvDOhMZrdx17CPfAsdBPR1lH4CV8@public.gmane.org> 2019-11-20 11:54 ` Karol Herbst 2019-11-20 11:54 ` Karol Herbst [not found] ` <CACO55tsfNOdtu5SZ-4HzO4Ji6gQtafvZ7Rm19nkPcJAgwUBFMw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2019-11-20 11:58 ` Karol Herbst 2019-11-20 11:58 ` Karol Herbst 2019-11-20 12:09 ` Mika Westerberg 2019-11-20 12:09 ` Mika Westerberg [not found] ` <20191120120913.GE11621-3PARRvDOhMZrdx17CPfAsdBPR1lH4CV8@public.gmane.org> 2019-11-20 12:11 ` Karol Herbst 2019-11-20 12:11 ` Karol Herbst 2019-11-20 15:15 ` Mika Westerberg 2019-11-20 15:15 ` Mika Westerberg 2019-11-20 15:37 ` Karol Herbst 2019-11-20 15:53 ` Mika Westerberg 2019-11-20 15:53 ` Mika Westerberg 2019-11-20 16:23 ` Mika Westerberg 2019-11-20 16:23 ` Mika Westerberg [not found] ` <20191120162306.GM11621-3PARRvDOhMZrdx17CPfAsdBPR1lH4CV8@public.gmane.org> 2019-11-20 21:36 ` Karol Herbst 2019-11-20 21:36 ` Karol Herbst 2019-11-21 10:14 ` Mika Westerberg 2019-11-21 10:14 ` Mika Westerberg 2019-11-21 11:03 ` Rafael J. Wysocki [not found] ` <CAJZ5v0hAgz4Fu=83AJE2PYUsi+Jk=Lrr4MNp5ySA9yY=3wr5rg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2019-11-21 11:08 ` Rafael J. Wysocki 2019-11-21 11:08 ` Rafael J. Wysocki 2019-11-21 11:15 ` Rafael J. Wysocki 2019-11-21 11:15 ` Rafael J. Wysocki 2019-11-21 11:17 ` Mika Westerberg 2019-11-21 11:17 ` Mika Westerberg 2019-11-21 11:31 ` Rafael J. Wysocki 2019-11-21 11:31 ` Rafael J. Wysocki 2019-11-20 21:37 ` Rafael J. Wysocki 2019-11-20 21:37 ` Rafael J. Wysocki 2019-11-20 21:40 ` Karol Herbst 2019-11-20 21:40 ` Karol Herbst 2019-11-20 22:29 ` Rafael J. Wysocki 2019-11-20 22:29 ` Rafael J. Wysocki 2019-11-21 11:28 ` Mika Westerberg [not found] ` <20191121112821.GU11621-3PARRvDOhMZrdx17CPfAsdBPR1lH4CV8@public.gmane.org> 2019-11-21 11:34 ` Rafael J. Wysocki [this message] 2019-11-21 11:34 ` Rafael J. Wysocki 2019-11-21 11:46 ` Mika Westerberg 2019-11-21 11:46 ` Mika Westerberg 2019-11-21 12:52 ` Mika Westerberg 2019-11-21 12:56 ` Karol Herbst 2019-11-21 12:56 ` Karol Herbst [not found] ` <20191121125236.GX11621-3PARRvDOhMZrdx17CPfAsdBPR1lH4CV8@public.gmane.org> 2019-11-21 15:43 ` Rafael J. Wysocki 2019-11-21 15:43 ` Rafael J. Wysocki 2019-11-21 19:49 ` Mika Westerberg 2019-11-21 19:49 ` Mika Westerberg [not found] ` <20191121194942.GY11621-3PARRvDOhMZrdx17CPfAsdBPR1lH4CV8@public.gmane.org> 2019-11-21 22:39 ` Rafael J. Wysocki 2019-11-21 22:39 ` Rafael J. Wysocki 2019-11-21 22:50 ` Karol Herbst 2019-11-22 0:13 ` Karol Herbst 2019-11-22 0:13 ` Karol Herbst 2019-11-22 9:07 ` Rafael J. Wysocki 2019-11-22 9:07 ` Rafael J. Wysocki [not found] ` <CAJZ5v0jNq77xPXxeYeq_JJBCfekVPVPOye1mZwpQi=+=MKSS7w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2019-11-22 11:30 ` Karol Herbst 2019-11-22 11:30 ` Karol Herbst 2019-11-22 10:36 ` Mika Westerberg 2019-11-22 11:30 ` Rafael J. Wysocki 2019-11-22 11:30 ` Rafael J. Wysocki [not found] ` <CAJZ5v0gifnGZcKr6mgc6C2EfqX13OyJnOac0uDxYNKN=A0cgMg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2019-11-22 11:34 ` Karol Herbst 2019-11-22 11:34 ` Karol Herbst 2019-11-22 11:54 ` Rafael J. Wysocki 2019-11-22 11:54 ` Rafael J. Wysocki 2019-11-22 11:52 ` Mika Westerberg 2019-11-22 12:15 ` Rafael J. Wysocki 2019-11-21 12:52 ` Karol Herbst 2019-11-21 12:52 ` Karol Herbst 2019-11-21 15:47 ` Rafael J. Wysocki 2019-11-21 15:47 ` Rafael J. Wysocki 2019-11-21 16:06 ` Karol Herbst 2019-11-21 16:06 ` Karol Herbst 2019-11-21 16:39 ` Rafael J. Wysocki 2019-11-21 16:39 ` Rafael J. Wysocki 2019-11-26 23:10 ` Lyude Paul 2019-11-27 11:48 ` Mika Westerberg 2019-11-27 11:48 ` Mika Westerberg 2019-11-27 11:51 ` Karol Herbst 2019-11-27 11:51 ` Karol Herbst 2019-11-27 19:51 ` Lyude Paul 2019-11-27 19:51 ` Lyude Paul 2019-12-09 11:17 ` Karol Herbst 2019-12-09 11:38 ` Rafael J. Wysocki 2019-12-09 12:24 ` Karol Herbst 2019-12-10 19:58 ` Dave Airlie 2019-12-10 20:49 ` Karol Herbst 2020-01-13 15:31 ` Karol Herbst
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