[PATCH 0/7] Minor DisplayPort cleanup

[PATCH 0/7] Minor DisplayPort cleanup

[Adam Jackson]

Patch 1 is actually core drm, and independent of the rest of the series.
The rest vary among cosmetic cleanup, unifying the G4X/IRL paths, and
one corner-case change to be more strictly spec-compliant.

Tested on a Thinkpad T500 (GM45) with various DisplayPort attachments.
My X200 (with DP only on the dock) is still not especially reliable, but
I'm sure I'll figure something out.

- ajax

[PATCH 1/7] drm: Fill in more of the DisplayPort DPCD registers

[Adam Jackson]

Signed-off-by: Adam Jackson <ajax@redhat.com>
---
 include/drm/drm_dp_helper.h |   95 +++++++++++++++++++++++++++++++++---------
 1 files changed, 74 insertions(+), 21 deletions(-)

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 91567bb..940daa5 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -64,16 +64,38 @@
 #define DP_DOWNSTREAMPORT_PRESENT           0x005
 # define DP_DWN_STRM_PORT_PRESENT           (1 << 0)
 # define DP_DWN_STRM_PORT_TYPE_MASK         0x06
-/* 00b = DisplayPort */
-/* 01b = Analog */
-/* 10b = TMDS or HDMI */
-/* 11b = Other */
+# define DP_DWN_STRM_PORT_TYPE_DP	    (0 << 1)
+# define DP_DWN_STRM_PORT_TYPE_ANALOG	    (1 << 1)
+# define DP_DWN_STRM_PORT_TYPE_TMDS	    (2 << 1)
+# define DP_DWN_STRM_PORT_TYPE_OTHER	    (3 << 1)
 # define DP_FORMAT_CONVERSION               (1 << 3)
 
 #define DP_MAIN_LINK_CHANNEL_CODING         0x006
 
+#define DP_DOWN_STREAM_PORT_COUNT	    0x007
+# define DP_DWN_STREAM_PORT_COUNT_MASK	    0x0f
+# define DP_OUI_SUPPORT			    (1 << 7)
+
+#define DP_RECEIVE_PORT0_CAP_0		    0x008
+#define DP_RECEIVE_PORT0_CAP_1		    0x009
+#define DP_RECEIVE_PORT1_CAP_0		    0x00a
+#define DP_RECEIVE_PORT1_CAP_1		    0x00b
+/* receiver port capabilities */
+# define DP_RECEIVE_PORT_CAP0_LOCAL_EDID_PRESENT	(1 << 1)
+# define DP_RECEIVE_PORT_CAP0_ASSOCIATED_TO_PREVIOUS	(1 << 2)
+# define DP_RECEIVE_PORT_CAP1_BUFFER_SIZE(x)		((x + 1) * 32)
+
 #define DP_TRAINING_AUX_RD_INTERVAL         0x00e
 
+#define DP_DOWN_STREAM_PORT_CAP(x)	    (0x080 + (x & 0x7f))
+# define DP_DWN_STRM_PORT_TYPE_DP	    (0 << 0)
+# define DP_DWN_STRM_PORT_TYPE_VGA	    (1 << 0)
+# define DP_DWN_STRM_PORT_TYPE_DVI	    (2 << 0)
+# define DP_DWN_STRM_PORT_TYPE_HDMI	    (3 << 0)
+# define DP_DWN_STRM_PORT_TYPE_NON_EDID	    (4 << 0)
+# define DP_DWN_STRM_PORT_TYPE_MASK	    0x07
+# define DP_DWN_STRM_PORT_HPD		    (1 << 3)
+
 /* link configuration */
 #define	DP_LINK_BW_SET		            0x100
 # define DP_LINK_BW_1_62		    0x06
@@ -85,21 +107,18 @@
 # define DP_LANE_COUNT_ENHANCED_FRAME_EN    (1 << 7)
 
 #define DP_TRAINING_PATTERN_SET	            0x102
-# define DP_TRAINING_PATTERN_DISABLE	    0
-# define DP_TRAINING_PATTERN_1		    1
-# define DP_TRAINING_PATTERN_2		    2
-# define DP_TRAINING_PATTERN_3		    3
+# define DP_TRAINING_PATTERN_DISABLE	    (0 << 0)
+# define DP_TRAINING_PATTERN_1		    (1 << 0)
+# define DP_TRAINING_PATTERN_2		    (2 << 0)
+# define DP_TRAINING_PATTERN_3		    (3 << 0)
 # define DP_TRAINING_PATTERN_MASK	    0x3
-
 # define DP_LINK_QUAL_PATTERN_DISABLE	    (0 << 2)
 # define DP_LINK_QUAL_PATTERN_D10_2	    (1 << 2)
 # define DP_LINK_QUAL_PATTERN_ERROR_RATE    (2 << 2)
 # define DP_LINK_QUAL_PATTERN_PRBS7	    (3 << 2)
 # define DP_LINK_QUAL_PATTERN_MASK	    (3 << 2)
-
 # define DP_RECOVERED_CLOCK_OUT_EN	    (1 << 4)
 # define DP_LINK_SCRAMBLING_DISABLE	    (1 << 5)
-
 # define DP_SYMBOL_ERROR_COUNT_BOTH	    (0 << 6)
 # define DP_SYMBOL_ERROR_COUNT_DISPARITY    (1 << 6)
 # define DP_SYMBOL_ERROR_COUNT_SYMBOL	    (2 << 6)
@@ -109,7 +128,6 @@
 #define DP_TRAINING_LANE1_SET		    0x104
 #define DP_TRAINING_LANE2_SET		    0x105
 #define DP_TRAINING_LANE3_SET		    0x106
-
 # define DP_TRAIN_VOLTAGE_SWING_MASK	    0x3
 # define DP_TRAIN_VOLTAGE_SWING_SHIFT	    0
 # define DP_TRAIN_MAX_SWING_REACHED	    (1 << 2)
@@ -117,13 +135,11 @@
 # define DP_TRAIN_VOLTAGE_SWING_600	    (1 << 0)
 # define DP_TRAIN_VOLTAGE_SWING_800	    (2 << 0)
 # define DP_TRAIN_VOLTAGE_SWING_1200	    (3 << 0)
-
 # define DP_TRAIN_PRE_EMPHASIS_MASK	    (3 << 3)
 # define DP_TRAIN_PRE_EMPHASIS_0	    (0 << 3)
 # define DP_TRAIN_PRE_EMPHASIS_3_5	    (1 << 3)
 # define DP_TRAIN_PRE_EMPHASIS_6	    (2 << 3)
 # define DP_TRAIN_PRE_EMPHASIS_9_5	    (3 << 3)
-
 # define DP_TRAIN_PRE_EMPHASIS_SHIFT	    3
 # define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED  (1 << 5)
 
@@ -133,6 +149,16 @@
 #define DP_MAIN_LINK_CHANNEL_CODING_SET	    0x108
 # define DP_SET_ANSI_8B10B		    (1 << 0)
 
+#define DP_SINK_COUNT			    0x200
+# define DP_SINK_COUNT_MASK		    0x3f
+# define DP_SINK_CP_READY		    (1 << 6)
+
+#define DP_DEVICE_SERVICE_IRQ_VECTOR	    0x201
+# define DP_IRQ_REMOTE_CONTROL_COMMAND_PENDING	    (1 << 0)
+# define DP_IRQ_AUTOMATED_TEST_REQUEST		    (1 << 1)
+# define DP_IRQ_CP_IRQ				    (1 << 2)
+# define DP_IRQ_SINK_SPECIFIC_IRQ		    (1 << 6)
+
 #define DP_LANE0_1_STATUS		    0x202
 #define DP_LANE2_3_STATUS		    0x203
 # define DP_LANE_CR_DONE		    (1 << 0)
@@ -144,15 +170,13 @@
 			    DP_LANE_SYMBOL_LOCKED)
 
 #define DP_LANE_ALIGN_STATUS_UPDATED	    0x204
-
-#define DP_INTERLANE_ALIGN_DONE		    (1 << 0)
-#define DP_DOWNSTREAM_PORT_STATUS_CHANGED   (1 << 6)
-#define DP_LINK_STATUS_UPDATED		    (1 << 7)
+# define DP_INTERLANE_ALIGN_DONE	    (1 << 0)
+# define DP_DOWNSTREAM_PORT_STATUS_CHANGED  (1 << 6)
+# define DP_LINK_STATUS_UPDATED		    (1 << 7)
 
 #define DP_SINK_STATUS			    0x205
-
-#define DP_RECEIVE_PORT_0_STATUS	    (1 << 0)
-#define DP_RECEIVE_PORT_1_STATUS	    (1 << 1)
+# define DP_RECEIVE_PORT_0_STATUS	    (1 << 0)
+# define DP_RECEIVE_PORT_1_STATUS	    (1 << 1)
 
 #define DP_ADJUST_REQUEST_LANE0_1	    0x206
 #define DP_ADJUST_REQUEST_LANE2_3	    0x207
@@ -165,6 +189,35 @@
 # define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK   0xc0
 # define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT  6
 
+#define DP_TRAINING_SCORE_LANE0		    0x208
+#define DP_TRAINING_SCORE_LANE1		    0x209
+#define DP_TRAINING_SCORE_LANE2		    0x20a
+#define DP_TRAINING_SCORE_LANE3		    0x20b
+
+/* register pairs for a 15-bit saturated error count */
+#define DP_SYMBOL_ERROR_COUNT_LANE0_LOW	    0x210
+#define DP_SYMBOL_ERROR_COUNT_LANE0_HIGH    0x211
+#define DP_SYMBOL_ERROR_COUNT_LANE1_LOW	    0x212
+#define DP_SYMBOL_ERROR_COUNT_LANE1_HIGH    0x213
+#define DP_SYMBOL_ERROR_COUNT_LANE2_LOW	    0x214
+#define DP_SYMBOL_ERROR_COUNT_LANE2_HIGH    0x215
+#define DP_SYMBOL_ERROR_COUNT_LANE3_LOW	    0x216
+#define DP_SYMBOL_ERROR_COUNT_LANE4_HIGH    0x217
+/* ... on the HIGH register */
+# define DP_SYMBOL_ERROR_COUNT_VALID	    (1 << 7)
+
+#define DP_SOURCE_IEEE_OUI_7_0		    0x300
+#define DP_SOURCE_IEEE_OUI_15_8		    0x301
+#define DP_SOURCE_IEEE_OUI_23_16    	    0x302
+
+#define DP_SINK_IEEE_OUI_7_0		    0x400
+#define DP_SINK_IEEE_OUI_15_8		    0x401
+#define DP_SINK_IEEE_OUI_23_16    	    0x402
+
+#define DP_BRANCH_IEEE_OUI_7_0		    0x500
+#define DP_BRANCH_IEEE_OUI_15_8		    0x501
+#define DP_BRANCH_IEEE_OUI_23_16    	    0x502
+
 #define DP_SET_POWER                        0x600
 # define DP_SET_POWER_D0                    0x1
 # define DP_SET_POWER_D3                    0x2
-- 
1.7.6

[PATCH 2/7] drm/i915/dp: Zero the DPCD data before connection probe

[Adam Jackson]

Signed-off-by: Adam Jackson <ajax@redhat.com>
---
 drivers/gpu/drm/i915/intel_dp.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index e2aced6..de24f31 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1673,6 +1673,7 @@ intel_dp_detect(struct drm_connector *connector, bool force)
 	struct edid *edid = NULL;
 
 	intel_dp->has_audio = false;
+	memset(intel_dp->dpcd, 0, sizeof(intel_dp->dpcd));
 
 	if (HAS_PCH_SPLIT(dev))
 		status = ironlake_dp_detect(intel_dp);
-- 
1.7.6

[PATCH 3/7] drm/i915/dp: Move DPCD dump to common code instead of PCH-only

[Adam Jackson]

No reason not to see this on g4x, after all.

Signed-off-by: Adam Jackson <ajax@redhat.com>
---
 drivers/gpu/drm/i915/intel_dp.c |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index de24f31..0be85a0 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1615,8 +1615,6 @@ ironlake_dp_detect(struct intel_dp *intel_dp)
 					     sizeof (intel_dp->dpcd));
 	if (ret && intel_dp->dpcd[DP_DPCD_REV] != 0)
 		status = connector_status_connected;
-	DRM_DEBUG_KMS("DPCD: %hx%hx%hx%hx\n", intel_dp->dpcd[0],
-		      intel_dp->dpcd[1], intel_dp->dpcd[2], intel_dp->dpcd[3]);
 	return status;
 }
 
@@ -1679,6 +1677,10 @@ intel_dp_detect(struct drm_connector *connector, bool force)
 		status = ironlake_dp_detect(intel_dp);
 	else
 		status = g4x_dp_detect(intel_dp);
+
+	DRM_DEBUG_KMS("DPCD: %hx%hx%hx%hx\n", intel_dp->dpcd[0],
+		      intel_dp->dpcd[1], intel_dp->dpcd[2], intel_dp->dpcd[3]);
+
 	if (status != connector_status_connected)
 		return status;
 
-- 
1.7.6

[PATCH 4/7] drm/i915/dp: Read more DPCD registers on connection probe

[Adam Jackson]

For parity with radeon and nouveau, and also because I suspect we're
going to need it to get format-conversion dongles right.

Signed-off-by: Adam Jackson <ajax@redhat.com>
---
 drivers/gpu/drm/i915/intel_dp.c |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 0be85a0..2f0566b 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -52,7 +52,7 @@ struct intel_dp {
 	uint32_t color_range;
 	uint8_t link_bw;
 	uint8_t lane_count;
-	uint8_t dpcd[4];
+	uint8_t dpcd[8];
 	struct i2c_adapter adapter;
 	struct i2c_algo_dp_aux_data algo;
 	bool is_pch_edp;
@@ -1678,8 +1678,10 @@ intel_dp_detect(struct drm_connector *connector, bool force)
 	else
 		status = g4x_dp_detect(intel_dp);
 
-	DRM_DEBUG_KMS("DPCD: %hx%hx%hx%hx\n", intel_dp->dpcd[0],
-		      intel_dp->dpcd[1], intel_dp->dpcd[2], intel_dp->dpcd[3]);
+	DRM_DEBUG_KMS("DPCD: %hx%hx%hx%hx%hx%hx%hx%hx\n", intel_dp->dpcd[0],
+		      intel_dp->dpcd[1], intel_dp->dpcd[2], intel_dp->dpcd[3],
+		      intel_dp->dpcd[4], intel_dp->dpcd[5], intel_dp->dpcd[6],
+		      intel_dp->dpcd[7]);
 
 	if (status != connector_status_connected)
 		return status;
-- 
1.7.6

[PATCH 5/7] drm/i915/dp: Better hexdump of DPCD

[Adam Jackson]

%hx alone prints 0 as "0", not "00".

Signed-off-by: Adam Jackson <ajax@redhat.com>
---
 drivers/gpu/drm/i915/intel_dp.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 2f0566b..13bddd3 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1678,10 +1678,10 @@ intel_dp_detect(struct drm_connector *connector, bool force)
 	else
 		status = g4x_dp_detect(intel_dp);
 
-	DRM_DEBUG_KMS("DPCD: %hx%hx%hx%hx%hx%hx%hx%hx\n", intel_dp->dpcd[0],
-		      intel_dp->dpcd[1], intel_dp->dpcd[2], intel_dp->dpcd[3],
-		      intel_dp->dpcd[4], intel_dp->dpcd[5], intel_dp->dpcd[6],
-		      intel_dp->dpcd[7]);
+	DRM_DEBUG_KMS("DPCD: %02hx%02hx%02hx%02hx%02hx%02hx%02hx%02hx\n",
+		      intel_dp->dpcd[0], intel_dp->dpcd[1], intel_dp->dpcd[2],
+		      intel_dp->dpcd[3], intel_dp->dpcd[4], intel_dp->dpcd[5],
+		      intel_dp->dpcd[6], intel_dp->dpcd[7]);
 
 	if (status != connector_status_connected)
 		return status;
-- 
1.7.6

[PATCH 6/7] drm/i915/dp: Retry DPCD fetch on G4X too

[Adam Jackson]

Signed-off-by: Adam Jackson <ajax@redhat.com>
---
 drivers/gpu/drm/i915/intel_dp.c |   33 +++++++++++++++------------------
 1 files changed, 15 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 13bddd3..9a0c3ca 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1596,10 +1596,22 @@ intel_dp_check_link_status(struct intel_dp *intel_dp)
 }
 
 static enum drm_connector_status
+i915_dp_detect_common(struct intel_dp *intel_dp)
+{
+	enum drm_connector_status status = connector_status_disconnected;
+
+	if (intel_dp_aux_native_read_retry(intel_dp, 0x000, intel_dp->dpcd,
+					   sizeof (intel_dp->dpcd)) &&
+	    (intel_dp->dpcd[DP_DPCD_REV] != 0))
+		status = connector_status_connected;
+
+	return status;
+}
+
+static enum drm_connector_status
 ironlake_dp_detect(struct intel_dp *intel_dp)
 {
 	enum drm_connector_status status;
-	bool ret;
 
 	/* Can't disconnect eDP, but you can close the lid... */
 	if (is_edp(intel_dp)) {
@@ -1609,13 +1621,7 @@ ironlake_dp_detect(struct intel_dp *intel_dp)
 		return status;
 	}
 
-	status = connector_status_disconnected;
-	ret = intel_dp_aux_native_read_retry(intel_dp,
-					     0x000, intel_dp->dpcd,
-					     sizeof (intel_dp->dpcd));
-	if (ret && intel_dp->dpcd[DP_DPCD_REV] != 0)
-		status = connector_status_connected;
-	return status;
+	return i915_dp_detect_common(intel_dp);
 }
 
 static enum drm_connector_status
@@ -1623,7 +1629,6 @@ g4x_dp_detect(struct intel_dp *intel_dp)
 {
 	struct drm_device *dev = intel_dp->base.base.dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	enum drm_connector_status status;
 	uint32_t temp, bit;
 
 	switch (intel_dp->output_reg) {
@@ -1645,15 +1650,7 @@ g4x_dp_detect(struct intel_dp *intel_dp)
 	if ((temp & bit) == 0)
 		return connector_status_disconnected;
 
-	status = connector_status_disconnected;
-	if (intel_dp_aux_native_read(intel_dp, 0x000, intel_dp->dpcd,
-				     sizeof (intel_dp->dpcd)) == sizeof (intel_dp->dpcd))
-	{
-		if (intel_dp->dpcd[DP_DPCD_REV] != 0)
-			status = connector_status_connected;
-	}
-
-	return status;
+	return i915_dp_detect_common(intel_dp);
 }
 
 /**
-- 
1.7.6

[PATCH 7/7] drm/i915/dp: Explicitly request 8/10 channel coding

[Adam Jackson]

It's not clear what a sink would do if you wrote zero to this register -
which I guess would mean "I don't support any channel encodings, good
luck" - but let's not find out.

Signed-off-by: Adam Jackson <ajax@redhat.com>
---
 drivers/gpu/drm/i915/intel_dp.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 9a0c3ca..1c3a36f 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -769,6 +769,7 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
 	memset(intel_dp->link_configuration, 0, DP_LINK_CONFIGURATION_SIZE);
 	intel_dp->link_configuration[0] = intel_dp->link_bw;
 	intel_dp->link_configuration[1] = intel_dp->lane_count;
+	intel_dp->link_configuration[8] = DP_SET_ANSI_8B10B;
 
 	/*
 	 * Check for DPCD version > 1.1 and enhanced framing support
-- 
1.7.6

Re: [PATCH 1/7] drm: Fill in more of the DisplayPort DPCD registers

[Keith Packard]

[-- Attachment #1.1: Type: text/plain, Size: 1252 bytes --]

On Tue, 12 Jul 2011 17:37:59 -0400, Adam Jackson <ajax@redhat.com> wrote:
> Signed-off-by: Adam Jackson <ajax@redhat.com>

> +# define DP_DWN_STRM_PORT_TYPE_TMDS	    (2 << 1)

This could be labeled TYPE_DVI_OR_HDMI according to the DP 1.1a spec.

> -

I find the blank lines useful in this file; they separate lists of
values for different fields.


> -#define DP_INTERLANE_ALIGN_DONE		    (1 << 0)
> -#define DP_DOWNSTREAM_PORT_STATUS_CHANGED   (1 << 6)
> -#define DP_LINK_STATUS_UPDATED		    (1 << 7)
> +# define DP_INTERLANE_ALIGN_DONE	    (1 << 0)
> +# define DP_DOWNSTREAM_PORT_STATUS_CHANGED  (1 << 6)
> +# define DP_LINK_STATUS_UPDATED		    (1 << 7)
>  
>  #define DP_SINK_STATUS			    0x205
> -
> -#define DP_RECEIVE_PORT_0_STATUS	    (1 << 0)
> -#define DP_RECEIVE_PORT_1_STATUS	    (1 << 1)
> +# define DP_RECEIVE_PORT_0_STATUS	    (1 << 0)
> +# define DP_RECEIVE_PORT_1_STATUS	    (1 << 1)
>  
>  #define DP_ADJUST_REQUEST_LANE0_1	    0x206
>  #define DP_ADJUST_REQUEST_LANE2_3	    0x207

Please make a separate patch for whitespace cleanups...

Otherwise, these changes all match the DP 1.1a spec that I compared them
with.

Reviewed-by: Keith Packard <keithp@keithp.com>

-- 
keith.packard@intel.com

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Re: [PATCH 7/7] drm/i915/dp: Explicitly request 8/10 channel coding

[Keith Packard]

[-- Attachment #1.1: Type: text/plain, Size: 98 bytes --]


Patches 2-7:

Reviewed-by: Keith Packard <keithp@keithp.com>

-- 
keith.packard@intel.com

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Re: [PATCH 1/7] drm: Fill in more of the DisplayPort DPCD registers

[Daniel Vetter]

On Tue, Jul 12, 2011 at 03:42:11PM -0700, Keith Packard wrote:
> On Tue, 12 Jul 2011 17:37:59 -0400, Adam Jackson <ajax@redhat.com> wrote:
> > Signed-off-by: Adam Jackson <ajax@redhat.com>
> 
> > +# define DP_DWN_STRM_PORT_TYPE_TMDS	    (2 << 1)
> 
> This could be labeled TYPE_DVI_OR_HDMI according to the DP 1.1a spec.
> 
> > -
> 
> I find the blank lines useful in this file; they separate lists of
> values for different fields.
> 
> 
> > -#define DP_INTERLANE_ALIGN_DONE		    (1 << 0)
> > -#define DP_DOWNSTREAM_PORT_STATUS_CHANGED   (1 << 6)
> > -#define DP_LINK_STATUS_UPDATED		    (1 << 7)
> > +# define DP_INTERLANE_ALIGN_DONE	    (1 << 0)
> > +# define DP_DOWNSTREAM_PORT_STATUS_CHANGED  (1 << 6)
> > +# define DP_LINK_STATUS_UPDATED		    (1 << 7)
> >  
> >  #define DP_SINK_STATUS			    0x205
> > -
> > -#define DP_RECEIVE_PORT_0_STATUS	    (1 << 0)
> > -#define DP_RECEIVE_PORT_1_STATUS	    (1 << 1)
> > +# define DP_RECEIVE_PORT_0_STATUS	    (1 << 0)
> > +# define DP_RECEIVE_PORT_1_STATUS	    (1 << 1)
> >  
> >  #define DP_ADJUST_REQUEST_LANE0_1	    0x206
> >  #define DP_ADJUST_REQUEST_LANE2_3	    0x207
> 
> Please make a separate patch for whitespace cleanups...
> 
> Otherwise, these changes all match the DP 1.1a spec that I compared them
> with.
> 
> Reviewed-by: Keith Packard <keithp@keithp.com>

Noticed this one here while going through list archives. Doesn't apply
properly anymore though. Adam, Dave?
-Daniel
-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48