messages from 2020-03-13 10:28:02 to 2020-03-16 16:17:29 UTC [more...]
[Intel-gfx] [PATCH 1/7] drm/i915: Move GGTT fence registers under gt/
2020-03-16 16:17 UTC (15+ messages)
` [Intel-gfx] [PATCH 2/7] drm/i915/gt: Pull restoration of GGTT fences underneath the GT
` [Intel-gfx] [PATCH 3/7] drm/i915: Remove manual save/resume of fence register state
` [Intel-gfx] [PATCH 4/7] drm/i915/gt: Allocate i915_fence_reg array
` [Intel-gfx] [PATCH 5/7] drm/i915/gt: Store the fence details on the fence
` [Intel-gfx] [PATCH 6/7] drm/i915/gt: Only wait for GPU activity before unbinding a GGTT fence
` [Intel-gfx] [PATCH 7/7] drm/i915/gt: Make fence revocation unequivocal
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Move GGTT fence registers under gt/
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH 0/7] drm/i915/gt: convert to struct drm_device based logging macros
2020-03-16 16:16 UTC (9+ messages)
` [Intel-gfx] [PATCH 1/7] drm/i915/ggtt: convert to "
` [Intel-gfx] [PATCH 2/7] drm/i915/lrc: convert to struct "
` [Intel-gfx] [PATCH 3/7] drm/i915/rc6: "
` [Intel-gfx] [PATCH 4/7] drm/i915/renderstate: use "
` [Intel-gfx] [PATCH 5/7] drm/i915/ring_submission: use "
` [Intel-gfx] [PATCH 6/7] drm/i915/rps: use struct "
` [Intel-gfx] [PATCH 7/7] drm/i915/workarounds: convert to "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: convert to struct "
[Intel-gfx] [PATCH] drm/i915/gem: Check for a closed context when looking up an engine
2020-03-16 16:14 UTC
[Intel-gfx] [PATCH v6 1/3] drm/i915/perf: remove generated code
2020-03-16 15:43 UTC (6+ messages)
` [Intel-gfx] [PATCH v6 2/3] drm/i915/perf: remove redundant power configuration register override
` [Intel-gfx] [PATCH v6 3/3] drm/i915/perf: introduce global sseu pinning
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v6,1/3] drm/i915/perf: remove generated code
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [RFC][PATCH 0/5] Introduce drm scaling filter property
2020-03-16 15:14 UTC (15+ messages)
` [Intel-gfx] [RFC][PATCH 1/5] drm: Introduce "
` [Intel-gfx] [RFC][PATCH 5/5] drm/i915/display: Add Nearest-neighbor based integer scaling support
[Intel-gfx] [PATCH] drm/i915/edp: Ignore short pulse when panel powered off
2020-03-16 15:14 UTC (6+ messages)
` [Intel-gfx] [PATCH v2] "
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/edp: Ignore short pulse when panel powered off (rev2)
[Intel-gfx] [PATCH] drm/i915/gem: Try allocating va from free space
2020-03-16 15:00 UTC
[Intel-gfx] [PATCH 0/9] drm/edid: DisplayID parser fixes
2020-03-16 14:44 UTC (12+ messages)
` [Intel-gfx] [PATCH 1/9] drm: Constify topology id
` [Intel-gfx] [PATCH 2/9] drm/edid: Swap some operands in for_each_displayid_db()
` [Intel-gfx] [PATCH 3/9] drm/edid: Remove idx==1 assumptions from all over the DispID parsing
` [Intel-gfx] [PATCH 4/9] drm/edid: Return DispID length from drm_find_displayid_extension()
` [Intel-gfx] [PATCH 5/9] drm/edid: Move validate_displayid() drm_find_displayid_extension()
` [Intel-gfx] [PATCH 6/9] drm/edid: Don't parse garbage as DispID blocks
` [Intel-gfx] [PATCH 7/9] drm/edid: Don't include ext block csum in DispID size
` [Intel-gfx] [PATCH 8/9] drm/edid: Clarify validate_displayid()
` [Intel-gfx] [PATCH 9/9] drm/edid: Fix DispID tile parsing for override EDID
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/edid: DisplayID parser fixes
[Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+
2020-03-16 14:43 UTC (15+ messages)
` [Intel-gfx] [PATCH 01/13] drm/i915/mst: Use .compute_config_late() to compute master transcoder
` [Intel-gfx] [PATCH 02/13] drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs
` [Intel-gfx] [PATCH 03/13] drm/i915: Drop usless master_transcoder assignments
` [Intel-gfx] [PATCH 04/13] drm/i915: Move icl_get_trans_port_sync_config() into the DDI code
` [Intel-gfx] [PATCH 05/13] drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2
` [Intel-gfx] [PATCH 06/13] drm/i915: Include port sync state in the state dump
` [Intel-gfx] [PATCH 07/13] drm/i915: Store cpu_transcoder_mask in device info
` [Intel-gfx] [PATCH 08/13] drm/i915: Implement port sync for SKL+
` [Intel-gfx] [PATCH 09/13] drm/i915: Eliminate port sync copy pasta
` [Intel-gfx] [PATCH 10/13] drm/i915: Fix port sync code to work with >2 pipes
` [Intel-gfx] [PATCH 11/13] drm/i915: Do pipe updates after enables for everyone
` [Intel-gfx] [PATCH 12/13] drm/i915: Pass atomic state to encoder hooks
` [Intel-gfx] [PATCH 13/13] drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Port sync for skl+
[Intel-gfx] P2P for DMA-buf
2020-03-16 9:52 UTC (12+ messages)
` [Intel-gfx] [PATCH 1/6] lib/scatterlist: add sg_set_dma_addr() function
[Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN
2020-03-16 13:56 UTC (3+ messages)
[Intel-gfx] [PATCH v7 0/3] drm/i915: Context aware user agnostic EU/Slice/Sub-slice control within kernel
2020-03-16 13:43 UTC (5+ messages)
` [Intel-gfx] [PATCH v7 1/3] drm/i915: Get active pending request for given context
` [Intel-gfx] [PATCH v7 2/3] drm/i915: set optimum eu/slice/sub-slice configuration based on load type
` [Intel-gfx] [PATCH v7 3/3] drm/i915: Predictive governor to control slice/subslice/eu
[Intel-gfx] [PATCH v7 0/3] Dynamic EU configuration of Slice/Sub-slice/EU
2020-03-16 13:37 UTC (4+ messages)
` [Intel-gfx] [PATCH v7 1/3] drm/i915: Get active pending request for given context
` [Intel-gfx] [PATCH v7 2/3] drm/i915: set optimum eu/slice/sub-slice configuration based on load type
` [Intel-gfx] [PATCH v7 3/3] drm/i915: Predictive governor to control slice/subslice/eu
[Intel-gfx] Fixes that failed to apply to v5.6-rc3
2020-03-16 13:14 UTC (2+ messages)
[Intel-gfx] [PATCH i-g-t 1/2] intel-ci: Tweak blacklist for very long running stability tests
2020-03-16 12:46 UTC (3+ messages)
` [Intel-gfx] [PATCH i-g-t 2/2] i915/sysfs_heartbeat_interval: Check for support prior to 'nopreempt' test
[Intel-gfx] [PATCH 01/15] drm/i915: Move GGTT fence registers under gt/
2020-03-16 11:42 UTC (15+ messages)
` [Intel-gfx] [PATCH 02/15] drm/i915/gt: Pull restoration of GGTT fences underneath the GT
` [Intel-gfx] [PATCH 03/15] drm/i915: Remove manual save/resume of fence register state
` [Intel-gfx] [PATCH 04/15] drm/i915/gt: Allocate i915_fence_reg array
` [Intel-gfx] [PATCH 05/15] drm/i915/gt: Only wait for GPU activity before unbinding a GGTT fence
` [Intel-gfx] [PATCH 06/15] drm/i915/gt: Store the fence details on the fence
` [Intel-gfx] [PATCH 07/15] drm/i915/gt: Make fence revocation unequivocal
` [Intel-gfx] [PATCH 08/15] drm/i915/gem: Drop cached obj->bind_count
` [Intel-gfx] [PATCH 09/15] drm/i915: Immediately execute the fenced work
` [Intel-gfx] [PATCH 10/15] drm/i915/gem: Assign context id for async work
` [Intel-gfx] [PATCH 11/15] drm/i915: Export a preallocate variant of i915_active_acquire()
` [Intel-gfx] [PATCH 12/15] drm/i915/gem: Split eb_vma into its own allocation
` [Intel-gfx] [PATCH 13/15] drm/i915/gem: Separate the ww_mutex walker into its own list
` [Intel-gfx] [PATCH 14/15] drm/i915/gem: Asynchronous GTT unbinding
` [Intel-gfx] [PATCH 15/15] drm/i915/gem: Bind the fence async for execbuf
[Intel-gfx] [PATCH v1 0/3] Consider DBuf bandwidth when calculating CDCLK
2020-03-16 11:37 UTC (4+ messages)
` [Intel-gfx] [PATCH v1 1/3] drm/i915: Decouple cdclk calculation from modeset checks
` [Intel-gfx] [PATCH v1 2/3] drm/i915: Adjust CDCLK accordingly to our DBuf bw needs
` [Intel-gfx] [PATCH v1 3/3] drm/i915: Remove unneeded hack now for CDCLK
[Intel-gfx] [CI 1/4] drm/i915: Move GGTT fence registers under gt/
2020-03-16 11:38 UTC (4+ messages)
` [Intel-gfx] [CI 2/4] drm/i915/gt: Pull restoration of GGTT fences underneath the GT
` [Intel-gfx] [CI 3/4] drm/i915: Remove manual save/resume of fence register state
` [Intel-gfx] [CI 4/4] drm/i915/gt: Allocate i915_fence_reg array
[Intel-gfx] [PATCH v5 0/7] DP Phy compliance auto test
2020-03-16 10:37 UTC (8+ messages)
` [Intel-gfx] [PATCH v5 1/7] drm/amd/display: Align macro name as per DP spec
` [Intel-gfx] [PATCH v5 2/7] drm/dp: get/set phy compliance pattern
` [Intel-gfx] [PATCH v5 3/7] drm/i915/dp: Made intel_dp_adjust_train() non-static
` [Intel-gfx] [PATCH v5 4/7] drm/i915/dp: Preparation for DP phy compliance auto test
` [Intel-gfx] [PATCH v5 5/7] drm/i915/dp: Add debugfs entry for DP phy compliance
` [Intel-gfx] [PATCH v5 6/7] drm/i915/dp: Register definition for DP compliance register
` [Intel-gfx] [PATCH v5 7/7] drm/i915/dp: Program vswing, pre-emphasis, test-pattern
[Intel-gfx] [PATCH] drm/mm: Allow drm_mm_initialized() to be used outside of the locks
2020-03-16 10:07 UTC (2+ messages)
[Intel-gfx] [PATCH] drm: Mark up racy check of drm_gem_object.handle_count
2020-03-16 10:03 UTC (2+ messages)
[Intel-gfx] [PATCH] MAINTAINERS: adjust to reservation.h renaming
2020-03-16 9:56 UTC (6+ messages)
[Intel-gfx] [PATCH v5 1/3] drm/i915/perf: remove generated code
2020-03-16 9:28 UTC (10+ messages)
` [Intel-gfx] [PATCH v5 2/3] drm/i915/perf: remove redundant power configuration register override
` [Intel-gfx] [PATCH v5 3/3] drm/i915/perf: introduce global sseu pinning
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/3] drm/i915/perf: remove generated code
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 00/51] drm_device managed resources, v4
2020-03-16 9:07 UTC (12+ messages)
` [Intel-gfx] [PATCH 03/51] drm: add managed resources tied to drm_device
` [Intel-gfx] [PATCH 21/51] drm: Use drmm_ for drm_dev_init cleanup
` [Intel-gfx] [PATCH 22/51] drm: manage drm_minor cleanup with drmm_
[Intel-gfx] [RESUBMIT PATCH 0/2] tests/gem_userptr_blits: Refresh other now MMAP_GTT dependent subtests
2020-03-16 8:45 UTC (3+ messages)
` [Intel-gfx] [RESUBMIT PATCH 1/2] tests/gem_userptr_blits: Refresh readonly-mmap-unsync exercise
` [Intel-gfx] [RESUBMIT PATCH 2/2] tests/gem_userptr_blits: Refresh other now MMAP_GTT dependent subtests
[Intel-gfx] [PATCH i-g-t] tests/gem_exec_gttfill: MMAP_OFFSET related refresh
2020-03-16 8:09 UTC (2+ messages)
[Intel-gfx] Requesting access to CLOSE the issue
2020-03-16 7:25 UTC
[Intel-gfx] [PATCH v7 00/18] In order to readout DP SDPs, refactors the handling of DP SDPs
2020-03-16 5:22 UTC (9+ messages)
` [Intel-gfx] [PATCH v7 01/18] drm: Add DP1.4 VSC SDP Payload related Data Structures
` [Intel-gfx] [PATCH v7 04/18] drm/i915/dp: Add writing of DP SDPs
` [Intel-gfx] [PATCH v7 06/18] drm/i915/dp: Read out "
` [Intel-gfx] [PATCH v7 14/18] drm/i915: Fix enabled infoframe states of lspcon
[Intel-gfx] [PATCH v6 00/18] In order to readout DP SDPs, refactors the handling of DP SDPs
2020-03-16 5:19 UTC (3+ messages)
` [Intel-gfx] [PATCH v6 14/18] drm/i915: Fix enabled infoframe states of lspcon
[Intel-gfx] [PATCH] drm/i915/dp: Add dpcd link_rate quirk for Apple 15" MBP 2017 (v3)
2020-03-16 4:23 UTC
[Intel-gfx] [PATCH v7 0/3] Dynamic EU configuration of Slice/Sub-slice/EU
2020-03-15 22:30 UTC (18+ messages)
` [Intel-gfx] [PATCH v7 1/3] drm/i915: Get active pending request for given context
` [Intel-gfx] [PATCH v7 2/3] drm/i915: set optimum eu/slice/sub-slice configuration based on load type
` [Intel-gfx] [PATCH v7 3/3] drm/i915: Predictive governor to control slice/subslice/eu
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Dynamic EU configuration of Slice/Sub-slice/EU (rev5)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Dynamic EU configuration of Slice/Sub-slice/EU (rev6)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
[Intel-gfx] [PATCH] drm/i915/gt: Restrict gen7 w/a batch to Haswell
2020-03-14 0:45 UTC (3+ messages)
[Intel-gfx] [PULL] drm-intel-next for 5.7-rc1
2020-03-14 0:15 UTC
[Intel-gfx] [PATCH i-g-t 1/5] lib/i915: Create a context wrapping one specific engine
2020-03-13 22:26 UTC (6+ messages)
` [Intel-gfx] [PATCH i-g-t 2/5] lib/i915: Dynamic subtest constructor for sysfs/engines
` [Intel-gfx] [PATCH i-g-t 3/5] i915: Exercise preemption timeout controls in sysfs
[Intel-gfx] [PATCH] drm/i915/tgl: Remove require_force_probe protection
2020-03-13 21:31 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for "
[Intel-gfx] [PATCH i-g-t 1/2] lib/i915: Allow writing of engine properties
2020-03-13 20:04 UTC (2+ messages)
` [Intel-gfx] [PATCH i-g-t 2/2] i915/gem_ctx_persistence: Tune reset-timeout
[Intel-gfx] [PATCH 1/2] drm/i915: use effective iDisp BCLK value for CDCLK calculation
2020-03-13 18:17 UTC (5+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915: move audio CDCLK constraint setup to bind/unbind
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: use effective iDisp BCLK value for CDCLK calculation
[Intel-gfx] [RFC 00/12] Per client engine busyness
2020-03-13 17:26 UTC (13+ messages)
` [Intel-gfx] [RFC 01/10] drm/i915: Expose list of clients in sysfs
` [Intel-gfx] [RFC 02/10] drm/i915: Update client name on context create
` [Intel-gfx] [RFC 03/10] drm/i915: Make GEM contexts track DRM clients
` [Intel-gfx] [RFC 04/10] drm/i915: Use explicit flag to mark unreachable intel_context
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Per client engine busyness (rev7)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] ✗ Fi.CI.IGT: failure for Gen11 workarounds (rev5)
2020-03-13 16:05 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915: do AUD_FREQ_CNTRL state save on all gen9+ platforms
2020-03-13 15:50 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
[Intel-gfx] [PATCH v2 0/6] Re-org uC debugfs files and move them under GT
2020-03-13 15:38 UTC (7+ messages)
` [Intel-gfx] [PATCH v2 2/6] drm/i915/guc: drop stage_pool debugfs
` [Intel-gfx] [PATCH v2 3/6] drm/i915/huc: make "support huc" reflect HW capabilities
` [Intel-gfx] [PATCH v2 5/6] drm/i915/uc: Move uC debugfs to its own folder under GT
[Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only
2020-03-13 14:54 UTC (12+ messages)
[Intel-gfx] [PATCH 0/4] drm/i915/perf: add OA interrupt support
2020-03-13 14:14 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/perf: add OA interrupt support (rev6)
[Intel-gfx] [PATCH v19 0/8] Refactor Gen11+ SAGV support
2020-03-13 14:14 UTC (6+ messages)
` [Intel-gfx] [PATCH v19 3/8] drm/i915: Add intel_bw_get_*_state helpers
[Intel-gfx] [PATCH v4 1/3] drm/i915/perf: remove generated code
2020-03-13 13:40 UTC (6+ messages)
` [Intel-gfx] [PATCH v4 3/3] drm/i915/perf: introduce global sseu pinning
[Intel-gfx] [PATCH] drm/i915/selftest: Add move poison patterns
2020-03-13 11:25 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [PATCH] drm/i915/gt: Wait for RCUs frees before asserting idle on unload
2020-03-13 11:08 UTC (2+ messages)
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