From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Jonathan McDowell <noodles@earth.li>
Cc: Andy Gross <agross@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Ansuel Smith <ansuelsmth@gmail.com>,
Vinod Koul <vkoul@kernel.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 3/5] ARM: dts: qcom: Add USB port definitions to ipq806x
Date: Mon, 31 May 2021 10:58:06 -0500 [thread overview]
Message-ID: <YLUHjtLkkp14HEqH@builder.lan> (raw)
In-Reply-To: <ad2121defc539abdb339b23eef80a8930b5f086e.1621531633.git.noodles@earth.li>
On Thu 20 May 12:30 CDT 2021, Jonathan McDowell wrote:
> Signed-off-by: Jonathan McDowell <noodles@earth.li>
> ---
> arch/arm/boot/dts/qcom-ipq8064.dtsi | 88 +++++++++++++++++++++++++++++
> 1 file changed, 88 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index 9628092217cb..c66859abdfd5 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -1026,6 +1026,94 @@
> status = "disabled";
> };
>
> + hs_phy_0: hs_phy_0 {
The node name should be some generic-thing@unit-address, so I fixed up
all your phys as "phy@100f8800" while applying your patches.
Thank you,
Bjorn
> + compatible = "qcom,ipq806x-usb-phy-hs";
> + reg = <0x100f8800 0x30>;
> + clocks = <&gcc USB30_0_UTMI_CLK>;
> + clock-names = "ref";
> + #phy-cells = <0>;
> +
> + status = "disabled";
> + };
> +
> + ss_phy_0: ss_phy_0 {
> + compatible = "qcom,ipq806x-usb-phy-ss";
> + reg = <0x100f8830 0x30>;
> + clocks = <&gcc USB30_0_MASTER_CLK>;
> + clock-names = "ref";
> + #phy-cells = <0>;
> +
> + status = "disabled";
> + };
> +
> + usb3_0: usb3@100f8800 {
> + compatible = "qcom,dwc3", "syscon";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x100f8800 0x8000>;
> + clocks = <&gcc USB30_0_MASTER_CLK>;
> + clock-names = "core";
> +
> + ranges;
> +
> + resets = <&gcc USB30_0_MASTER_RESET>;
> + reset-names = "master";
> +
> + status = "disabled";
> +
> + dwc3_0: dwc3@10000000 {
> + compatible = "snps,dwc3";
> + reg = <0x10000000 0xcd00>;
> + interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
> + phys = <&hs_phy_0>, <&ss_phy_0>;
> + phy-names = "usb2-phy", "usb3-phy";
> + dr_mode = "host";
> + snps,dis_u3_susphy_quirk;
> + };
> + };
> +
> + hs_phy_1: hs_phy_1 {
> + compatible = "qcom,ipq806x-usb-phy-hs";
> + reg = <0x110f8800 0x30>;
> + clocks = <&gcc USB30_1_UTMI_CLK>;
> + clock-names = "ref";
> + #phy-cells = <0>;
> + };
> +
> + ss_phy_1: ss_phy_1 {
> + compatible = "qcom,ipq806x-usb-phy-ss";
> + reg = <0x110f8830 0x30>;
> + clocks = <&gcc USB30_1_MASTER_CLK>;
> + clock-names = "ref";
> + #phy-cells = <0>;
> + };
> +
> + usb3_1: usb3@110f8800 {
> + compatible = "qcom,dwc3", "syscon";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x110f8800 0x8000>;
> + clocks = <&gcc USB30_1_MASTER_CLK>;
> + clock-names = "core";
> +
> + ranges;
> +
> + resets = <&gcc USB30_1_MASTER_RESET>;
> + reset-names = "master";
> +
> + status = "disabled";
> +
> + dwc3_1: dwc3@11000000 {
> + compatible = "snps,dwc3";
> + reg = <0x11000000 0xcd00>;
> + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> + phys = <&hs_phy_1>, <&ss_phy_1>;
> + phy-names = "usb2-phy", "usb3-phy";
> + dr_mode = "host";
> + snps,dis_u3_susphy_quirk;
> + };
> + };
> +
> vsdcc_fixed: vsdcc-regulator {
> compatible = "regulator-fixed";
> regulator-name = "SDCC Power";
> --
> 2.20.1
>
next prev parent reply other threads:[~2021-05-31 17:24 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-15 16:52 [PATCH 0/5] ARM: dts: qcom: Enable various devices for IPQ806x / RB3011 Jonathan McDowell
2021-05-15 16:52 ` [PATCH 1/5] ARM: dts: qcom: Add ADM DMA + NAND definitions to ipq806x Jonathan McDowell
2021-05-17 9:40 ` Vinod Koul
2021-05-19 10:29 ` Jonathan McDowell
2021-05-15 16:52 ` [PATCH 2/5] ARM: dts: qcom: Add tsens details " Jonathan McDowell
2021-05-17 9:42 ` Vinod Koul
2021-05-19 11:00 ` Jonathan McDowell
2021-05-15 16:52 ` [PATCH 3/5] ARM: dts: qcom: Add USB port definitions " Jonathan McDowell
2021-05-15 16:53 ` [PATCH 4/5] ARM: dts: qcom: add L2CC and RPM for IPQ8064 Jonathan McDowell
2021-05-15 16:53 ` [PATCH 5/5] ARM: dts: qcom: Enable NAND + USB for RB3011 Jonathan McDowell
2021-05-20 17:29 ` [PATCH v2 0/5] ARM: dts: qcom: Enable various devices for IPQ806x / RB3011 Jonathan McDowell
2021-05-20 17:29 ` [PATCH v2 1/5] ARM: dts: qcom: Add ADM DMA + NAND definitions to ipq806x Jonathan McDowell
2021-05-20 17:29 ` [PATCH v2 2/5] ARM: dts: qcom: Add tsens details " Jonathan McDowell
2021-05-20 17:30 ` [PATCH v2 3/5] ARM: dts: qcom: Add USB port definitions " Jonathan McDowell
2021-05-31 15:58 ` Bjorn Andersson [this message]
2021-05-20 17:30 ` [PATCH v2 4/5] ARM: dts: qcom: add L2CC and RPM for IPQ8064 Jonathan McDowell
2021-05-20 17:30 ` [PATCH v2 5/5] ARM: dts: qcom: Enable NAND + USB for RB3011 Jonathan McDowell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YLUHjtLkkp14HEqH@builder.lan \
--to=bjorn.andersson@linaro.org \
--cc=agross@kernel.org \
--cc=ansuelsmth@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=noodles@earth.li \
--cc=robh+dt@kernel.org \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).