From: Yazen Ghannam <yazen.ghannam@amd.com>
To: linux-edac@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, bp@alien8.de, mchehab@kernel.org,
tony.luck@intel.com, Smita.KoralahalliChannabasappa@amd.com,
Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH v2 23/31] EDAC/amd64: Define function to calculate CS ID
Date: Wed, 23 Jun 2021 19:19:54 +0000 [thread overview]
Message-ID: <20210623192002.3671647-24-yazen.ghannam@amd.com> (raw)
In-Reply-To: <20210623192002.3671647-1-yazen.ghannam@amd.com>
Move code used to calculate the CS ID into a separate helper function.
Drop redundant code comment about reading DF register.
The "num_intlv_bits" variable is left uninitialized as it will be removed
in a later patch.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Link:
https://lkml.kernel.org/r/20210507190140.18854-20-Yazen.Ghannam@amd.com
v1->v2:
* Moved from arch/x86 to EDAC.
drivers/edac/amd64_edac.c | 98 +++++++++++++++++++--------------------
1 file changed, 48 insertions(+), 50 deletions(-)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index b497af7c3561..0270bf4f1f90 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1286,12 +1286,54 @@ static void get_intlv_num_chan(struct addr_ctx *ctx)
}
}
-static int denormalize_addr(struct addr_ctx *ctx)
+static int calculate_cs_id(struct addr_ctx *ctx)
{
+ u8 die_id_shift, die_id_mask, socket_id_shift, socket_id_mask;
+ u8 die_id_bit, sock_id_bit, cs_fabric_id, cs_mask = 0;
u32 tmp;
- u8 die_id_shift, die_id_mask, socket_id_shift, socket_id_mask;
- u8 num_intlv_bits, cs_mask = 0;
+ if (amd_df_indirect_read(ctx->nid, df_regs[FAB_BLK_INST_INFO_3], ctx->inst_id, &tmp))
+ return -EINVAL;
+
+ cs_fabric_id = (tmp >> 8) & 0xFF;
+ die_id_bit = 0;
+
+ /* If interleaved over more than 1 channel: */
+ if (ctx->intlv_num_chan) {
+ die_id_bit = ctx->intlv_num_chan;
+ cs_mask = (1 << die_id_bit) - 1;
+ ctx->cs_id = cs_fabric_id & cs_mask;
+ }
+
+ sock_id_bit = die_id_bit;
+
+ if (ctx->intlv_num_dies || ctx->intlv_num_sockets)
+ if (amd_df_indirect_read(ctx->nid, df_regs[SYS_FAB_ID_MASK], ctx->inst_id, &tmp))
+ return -EINVAL;
+
+ /* If interleaved over more than 1 die: */
+ if (ctx->intlv_num_dies) {
+ sock_id_bit = die_id_bit + ctx->intlv_num_dies;
+ die_id_shift = (tmp >> 24) & 0xF;
+ die_id_mask = (tmp >> 8) & 0xFF;
+
+ ctx->cs_id |= ((cs_fabric_id & die_id_mask) >> die_id_shift) << die_id_bit;
+ }
+
+ /* If interleaved over more than 1 socket: */
+ if (ctx->intlv_num_sockets) {
+ socket_id_shift = (tmp >> 28) & 0xF;
+ socket_id_mask = (tmp >> 16) & 0xFF;
+
+ ctx->cs_id |= ((cs_fabric_id & socket_id_mask) >> socket_id_shift) << sock_id_bit;
+ }
+
+ return 0;
+}
+
+static int denormalize_addr(struct addr_ctx *ctx)
+{
+ u8 num_intlv_bits;
/* Return early if no interleaving. */
if (ctx->intlv_mode == NONE)
@@ -1306,56 +1348,12 @@ static int denormalize_addr(struct addr_ctx *ctx)
ctx->make_space_for_cs_id(ctx);
+ if (calculate_cs_id(ctx))
+ return -EINVAL;
+
if (num_intlv_bits > 0) {
- u8 die_id_bit, sock_id_bit, cs_fabric_id;
u64 temp_addr_i;
- /*
- * Read FabricBlockInstanceInformation3_CS[BlockFabricID].
- * This is the fabric id for this coherent slave. Use
- * umc/channel# as instance id of the coherent slave
- * for FICAA.
- */
- if (amd_df_indirect_read(ctx->nid, df_regs[FAB_BLK_INST_INFO_3],
- ctx->inst_id, &tmp))
- return -EINVAL;
-
- cs_fabric_id = (tmp >> 8) & 0xFF;
- die_id_bit = 0;
-
- /* If interleaved over more than 1 channel: */
- if (ctx->intlv_num_chan) {
- die_id_bit = ctx->intlv_num_chan;
- cs_mask = (1 << die_id_bit) - 1;
- ctx->cs_id = cs_fabric_id & cs_mask;
- }
-
- sock_id_bit = die_id_bit;
-
- if (ctx->intlv_num_dies || ctx->intlv_num_sockets)
- if (amd_df_indirect_read(ctx->nid, df_regs[SYS_FAB_ID_MASK],
- ctx->inst_id, &tmp))
- return -EINVAL;
-
- /* If interleaved over more than 1 die. */
- if (ctx->intlv_num_dies) {
- sock_id_bit = die_id_bit + ctx->intlv_num_dies;
- die_id_shift = (tmp >> 24) & 0xF;
- die_id_mask = (tmp >> 8) & 0xFF;
-
- ctx->cs_id |= ((cs_fabric_id & die_id_mask)
- >> die_id_shift) << die_id_bit;
- }
-
- /* If interleaved over more than 1 socket. */
- if (ctx->intlv_num_sockets) {
- socket_id_shift = (tmp >> 28) & 0xF;
- socket_id_mask = (tmp >> 16) & 0xFF;
-
- ctx->cs_id |= ((cs_fabric_id & socket_id_mask)
- >> socket_id_shift) << sock_id_bit;
- }
-
/*
* The pre-interleaved address consists of XXXXXXIIIYYYYY
* where III is the ID for this CS, and XXXXXXYYYYY are the
--
2.25.1
next prev parent reply other threads:[~2021-06-23 19:21 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-23 19:19 [PATCH v2 00/31] AMD MCA Address Translation Updates Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 01/31] x86/MCE/AMD, EDAC/amd64: Move address translation to AMD64 EDAC Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 02/31] x86/amd_nb, EDAC/amd64: Move DF Indirect Read " Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 03/31] EDAC/amd64: Don't use naked values for DF registers Yazen Ghannam
2021-06-25 15:21 ` Borislav Petkov
2021-07-08 19:35 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 04/31] EDAC/amd64: Allow for DF Indirect Broadcast reads Yazen Ghannam
2021-06-30 16:22 ` Borislav Petkov
2021-07-08 19:44 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 05/31] EDAC/amd64: Add context struct Yazen Ghannam
2021-06-30 17:17 ` Borislav Petkov
2021-07-08 19:53 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 06/31] EDAC/amd64: Define Data Fabric operations Yazen Ghannam
2021-06-30 17:19 ` Borislav Petkov
2021-07-08 19:55 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 07/31] EDAC/amd64: Define functions for DramOffset Yazen Ghannam
2021-06-30 17:27 ` Borislav Petkov
2021-07-08 20:08 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 08/31] EDAC/amd64: Define function to read DRAM address map registers Yazen Ghannam
2021-06-30 17:29 ` Borislav Petkov
2021-06-23 19:19 ` [PATCH v2 09/31] EDAC/amd64: Define function to find interleaving mode Yazen Ghannam
2021-06-30 17:33 ` Borislav Petkov
2021-07-08 20:09 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 10/31] EDAC/amd64: Define function to denormalize address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 11/31] EDAC/amd64: Define function to add DRAM base and hole Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 12/31] EDAC/amd64: Define function to dehash address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 13/31] EDAC/amd64: Define function to check DRAM limit address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 14/31] EDAC/amd64: Remove goto statements Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 15/31] EDAC/amd64: Simplify function parameters Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 16/31] EDAC/amd64: Define function to get Interleave Address Bit Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 17/31] EDAC/amd64: Skip denormalization if no interleaving Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 18/31] EDAC/amd64: Define function to get number of interleaved channels Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 19/31] EDAC/amd64: Define function to get number of interleaved dies Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 20/31] EDAC/amd64: Define function to get number of interleaved sockets Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 21/31] EDAC/amd64: Remove unnecessary assert Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 22/31] EDAC/amd64: Define function to make space for CS ID Yazen Ghannam
2021-06-23 19:19 ` Yazen Ghannam [this message]
2021-06-23 19:19 ` [PATCH v2 24/31] EDAC/amd64: Define function to insert CS ID into address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 25/31] EDAC/amd64: Define function to get CS Fabric ID Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 26/31] EDAC/amd64: Define function to find shift and mask values Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 27/31] EDAC/amd64: Update CS ID calculation to match reference code Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 28/31] EDAC/amd64: Match hash function to " Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 29/31] EDAC/amd64: Define helper function to get interleave address select bit Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 30/31] EDAC/amd64: Add support for address translation on DF3 systems Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 31/31] EDAC/amd64: Add glossary of acronyms for address translation Yazen Ghannam
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