From: Borislav Petkov <bp@alien8.de>
To: Yazen Ghannam <yazen.ghannam@amd.com>
Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
mchehab@kernel.org, tony.luck@intel.com,
Smita.KoralahalliChannabasappa@amd.com
Subject: Re: [PATCH v2 05/31] EDAC/amd64: Add context struct
Date: Wed, 30 Jun 2021 19:17:41 +0200 [thread overview]
Message-ID: <YNynNc9oMZVnri8X@zn.tnic> (raw)
In-Reply-To: <20210623192002.3671647-6-yazen.ghannam@amd.com>
On Wed, Jun 23, 2021 at 07:19:36PM +0000, Yazen Ghannam wrote:
> Define an address translation context struct. This will hold values that
> will be passed between multiple functions.
>
> Save return address, Node ID, and the Instance ID number to start.
> Currently, we use the UMC number as the Instance ID, but future DF
Please use passive voice in your commit message: no "we" or "I", etc.
And this here is a perfect example: it sounds here like "we" is "AMD"
but we use "we" mostly for the kernel. And there's the confusion.
So please teach yourself to formulate those commit messages properly -
the future you will thank you, trust me!
:-)
> versions may use another value.
>
> Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
> ---
> Link:
> https://lkml.kernel.org/r/20210507190140.18854-3-Yazen.Ghannam@amd.com
>
> v1->v2:
> * Moved from arch/x86 to EDAC.
> * Changed "umc" variable to "inst_id".
> * Drop df_types enum.
>
> drivers/edac/amd64_edac.c | 49 +++++++++++++++++++++++++--------------
> 1 file changed, 31 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> index d67cd8f57b94..62eca188458f 100644
> --- a/drivers/edac/amd64_edac.c
> +++ b/drivers/edac/amd64_edac.c
> @@ -1079,12 +1079,15 @@ static struct df_reg df_regs[] = {
> [SYS_FAB_ID_MASK] = {1, 0x208},
> };
>
> +struct addr_ctx {
> + u64 ret_addr;
> + u16 nid;
> + u8 inst_id;
> +};
> +
> static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
> {
> u64 dram_base_addr, dram_limit_addr, dram_hole_base;
> - /* We start from the normalized address */
> - u64 ret_addr = norm_addr;
> -
> u32 tmp;
>
> u8 die_id_shift, die_id_mask, socket_id_shift, socket_id_mask;
> @@ -1097,6 +1100,16 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
>
> struct df_reg reg;
>
> + struct addr_ctx ctx;
Those empty-lines spaced-out local vars look weird.
> + memset(&ctx, 0, sizeof(ctx));
> +
> + /* We start from the normalized address */
> + ctx.ret_addr = norm_addr;
> +
> + ctx.nid = nid;
> + ctx.inst_id = umc;
> +
> if (amd_df_indirect_read(nid, df_regs[DRAM_OFFSET], umc, &tmp))
> goto out_err;
>
> @@ -1105,7 +1118,7 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
> u64 hi_addr_offset = (tmp & GENMASK_ULL(31, 20)) << 8;
>
> if (norm_addr >= hi_addr_offset) {
> - ret_addr -= hi_addr_offset;
> + ctx.ret_addr -= hi_addr_offset;
> base = 1;
> }
> }
> @@ -1236,14 +1249,14 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
> * bits there are. "intlv_addr_bit" tells us how many "Y" bits
> * there are (where "I" starts).
> */
> - temp_addr_y = ret_addr & GENMASK_ULL(intlv_addr_bit-1, 0);
> + temp_addr_y = ctx.ret_addr & GENMASK_ULL(intlv_addr_bit - 1, 0);
> temp_addr_i = (cs_id << intlv_addr_bit);
> - temp_addr_x = (ret_addr & GENMASK_ULL(63, intlv_addr_bit)) << num_intlv_bits;
> - ret_addr = temp_addr_x | temp_addr_i | temp_addr_y;
> + temp_addr_x = (ctx.ret_addr & GENMASK_ULL(63, intlv_addr_bit)) << num_intlv_bits;
> + ctx.ret_addr = temp_addr_x | temp_addr_i | temp_addr_y;
You want to align those vertically on the "=" for better readability.
> }
>
> /* Add dram base address */
> - ret_addr += dram_base_addr;
> + ctx.ret_addr += dram_base_addr;
>
> /* If legacy MMIO hole enabled */
> if (lgcy_mmio_hole_en) {
> @@ -1251,29 +1264,29 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
> goto out_err;
>
> dram_hole_base = tmp & GENMASK(31, 24);
> - if (ret_addr >= dram_hole_base)
> - ret_addr += (BIT_ULL(32) - dram_hole_base);
> + if (ctx.ret_addr >= dram_hole_base)
> + ctx.ret_addr += (BIT_ULL(32) - dram_hole_base);
> }
>
> if (hash_enabled) {
> /* Save some parentheses and grab ls-bit at the end. */
> - hashed_bit = (ret_addr >> 12) ^
> - (ret_addr >> 18) ^
> - (ret_addr >> 21) ^
> - (ret_addr >> 30) ^
> + hashed_bit = (ctx.ret_addr >> 12) ^
> + (ctx.ret_addr >> 18) ^
> + (ctx.ret_addr >> 21) ^
> + (ctx.ret_addr >> 30) ^
> cs_id;
>
> hashed_bit &= BIT(0);
>
> - if (hashed_bit != ((ret_addr >> intlv_addr_bit) & BIT(0)))
> - ret_addr ^= BIT(intlv_addr_bit);
> + if (hashed_bit != ((ctx.ret_addr >> intlv_addr_bit) & BIT(0)))
> + ctx.ret_addr ^= BIT(intlv_addr_bit);
> }
>
> /* Is calculated system address is above DRAM limit address? */
> - if (ret_addr > dram_limit_addr)
> + if (ctx.ret_addr > dram_limit_addr)
> goto out_err;
>
> - *sys_addr = ret_addr;
> + *sys_addr = ctx.ret_addr;
So adding ctx to exchange data between functions - that was a good idea.
But what this patch does is pointless because you simply replace those
variables with a local struct.
I guess the aha moment will come with the later patches when you start
passing it around to functions.
/me waits to see.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2021-06-30 17:17 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-23 19:19 [PATCH v2 00/31] AMD MCA Address Translation Updates Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 01/31] x86/MCE/AMD, EDAC/amd64: Move address translation to AMD64 EDAC Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 02/31] x86/amd_nb, EDAC/amd64: Move DF Indirect Read " Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 03/31] EDAC/amd64: Don't use naked values for DF registers Yazen Ghannam
2021-06-25 15:21 ` Borislav Petkov
2021-07-08 19:35 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 04/31] EDAC/amd64: Allow for DF Indirect Broadcast reads Yazen Ghannam
2021-06-30 16:22 ` Borislav Petkov
2021-07-08 19:44 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 05/31] EDAC/amd64: Add context struct Yazen Ghannam
2021-06-30 17:17 ` Borislav Petkov [this message]
2021-07-08 19:53 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 06/31] EDAC/amd64: Define Data Fabric operations Yazen Ghannam
2021-06-30 17:19 ` Borislav Petkov
2021-07-08 19:55 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 07/31] EDAC/amd64: Define functions for DramOffset Yazen Ghannam
2021-06-30 17:27 ` Borislav Petkov
2021-07-08 20:08 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 08/31] EDAC/amd64: Define function to read DRAM address map registers Yazen Ghannam
2021-06-30 17:29 ` Borislav Petkov
2021-06-23 19:19 ` [PATCH v2 09/31] EDAC/amd64: Define function to find interleaving mode Yazen Ghannam
2021-06-30 17:33 ` Borislav Petkov
2021-07-08 20:09 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 10/31] EDAC/amd64: Define function to denormalize address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 11/31] EDAC/amd64: Define function to add DRAM base and hole Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 12/31] EDAC/amd64: Define function to dehash address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 13/31] EDAC/amd64: Define function to check DRAM limit address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 14/31] EDAC/amd64: Remove goto statements Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 15/31] EDAC/amd64: Simplify function parameters Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 16/31] EDAC/amd64: Define function to get Interleave Address Bit Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 17/31] EDAC/amd64: Skip denormalization if no interleaving Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 18/31] EDAC/amd64: Define function to get number of interleaved channels Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 19/31] EDAC/amd64: Define function to get number of interleaved dies Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 20/31] EDAC/amd64: Define function to get number of interleaved sockets Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 21/31] EDAC/amd64: Remove unnecessary assert Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 22/31] EDAC/amd64: Define function to make space for CS ID Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 23/31] EDAC/amd64: Define function to calculate " Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 24/31] EDAC/amd64: Define function to insert CS ID into address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 25/31] EDAC/amd64: Define function to get CS Fabric ID Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 26/31] EDAC/amd64: Define function to find shift and mask values Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 27/31] EDAC/amd64: Update CS ID calculation to match reference code Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 28/31] EDAC/amd64: Match hash function to " Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 29/31] EDAC/amd64: Define helper function to get interleave address select bit Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 30/31] EDAC/amd64: Add support for address translation on DF3 systems Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 31/31] EDAC/amd64: Add glossary of acronyms for address translation Yazen Ghannam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YNynNc9oMZVnri8X@zn.tnic \
--to=bp@alien8.de \
--cc=Smita.KoralahalliChannabasappa@amd.com \
--cc=linux-edac@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mchehab@kernel.org \
--cc=tony.luck@intel.com \
--cc=yazen.ghannam@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).