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From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: Huacai Chen <chenhc@lemote.com>
Cc: "open list:MIPS" <linux-mips@vger.kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Allison Randal <allison@lohutok.net>,
	LKML <linux-kernel@vger.kernel.org>,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v6 09/11] MIPS: Loongson64: Add generic dts
Date: Wed, 25 Mar 2020 10:08:25 +0800
Message-ID: <5234EAAC-126F-402B-84A8-494C1AF5A912@flygoat.com> (raw)
In-Reply-To: <CAAhV-H57na90xg0+cXeGC_rih9wiZBEZcVm+3AnY90To19wqbw@mail.gmail.com>



于 2020年3月25日 GMT+08:00 上午10:11:05, Huacai Chen <chenhc@lemote.com> 写到:
>Hi, Jiaxun,
>
>On Tue, Mar 24, 2020 at 11:40 PM Jiaxun Yang <jiaxun.yang@flygoat.com>
>wrote:
>>
>> Add generic device dts for Loongson-3 devices.
>> They are currently almost identical but will be different later.
>> Some PCH devices like PCI Host Bridge is still enabled by platform
>> code for now.
>>
>> Co-developed-by: Huacai Chen <chenhc@lemote.com>
>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>> ---
>>  arch/mips/Kconfig                             |  6 +-
>>  arch/mips/boot/dts/Makefile                   |  1 +
>>  arch/mips/boot/dts/loongson/Makefile          |  4 ++
>>  .../boot/dts/loongson/loongson3-package.dtsi  | 62
>+++++++++++++++++++
>>  .../dts/loongson/loongson3_4core_rs780e.dts   | 25 ++++++++
>>  .../dts/loongson/loongson3_8core_rs780e.dts   | 25 ++++++++
>>  arch/mips/boot/dts/loongson/rs780e-pch.dtsi   | 26 ++++++++
>>  7 files changed, 147 insertions(+), 2 deletions(-)
>>  create mode 100644 arch/mips/boot/dts/loongson/Makefile
>>  create mode 100644
>arch/mips/boot/dts/loongson/loongson3-package.dtsi
>>  create mode 100644
>arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dts
>>  create mode 100644
>arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dts
>>  create mode 100644 arch/mips/boot/dts/loongson/rs780e-pch.dtsi
>>
>> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
>> index ca3045b2a2d9..4a0b2f494d79 100644
>> --- a/arch/mips/Kconfig
>> +++ b/arch/mips/Kconfig
>> @@ -486,9 +486,11 @@ config MACH_LOONGSON64
>>         select SYS_SUPPORTS_HIGHMEM
>>         select SYS_SUPPORTS_LITTLE_ENDIAN
>>         select SYS_SUPPORTS_ZBOOT
>> -       select LOONGSON_MC146818
>>         select ZONE_DMA32
>>         select NUMA
>> +       select COMMON_CLK
>> +       select USE_OF
>> +       select BUILTIN_DTB
>>         help
>>           This enables the support of Loongson-2/3 family of
>machines.
>>
>> @@ -3081,7 +3083,7 @@ endchoice
>>  choice
>>         prompt "Kernel command line type" if !CMDLINE_OVERRIDE
>>         default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 &&
>!MACH_INGENIC && \
>> -                                        !MIPS_MALTA && \
>> +                                        !MACH_LOONGSON64 &&
>!MIPS_MALTA && \
>>                                          !CAVIUM_OCTEON_SOC
>>         default MIPS_CMDLINE_FROM_BOOTLOADER
>>
>> diff --git a/arch/mips/boot/dts/Makefile
>b/arch/mips/boot/dts/Makefile
>> index 1e79cab8e269..d429a69bfe30 100644
>> --- a/arch/mips/boot/dts/Makefile
>> +++ b/arch/mips/boot/dts/Makefile
>> @@ -4,6 +4,7 @@ subdir-y        += cavium-octeon
>>  subdir-y       += img
>>  subdir-y       += ingenic
>>  subdir-y       += lantiq
>> +subdir-y       += loongson
>>  subdir-y       += mscc
>>  subdir-y       += mti
>>  subdir-y       += netlogic
>> diff --git a/arch/mips/boot/dts/loongson/Makefile
>b/arch/mips/boot/dts/loongson/Makefile
>> new file mode 100644
>> index 000000000000..56d379471262
>> --- /dev/null
>> +++ b/arch/mips/boot/dts/loongson/Makefile
>> @@ -0,0 +1,4 @@
>> +# SPDX_License_Identifier: GPL_2.0
>> +dtb-$(CONFIG_MACH_LOONGSON64)  += loongson3_4core_rs780e.dtb
>loongson3_8core_rs780e.dtb
>> +
>> +obj-$(CONFIG_BUILTIN_DTB)      += $(addsuffix .o, $(dtb-y))
>> diff --git a/arch/mips/boot/dts/loongson/loongson3-package.dtsi
>b/arch/mips/boot/dts/loongson/loongson3-package.dtsi
>> new file mode 100644
>> index 000000000000..d09c313603f1
>> --- /dev/null
>> +++ b/arch/mips/boot/dts/loongson/loongson3-package.dtsi
>> @@ -0,0 +1,62 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +
>> +#include <dt-bindings/interrupt-controller/irq.h>
>> +
>> +/ {
>> +       #address-cells = <2>;
>> +       #size-cells = <2>;
>> +
>I still add something like this here:
>
>                cpu@0 {
>                        compatible = "loongson,loongson3";
>                        device_type = "cpu";
>                        reg = <0x0>;
>                        next-level-cache = <&scache0>;
>                };
>
>Because it at least solve the problem of cache hierarchy, which cause
>"lscpu" crash.

That's another problem.
Previous discussion with rob and Paul all suggested that we shouldn't add cpu node.
At least for now.

>
>> +       cpuintc: interrupt-controller {
>> +               #address-cells = <0>;
>> +               #interrupt-cells = <1>;
>> +               interrupt-controller;
>> +               compatible = "mti,cpu-interrupt-controller";
>> +       };
>> +
>> +       package0: bus@1fe00000 {
>> +               compatible = "simple-bus";
>> +               #address-cells = <2>;
>> +               #size-cells = <1>;
>> +               ranges = <0 0x1fe00000 0 0x1fe00000 0x100000
>> +                       0 0x3ff00000 0 0x3ff00000 0x100000
>> +                       0xefd 0xfb000000 0xefd 0xfb000000 0x10000000
>/* 3A HT Config Space */
>> +                       0x1efd 0xfb000000 0x1efd 0xfb000000
>0x10000000 /* 3B HT Config Space */>;
>> +
>> +               liointc: interrupt-controller@3ff01400 {
>> +                       compatible = "loongson,liointc-1.0";
>> +                       reg = <0 0x3ff01400 0x64>;
>> +
>> +                       interrupt-controller;
>> +                       #interrupt-cells = <2>;
>> +
>> +                       interrupt-parent = <&cpuintc>;
>> +                       interrupts = <2>, <3>;
>> +                       interrupt-names = "int0", "int1";
>> +
>> +                       loongson,parent_int_map = <0xf0ffffff>, /*
>int0 */
>> +                                               <0x0f000000>, /* int1
>*/
>> +                                               <0x00000000>, /* int2
>*/
>> +                                               <0x00000000>; /* int3
>*/
>> +
>> +               };
>> +
>> +               cpu_uart0: serial@1fe001e0 {
>> +                       compatible = "ns16550a";
>> +                       reg = <0 0x1fe001e0 0x8>;
>> +                       clock-frequency = <33000000>;
>> +                       interrupt-parent = <&liointc>;
>> +                       interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
>> +                       no-loopback-test;
>> +               };
>> +
>> +               cpu_uart1: serial@1fe001e8 {
>> +                       status = "disabled";
>Why disable UART1 by default, is it cause problems?

Yes. It would cause endless suprious interrupt.
And most machine didn't exposed that port.
So I'd prefer disable it.

>
>> +                       compatible = "ns16550a";
>> +                       reg = <0 0x1fe001e8 0x8>;
>> +                       clock-frequency = <33000000>;
>> +                       interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
>> +                       interrupt-parent = <&liointc>;
>> +                       no-loopback-test;
>> +               };
>> +       };
>> +};
>> diff --git a/arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dts
>b/arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dts
>> new file mode 100644
>> index 000000000000..6b5694ca0f95
>> --- /dev/null
>> +++ b/arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dts
>> @@ -0,0 +1,25 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +
>> +/dts-v1/;
>> +
>> +#include "loongson3-package.dtsi"
>> +#include "rs780e-pch.dtsi"
>> +
>> +/ {
>> +       compatible = "loongson,loongson3-4core-rs780e";
>> +};
>> +
>> +&package0 {
>> +       htpic: interrupt-controller@efdfb000080 {
>> +               compatible = "loongson,htpic-1.0";
>> +               reg = <0xefd 0xfb000080 0x40>;
>> +               interrupt-controller;
>> +               #interrupt-cells = <1>;
>> +
>> +               interrupt-parent = <&liointc>;
>> +               interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
>> +                               <25 IRQ_TYPE_LEVEL_HIGH>,
>> +                               <26 IRQ_TYPE_LEVEL_HIGH>,
>> +                               <27 IRQ_TYPE_LEVEL_HIGH>;
>> +       };
>> +};
>> diff --git a/arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dts
>b/arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dts
>> new file mode 100644
>> index 000000000000..ffefa2f829b0
>> --- /dev/null
>> +++ b/arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dts
>> @@ -0,0 +1,25 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +
>> +/dts-v1/;
>> +
>> +#include "loongson3-package.dtsi"
>> +#include "rs780e-pch.dtsi"
>> +
>> +/ {
>> +       compatible = "loongson,loongson3-8core-rs780e";
>> +};
>> +
>> +&package0 {
>> +       htpic: interrupt-controller@1efdfb000080 {
>> +               compatible = "loongson,htpic-1.0";
>> +               reg = <0x1efd 0xfb000080 0x40>;
>> +               interrupt-controller;
>> +               #interrupt-cells = <1>;
>> +
>> +               interrupt-parent = <&liointc>;
>> +               interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
>> +                               <25 IRQ_TYPE_LEVEL_HIGH>,
>> +                               <26 IRQ_TYPE_LEVEL_HIGH>,
>> +                               <27 IRQ_TYPE_LEVEL_HIGH>;
>> +       };
>> +};
>> diff --git a/arch/mips/boot/dts/loongson/rs780e-pch.dtsi
>b/arch/mips/boot/dts/loongson/rs780e-pch.dtsi
>> new file mode 100644
>> index 000000000000..45c54d555fa4
>> --- /dev/null
>> +++ b/arch/mips/boot/dts/loongson/rs780e-pch.dtsi
>> @@ -0,0 +1,26 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +
>> +/ {
>> +       bus@10000000 {
>> +               compatible = "simple-bus";
>> +               #address-cells = <2>;
>> +               #size-cells = <2>;
>> +               ranges = <0 0x10000000 0 0x10000000 0 0x10000000
>> +                               0 0x40000000 0 0x40000000 0
>0x40000000
>> +                               0xfd 0xfe000000 0xfd 0xfe000000  0
>0x2000000 /* PCI Config Space */>;
>> +
>> +               isa {
>> +                       compatible = "isa";
>> +                       #address-cells = <2>;
>> +                       #size-cells = <1>;
>> +                       ranges = <1 0 0 0 0x1000>;
>> +
>> +                       rtc0: rtc@70 {
>> +                               compatible = "motorola,mc146818";
>> +                               reg = <1 0x70 0x8>;
>> +                               interrupts = <8>;
>> +                               interrupt-parent = <&htpic>;
>> +                       };
>> +               };
>> +       };
>> +};
>> --
>> 2.26.0.rc2
>>
>>
>
>Regards,
>Huacai

-- 
Jiaxun Yang

  reply index

Thread overview: 175+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-27  8:52 [PATCH 00/13] Modernize Loongson64 Machine Jiaxun Yang
2019-08-27  8:52 ` [PATCH 01/13] MIPS: Loongson64: Rename CPU TYPES Jiaxun Yang
2019-08-27  8:52 ` [PATCH 02/13] MIPS: Loongson64: Sepreate loongson2ef/loongson64 code Jiaxun Yang
2019-08-27 22:05   ` Aaro Koskinen
2019-08-28  0:37     ` Jiaxun Yang
2019-09-02 17:51       ` Aaro Koskinen
2019-08-27  8:52 ` [PATCH 03/13] MAINTAINERS: Fix entries for new loongson64 path Jiaxun Yang
2019-08-27  8:52 ` [PATCH 04/13] irqchip: Add driver for Loongson-3 I/O interrupt controller Jiaxun Yang
2019-08-27 16:45   ` Marc Zyngier
2019-08-28  0:27     ` Jiaxun Yang
2019-08-28  6:59       ` Marc Zyngier
2019-08-28 15:31         ` Jiaxun Yang
2019-08-28 16:02           ` Marc Zyngier
2019-08-27  8:52 ` [PATCH 05/13] dt-bindings: interrupt-controller: Add Loongson-3 IOINTC Jiaxun Yang
2019-08-27 13:08   ` Rob Herring
2019-08-27  8:52 ` [PATCH 06/13] irqchip: Add driver for Loongson-3 HyperTransport interrupt controller Jiaxun Yang
2019-08-27 12:53   ` Marc Zyngier
2019-08-27  8:52 ` [PATCH 07/13] dt-bindings: interrupt-controller: Add Loongson-3 HTINTC Jiaxun Yang
2019-08-27 12:49   ` Rob Herring
2019-08-27 14:08     ` Jiaxun Yang
2019-08-27  8:52 ` [PATCH 08/13] irqchip: i8259: Add plat-poll support Jiaxun Yang
2019-08-27  8:52 ` [PATCH 09/13] irqchip: mips-cpu: Convert to simple domain Jiaxun Yang
2019-08-27  8:52 ` [PATCH 10/13] MIPS: Loongson64: Drop legacy IRQ code Jiaxun Yang
2019-08-27  8:53 ` [PATCH 11/13] dt-bindings: mips: Add loongson cpus & boards Jiaxun Yang
2019-08-27 12:45   ` Rob Herring
2019-08-27 14:18     ` Jiaxun Yang
2019-08-27 20:41       ` Paul Burton
2019-08-28  0:15         ` Jiaxun Yang
2019-09-02 14:50         ` Rob Herring
2019-09-03  9:07           ` Paul Burton
2019-09-04  3:33             ` Huacai Chen
2019-08-27  8:53 ` [PATCH 12/13] MIPS: Loongson64: Add generic dts Jiaxun Yang
2019-08-27  8:53 ` [PATCH 13/13] MIPS: Loongson64: Load built-in dtbs Jiaxun Yang
2019-08-27 13:25 ` Re:[PATCH 00/13] Modernize Loongson64 Machine 陈华才
2019-08-27 14:39   ` [PATCH " Jiaxun Yang
2019-08-30  4:25 ` [PATCH v1 00/18] " Jiaxun Yang
2019-08-30  4:25   ` [PATCH v1 01/18] MIPS: Loongson64: Rename CPU TYPES Jiaxun Yang
2019-08-30  4:25   ` [PATCH v1 02/18] MIPS: Loongson64: separate loongson2ef/loongson64 code Jiaxun Yang
2019-08-30  4:25   ` [PATCH v1 03/18] MAINTAINERS: Fix entries for new loongson64 path Jiaxun Yang
2019-08-30  4:25   ` [PATCH v1 04/18] irqchip: Export generic chip domain map/unmap functions Jiaxun Yang
2019-08-30  4:25   ` [PATCH v1 05/18] irqchip: Add driver for Loongson-3 I/O interrupt controller Jiaxun Yang
2019-08-30  4:25   ` [PATCH v1 06/18] dt-bindings: interrupt-controller: Add Loongson-3 IOINTC Jiaxun Yang
2019-09-05 14:42 ` [PATCH v2 00/19] Modernize Loongson64 Machine Jiaxun Yang
2019-09-05 14:42   ` [PATCH v2 01/19] MIPS: Loongson64: Rename CPU TYPES Jiaxun Yang
2019-09-05 14:42   ` [PATCH v2 02/19] MIPS: Loongson64: separate loongson2ef/loongson64 code Jiaxun Yang
2019-09-10  0:12     ` Paul Burton
2019-09-16  2:23       ` Huacai Chen
2019-09-18  0:38       ` Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 03/19] MAINTAINERS: Fix entries for new loongson64 path Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 04/19] irqchip: Export generic chip domain map/unmap functions Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 05/19] irqchip: Add driver for Loongson-3 I/O interrupt controller Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 06/19] dt-bindings: interrupt-controller: Add Loongson-3 IOINTC Jiaxun Yang
2019-09-17 21:26     ` Rob Herring
2019-09-05 14:43   ` [PATCH v2 07/19] irqchip: Add driver for Loongson-3 HyperTransport interrupt controller Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 08/19] dt-bindings: interrupt-controller: Add Loongson-3 HTINTC Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 09/19] irqchip: i8259: Add plat-poll support Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 10/19] irqchip: mips-cpu: Convert to simple domain Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 11/19] MIPS: Loongson64: Drop legacy IRQ code Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 12/19] dt-bindings: mips: Add loongson boards Jiaxun Yang
2019-09-30 13:23     ` Rob Herring
2019-09-05 14:43   ` [PATCH v2 13/19] dt-bindings: Document loongson vendor-prefix Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 14/19] MIPS: Loongson64: Add generic dts Jiaxun Yang
2019-09-07  2:53     ` Huacai Chen
2019-09-07  3:14       ` Jiaxun Yang
2019-09-30 13:20     ` Rob Herring
2019-09-05 14:43   ` [PATCH v2 15/19] MIPS: Loongson64: Load built-in dtbs Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 16/19] GPIO: loongson: Drop Loongson-3A/3B support Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 17/19] MIPS: Loongson: Regenerate defconfigs Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 18/19] MAINTAINERS: Add new pathes to LOONGSON64 ARCHITECTURE Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 19/19] MAINTAINERS: Add myself as maintainer of LOONGSON64 Jiaxun Yang
2019-09-07  3:13   ` [PATCH v2 00/19] Modernize Loongson64 Machine Huacai Chen
2019-09-12  6:30 ` [PATCH 00/13] " Matt Turner
2019-09-18  0:33   ` Jiaxun Yang
2020-01-12  8:14 ` [PATCH v3 00/10] " Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 01/10] dt-bindings: Document loongson vendor-prefix Jiaxun Yang
2020-01-15 18:59     ` Paul Burton
2020-01-12  8:14   ` [PATCH v3 02/10] irqchip: Add driver for Loongson I/O interrupt controller Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 03/10] dt-bindings: interrupt-controller: Add Loongson IOINTC Jiaxun Yang
2020-01-13  3:44     ` Huacai Chen
2020-01-13  3:40       ` Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 04/10] irqchip: Add driver for Loongson-3 HyperTransport PIC controller Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 05/10] dt-bindings: interrupt-controller: Add Loongson-3 HTPIC Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 06/10] irqchip: mips-cpu: Convert to simple domain Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 07/10] MIPS: Loongson64: Drop legacy IRQ code Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 08/10] dt-bindings: mips: Add loongson boards Jiaxun Yang
2020-01-13  3:39     ` Huacai Chen
2020-01-12  8:14   ` [PATCH v3 09/10] MIPS: Loongson64: Add generic dts Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 10/10] MIPS: Loongson64: Load built-in dtbs Jiaxun Yang
2020-01-13  3:38   ` [PATCH v3 00/10] Modernize Loongson64 Machine Huacai Chen
2020-02-21  5:09 ` [PATCH v4 00/10] Modernize Loongson64 Machine v4 Jiaxun Yang
2020-02-21  5:09   ` [PATCH v4 01/10] irqchip: Add driver for Loongson I/O Local Interrupt Controller Jiaxun Yang
2020-02-29  2:30     ` 回复:[PATCH " Jiaxun Yang
2020-03-07 14:50     ` [PATCH " Marc Zyngier
2020-02-21  5:09   ` [PATCH v4 02/10] dt-bindings: interrupt-controller: Add Loongson LIOINTC Jiaxun Yang
2020-02-21  5:09   ` [PATCH v4 03/10] irqchip: Add driver for Loongson-3 HyperTransport PIC controller Jiaxun Yang
2020-03-07 15:01     ` Marc Zyngier
2020-02-21  5:09   ` [PATCH v4 04/10] dt-bindings: interrupt-controller: Add Loongson-3 HTPIC Jiaxun Yang
2020-02-21  5:09   ` [PATCH v4 05/10] irqchip: mips-cpu: Convert to simple domain Jiaxun Yang
2020-02-21  5:09   ` [PATCH v4 06/10] MIPS: Loongson64: Drop legacy IRQ code Jiaxun Yang
2020-02-21  5:09   ` [PATCH v4 07/10] dt-bindings: mips: Add loongson boards Jiaxun Yang
2020-02-26 16:52     ` Rob Herring
2020-02-29  2:28       ` Jiaxun Yang
2020-02-21  5:09   ` [PATCH v4 08/10] MIPS: Loongson64: Add generic dts Jiaxun Yang
2020-02-21  5:09   ` [PATCH v4 09/10] MIPS: Loongson64: Load built-in dtbs Jiaxun Yang
2020-02-21  5:09   ` [PATCH v4 10/10] MIPS: Loongson64: Move MIPS_CPU_IRQ_BASE Jiaxun Yang
2020-03-18  6:20 ` [PATCH v5 00/11] Modernize Loongson64 Machine v5 Jiaxun Yang
2020-03-18  6:20   ` [PATCH v5 01/11] irqchip: Add driver for Loongson I/O Local Interrupt Controller Jiaxun Yang
2020-03-18  6:20   ` [PATCH v5 02/11] irqchip: loongson-liointc: Workaround LPC IRQ Errata Jiaxun Yang
2020-03-18  6:20   ` [PATCH v5 03/11] dt-bindings: interrupt-controller: Add Loongson LIOINTC Jiaxun Yang
2020-03-18  6:20   ` [PATCH v5 04/11] irqchip: Add driver for Loongson-3 HyperTransport PIC controller Jiaxun Yang
2020-03-21 14:14     ` Marc Zyngier
2020-03-18  6:20   ` [PATCH v5 05/11] dt-bindings: interrupt-controller: Add Loongson-3 HTPIC Jiaxun Yang
2020-03-18  6:20   ` [PATCH v5 06/11] irqchip: mips-cpu: Convert to simple domain Jiaxun Yang
2020-03-18  6:20   ` [PATCH v5 07/11] MIPS: Loongson64: Drop legacy IRQ code Jiaxun Yang
2020-03-18  6:20   ` [PATCH v5 08/11] dt-bindings: mips: Add loongson boards Jiaxun Yang
2020-03-20 22:36     ` Rob Herring
2020-03-22  5:33     ` Zhou Yanjie
2020-03-18  6:20   ` [PATCH v5 09/11] MIPS: Loongson64: Add generic dts Jiaxun Yang
2020-03-18  6:20   ` [PATCH v5 10/11] MIPS: Loongson64: Load built-in dtbs Jiaxun Yang
2020-03-18  6:20   ` [PATCH v5 11/11] MIPS: Loongson64: Move MIPS_CPU_IRQ_BASE Jiaxun Yang
2020-03-24 15:35 ` [PATCH v6 00/11] Modernize Loongson64 Machine v6 Jiaxun Yang
2020-03-24 15:35   ` [PATCH v6 01/11] irqchip: Add driver for Loongson I/O Local Interrupt Controller Jiaxun Yang
2020-03-24 15:35   ` [PATCH v6 02/11] irqchip: loongson-liointc: Workaround LPC IRQ Errata Jiaxun Yang
2020-03-25  1:52     ` Huacai Chen
2020-03-25  2:31       ` Jiaxun Yang
2020-03-24 15:36   ` [PATCH v6 03/11] dt-bindings: interrupt-controller: Add Loongson LIOINTC Jiaxun Yang
2020-03-24 15:36   ` [PATCH v6 04/11] irqchip: Add driver for Loongson-3 HyperTransport PIC controller Jiaxun Yang
2020-03-24 15:36   ` [PATCH v6 05/11] dt-bindings: interrupt-controller: Add Loongson-3 HTPIC Jiaxun Yang
2020-03-24 15:36   ` [PATCH v6 06/11] irqchip: mips-cpu: Convert to simple domain Jiaxun Yang
2020-03-24 15:36   ` [PATCH v6 07/11] MIPS: Loongson64: Drop legacy IRQ code Jiaxun Yang
2020-03-24 15:36   ` [PATCH v6 08/11] dt-bindings: mips: Add loongson boards Jiaxun Yang
2020-03-24 15:36   ` [PATCH v6 09/11] MIPS: Loongson64: Add generic dts Jiaxun Yang
2020-03-25  2:11     ` Huacai Chen
2020-03-25  2:08       ` Jiaxun Yang [this message]
2020-03-25  2:49         ` Huacai Chen
2020-03-24 15:36   ` [PATCH v6 10/11] MIPS: Loongson64: Load built-in dtbs Jiaxun Yang
2020-03-24 15:36   ` [PATCH v6 11/11] MIPS: Loongson64: Move MIPS_CPU_IRQ_BASE Jiaxun Yang
2020-03-24 15:47   ` [PATCH v6 00/11] Modernize Loongson64 Machine v6 Marc Zyngier
2020-03-24 15:51     ` Jiaxun Yang
2020-03-24 18:07       ` Thomas Bogendoerfer
2020-03-25  2:28 ` [PATCH v7 00/12] " Jiaxun Yang
2020-03-25  2:28   ` [PATCH v7 01/12] irqchip: Add driver for Loongson I/O Local Interrupt Controller Jiaxun Yang
2020-03-25 11:25     ` Paul Cercueil
2020-03-25 11:35       ` Marc Zyngier
2020-03-25  2:28   ` [PATCH v7 01/12] MIPS: Loongson: Do not initialise statics to 0 Jiaxun Yang
2020-03-25  2:28   ` [PATCH v7 02/12] irqchip: loongson-liointc: Workaround LPC IRQ Errata Jiaxun Yang
2020-03-25  2:28   ` [PATCH v7 02/12] MIPS: DTS: CI20: add DT node for IR sensor Jiaxun Yang
2020-03-25  2:28   ` [PATCH v7 03/12] dt-bindings: interrupt-controller: Add Loongson LIOINTC Jiaxun Yang
2020-03-25  3:54 ` [PATCH v8 00/11] Modernize Loongson64 Machine v8 Jiaxun Yang
2020-03-25  3:54   ` [PATCH v8 01/11] irqchip: Add driver for Loongson I/O Local Interrupt Controller Jiaxun Yang
2020-03-25  3:54   ` [PATCH v8 02/11] irqchip: loongson-liointc: Workaround LPC IRQ Errata Jiaxun Yang
2020-03-25  3:54   ` [PATCH v8 03/11] dt-bindings: interrupt-controller: Add Loongson LIOINTC Jiaxun Yang
2020-03-25  3:54   ` [PATCH v8 04/11] irqchip: Add driver for Loongson-3 HyperTransport PIC controller Jiaxun Yang
2020-03-25  3:54   ` [PATCH v8 05/11] dt-bindings: interrupt-controller: Add Loongson-3 HTPIC Jiaxun Yang
2020-03-25  3:54   ` [PATCH v8 06/11] irqchip: mips-cpu: Convert to simple domain Jiaxun Yang
2020-03-25 12:37     ` Thomas Bogendoerfer
2020-03-25 12:48       ` Jiaxun Yang
2020-03-25 13:00       ` Marc Zyngier
2020-03-25 13:07         ` Jiaxun Yang
2020-03-25 13:57           ` Marc Zyngier
2020-03-25 13:59             ` Jiaxun Yang
2020-03-25 14:15               ` Marc Zyngier
2020-03-25 14:31                 ` Jiaxun Yang
2020-03-25 15:02                   ` Marc Zyngier
2020-03-25 15:04                   ` Thomas Bogendoerfer
2020-03-25 15:09                     ` Jiaxun Yang
2020-03-25 15:46                       ` Thomas Bogendoerfer
2020-03-25 16:02                         ` Jiaxun Yang
2020-03-25 16:31                           ` Thomas Bogendoerfer
2020-03-25  3:55   ` [PATCH v8 07/11] MIPS: Loongson64: Drop legacy IRQ code Jiaxun Yang
2020-03-25  3:55   ` [PATCH v8 08/11] dt-bindings: mips: Add loongson boards Jiaxun Yang
2020-03-25  3:55   ` [PATCH v8 09/11] MIPS: Loongson64: Add generic dts Jiaxun Yang
2020-03-25  3:55   ` [PATCH v8 10/11] MIPS: Loongson64: Load built-in dtbs Jiaxun Yang
2020-03-25  3:55   ` [PATCH v8 11/11] MAINTAINERS: Update Loongson64 entry Jiaxun Yang
2020-03-25 17:33   ` [PATCH v8 00/11] Modernize Loongson64 Machine v8 Thomas Bogendoerfer

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