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From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-mips@vger.kernel.org, chenhc@lemote.com,
	paul.burton@mips.com, tglx@linutronix.de, jason@lakedaemon.net,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	mark.rutland@arm.co, devicetree@vger.kernel.org
Subject: Re: [PATCH 04/13] irqchip: Add driver for Loongson-3 I/O interrupt controller
Date: Wed, 28 Aug 2019 23:31:31 +0800
Message-ID: <619b1d35-7bc2-999f-5a51-fb2efdc63f60@flygoat.com> (raw)
In-Reply-To: <20190828075940.549e1983@why>


On 2019/8/28 下午2:59, Marc Zyngier wrote:
> On Wed, 28 Aug 2019 08:27:05 +0800
> Jiaxun Yang <jiaxun.yang@flygoat.com> wrote:
>
>> On 2019/8/28 上午12:45, Marc Zyngier wrote:
>>> On 27/08/2019 09:52, Jiaxun Yang wrote:
>>>> +	chained_irq_enter(chip, desc);
>>>> +
>>>> +	pending = readl(priv->intc_base + LS3_REG_INTC_EN_STATUS) &
>>>> +		readl(priv->intc_base + LS3_REG_INTC_STATUS);
>>> Reading the enabled status from the HW on each interrupt? I'm sure
>>> that's pretty cheap...
>> Seems expensive but to deal with a buggy hardware... That's worthy.
> How broken is it? You very much seem to rely on the HW being correct
> here, since you trust it exclusively. I'd expect the enable mask to be
> a SW construct if you didn't blindly trust it
Hi Marc

Thanks for your answering.

The vendor code did this and said there is a HW issue. I just don't have 
the guts to remove this check.
Seems like sometimes masked interrupt may get ISR set wrongly.
> And if this is truly the right way to do it, please document the
> various problems with the controller so that we don't break it at a
> later time.
Thanks, will do.
>
> Then how comes this comes from the irqchip's DT node? This should be
> part of the endpoint's interrupt specifier.

In theory it should be, However if we set different interrupt 
lines/cores on that controller, interrupts may get lost. It means we can 
only have single parent core/interrupt.

So I'd prefer just set them uniformly by controller's dt-binding to 
prevent confusing.

>> It's parent IRQ (mti,cpu-interrupt-controller) is a percpu IRQ.
> But then why is that interrupt described using the "core" property? It
> should be an interrupt specifier, just like any other interrupt.
The same.
>
>> In design, it allows us to decide affinity at runtime but actually hardware is seriously broken.
> I understand the HW is terrible. But the binding looks pretty bad too.
> This needs fixing.
>
> 	M.
--
Jiaxun Yang

  reply index

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-27  8:52 [PATCH 00/13] Modernize Loongson64 Machine Jiaxun Yang
2019-08-27  8:52 ` [PATCH 01/13] MIPS: Loongson64: Rename CPU TYPES Jiaxun Yang
2019-08-27  8:52 ` [PATCH 02/13] MIPS: Loongson64: Sepreate loongson2ef/loongson64 code Jiaxun Yang
2019-08-27 22:05   ` Aaro Koskinen
2019-08-28  0:37     ` Jiaxun Yang
2019-09-02 17:51       ` Aaro Koskinen
2019-08-27  8:52 ` [PATCH 03/13] MAINTAINERS: Fix entries for new loongson64 path Jiaxun Yang
2019-08-27  8:52 ` [PATCH 04/13] irqchip: Add driver for Loongson-3 I/O interrupt controller Jiaxun Yang
2019-08-27 16:45   ` Marc Zyngier
2019-08-28  0:27     ` Jiaxun Yang
2019-08-28  6:59       ` Marc Zyngier
2019-08-28 15:31         ` Jiaxun Yang [this message]
2019-08-28 16:02           ` Marc Zyngier
2019-08-27  8:52 ` [PATCH 05/13] dt-bindings: interrupt-controller: Add Loongson-3 IOINTC Jiaxun Yang
2019-08-27 13:08   ` Rob Herring
2019-08-27  8:52 ` [PATCH 06/13] irqchip: Add driver for Loongson-3 HyperTransport interrupt controller Jiaxun Yang
2019-08-27 12:53   ` Marc Zyngier
2019-08-27  8:52 ` [PATCH 07/13] dt-bindings: interrupt-controller: Add Loongson-3 HTINTC Jiaxun Yang
2019-08-27 12:49   ` Rob Herring
2019-08-27 14:08     ` Jiaxun Yang
2019-08-27  8:52 ` [PATCH 08/13] irqchip: i8259: Add plat-poll support Jiaxun Yang
2019-08-27  8:52 ` [PATCH 09/13] irqchip: mips-cpu: Convert to simple domain Jiaxun Yang
2019-08-27  8:52 ` [PATCH 10/13] MIPS: Loongson64: Drop legacy IRQ code Jiaxun Yang
2019-08-27  8:53 ` [PATCH 11/13] dt-bindings: mips: Add loongson cpus & boards Jiaxun Yang
2019-08-27 12:45   ` Rob Herring
2019-08-27 14:18     ` Jiaxun Yang
2019-08-27 20:41       ` Paul Burton
2019-08-28  0:15         ` Jiaxun Yang
2019-09-02 14:50         ` Rob Herring
2019-09-03  9:07           ` Paul Burton
2019-09-04  3:33             ` Huacai Chen
2019-08-27  8:53 ` [PATCH 12/13] MIPS: Loongson64: Add generic dts Jiaxun Yang
2019-08-27  8:53 ` [PATCH 13/13] MIPS: Loongson64: Load built-in dtbs Jiaxun Yang
2019-08-27 13:25 ` Re:[PATCH 00/13] Modernize Loongson64 Machine 陈华才
2019-08-27 14:39   ` [PATCH " Jiaxun Yang
2019-08-30  4:25 ` [PATCH v1 00/18] " Jiaxun Yang
2019-08-30  4:25   ` [PATCH v1 01/18] MIPS: Loongson64: Rename CPU TYPES Jiaxun Yang
2019-08-30  4:25   ` [PATCH v1 02/18] MIPS: Loongson64: separate loongson2ef/loongson64 code Jiaxun Yang
2019-08-30  4:25   ` [PATCH v1 03/18] MAINTAINERS: Fix entries for new loongson64 path Jiaxun Yang
2019-08-30  4:25   ` [PATCH v1 04/18] irqchip: Export generic chip domain map/unmap functions Jiaxun Yang
2019-08-30  4:25   ` [PATCH v1 05/18] irqchip: Add driver for Loongson-3 I/O interrupt controller Jiaxun Yang
2019-08-30  4:25   ` [PATCH v1 06/18] dt-bindings: interrupt-controller: Add Loongson-3 IOINTC Jiaxun Yang
2019-09-05 14:42 ` [PATCH v2 00/19] Modernize Loongson64 Machine Jiaxun Yang
2019-09-05 14:42   ` [PATCH v2 01/19] MIPS: Loongson64: Rename CPU TYPES Jiaxun Yang
2019-09-05 14:42   ` [PATCH v2 02/19] MIPS: Loongson64: separate loongson2ef/loongson64 code Jiaxun Yang
2019-09-10  0:12     ` Paul Burton
2019-09-16  2:23       ` Huacai Chen
2019-09-18  0:38       ` Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 03/19] MAINTAINERS: Fix entries for new loongson64 path Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 04/19] irqchip: Export generic chip domain map/unmap functions Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 05/19] irqchip: Add driver for Loongson-3 I/O interrupt controller Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 06/19] dt-bindings: interrupt-controller: Add Loongson-3 IOINTC Jiaxun Yang
2019-09-17 21:26     ` Rob Herring
2019-09-05 14:43   ` [PATCH v2 07/19] irqchip: Add driver for Loongson-3 HyperTransport interrupt controller Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 08/19] dt-bindings: interrupt-controller: Add Loongson-3 HTINTC Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 09/19] irqchip: i8259: Add plat-poll support Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 10/19] irqchip: mips-cpu: Convert to simple domain Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 11/19] MIPS: Loongson64: Drop legacy IRQ code Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 12/19] dt-bindings: mips: Add loongson boards Jiaxun Yang
2019-09-30 13:23     ` Rob Herring
2019-09-05 14:43   ` [PATCH v2 13/19] dt-bindings: Document loongson vendor-prefix Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 14/19] MIPS: Loongson64: Add generic dts Jiaxun Yang
2019-09-07  2:53     ` Huacai Chen
2019-09-07  3:14       ` Jiaxun Yang
2019-09-30 13:20     ` Rob Herring
2019-09-05 14:43   ` [PATCH v2 15/19] MIPS: Loongson64: Load built-in dtbs Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 16/19] GPIO: loongson: Drop Loongson-3A/3B support Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 17/19] MIPS: Loongson: Regenerate defconfigs Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 18/19] MAINTAINERS: Add new pathes to LOONGSON64 ARCHITECTURE Jiaxun Yang
2019-09-05 14:43   ` [PATCH v2 19/19] MAINTAINERS: Add myself as maintainer of LOONGSON64 Jiaxun Yang
2019-09-07  3:13   ` [PATCH v2 00/19] Modernize Loongson64 Machine Huacai Chen
2019-09-12  6:30 ` [PATCH 00/13] " Matt Turner
2019-09-18  0:33   ` Jiaxun Yang
2020-01-12  8:14 ` [PATCH v3 00/10] " Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 01/10] dt-bindings: Document loongson vendor-prefix Jiaxun Yang
2020-01-15 18:59     ` Paul Burton
2020-01-12  8:14   ` [PATCH v3 02/10] irqchip: Add driver for Loongson I/O interrupt controller Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 03/10] dt-bindings: interrupt-controller: Add Loongson IOINTC Jiaxun Yang
2020-01-13  3:44     ` Huacai Chen
2020-01-13  3:40       ` Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 04/10] irqchip: Add driver for Loongson-3 HyperTransport PIC controller Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 05/10] dt-bindings: interrupt-controller: Add Loongson-3 HTPIC Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 06/10] irqchip: mips-cpu: Convert to simple domain Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 07/10] MIPS: Loongson64: Drop legacy IRQ code Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 08/10] dt-bindings: mips: Add loongson boards Jiaxun Yang
2020-01-13  3:39     ` Huacai Chen
2020-01-12  8:14   ` [PATCH v3 09/10] MIPS: Loongson64: Add generic dts Jiaxun Yang
2020-01-12  8:14   ` [PATCH v3 10/10] MIPS: Loongson64: Load built-in dtbs Jiaxun Yang
2020-01-13  3:38   ` [PATCH v3 00/10] Modernize Loongson64 Machine Huacai Chen

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