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* [PATCH] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt
@ 2022-09-13  8:40 yaliang.wang
       [not found] ` <MN2PR17MB3375BC0E5878B19651475413B8479@MN2PR17MB3375.namprd17.prod.outlook.com>
  2022-10-03  5:35 ` Tudor.Ambarus
  0 siblings, 2 replies; 8+ messages in thread
From: yaliang.wang @ 2022-09-13  8:40 UTC (permalink / raw)
  To: tudor.ambarus, pratyush, michael, miquel.raynal, richard, vigneshr
  Cc: linux-mtd, linux-kernel

From: Yaliang Wang <Yaliang.Wang@windriver.com>

When utilizing PARSE_SFDP to initialize the flash parameter, the
deprecated initializing method spi_nor_init_params_deprecated() and the
function spi_nor_manufacturer_init_params() within it will never be
executed, which results in the default_init hook function will also never
be executed. As we do have quad enable function defined in BFPT, the
post_bfpt hook will be the right place to tweak the function.

Cc: stable@vger.kernel.org
Fixes: 047275f7de18 ("mtd: spi-nor: gigadevice: gd25q256: Init flash based on SFDP")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Yaliang Wang <Yaliang.Wang@windriver.com>
---
 drivers/mtd/spi-nor/gigadevice.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c
index 119b38e6fc2a..bdc4d73424af 100644
--- a/drivers/mtd/spi-nor/gigadevice.c
+++ b/drivers/mtd/spi-nor/gigadevice.c
@@ -8,19 +8,24 @@
 
 #include "core.h"
 
-static void gd25q256_default_init(struct spi_nor *nor)
+static int
+gd25q256_post_bfpt(struct spi_nor *nor,
+		   const struct sfdp_parameter_header *bfpt_header,
+		   const struct sfdp_bfpt *bfpt)
 {
 	/*
 	 * Some manufacturer like GigaDevice may use different
 	 * bit to set QE on different memories, so the MFR can't
 	 * indicate the quad_enable method for this case, we need
-	 * to set it in the default_init fixup hook.
+	 * to set it in the post_bfpt fixup hook.
 	 */
 	nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
+
+	return 0;
 }
 
 static const struct spi_nor_fixups gd25q256_fixups = {
-	.default_init = gd25q256_default_init,
+	.post_bfpt = gd25q256_post_bfpt,
 };
 
 static const struct flash_info gigadevice_nor_parts[] = {
-- 
2.34.1


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt
       [not found] ` <MN2PR17MB3375BC0E5878B19651475413B8479@MN2PR17MB3375.namprd17.prod.outlook.com>
@ 2022-09-14  3:05   ` Yaliang Wang
  2022-09-14  7:27     ` Michael Walle
  0 siblings, 1 reply; 8+ messages in thread
From: Yaliang Wang @ 2022-09-14  3:05 UTC (permalink / raw)
  To: Vanessa Page, tudor.ambarus, pratyush, michael, miquel.raynal,
	richard, vigneshr
  Cc: linux-mtd, linux-kernel

In case the mail list can't receive the email, I'd like to send the 
email again.

Sorry, I didn't make it clear.
I'm doing this because the flash info member parse_sfdp is initialized 
to "true" by PARSE_SFDP macro, as you can see below
         { "gd25q256", INFO(0xc84019, 0, 64 * 1024, 512)
                 PARSE_SFDP
                 FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | 
SPI_NOR_TB_SR_BIT6)
                 FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
                 .fixups = &gd25q256_fixups },

And when parse_sfdp is true, the function spi_nor_init_params() will 
call spi_nor_parse_sfdp() to initialize the parameters, and I can't see 
any other place to call the original default_init() hook in the fixups 
other than in spi_nor_init_params_deprecated()  -> 
spi_nor_manufacturer_init_params().

After checking the history of why we are adding this, that is to say the 
commit 48e4d973aefe ("mtd: spi-nor: Add a default_init() fixup hook for 
gd25q256") and the corresponding disscusions, I believe it was added for 
some reason, and we need to add back this function.

On 9/13/22 18:46, Vanessa Page wrote:
> **[Please note: This e-mail is from an EXTERNAL e-mail address]
> 
> Why are you doing this?
> ------------------------------------------------------------------------
> *From:* linux-mtd <linux-mtd-bounces@lists.infradead.org> on behalf of 
> yaliang.wang@windriver.com <yaliang.wang@windriver.com>
> *Sent:* Tuesday, September 13, 2022 4:40 AM
> *To:* tudor.ambarus@microchip.com <tudor.ambarus@microchip.com>; 
> pratyush@kernel.org <pratyush@kernel.org>; michael@walle.cc 
> <michael@walle.cc>; miquel.raynal@bootlin.com 
> <miquel.raynal@bootlin.com>; richard@nod.at <richard@nod.at>; 
> vigneshr@ti.com <vigneshr@ti.com>
> *Cc:* linux-mtd@lists.infradead.org <linux-mtd@lists.infradead.org>; 
> linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
> *Subject:* [PATCH] mtd: spi-nor: gigadevice: gd25q256: replace 
> gd25q256_default_init with gd25q256_post_bfpt
> From: Yaliang Wang <Yaliang.Wang@windriver.com>
> 
> When utilizing PARSE_SFDP to initialize the flash parameter, the
> deprecated initializing method spi_nor_init_params_deprecated() and the
> function spi_nor_manufacturer_init_params() within it will never be
> executed, which results in the default_init hook function will also never
> be executed. As we do have quad enable function defined in BFPT, the
> post_bfpt hook will be the right place to tweak the function.
> 
> Cc: stable@vger.kernel.org
> Fixes: 047275f7de18 ("mtd: spi-nor: gigadevice: gd25q256: Init flash 
> based on SFDP")
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Yaliang Wang <Yaliang.Wang@windriver.com>
> ---
>   drivers/mtd/spi-nor/gigadevice.c | 11 ++++++++---
>   1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mtd/spi-nor/gigadevice.c 
> b/drivers/mtd/spi-nor/gigadevice.c
> index 119b38e6fc2a..bdc4d73424af 100644
> --- a/drivers/mtd/spi-nor/gigadevice.c
> +++ b/drivers/mtd/spi-nor/gigadevice.c
> @@ -8,19 +8,24 @@
> 
>   #include "core.h"
> 
> -static void gd25q256_default_init(struct spi_nor *nor)
> +static int
> +gd25q256_post_bfpt(struct spi_nor *nor,
> +                  const struct sfdp_parameter_header *bfpt_header,
> +                  const struct sfdp_bfpt *bfpt)
>   {
>           /*
>            * Some manufacturer like GigaDevice may use different
>            * bit to set QE on different memories, so the MFR can't
>            * indicate the quad_enable method for this case, we need
> -        * to set it in the default_init fixup hook.
> +        * to set it in the post_bfpt fixup hook.
>            */
>           nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
> +
> +       return 0;
>   }
> 
>   static const struct spi_nor_fixups gd25q256_fixups = {
> -       .default_init = gd25q256_default_init,
> +       .post_bfpt = gd25q256_post_bfpt,
>   };
> 
>   static const struct flash_info gigadevice_nor_parts[] = {
> -- 
> 2.34.1
> 
> 
> ______________________________________________________
> Linux MTD discussion mailing list
> http://lists.infradead.org/mailman/listinfo/linux-mtd/ 
> <https://urldefense.com/v3/__http://lists.infradead.org/mailman/listinfo/linux-mtd/__;!!AjveYdw8EvQ!cFcIju_6rdasA67JAVB5Ww727YTj7uzWhJ8HjkRjEJmn-BFGWsga9mPTqCo_m8WFT4Jcu8Uj0iME34B3OOc$>

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt
  2022-09-14  3:05   ` Yaliang Wang
@ 2022-09-14  7:27     ` Michael Walle
  0 siblings, 0 replies; 8+ messages in thread
From: Michael Walle @ 2022-09-14  7:27 UTC (permalink / raw)
  To: Yaliang Wang
  Cc: tudor.ambarus, pratyush, miquel.raynal, richard, vigneshr,
	linux-mtd, linux-kernel

Am 2022-09-14 05:05, schrieb Yaliang Wang:
> In case the mail list can't receive the email, I'd like to send the 
> email again.
> 
> Sorry, I didn't make it clear.
> I'm doing this because the flash info member parse_sfdp is initialized
> to "true" by PARSE_SFDP macro, as you can see below
>         { "gd25q256", INFO(0xc84019, 0, 64 * 1024, 512)
>                 PARSE_SFDP
>                 FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | 
> SPI_NOR_TB_SR_BIT6)
>                 FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
>                 .fixups = &gd25q256_fixups },
> 
> And when parse_sfdp is true, the function spi_nor_init_params() will
> call spi_nor_parse_sfdp() to initialize the parameters, and I can't
> see any other place to call the original default_init() hook in the
> fixups other than in spi_nor_init_params_deprecated()  ->
> spi_nor_manufacturer_init_params().
> 
> After checking the history of why we are adding this, that is to say
> the commit 48e4d973aefe ("mtd: spi-nor: Add a default_init() fixup
> hook for gd25q256") and the corresponding disscusions, I believe it
> was added for some reason, and we need to add back this function.
> 
> On 9/13/22 18:46, Vanessa Page wrote:
>> **[Please note: This e-mail is from an EXTERNAL e-mail address]
>> 
>> Why are you doing this?

Vanessa Page is a bot/troll.

-michael

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt
  2022-09-13  8:40 [PATCH] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt yaliang.wang
       [not found] ` <MN2PR17MB3375BC0E5878B19651475413B8479@MN2PR17MB3375.namprd17.prod.outlook.com>
@ 2022-10-03  5:35 ` Tudor.Ambarus
  2022-10-16  8:37   ` Yaliang Wang
  2022-10-16 17:19   ` [PATCH v2 0/1] " yaliang.wang
  1 sibling, 2 replies; 8+ messages in thread
From: Tudor.Ambarus @ 2022-10-03  5:35 UTC (permalink / raw)
  To: yaliang.wang, pratyush, michael, miquel.raynal, richard, vigneshr
  Cc: linux-mtd, linux-kernel

On 9/13/22 11:40, yaliang.wang@windriver.com wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> From: Yaliang Wang <Yaliang.Wang@windriver.com>
> 
> When utilizing PARSE_SFDP to initialize the flash parameter, the
> deprecated initializing method spi_nor_init_params_deprecated() and the
> function spi_nor_manufacturer_init_params() within it will never be
> executed, which results in the default_init hook function will also never
> be executed. As we do have quad enable function defined in BFPT, the
> post_bfpt hook will be the right place to tweak the function.
> 
> Cc: stable@vger.kernel.org
> Fixes: 047275f7de18 ("mtd: spi-nor: gigadevice: gd25q256: Init flash based on SFDP")
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Yaliang Wang <Yaliang.Wang@windriver.com>
> ---
>  drivers/mtd/spi-nor/gigadevice.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c
> index 119b38e6fc2a..bdc4d73424af 100644
> --- a/drivers/mtd/spi-nor/gigadevice.c
> +++ b/drivers/mtd/spi-nor/gigadevice.c
> @@ -8,19 +8,24 @@
> 
>  #include "core.h"
> 
> -static void gd25q256_default_init(struct spi_nor *nor)
> +static int
> +gd25q256_post_bfpt(struct spi_nor *nor,
> +                  const struct sfdp_parameter_header *bfpt_header,
> +                  const struct sfdp_bfpt *bfpt)
>  {
>         /*
>          * Some manufacturer like GigaDevice may use different
>          * bit to set QE on different memories, so the MFR can't
>          * indicate the quad_enable method for this case, we need
> -        * to set it in the default_init fixup hook.
> +        * to set it in the post_bfpt fixup hook.
>          */
>         nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
> +
> +       return 0;
>  }

Maybe we can get rid of this fixup hook entirely. If it was a default_init(), then it
was set before the SFDP was parsed, so the quad_enable method was overwritten anyway.
Would you please check why this method was introduced?

What Quad Enable method do you get from SFDP? I expect that spi_nor_sr1_bit6_quad_enable,
and the fixup hook to be in vain.

> 
>  static const struct spi_nor_fixups gd25q256_fixups = {
> -       .default_init = gd25q256_default_init,
> +       .post_bfpt = gd25q256_post_bfpt,
>  };
> 
>  static const struct flash_info gigadevice_nor_parts[] = {
> --
> 2.34.1
> 


-- 
Cheers,
ta
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt
  2022-10-03  5:35 ` Tudor.Ambarus
@ 2022-10-16  8:37   ` Yaliang Wang
  2022-10-16 17:19   ` [PATCH v2 0/1] " yaliang.wang
  1 sibling, 0 replies; 8+ messages in thread
From: Yaliang Wang @ 2022-10-16  8:37 UTC (permalink / raw)
  To: Tudor.Ambarus, pratyush, michael, miquel.raynal, richard, vigneshr
  Cc: linux-mtd, linux-kernel



On 10/3/22 13:35, Tudor.Ambarus@microchip.com wrote:
> [Please note: This e-mail is from an EXTERNAL e-mail address]
> 
> On 9/13/22 11:40, yaliang.wang@windriver.com wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> From: Yaliang Wang <Yaliang.Wang@windriver.com>
>>
>> When utilizing PARSE_SFDP to initialize the flash parameter, the
>> deprecated initializing method spi_nor_init_params_deprecated() and the
>> function spi_nor_manufacturer_init_params() within it will never be
>> executed, which results in the default_init hook function will also never
>> be executed. As we do have quad enable function defined in BFPT, the
>> post_bfpt hook will be the right place to tweak the function.
>>
>> Cc: stable@vger.kernel.org
>> Fixes: 047275f7de18 ("mtd: spi-nor: gigadevice: gd25q256: Init flash based on SFDP")
>> Reported-by: kernel test robot <lkp@intel.com>
>> Signed-off-by: Yaliang Wang <Yaliang.Wang@windriver.com>
>> ---
>>   drivers/mtd/spi-nor/gigadevice.c | 11 ++++++++---
>>   1 file changed, 8 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c
>> index 119b38e6fc2a..bdc4d73424af 100644
>> --- a/drivers/mtd/spi-nor/gigadevice.c
>> +++ b/drivers/mtd/spi-nor/gigadevice.c
>> @@ -8,19 +8,24 @@
>>
>>   #include "core.h"
>>
>> -static void gd25q256_default_init(struct spi_nor *nor)
>> +static int
>> +gd25q256_post_bfpt(struct spi_nor *nor,
>> +                  const struct sfdp_parameter_header *bfpt_header,
>> +                  const struct sfdp_bfpt *bfpt)
>>   {
>>          /*
>>           * Some manufacturer like GigaDevice may use different
>>           * bit to set QE on different memories, so the MFR can't
>>           * indicate the quad_enable method for this case, we need
>> -        * to set it in the default_init fixup hook.
>> +        * to set it in the post_bfpt fixup hook.
>>           */
>>          nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
>> +
>> +       return 0;
>>   }
> 
> Maybe we can get rid of this fixup hook entirely. If it was a default_init(), then it
> was set before the SFDP was parsed, so the quad_enable method was overwritten anyway.
> Would you please check why this method was introduced?

I googled the gd25q256 datasheet, and found 'C' generation 
datasheet(GD25Q256C[1]) implements the JESD216 standards, it doesn't 
have the QER(Quad Enable Requirements) field in BFPT, but it does have 
the QE bit in SR1 bit6, this may be the reason why the method was 
introduced.

[1]https://datasheetspdf.com/pdf-file/1295936/GigaDevice/GD25Q256C/1
> 
> What Quad Enable method do you get from SFDP? I expect that spi_nor_sr1_bit6_quad_enable,
> and the fixup hook to be in vain.
As above mentioned, 'C' generation doesn't have the QER field in BFPT, 
so no corresponding quad_enable method can be found in SFDP.

Regrading to 'D' generation [2], it implements the JESD216B standards, 
the corresponding quad_enable method is spi_nor_sr2_bit1_quad_enable, 
parsing the BFPT can get the right method.

As for 'E' generation[3], it also implements the JESD216B standards and 
has the same status registers as defined in 'D' generation, but its 
datasheet doesn't contain SFDP and BFPT definations, so there may be 
some uncertain.

So, in summary, I think 'C' generation devices still need the post_bfpt 
to add the correct quad_enable method, this can do some benefits to the 
outdated devices. For sure, the post_bfpt method should distinguish the 
JESD216 standards the first and then apply the correct quad_enable 
method, I can cook another patch to do this.

[2]https://www.gigadevice.com/datasheet/gd25q256d/
[3]https://www.gigadevice.com/datasheet/gd25q256e/
> 
>>
>>   static const struct spi_nor_fixups gd25q256_fixups = {
>> -       .default_init = gd25q256_default_init,
>> +       .post_bfpt = gd25q256_post_bfpt,
>>   };
>>
>>   static const struct flash_info gigadevice_nor_parts[] = {
>> --
>> 2.34.1
>>
> 
> 
> --
> Cheers,
> ta

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v2 0/1] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt
  2022-10-03  5:35 ` Tudor.Ambarus
  2022-10-16  8:37   ` Yaliang Wang
@ 2022-10-16 17:19   ` yaliang.wang
  2022-10-16 17:19     ` [PATCH] " yaliang.wang
  2022-11-21 14:32     ` [PATCH v2 0/1] " Tudor Ambarus
  1 sibling, 2 replies; 8+ messages in thread
From: yaliang.wang @ 2022-10-16 17:19 UTC (permalink / raw)
  To: tudor.ambarus, pratyush, michael, miquel.raynal, richard,
	vigneshr, andy.yan, cyrille.pitchen
  Cc: linux-mtd, linux-kernel

GD25Q256 'C' generation 'GD25Q256C' implements the JESD216 standards,
JESD216 doesn't define the QER field in BFPT, but the 'GD25Q256C'
does define QE bit in status register 1 bit 6, so we need to tweak
quad_enable to properly set the function.

'D' and 'E' generations implement the JESD216B standards, so parsing
the SFDP to set quad_enable function is enough for them.

As the default_init is deprecated, so the post_bfpt hook will be the
right place to do this tweak.

Changes since v1 [1]
 - Just tweak the quad_enable function when needed.

Yaliang Wang (1):
  mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt

 drivers/mtd/spi-nor/gigadevice.c | 28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt
  2022-10-16 17:19   ` [PATCH v2 0/1] " yaliang.wang
@ 2022-10-16 17:19     ` yaliang.wang
  2022-11-21 14:32     ` [PATCH v2 0/1] " Tudor Ambarus
  1 sibling, 0 replies; 8+ messages in thread
From: yaliang.wang @ 2022-10-16 17:19 UTC (permalink / raw)
  To: tudor.ambarus, pratyush, michael, miquel.raynal, richard,
	vigneshr, andy.yan, cyrille.pitchen
  Cc: linux-mtd, linux-kernel

From: Yaliang Wang <Yaliang.Wang@windriver.com>

When utilizing PARSE_SFDP to initialize the flash parameter, the
deprecated initializing method spi_nor_init_params_deprecated() and the
function spi_nor_manufacturer_init_params() within it will never be
executed, which results in the default_init hook function will also never
be executed.

This is okay for 'D' generation of GD25Q256, because 'D' generation is
implementing the JESD216B standards, it has QER field defined in BFPT,
parsing the SFDP can properly set the quad_enable function. The 'E'
generation also implements the JESD216B standards, and it has the same
status register definitions as 'D' generation, parsing the SFDP to set
the quad_enable function should also work for 'E' generation.

However, the same thing can't apply to 'C' generation. 'C' generation
'GD25Q256C' implements the JESD216 standards, and it doesn't have the
QER field defined in BFPT, since it does have QE bit in status register
1, the quad_enable hook needs to be tweaked to properly set the
quad_enable function, this can be done in post_bfpt fixup hook.

Cc: stable@vger.kernel.org
Fixes: 047275f7de18 ("mtd: spi-nor: gigadevice: gd25q256: Init flash based on SFDP")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Yaliang Wang <Yaliang.Wang@windriver.com>
---
 drivers/mtd/spi-nor/gigadevice.c | 28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)

diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c
index 119b38e6fc2a..5fc5d2b2d15e 100644
--- a/drivers/mtd/spi-nor/gigadevice.c
+++ b/drivers/mtd/spi-nor/gigadevice.c
@@ -8,19 +8,33 @@
 
 #include "core.h"
 
-static void gd25q256_default_init(struct spi_nor *nor)
+static int
+gd25q256_post_bfpt(struct spi_nor *nor,
+		   const struct sfdp_parameter_header *bfpt_header,
+		   const struct sfdp_bfpt *bfpt)
 {
 	/*
-	 * Some manufacturer like GigaDevice may use different
-	 * bit to set QE on different memories, so the MFR can't
-	 * indicate the quad_enable method for this case, we need
-	 * to set it in the default_init fixup hook.
+	 * GD25Q256 'C' generation 'GD25Q256C' implements the JESD216
+	 * standards, JESD216 doesn't define QER field in BFPT, but
+	 * the 'GD25Q256C' does have QE bit defined in status register
+	 * 1, this means parsing the BFPT can't properly set the
+	 * quad_enable function, so we need to tweak the quad_enable
+	 * function manually.
+	 *
+	 * GD25Q256 GENERATION|SFDP MAJOR VERSION|SFDP MINOR VERSION
+	 *      GD25Q256C     |SFDP_JESD216_MAJOR|SFDP_JESD216_MINOR
+	 *      GD25Q256D     |SFDP_JESD216_MAJOR|SFDP_JESD216B_MINOR
+	 *      GD25Q256E     |SFDP_JESD216_MAJOR|SFDP_JESD216B_MINOR
 	 */
-	nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
+	if (bfpt_header->major == SFDP_JESD216_MAJOR &&
+	    bfpt_header->minor == SFDP_JESD216_MINOR)
+		nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
+
+	return 0;
 }
 
 static const struct spi_nor_fixups gd25q256_fixups = {
-	.default_init = gd25q256_default_init,
+	.post_bfpt = gd25q256_post_bfpt,
 };
 
 static const struct flash_info gigadevice_nor_parts[] = {
-- 
2.34.1


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^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH v2 0/1] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt
  2022-10-16 17:19   ` [PATCH v2 0/1] " yaliang.wang
  2022-10-16 17:19     ` [PATCH] " yaliang.wang
@ 2022-11-21 14:32     ` Tudor Ambarus
  1 sibling, 0 replies; 8+ messages in thread
From: Tudor Ambarus @ 2022-11-21 14:32 UTC (permalink / raw)
  To: pratyush, michael, yaliang.wang, richard, cyrille.pitchen,
	vigneshr, andy.yan, miquel.raynal
  Cc: Tudor Ambarus, linux-mtd, linux-kernel

On Mon, 17 Oct 2022 01:19:00 +0800, yaliang.wang@windriver.com wrote:
> GD25Q256 'C' generation 'GD25Q256C' implements the JESD216 standards,
> JESD216 doesn't define the QER field in BFPT, but the 'GD25Q256C'
> does define QE bit in status register 1 bit 6, so we need to tweak
> quad_enable to properly set the function.
> 
> 'D' and 'E' generations implement the JESD216B standards, so parsing
> the SFDP to set quad_enable function is enough for them.
> 
> [...]

Updated comment in gd25q256_post_bfpt and applied to spi-nor/next, thanks!

[1/1] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt
      https://git.kernel.org/mtd/c/4dc49062a7e9

Best regards,
-- 
Tudor Ambarus <tudor.ambarus@microchip.com>

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^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2022-11-21 14:36 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-13  8:40 [PATCH] mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt yaliang.wang
     [not found] ` <MN2PR17MB3375BC0E5878B19651475413B8479@MN2PR17MB3375.namprd17.prod.outlook.com>
2022-09-14  3:05   ` Yaliang Wang
2022-09-14  7:27     ` Michael Walle
2022-10-03  5:35 ` Tudor.Ambarus
2022-10-16  8:37   ` Yaliang Wang
2022-10-16 17:19   ` [PATCH v2 0/1] " yaliang.wang
2022-10-16 17:19     ` [PATCH] " yaliang.wang
2022-11-21 14:32     ` [PATCH v2 0/1] " Tudor Ambarus

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