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From: <Tudor.Ambarus@microchip.com>
To: <p.yadav@ti.com>, <miquel.raynal@bootlin.com>, <richard@nod.at>,
	<vigneshr@ti.com>, <linux-mtd@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Cc: boris.brezillon@collabora.com, nsekhar@ti.com
Subject: Re: [PATCH v13 08/15] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode
Date: Wed, 30 Sep 2020 06:50:09 +0000	[thread overview]
Message-ID: <6198a69a-2800-d14f-1d29-9511ba6a3f5f@microchip.com> (raw)
In-Reply-To: <20200916124418.833-9-p.yadav@ti.com>

On 9/16/20 3:44 PM, Pratyush Yadav wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Some controllers, like the cadence qspi controller, have trouble reading
> only 1 byte in DTR mode. So, do 2 byte reads for SR and FSR commands in

did you get garbage when reading only one byte?

> DTR mode, and then discard the second byte.
> 
> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
> ---
>  drivers/mtd/spi-nor/core.c | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 88c9e18067f4..87c568debf14 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -368,7 +368,7 @@ int spi_nor_write_disable(struct spi_nor *nor)
>   * spi_nor_read_sr() - Read the Status Register.
>   * @nor:       pointer to 'struct spi_nor'.
>   * @sr:                pointer to a DMA-able buffer where the value of the
> - *              Status Register will be written.
> + *              Status Register will be written. Should be at least 2 bytes.
>   *
>   * Return: 0 on success, -errno otherwise.
>   */
> @@ -386,6 +386,11 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
>                 if (spi_nor_protocol_is_dtr(nor->reg_proto)) {
>                         op.addr.nbytes = nor->params->rdsr_addr_nbytes;
>                         op.dummy.nbytes = nor->params->rdsr_dummy;
> +                       /*
> +                        * We don't want to read only one byte in DTR mode. So,
> +                        * read 2 and then discard the second byte.
> +                        */
> +                       op.data.nbytes = 2;

just for octal dtr, but should be fine if you update the previous patch

>                 }
> 
>                 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
> @@ -405,7 +410,8 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
>   * spi_nor_read_fsr() - Read the Flag Status Register.
>   * @nor:       pointer to 'struct spi_nor'
>   * @fsr:       pointer to a DMA-able buffer where the value of the
> - *              Flag Status Register will be written.
> + *              Flag Status Register will be written. Should be at least 2
> + *              bytes.
>   *
>   * Return: 0 on success, -errno otherwise.
>   */
> @@ -423,6 +429,11 @@ static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr)
>                 if (spi_nor_protocol_is_dtr(nor->reg_proto)) {
>                         op.addr.nbytes = nor->params->rdsr_addr_nbytes;
>                         op.dummy.nbytes = nor->params->rdsr_dummy;
> +                       /*
> +                        * We don't want to read only one byte in DTR mode. So,
> +                        * read 2 and then discard the second byte.
> +                        */
> +                       op.data.nbytes = 2;
>                 }
> 
>                 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
> --
> 2.28.0
> 

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  reply	other threads:[~2020-09-30  6:50 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-16 12:44 [PATCH v13 00/15] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 01/15] mtd: spi-nor: core: use EOPNOTSUPP instead of ENOTSUPP Pratyush Yadav
2020-09-29 11:30   ` Tudor.Ambarus
2020-09-16 12:44 ` [PATCH v13 02/15] mtd: spi-nor: core: add spi_nor_{read, write}_reg() helpers Pratyush Yadav
2020-09-29 11:38   ` [PATCH v13 02/15] mtd: spi-nor: core: add spi_nor_{read,write}_reg() helpers Tudor.Ambarus
2020-09-29 12:54     ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 03/15] mtd: spi-nor: core: add spi_nor_controller_ops_erase helper Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 04/15] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 05/15] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-09-30  6:17   ` Tudor.Ambarus
2020-09-16 12:44 ` [PATCH v13 06/15] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-09-30  6:44   ` Tudor.Ambarus
2020-09-30  6:53     ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 07/15] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-09-30  6:46   ` Tudor.Ambarus
2020-09-16 12:44 ` [PATCH v13 08/15] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-09-30  6:50   ` Tudor.Ambarus [this message]
2020-09-30  6:55     ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 09/15] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-09-29 11:26   ` Tudor.Ambarus
2020-09-29 12:51     ` Pratyush Yadav
2020-09-29 13:05       ` Tudor.Ambarus
2020-09-30  7:11   ` Tudor.Ambarus
2020-09-16 12:44 ` [PATCH v13 10/15] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-09-30  7:23   ` Tudor.Ambarus
2020-09-30  7:31     ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 11/15] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-09-29 13:08   ` Pratyush Yadav
2020-09-30  7:32     ` Tudor.Ambarus
2020-09-30  7:43       ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 12/15] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-09-30  7:40   ` Tudor.Ambarus
2020-09-30  7:44     ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 13/15] mtd: spi-nor: core: expose spi_nor_default_setup() in core.h Pratyush Yadav
2020-09-30  7:51   ` Tudor.Ambarus
2020-09-30  8:03     ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 14/15] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-09-30  8:36   ` Tudor.Ambarus
2020-09-30 12:32     ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 15/15] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav
2020-09-30  9:12   ` Tudor.Ambarus
2020-09-29  9:59 ` [RFC PATCH 0/3] mtd: spi-nor: Tackle stateful modes Tudor Ambarus
2020-09-29  9:59   ` [RFC PATCH 1/3] mtd: spi-nor: Introduce SNOR_F_IO_MODE_EN_VOLATILE Tudor Ambarus
2020-09-29 16:45     ` Vignesh Raghavendra
2020-09-29  9:59   ` [RFC PATCH 2/3] mtd: spi-nor: Introduce MTD_SPI_NOR_ALLOW_STATEFUL_MODES Tudor Ambarus
2020-09-29 16:45     ` Vignesh Raghavendra
2020-09-29  9:59   ` [RFC PATCH 3/3] mtd: spi-nor: Parse SFDP SCCR Map Tudor Ambarus
2020-09-30  9:57 ` [PATCH v13 00/15] mtd: spi-nor: add xSPI Octal DTR support Tudor.Ambarus
2020-09-30 12:01   ` Pratyush Yadav

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