Linux-OMAP Archive on lore.kernel.org
 help / color / Atom feed
From: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
To: David Lechner <david@lechnology.com>
Cc: tglx@linutronix.de, jason@lakedaemon.net,
	Marc Zyngier <maz@kernel.org>, "Anna, Suman" <s-anna@ti.com>,
	robh+dt@kernel.org, Lee Jones <lee.jones@linaro.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	"Mills, William" <wmills@ti.com>,
	"Bajjuri, Praneeth" <praneeth@ti.com>
Subject: Re: [PATCH v4 3/5] irqchip/irq-pruss-intc: Add logic for handling reserved interrupts
Date: Fri, 31 Jul 2020 16:11:30 +0200
Message-ID: <CAMxfBF5aQVE2YMKyBcSRaP-=NWHowSfzLz11WzEi=7ZeJDQLBw@mail.gmail.com> (raw)
In-Reply-To: <c2695e63-dd4f-9eb9-afbc-fa52d7e88a86@lechnology.com>

On Wed, 29 Jul 2020 at 20:48, David Lechner <david@lechnology.com> wrote:
>
> On 7/28/20 4:18 AM, Grzegorz Jaszczyk wrote:
> > From: Suman Anna <s-anna@ti.com>
> >
> > The PRUSS INTC has a fixed number of output interrupt lines that are
> > connected to a number of processors or other PRUSS instances or other
> > devices (like DMA) on the SoC. The output interrupt lines 2 through 9
> > are usually connected to the main Arm host processor and are referred
> > to as host interrupts 0 through 7 from ARM/MPU perspective.
> >
> > All of these 8 host interrupts are not always exclusively connected
> > to the Arm interrupt controller. Some SoCs have some interrupt lines
> > not connected to the Arm interrupt controller at all, while a few others
> > have the interrupt lines connected to multiple processors in which they
> > need to be partitioned as per SoC integration needs. For example, AM437x
> > and 66AK2G SoCs have 2 PRUSS instances each and have the host interrupt 5
> > connected to the other PRUSS, while AM335x has host interrupt 0 shared
> > between MPU and TSC_ADC and host interrupts 6 & 7 shared between MPU and
> > a DMA controller.
> >
> > Add logic to the PRUSS INTC driver to ignore both these shared and
> > invalid interrupts.
>
> If a person wanted to use DMA with a PRU what will handle the mapping
> of a PRU event to host interrupt 6 or 7 if they are being ignored here?

Mapping can be handled independently: even if a given host interrupt
is on irqs-reserved list, the mapping description for it can be
provided (e.g. similar to the resource table case passed through rproc
subsystem) and nothing prevents this driver from actually routing it.

>
> >
> > Signed-off-by: Suman Anna <s-anna@ti.com>
> > Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
> > ---
> > v3->v4:
> > - Due to changes in DT bindings which converts irqs-reserved
> >    property from uint8-array to bitmask requested by Rob introduce
> >    relevant changes in the driver.
> > - Merge the irqs-reserved and irqs-shared to one property since they
> >    can be handled by one logic (relevant change was introduced to DT
> >    binding).
> > - Update commit message.
> > v2->v3:
> > - Extra checks for (intc->irqs[i]) in error/remove path was moved from
> >    "irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS
> >    interrupts" to this patch
> > v1->v2:
> > - https://patchwork.kernel.org/patch/11069757/
> > ---
> >   drivers/irqchip/irq-pruss-intc.c | 29 ++++++++++++++++++++++++-----
> >   1 file changed, 24 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/irqchip/irq-pruss-intc.c b/drivers/irqchip/irq-pruss-intc.c
> > index 45b966a..cf9a59b 100644
> > --- a/drivers/irqchip/irq-pruss-intc.c
> > +++ b/drivers/irqchip/irq-pruss-intc.c
> > @@ -474,7 +474,7 @@ static int pruss_intc_probe(struct platform_device *pdev)
> >       struct pruss_intc *intc;
> >       struct pruss_host_irq_data *host_data[MAX_NUM_HOST_IRQS] = { NULL };
> >       int i, irq, ret;
> > -     u8 max_system_events;
> > +     u8 max_system_events, invalid_intr = 0;
> >
> >       data = of_device_get_match_data(dev);
> >       if (!data)
> > @@ -496,6 +496,16 @@ static int pruss_intc_probe(struct platform_device *pdev)
> >               return PTR_ERR(intc->base);
> >       }
> >
> > +     ret = of_property_read_u8(dev->of_node, "ti,irqs-reserved",
> > +                               &invalid_intr);
>
> Why not make the variable name match the property name?

Sure, I will rename this variable.

Thank you for your review,
Grzegorz

  reply index

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-28  9:18 [PATCH v4 0/5] Add TI PRUSS Local Interrupt Controller IRQChip driver Grzegorz Jaszczyk
2020-07-28  9:18 ` [PATCH v4 1/5] dt-bindings: irqchip: Add PRU-ICSS interrupt controller bindings Grzegorz Jaszczyk
2020-07-29 17:34   ` David Lechner
2020-07-31 11:48     ` Grzegorz Jaszczyk
2020-07-31 14:09       ` David Lechner
2020-07-31 14:16         ` Grzegorz Jaszczyk
2020-07-31 14:35           ` Suman Anna
2020-07-31 21:09       ` Rob Herring
2020-08-02 21:49         ` Grzegorz Jaszczyk
2020-07-28  9:18 ` [PATCH v4 2/5] irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts Grzegorz Jaszczyk
2020-07-29 18:43   ` David Lechner
2020-07-31 11:57     ` Grzegorz Jaszczyk
2020-07-28  9:18 ` [PATCH v4 3/5] irqchip/irq-pruss-intc: Add logic for handling reserved interrupts Grzegorz Jaszczyk
2020-07-28 16:37   ` Marc Zyngier
2020-07-28 22:23     ` Grzegorz Jaszczyk
2020-07-29 18:48   ` David Lechner
2020-07-31 14:11     ` Grzegorz Jaszczyk [this message]
2020-07-28  9:18 ` [PATCH v4 4/5] irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops Grzegorz Jaszczyk
2020-07-29 19:23   ` David Lechner
2020-07-31 12:28     ` Grzegorz Jaszczyk
2020-07-31 15:59       ` David Lechner
2020-07-28  9:18 ` [PATCH v4 5/5] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs Grzegorz Jaszczyk
2020-07-29 19:28   ` David Lechner
2020-07-31 12:32     ` Grzegorz Jaszczyk

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CAMxfBF5aQVE2YMKyBcSRaP-=NWHowSfzLz11WzEi=7ZeJDQLBw@mail.gmail.com' \
    --to=grzegorz.jaszczyk@linaro.org \
    --cc=david@lechnology.com \
    --cc=devicetree@vger.kernel.org \
    --cc=jason@lakedaemon.net \
    --cc=lee.jones@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-omap@vger.kernel.org \
    --cc=maz@kernel.org \
    --cc=praneeth@ti.com \
    --cc=robh+dt@kernel.org \
    --cc=s-anna@ti.com \
    --cc=tglx@linutronix.de \
    --cc=wmills@ti.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

Linux-OMAP Archive on lore.kernel.org

Archives are clonable:
	git clone --mirror https://lore.kernel.org/linux-omap/0 linux-omap/git/0.git

	# If you have public-inbox 1.1+ installed, you may
	# initialize and index your mirror using the following commands:
	public-inbox-init -V2 linux-omap linux-omap/ https://lore.kernel.org/linux-omap \
		linux-omap@vger.kernel.org
	public-inbox-index linux-omap

Example config snippet for mirrors

Newsgroup available over NNTP:
	nntp://nntp.lore.kernel.org/org.kernel.vger.linux-omap


AGPL code for this site: git clone https://public-inbox.org/public-inbox.git