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From: Marek Behun <marek.behun@nic.cz>
To: "Pali Rohár" <pali@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Andrew Murray <amurray@thegoodpenguin.co.uk>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Remi Pommarel <repk@triplefau.lt>,
	Tomasz Maciej Nowak <tmn505@gmail.com>,
	Xogium <contact@xogium.me>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH 2/8] dts: espressobin: Define max-link-speed for pcie0
Date: Sun, 19 Apr 2020 05:19:11 +0200	[thread overview]
Message-ID: <20200419051911.1b5adef0@nic.cz> (raw)
In-Reply-To: <20200415160054.951-3-pali@kernel.org>

When chaning dts files in arch/arm64/boot/dts/marvell, use subject
prefix
  arm64: dts: marvell:
for espressobin for example
  arm64: dts: marvell: espressobin:

instead of
  dts: espressobin
or
  dts: aardvark

Marek


On Wed, 15 Apr 2020 18:00:48 +0200
Pali Rohár <pali@kernel.org> wrote:

> Previously aardvark PCI controller set speed to gen2. Now it reads speed
> from Device Tree and as default use maximal possible speed which is gen3.
> 
> Because Espressobin has advertised only PCI Express 2.0 capability and
> previous value was gen2, define max-link-speed to 2, so there would not be
> any configuration change.
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>
> ---
>  arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
> index 42e992f9c8a5..6705618162d5 100644
> --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
> @@ -47,6 +47,7 @@
>  	phys = <&comphy1 0>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
> +	max-link-speed = <2>;
>  };
>  
>  /* J6 */


  reply	other threads:[~2020-04-19  3:19 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-15 16:00 [PATCH 0/8] PCI: aardvark: Fix support for Turris MOX and Compex wifi cards Pali Rohár
2020-04-15 16:00 ` [PATCH 1/8] PCI: aardvark: Set controller speed from Device Tree max-link-speed Pali Rohár
2020-04-15 16:00 ` [PATCH 2/8] dts: espressobin: Define max-link-speed for pcie0 Pali Rohár
2020-04-19  3:19   ` Marek Behun [this message]
2020-04-15 16:00 ` [PATCH 3/8] PCI: aardvark: Start link training immediately after enabling link training Pali Rohár
2020-04-15 16:00 ` [PATCH 4/8] PCI: aardvark: Do not overwrite Link Status register and ASPM Control bits in Link Control register Pali Rohár
2020-04-15 16:03 ` [PATCH 5/8] PCI: aardvark: Set final controller speed based on negotiated link speed Pali Rohár
2020-04-19  3:17   ` Marek Behun
2020-04-15 16:03 ` [PATCH 6/8] PCI: aardvark: Add support for issuing PERST via GPIO Pali Rohár
2020-04-19  3:23   ` Marek Behun
2020-04-15 16:03 ` [PATCH 7/8] dts: aardvark: Route pcie reset pin to gpio function and define reset-gpios for pcie Pali Rohár
2020-04-19  3:54   ` Marek Behun
2020-04-15 16:03 ` [PATCH 8/8] PCI: aardvark: Add FIXME for code which access PCIE_CORE_CMD_STATUS_REG Pali Rohár
2020-04-15 16:18   ` Pali Rohár
2020-04-16 15:50 ` [PATCH 0/8] PCI: aardvark: Fix support for Turris MOX and Compex wifi cards Tomasz Maciej Nowak
2020-04-19  4:01 ` Marek Behun

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