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From: Ben Widawsky <ben.widawsky@intel.com>
To: Joe Perches <joe@perches.com>
Cc: Dan Williams <dan.j.williams@intel.com>,
	linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, hch@lst.de
Subject: Re: [PATCH v3 02/10] cxl/pci: Remove dev_dbg for unknown register blocks
Date: Sat, 9 Oct 2021 11:04:09 -0700	[thread overview]
Message-ID: <20211009180409.rf7vqdly4loubthe@intel.com> (raw)
In-Reply-To: <0f625a108a2905c4f7d7ebb5b0db62b42f865338.camel@perches.com>

On 21-10-09 09:48:10, Joe Perches wrote:
> On Sat, 2021-10-09 at 09:44 -0700, Dan Williams wrote:
> > From: Ben Widawsky <ben.widawsky@intel.com>
> > 
> > While interesting to driver developers, the dev_dbg message doesn't do
> > much except clutter up logs.
> 
> So?  This isn't enabled by default.  How does it 'clutter' logs?
> 

Clutter logs for driver developers working on this subsystem. It's fine to drop
this and just use the next sentence as the explanation as well.

> > This information should be attainable
> > through sysfs, and someday lspci like utilities. This change
> > additionally helps reduce the LOC in a subsequent patch to refactor some
> > of cxl_pci register mapping.
> > 
> > Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
> > Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> > ---
> >  drivers/cxl/pci.c |    3 ---
> >  1 file changed, 3 deletions(-)
> > 
> > diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
> > index 64180f46c895..ccc7c2573ddc 100644
> > --- a/drivers/cxl/pci.c
> > +++ b/drivers/cxl/pci.c
> > @@ -475,9 +475,6 @@ static int cxl_pci_setup_regs(struct cxl_mem *cxlm)
> >  		cxl_decode_register_block(reg_lo, reg_hi, &bar, &offset,
> >  					  &reg_type);
> >  
> > 
> > -		dev_dbg(dev, "Found register block in bar %u @ 0x%llx of type %u\n",
> > -			bar, offset, reg_type);
> > -
> >  		/* Ignore unknown register block types */
> >  		if (reg_type > CXL_REGLOC_RBI_MEMDEV)
> >  			continue;
> > 
> 
> 

  reply	other threads:[~2021-10-09 18:04 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-09 16:43 [PATCH v3 00/10] cxl_pci refactor for reusability Dan Williams
2021-10-09 16:44 ` [PATCH v3 01/10] cxl/pci: Convert register block identifiers to an enum Dan Williams
2021-10-09 16:44 ` [PATCH v3 02/10] cxl/pci: Remove dev_dbg for unknown register blocks Dan Williams
2021-10-09 16:48   ` Joe Perches
2021-10-09 18:04     ` Ben Widawsky [this message]
2021-10-09 16:44 ` [PATCH v3 03/10] cxl/pci: Fix NULL vs ERR_PTR confusion Dan Williams
2021-10-10  3:44   ` Ira Weiny
2021-10-15 16:15   ` Jonathan Cameron
2021-10-15 20:16     ` Dan Williams
2021-10-15 21:29   ` [PATCH v6 " Dan Williams
2021-10-09 16:44 ` [PATCH v3 04/10] cxl/pci: Remove pci request/release regions Dan Williams
2021-10-09 16:44 ` [PATCH v3 05/10] cxl/pci: Make more use of cxl_register_map Dan Williams
2021-10-09 19:04   ` kernel test robot
2021-10-09 20:51   ` [PATCH v4 " Dan Williams
2021-10-10  4:03     ` Ira Weiny
2021-10-13 23:53     ` [PATCH v5 " Dan Williams
2021-10-09 16:44 ` [PATCH v3 06/10] cxl/pci: Add @base to cxl_register_map Dan Williams
2021-10-10  4:20   ` Ira Weiny
2021-10-13 22:53     ` Dan Williams
2021-10-15 16:29       ` Jonathan Cameron
2021-10-15 16:56         ` Dan Williams
2021-10-13 23:57   ` [PATCH v5 " Dan Williams
2021-10-15 21:57     ` [PATCH v6 " Dan Williams
2021-10-18  9:30       ` Jonathan Cameron
2021-10-15 16:27   ` [PATCH v3 " Jonathan Cameron
2021-10-15 16:55     ` Dan Williams
2021-10-18  9:30       ` Jonathan Cameron
2021-10-09 16:44 ` [PATCH v3 07/10] cxl/pci: Split cxl_pci_setup_regs() Dan Williams
2021-10-10  4:44   ` Ira Weiny
2021-10-13 22:45   ` Ben Widawsky
2021-10-13 22:49     ` Dan Williams
2021-10-14  0:12       ` Ben Widawsky
2021-10-14  0:48         ` Dan Williams
2021-10-15 16:44   ` Jonathan Cameron
2021-10-15 17:00     ` Dan Williams
2021-10-15 23:30   ` [PATCH v6 " Dan Williams
2021-11-10 17:14     ` Jonathan Cameron
2021-11-10 17:30       ` Ben Widawsky
2021-11-10 17:43         ` Jonathan Cameron
2021-10-09 16:44 ` [PATCH v3 08/10] PCI: Add pci_find_dvsec_capability to find designated VSEC Dan Williams
2021-10-09 16:44 ` [PATCH v3 09/10] cxl/pci: Use pci core's DVSEC functionality Dan Williams
2021-10-11 13:35   ` Jonathan Cameron
2021-10-09 16:44 ` [PATCH v3 10/10] ocxl: " Dan Williams

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