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From: Dan Williams <dan.j.williams@intel.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: linux-cxl@vger.kernel.org, Linux PCI <linux-pci@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Christoph Hellwig <hch@lst.de>
Subject: Re: [PATCH v3 06/10] cxl/pci: Add @base to cxl_register_map
Date: Fri, 15 Oct 2021 09:55:57 -0700	[thread overview]
Message-ID: <CAPcyv4j9W4NJFTPk8c5_nG_fAUpecnY886jKmhYzZONW4RCf5Q@mail.gmail.com> (raw)
In-Reply-To: <20211015172732.000012fc@Huawei.com>

On Fri, Oct 15, 2021 at 9:27 AM Jonathan Cameron
<Jonathan.Cameron@huawei.com> wrote:
>
> On Sat, 9 Oct 2021 09:44:29 -0700
> Dan Williams <dan.j.williams@intel.com> wrote:
>
> > In addition to carrying @barno, @block_offset, and @reg_type, add @base
> > to keep all map/unmap parameters in one object. The helpers
> > cxl_{map,unmap}_regblock() handle adjusting @base to the @block_offset
> > at map and unmap time.
> >
> > Signed-off-by: Dan Williams <dan.j.williams@intel.com>
>
> I don't really mind them, but why the renames
> from cxl_pci_* to cxl_* ?

Primarily because we had a mix of some functions including the _pci
and some not, and I steered towards just dropping it. I think the
"PCI" aspect of the function is clear by its function signature, and
that was being muddied by passing @cxlm unnecessarily. So instead of:

cxl_pci_$foo(struct cxl_mem *cxlm...)

...I went with:

cxl_$foo(struct pci_dev *pdev...)

...concerns?

  reply	other threads:[~2021-10-15 16:56 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-09 16:43 [PATCH v3 00/10] cxl_pci refactor for reusability Dan Williams
2021-10-09 16:44 ` [PATCH v3 01/10] cxl/pci: Convert register block identifiers to an enum Dan Williams
2021-10-09 16:44 ` [PATCH v3 02/10] cxl/pci: Remove dev_dbg for unknown register blocks Dan Williams
2021-10-09 16:48   ` Joe Perches
2021-10-09 18:04     ` Ben Widawsky
2021-10-09 16:44 ` [PATCH v3 03/10] cxl/pci: Fix NULL vs ERR_PTR confusion Dan Williams
2021-10-10  3:44   ` Ira Weiny
2021-10-15 16:15   ` Jonathan Cameron
2021-10-15 20:16     ` Dan Williams
2021-10-15 21:29   ` [PATCH v6 " Dan Williams
2021-10-09 16:44 ` [PATCH v3 04/10] cxl/pci: Remove pci request/release regions Dan Williams
2021-10-09 16:44 ` [PATCH v3 05/10] cxl/pci: Make more use of cxl_register_map Dan Williams
2021-10-09 19:04   ` kernel test robot
2021-10-09 20:51   ` [PATCH v4 " Dan Williams
2021-10-10  4:03     ` Ira Weiny
2021-10-13 23:53     ` [PATCH v5 " Dan Williams
2021-10-09 16:44 ` [PATCH v3 06/10] cxl/pci: Add @base to cxl_register_map Dan Williams
2021-10-10  4:20   ` Ira Weiny
2021-10-13 22:53     ` Dan Williams
2021-10-15 16:29       ` Jonathan Cameron
2021-10-15 16:56         ` Dan Williams
2021-10-13 23:57   ` [PATCH v5 " Dan Williams
2021-10-15 21:57     ` [PATCH v6 " Dan Williams
2021-10-18  9:30       ` Jonathan Cameron
2021-10-15 16:27   ` [PATCH v3 " Jonathan Cameron
2021-10-15 16:55     ` Dan Williams [this message]
2021-10-18  9:30       ` Jonathan Cameron
2021-10-09 16:44 ` [PATCH v3 07/10] cxl/pci: Split cxl_pci_setup_regs() Dan Williams
2021-10-10  4:44   ` Ira Weiny
2021-10-13 22:45   ` Ben Widawsky
2021-10-13 22:49     ` Dan Williams
2021-10-14  0:12       ` Ben Widawsky
2021-10-14  0:48         ` Dan Williams
2021-10-15 16:44   ` Jonathan Cameron
2021-10-15 17:00     ` Dan Williams
2021-10-15 23:30   ` [PATCH v6 " Dan Williams
2021-11-10 17:14     ` Jonathan Cameron
2021-11-10 17:30       ` Ben Widawsky
2021-11-10 17:43         ` Jonathan Cameron
2021-10-09 16:44 ` [PATCH v3 08/10] PCI: Add pci_find_dvsec_capability to find designated VSEC Dan Williams
2021-10-09 16:44 ` [PATCH v3 09/10] cxl/pci: Use pci core's DVSEC functionality Dan Williams
2021-10-11 13:35   ` Jonathan Cameron
2021-10-09 16:44 ` [PATCH v3 10/10] ocxl: " Dan Williams

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