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From: Dan Williams <dan.j.williams@intel.com>
To: Ben Widawsky <ben.widawsky@intel.com>
Cc: linux-cxl@vger.kernel.org, Linux PCI <linux-pci@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Christoph Hellwig <hch@lst.de>
Subject: Re: [PATCH v3 07/10] cxl/pci: Split cxl_pci_setup_regs()
Date: Wed, 13 Oct 2021 17:48:35 -0700	[thread overview]
Message-ID: <CAPcyv4iyo54VWoamuJbwZBYrAX2eSy7wKmRKjNDk19fCB2gjHQ@mail.gmail.com> (raw)
In-Reply-To: <20211014001236.aohtmzrrvmcq6dpo@intel.com>

On Wed, Oct 13, 2021 at 5:12 PM Ben Widawsky <ben.widawsky@intel.com> wrote:
>
> On 21-10-13 15:49:30, Dan Williams wrote:
> > On Wed, Oct 13, 2021 at 3:45 PM Ben Widawsky <ben.widawsky@intel.com> wrote:
> > >
> > > On 21-10-09 09:44:34, Dan Williams wrote:
> > > > From: Ben Widawsky <ben.widawsky@intel.com>
> > > >
> > > > In preparation for moving parts of register mapping to cxl_core, split
> > > > cxl_pci_setup_regs() into a helper that finds register blocks,
> > > > (cxl_find_regblock()), and a generic wrapper that probes the precise
> > > > register sets within a block (cxl_setup_regs()).
> > > >
> > > > Move the actual mapping (cxl_map_regs()) of the only register-set that
> > > > cxl_pci cares about (memory device registers) up a level from the former
> > > > cxl_pci_setup_regs() into cxl_pci_probe().
> > > >
> > > > With this change the unused component registers are no longer mapped,
> > > > but the helpers are primed to move into the core.
> > > >
> > > > Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
> > > > [djbw: rebase on the cxl_register_map refactor]
> > > > [djbw: drop cxl_map_regs() for component registers]
> > > > Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> > >
> > > [snip]
> > >
> > > Did you mean to also drop the component register handling in cxl_probe_regs()
> > > and cxl_map_regs()?
> >
> > No, because that has a soon to be added user, right?
>
> In the current codebase, the port driver gets the offset from cxl_core, not
> through the pci driver. I know you wanted this to be passed from cxl_pci (and
> indeed it was before). Currently however, the functionality is subsumed by
> cxl_find_regblock and is used by cxl_pci (for device registers), cxl_acpi (to
> get the CHBCR) and cxl_core (to get the component register block for switches).
>
> I have no user in cxl_pci for the component registers, and as we discussed, we
> have no good way to share them across modules.

Are you saying that cxl_probe_regs() will not move to the core in your
upcoming series? I was expecting that cxl_find_regblock() and
cxl_probe_regs() go hand in hand.

>
> We can ignore this for now though and discuss it on the list when I post. If
> there is a better way to handle this, I'm open to it.

It's hard to have discussions about API uses without the patches, but
I'm ok to leave further cxl_probe_regs() refactoring to your series.

  reply	other threads:[~2021-10-14  0:48 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-09 16:43 [PATCH v3 00/10] cxl_pci refactor for reusability Dan Williams
2021-10-09 16:44 ` [PATCH v3 01/10] cxl/pci: Convert register block identifiers to an enum Dan Williams
2021-10-09 16:44 ` [PATCH v3 02/10] cxl/pci: Remove dev_dbg for unknown register blocks Dan Williams
2021-10-09 16:48   ` Joe Perches
2021-10-09 18:04     ` Ben Widawsky
2021-10-09 16:44 ` [PATCH v3 03/10] cxl/pci: Fix NULL vs ERR_PTR confusion Dan Williams
2021-10-10  3:44   ` Ira Weiny
2021-10-15 16:15   ` Jonathan Cameron
2021-10-15 20:16     ` Dan Williams
2021-10-15 21:29   ` [PATCH v6 " Dan Williams
2021-10-09 16:44 ` [PATCH v3 04/10] cxl/pci: Remove pci request/release regions Dan Williams
2021-10-09 16:44 ` [PATCH v3 05/10] cxl/pci: Make more use of cxl_register_map Dan Williams
2021-10-09 19:04   ` kernel test robot
2021-10-09 20:51   ` [PATCH v4 " Dan Williams
2021-10-10  4:03     ` Ira Weiny
2021-10-13 23:53     ` [PATCH v5 " Dan Williams
2021-10-09 16:44 ` [PATCH v3 06/10] cxl/pci: Add @base to cxl_register_map Dan Williams
2021-10-10  4:20   ` Ira Weiny
2021-10-13 22:53     ` Dan Williams
2021-10-15 16:29       ` Jonathan Cameron
2021-10-15 16:56         ` Dan Williams
2021-10-13 23:57   ` [PATCH v5 " Dan Williams
2021-10-15 21:57     ` [PATCH v6 " Dan Williams
2021-10-18  9:30       ` Jonathan Cameron
2021-10-15 16:27   ` [PATCH v3 " Jonathan Cameron
2021-10-15 16:55     ` Dan Williams
2021-10-18  9:30       ` Jonathan Cameron
2021-10-09 16:44 ` [PATCH v3 07/10] cxl/pci: Split cxl_pci_setup_regs() Dan Williams
2021-10-10  4:44   ` Ira Weiny
2021-10-13 22:45   ` Ben Widawsky
2021-10-13 22:49     ` Dan Williams
2021-10-14  0:12       ` Ben Widawsky
2021-10-14  0:48         ` Dan Williams [this message]
2021-10-15 16:44   ` Jonathan Cameron
2021-10-15 17:00     ` Dan Williams
2021-10-15 23:30   ` [PATCH v6 " Dan Williams
2021-11-10 17:14     ` Jonathan Cameron
2021-11-10 17:30       ` Ben Widawsky
2021-11-10 17:43         ` Jonathan Cameron
2021-10-09 16:44 ` [PATCH v3 08/10] PCI: Add pci_find_dvsec_capability to find designated VSEC Dan Williams
2021-10-09 16:44 ` [PATCH v3 09/10] cxl/pci: Use pci core's DVSEC functionality Dan Williams
2021-10-11 13:35   ` Jonathan Cameron
2021-10-09 16:44 ` [PATCH v3 10/10] ocxl: " Dan Williams

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