From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <nvdimm@lists.linux.dev>,
<linux-pci@vger.kernel.org>, <patches@lists.linux.dev>,
<hch@lst.de>, "Ben Widawsky" <bwidawsk@kernel.org>
Subject: Re: [PATCH 35/46] cxl/region: Add a 'uuid' attribute
Date: Tue, 28 Jun 2022 11:29:19 +0100 [thread overview]
Message-ID: <20220628112919.000067e6@Huawei.com> (raw)
In-Reply-To: <20220624041950.559155-10-dan.j.williams@intel.com>
On Thu, 23 Jun 2022 21:19:39 -0700
Dan Williams <dan.j.williams@intel.com> wrote:
> From: Ben Widawsky <bwidawsk@kernel.org>
>
> The process of provisioning a region involves triggering the creation of
> a new region object, pouring in the configuration, and then binding that
> configured object to the region driver to start is operation. For
> persistent memory regions the CXL specification mandates that it
> identified by a uuid. Add an ABI for userspace to specify a region's
> uuid.
>
> Signed-off-by: Ben Widawsky <bwidawsk@kernel.org>
> [djbw: simplify locking]
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
I think this needs to be a little less restrictive as it currently errors
out on trying to write the same UUID to the same region twice.
Short cut that case and just return 0 if the UUID is same as already set.
Thanks,
Jonathan
> ---
> Documentation/ABI/testing/sysfs-bus-cxl | 10 +++
> drivers/cxl/core/region.c | 115 ++++++++++++++++++++++++
> drivers/cxl/cxl.h | 25 ++++++
> 3 files changed, 150 insertions(+)
>
> diff --git a/Documentation/ABI/testing/sysfs-bus-cxl b/Documentation/ABI/testing/sysfs-bus-cxl
> index 9a4856066631..d30c95a758a9 100644
> --- a/Documentation/ABI/testing/sysfs-bus-cxl
> +++ b/Documentation/ABI/testing/sysfs-bus-cxl
> @@ -263,3 +263,13 @@ Contact: linux-cxl@vger.kernel.org
> Description:
> (WO) Write a string in the form 'regionZ' to delete that region,
> provided it is currently idle / not bound to a driver.
> +
> +
> +What: /sys/bus/cxl/devices/regionZ/uuid
> +Date: May, 2022
> +KernelVersion: v5.20
> +Contact: linux-cxl@vger.kernel.org
> +Description:
> + (RW) Write a unique identifier for the region. This field must
> + be set for persistent regions and it must not conflict with the
> + UUID of another region.
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index f2a0ead20ca7..f75978f846b9 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -5,6 +5,7 @@
> #include <linux/device.h>
> #include <linux/module.h>
> #include <linux/slab.h>
> +#include <linux/uuid.h>
> #include <linux/idr.h>
> #include <cxl.h>
> #include "core.h"
> @@ -17,10 +18,123 @@
> * Memory ranges, Regions represent the active mapped capacity by the HDM
> * Decoder Capability structures throughout the Host Bridges, Switches, and
> * Endpoints in the topology.
> + *
> + * Region configuration has ordering constraints. UUID may be set at any time
> + * but is only visible for persistent regions.
> + */
> +
> +/*
> + * All changes to the interleave configuration occur with this lock held
> + * for write.
> */
> +static DECLARE_RWSEM(cxl_region_rwsem);
>
> static struct cxl_region *to_cxl_region(struct device *dev);
>
> +static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
> + char *buf)
> +{
> + struct cxl_region *cxlr = to_cxl_region(dev);
> + struct cxl_region_params *p = &cxlr->params;
> + ssize_t rc;
> +
> + rc = down_read_interruptible(&cxl_region_rwsem);
> + if (rc)
> + return rc;
> + rc = sysfs_emit(buf, "%pUb\n", &p->uuid);
> + up_read(&cxl_region_rwsem);
> +
> + return rc;
> +}
> +
> +static int is_dup(struct device *match, void *data)
> +{
> + struct cxl_region_params *p;
> + struct cxl_region *cxlr;
> + uuid_t *uuid = data;
> +
> + if (!is_cxl_region(match))
> + return 0;
> +
> + lockdep_assert_held(&cxl_region_rwsem);
> + cxlr = to_cxl_region(match);
> + p = &cxlr->params;
> +
> + if (uuid_equal(&p->uuid, uuid)) {
> + dev_dbg(match, "already has uuid: %pUb\n", uuid);
> + return -EBUSY;
> + }
> +
> + return 0;
> +}
> +
> +static ssize_t uuid_store(struct device *dev, struct device_attribute *attr,
> + const char *buf, size_t len)
> +{
> + struct cxl_region *cxlr = to_cxl_region(dev);
> + struct cxl_region_params *p = &cxlr->params;
> + uuid_t temp;
> + ssize_t rc;
> +
> + if (len != UUID_STRING_LEN + 1)
> + return -EINVAL;
> +
> + rc = uuid_parse(buf, &temp);
> + if (rc)
> + return rc;
> +
> + if (uuid_is_null(&temp))
> + return -EINVAL;
> +
> + rc = down_write_killable(&cxl_region_rwsem);
> + if (rc)
> + return rc;
> +
> + rc = -EBUSY;
> + if (p->state >= CXL_CONFIG_ACTIVE)
> + goto out;
> +
> + rc = bus_for_each_dev(&cxl_bus_type, NULL, &temp, is_dup);
> + if (rc < 0)
> + goto out;
> +
> + uuid_copy(&p->uuid, &temp);
> +out:
> + up_write(&cxl_region_rwsem);
> +
> + if (rc)
> + return rc;
> + return len;
> +}
> +static DEVICE_ATTR_RW(uuid);
> +
> +static umode_t cxl_region_visible(struct kobject *kobj, struct attribute *a,
> + int n)
> +{
> + struct device *dev = kobj_to_dev(kobj);
> + struct cxl_region *cxlr = to_cxl_region(dev);
> +
> + if (a == &dev_attr_uuid.attr && cxlr->mode != CXL_DECODER_PMEM)
> + return 0;
> + return a->mode;
> +}
> +
> +static struct attribute *cxl_region_attrs[] = {
> + &dev_attr_uuid.attr,
> + NULL,
> +};
> +
> +static const struct attribute_group cxl_region_group = {
> + .attrs = cxl_region_attrs,
> + .is_visible = cxl_region_visible,
> +};
> +
> +static const struct attribute_group *region_groups[] = {
> + &cxl_base_attribute_group,
> + &cxl_region_group,
> + NULL,
> +};
> +
> static void cxl_region_release(struct device *dev)
> {
> struct cxl_region *cxlr = to_cxl_region(dev);
> @@ -32,6 +146,7 @@ static void cxl_region_release(struct device *dev)
> static const struct device_type cxl_region_type = {
> .name = "cxl_region",
> .release = cxl_region_release,
> + .groups = region_groups
> };
>
> bool is_cxl_region(struct device *dev)
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index 49b73b2e44a9..46a9f8acc602 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -288,18 +288,43 @@ struct cxl_root_decoder {
> struct cxl_switch_decoder cxlsd;
> };
>
> +/*
> + * enum cxl_config_state - State machine for region configuration
> + * @CXL_CONFIG_IDLE: Any sysfs attribute can be written freely
> + * @CXL_CONFIG_ACTIVE: All targets have been added the region is now
> + * active
> + */
> +enum cxl_config_state {
> + CXL_CONFIG_IDLE,
> + CXL_CONFIG_ACTIVE,
> +};
> +
> +/**
> + * struct cxl_region_params - region settings
> + * @state: allow the driver to lockdown further parameter changes
> + * @uuid: unique id for persistent regions
> + *
> + * State transitions are protected by the cxl_region_rwsem
> + */
> +struct cxl_region_params {
> + enum cxl_config_state state;
> + uuid_t uuid;
> +};
> +
> /**
> * struct cxl_region - CXL region
> * @dev: This region's device
> * @id: This region's id. Id is globally unique across all regions
> * @mode: Endpoint decoder allocation / access mode
> * @type: Endpoint decoder target type
> + * @params: active + config params for the region
> */
> struct cxl_region {
> struct device dev;
> int id;
> enum cxl_decoder_mode mode;
> enum cxl_decoder_type type;
> + struct cxl_region_params params;
> };
>
> /**
next prev parent reply other threads:[~2022-06-28 10:29 UTC|newest]
Thread overview: 157+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-24 2:45 [PATCH 00/46] CXL PMEM Region Provisioning Dan Williams
2022-06-24 2:45 ` [PATCH 01/46] tools/testing/cxl: Fix cxl_hdm_decode_init() calling convention Dan Williams
2022-06-28 10:37 ` Jonathan Cameron
[not found] ` <CGME20220629174147uscas1p211384ae262e099484440ef285be26c75@uscas1p2.samsung.com>
2022-06-29 17:41 ` Adam Manzanares
2022-07-09 20:06 ` Dan Williams
2022-07-12 22:11 ` Adam Manzanares
2022-06-24 2:45 ` [PATCH 02/46] cxl/port: Keep port->uport valid for the entire life of a port Dan Williams
2022-06-24 3:37 ` Alison Schofield
2022-06-28 11:47 ` Jonathan Cameron
2022-06-28 14:27 ` Dan Williams
[not found] ` <CGME20220629174622uscas1p2236a084ce25771a3ab57c6f006632f35@uscas1p2.samsung.com>
2022-06-29 17:46 ` Adam Manzanares
2022-06-24 2:45 ` [PATCH 03/46] cxl/hdm: Use local hdm variable Dan Williams
2022-06-24 3:38 ` Alison Schofield
2022-06-28 15:16 ` Jonathan Cameron
[not found] ` <CGME20220629200312uscas1p292303b9325dcbfe59293f002dc9e6b03@uscas1p2.samsung.com>
2022-06-29 20:03 ` Adam Manzanares
2022-06-24 2:45 ` [PATCH 04/46] cxl/core: Rename ->decoder_range ->hpa_range Dan Williams
2022-06-24 3:39 ` Alison Schofield
2022-06-28 15:17 ` Jonathan Cameron
[not found] ` <CGME20220629200652uscas1p2c1da644ea63a5de69e14e046379779b1@uscas1p2.samsung.com>
2022-06-29 20:06 ` Adam Manzanares
2022-06-24 2:45 ` [PATCH 05/46] cxl/core: Drop ->platform_res attribute for root decoders Dan Williams
2022-06-28 15:24 ` Jonathan Cameron
2022-07-09 23:33 ` Dan Williams
[not found] ` <CGME20220629202117uscas1p2892fb68ae60c4754e2f7d26882a92ae5@uscas1p2.samsung.com>
2022-06-29 20:21 ` Adam Manzanares
2022-07-09 23:38 ` Dan Williams
2022-06-24 2:45 ` [PATCH 06/46] cxl/core: Drop is_cxl_decoder() Dan Williams
2022-06-24 3:48 ` Alison Schofield
2022-06-28 15:25 ` Jonathan Cameron
[not found] ` <CGME20220629203448uscas1p264a7f79a1ed7f9257eefcb3064c7d943@uscas1p2.samsung.com>
2022-06-29 20:34 ` Adam Manzanares
2022-06-24 2:45 ` [PATCH 07/46] cxl: Introduce cxl_to_{ways,granularity} Dan Williams
2022-06-28 15:36 ` Jonathan Cameron
2022-07-09 23:52 ` Dan Williams
2022-06-24 2:45 ` [PATCH 08/46] cxl/core: Define a 'struct cxl_switch_decoder' Dan Williams
2022-06-28 16:12 ` Jonathan Cameron
2022-06-30 10:56 ` Jonathan Cameron
2022-07-10 0:49 ` Dan Williams
2022-07-10 0:33 ` Dan Williams
2022-06-24 2:46 ` [PATCH 09/46] cxl/acpi: Track CXL resources in iomem_resource Dan Williams
2022-06-28 16:43 ` Jonathan Cameron
2022-07-10 2:12 ` Dan Williams
2022-07-19 14:24 ` Jonathan Cameron
2022-06-24 2:46 ` [PATCH 10/46] cxl/core: Define a 'struct cxl_root_decoder' for tracking CXL window resources Dan Williams
2022-06-28 16:49 ` Jonathan Cameron
2022-07-10 2:20 ` Dan Williams
2022-06-28 16:53 ` Jonathan Cameron
2022-06-24 2:46 ` [PATCH 11/46] cxl/core: Define a 'struct cxl_endpoint_decoder' for tracking DPA resources Dan Williams
2022-06-28 16:55 ` Jonathan Cameron
2022-07-10 2:40 ` Dan Williams
2022-06-24 2:46 ` [PATCH 12/46] cxl/mem: Convert partition-info to resources Dan Williams
2022-06-28 17:02 ` Jonathan Cameron
2022-06-24 2:46 ` [PATCH 13/46] cxl/hdm: Require all decoders to be enumerated Dan Williams
2022-06-28 17:04 ` Jonathan Cameron
2022-06-24 2:46 ` [PATCH 14/46] cxl/hdm: Enumerate allocated DPA Dan Williams
2022-06-29 14:43 ` Jonathan Cameron
2022-07-10 3:03 ` Dan Williams
2022-07-19 14:25 ` Jonathan Cameron
2022-06-24 2:46 ` [PATCH 15/46] cxl/Documentation: List attribute permissions Dan Williams
2022-06-28 3:16 ` Alison Schofield
2022-06-29 14:59 ` Jonathan Cameron
2022-06-24 2:46 ` [PATCH 16/46] cxl/hdm: Add 'mode' attribute to decoder objects Dan Williams
2022-06-29 15:28 ` Jonathan Cameron
2022-07-10 3:45 ` Dan Williams
2022-06-24 2:47 ` [PATCH 17/46] cxl/hdm: Track next decoder to allocate Dan Williams
2022-06-29 15:31 ` Jonathan Cameron
2022-07-10 3:55 ` Dan Williams
2022-07-19 14:27 ` Jonathan Cameron
2022-07-10 16:34 ` Dan Williams
2022-06-24 2:47 ` [PATCH 18/46] cxl/hdm: Add support for allocating DPA to an endpoint decoder Dan Williams
2022-06-29 15:56 ` Jonathan Cameron
2022-07-10 16:53 ` Dan Williams
2022-06-24 2:47 ` [PATCH 19/46] cxl/debug: Move debugfs init to cxl_core_init() Dan Williams
2022-06-29 15:58 ` Jonathan Cameron
2022-06-24 2:47 ` [PATCH 20/46] cxl/mem: Add a debugfs version of 'iomem' for DPA, 'dpamem' Dan Williams
2022-06-29 16:08 ` Jonathan Cameron
2022-07-10 17:09 ` Dan Williams
2022-06-24 2:47 ` [PATCH 21/46] tools/testing/cxl: Move cxl_test resources to the top of memory Dan Williams
2022-06-29 16:11 ` Jonathan Cameron
2022-07-10 17:19 ` Dan Williams
2022-06-24 2:47 ` [PATCH 22/46] tools/testing/cxl: Expand CFMWS windows Dan Williams
2022-06-29 16:14 ` Jonathan Cameron
2022-06-24 2:47 ` [PATCH 23/46] tools/testing/cxl: Add partition support Dan Williams
2022-06-29 16:20 ` Jonathan Cameron
2022-06-24 2:48 ` [PATCH 24/46] tools/testing/cxl: Fix decoder default state Dan Williams
2022-06-29 16:22 ` Jonathan Cameron
2022-07-10 17:33 ` Dan Williams
2022-06-24 2:48 ` [PATCH 25/46] cxl/port: Record dport in endpoint references Dan Williams
2022-06-29 16:49 ` Jonathan Cameron
2022-07-10 18:40 ` Dan Williams
2022-06-24 4:19 ` [PATCH 26/46] cxl/port: Record parent dport when adding ports Dan Williams
2022-06-29 17:02 ` Jonathan Cameron
2022-06-24 4:19 ` [PATCH 27/46] cxl/port: Move 'cxl_ep' references to an xarray per port Dan Williams
2022-06-29 17:19 ` Jonathan Cameron
2022-06-24 4:19 ` [PATCH 28/46] cxl/port: Move dport tracking to an xarray Dan Williams
2022-06-30 9:18 ` Jonathan Cameron
2022-07-10 19:06 ` Dan Williams
2022-06-24 4:19 ` [PATCH 29/46] cxl/port: Cache CXL host bridge data Dan Williams
2022-06-30 9:21 ` Jonathan Cameron
2022-07-10 19:09 ` Dan Williams
2022-06-24 4:19 ` [PATCH 30/46] cxl/hdm: Add sysfs attributes for interleave ways + granularity Dan Williams
2022-06-30 9:26 ` Jonathan Cameron
2022-07-10 20:40 ` Dan Williams
2022-07-19 14:32 ` Jonathan Cameron
2022-06-24 4:19 ` [PATCH 31/46] cxl/hdm: Initialize decoder type for memory expander devices Dan Williams
2022-06-30 9:33 ` Jonathan Cameron
2022-06-24 4:19 ` [PATCH 32/46] cxl/mem: Enumerate port targets before adding endpoints Dan Williams
2022-06-30 9:48 ` Jonathan Cameron
2022-07-10 21:01 ` Dan Williams
2022-06-24 4:19 ` [PATCH 33/46] resource: Introduce alloc_free_mem_region() Dan Williams
2022-06-30 10:35 ` Jonathan Cameron
2022-07-10 21:58 ` Dan Williams
2022-06-24 4:19 ` [PATCH 34/46] cxl/region: Add region creation support Dan Williams
2022-06-30 13:17 ` Jonathan Cameron
2022-07-11 0:08 ` Dan Williams
2022-07-19 14:42 ` Jonathan Cameron
2022-06-24 4:19 ` [PATCH 35/46] cxl/region: Add a 'uuid' attribute Dan Williams
2022-06-28 10:29 ` Jonathan Cameron [this message]
2022-06-28 14:24 ` Dan Williams
2022-06-24 4:19 ` [PATCH 36/46] cxl/region: Add interleave ways attribute Dan Williams
2022-06-30 13:44 ` Jonathan Cameron
2022-07-11 0:32 ` Dan Williams
2022-07-19 14:47 ` Jonathan Cameron
2022-07-19 22:15 ` Dan Williams
2022-07-20 9:59 ` Jonathan Cameron
2022-06-30 13:45 ` Jonathan Cameron
2022-06-24 4:19 ` [PATCH 37/46] cxl/region: Allocate host physical address (HPA) capacity to new regions Dan Williams
2022-06-30 13:56 ` Jonathan Cameron
2022-07-11 0:47 ` Dan Williams
2022-06-24 4:19 ` [PATCH 38/46] cxl/region: Enable the assignment of endpoint decoders to regions Dan Williams
2022-06-30 14:31 ` Jonathan Cameron
2022-07-11 1:12 ` Dan Williams
2022-06-24 4:19 ` [PATCH 39/46] cxl/acpi: Add a host-bridge index lookup mechanism Dan Williams
2022-06-30 15:48 ` Jonathan Cameron
2022-06-24 4:19 ` [PATCH 40/46] cxl/region: Attach endpoint decoders Dan Williams
2022-06-24 18:25 ` Jonathan Cameron
2022-06-24 18:49 ` Dan Williams
2022-06-24 20:51 ` Dan Williams
2022-06-24 23:21 ` Dan Williams
2022-06-30 16:34 ` Jonathan Cameron
2022-07-11 2:02 ` Dan Williams
2022-06-24 4:19 ` [PATCH 41/46] cxl/region: Program target lists Dan Williams
2022-06-24 4:19 ` [PATCH 42/46] cxl/hdm: Commit decoder state to hardware Dan Williams
2022-06-30 17:05 ` Jonathan Cameron
2022-07-11 3:02 ` Dan Williams
2022-06-24 4:19 ` [PATCH 43/46] cxl/region: Add region driver boiler plate Dan Williams
2022-06-30 17:09 ` Jonathan Cameron
2022-06-24 4:19 ` [PATCH 44/46] cxl/pmem: Delete unused nvdimm attribute Dan Williams
2022-06-30 17:10 ` Jonathan Cameron
2022-06-24 4:19 ` [PATCH 45/46] cxl/pmem: Fix offline_nvdimm_bus() to offline by bridge Dan Williams
2022-06-30 17:14 ` Jonathan Cameron
2022-07-11 19:49 ` Dan Williams
2022-06-24 4:19 ` [PATCH 46/46] cxl/region: Introduce cxl_pmem_region objects Dan Williams
2022-06-30 17:34 ` Jonathan Cameron
2022-07-11 20:05 ` Dan Williams
2022-06-24 15:13 ` [PATCH 00/46] CXL PMEM Region Provisioning Jonathan Cameron
2022-06-24 15:32 ` Dan Williams
2022-06-28 3:12 ` Alison Schofield
2022-06-28 3:34 ` Dan Williams
2022-07-02 2:26 ` Alison Schofield
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